3 bool "Hardware crypto devices"
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
9 If you say N, all options in this submenu will be skipped and disabled.
13 config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
25 config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
31 Use VIA PadLock for AES algorithm.
33 Available in VIA C3 and newer CPUs.
35 If unsure say M. The compiled module will be
38 config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
45 Use VIA PadLock for SHA1/SHA256 algorithms.
47 Available in VIA C7 and newer processors.
49 If unsure say M. The compiled module will be
52 config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
56 select CRYPTO_BLKCIPHER
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
65 tristate "Support for PCI-attached cryptographic adapters"
69 Select this option if you want to use a PCI-attached cryptographic
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
76 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
79 config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
87 It is available as of z990.
89 config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
97 It is available as of z9.
99 config CRYPTO_SHA512_S390
100 tristate "SHA384 and SHA512 digest algorithm"
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
107 It is available as of z10.
109 config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
113 select CRYPTO_BLKCIPHER
116 This is the s390 hardware accelerated implementation of the
117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
122 config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
126 select CRYPTO_BLKCIPHER
128 This is the s390 hardware accelerated implementation of the
129 AES cipher algorithms (FIPS-197).
131 As of z9 the ECB and CBC modes are hardware accelerated
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
140 tristate "Pseudo random number generator device driver"
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
150 It is available as of z9.
152 config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
160 It is available as of z196.
162 config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
167 select CRYPTO_BLKCIPHER2
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
174 Currently the driver supports AES in ECB and CBC mode without DMA.
176 config CRYPTO_DEV_NIAGARA2
177 tristate "Niagara2 Stream Processing Unit driver"
182 Each core of a Niagara2 processor contains a Stream
183 Processing Unit, which itself contains several cryptographic
184 sub-units. One set provides the Modular Arithmetic Unit,
185 used for SSL offload. The other set provides the Cipher
186 Group, which can perform encryption, decryption, hashing,
187 checksumming, and raw copies.
189 config CRYPTO_DEV_HIFN_795X
190 tristate "Driver HIFN 795x crypto accelerator chips"
193 select CRYPTO_BLKCIPHER
194 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
196 depends on !ARCH_DMA_ADDR_T_64BIT
198 This option allows you to have support for HIFN 795x crypto adapters.
200 config CRYPTO_DEV_HIFN_795X_RNG
201 bool "HIFN 795x random number generator"
202 depends on CRYPTO_DEV_HIFN_795X
204 Select this option if you want to enable the random number generator
205 on the HIFN 795x crypto adapters.
207 source drivers/crypto/caam/Kconfig
209 config CRYPTO_DEV_TALITOS
210 tristate "Talitos Freescale Security Engine (SEC)"
212 select CRYPTO_AUTHENC
216 Say 'Y' here to use the Freescale Security Engine (SEC)
217 to offload cryptographic algorithm computation.
219 The Freescale SEC is present on PowerQUICC 'E' processors, such
220 as the MPC8349E and MPC8548E.
222 To compile this driver as a module, choose M here: the module
223 will be called talitos.
225 config CRYPTO_DEV_IXP4XX
226 tristate "Driver for IXP4xx crypto hardware acceleration"
227 depends on ARCH_IXP4XX
230 select CRYPTO_AUTHENC
231 select CRYPTO_BLKCIPHER
233 Driver for the IXP4xx NPE crypto engine.
235 config CRYPTO_DEV_PPC4XX
236 tristate "Driver AMCC PPC4xx crypto accelerator"
237 depends on PPC && 4xx
240 select CRYPTO_BLKCIPHER
242 This option allows you to have support for AMCC crypto acceleration.
244 config CRYPTO_DEV_OMAP_SHAM
245 tristate "Support for OMAP SHA1/MD5 hw accelerator"
246 depends on ARCH_OMAP2 || ARCH_OMAP3
250 OMAP processors have SHA1/MD5 hw accelerator. Select this if you
251 want to use the OMAP module for SHA1/MD5 algorithms.
253 config CRYPTO_DEV_OMAP_AES
254 tristate "Support for OMAP AES hw engine"
255 depends on ARCH_OMAP2 || ARCH_OMAP3
258 OMAP processors have AES module accelerator. Select this if you
259 want to use the OMAP module for AES algorithms.
261 config CRYPTO_DEV_PICOXCELL
262 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
263 depends on ARCH_PICOXCELL && HAVE_CLK
265 select CRYPTO_AUTHENC
272 This option enables support for the hardware offload engines in the
273 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
274 and for 3gpp Layer 2 ciphering support.
276 Saying m here will build a module named pipcoxcell_crypto.
278 config CRYPTO_DEV_S5P
279 tristate "Support for Samsung S5PV210 crypto accelerator"
280 depends on ARCH_S5PV210
283 select CRYPTO_BLKCIPHER
285 This option allows you to have support for S5P crypto acceleration.
286 Select this to offload Samsung S5PV210 or S5PC110 from AES
287 algorithms execution.
289 config CRYPTO_DEV_TEGRA_AES
290 tristate "Support for TEGRA AES hw engine"
291 depends on ARCH_TEGRA
294 TEGRA processors have AES module accelerator. Select this if you
295 want to use the TEGRA module for AES algorithms.
297 To compile this driver as a module, choose M here: the module
298 will be called tegra-aes.
301 tristate "Support for Power7+ in-Nest cryptographic acceleration"
302 depends on PPC64 && IBMVIO
308 select CRYPTO_AUTHENC
313 Support for Power7+ in-Nest cryptographic acceleration. This
314 module supports acceleration for AES and SHA2 algorithms. If you
315 choose 'M' here, this module will be called nx_crypto.
317 config CRYPTO_DEV_UX500
318 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
319 depends on ARCH_U8500
322 Driver for ST-Ericsson UX500 crypto engine.
325 source "drivers/crypto/ux500/Kconfig"
326 endif # if CRYPTO_DEV_UX500
328 config CRYPTO_DEV_BFIN_CRC
329 tristate "Support for Blackfin CRC hardware"
332 Newer Blackfin processors have CRC hardware. Select this if you
333 want to use the Blackfin CRC module.
335 config CRYPTO_DEV_ATMEL_AES
336 tristate "Support for Atmel AES hw accelerator"
342 select CRYPTO_BLKCIPHER
343 select CONFIG_AT_HDMAC
345 Some Atmel processors have AES hw accelerator.
346 Select this if you want to use the Atmel module for
349 To compile this driver as a module, choose M here: the module
350 will be called atmel-aes.