Merge branch 'for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mason...
[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / clk / clk-gpio.c
1 /*
2 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
3 *
4 * Authors:
5 * Jyri Sarha <jsarha@ti.com>
6 * Sergej Sawazki <ce3a@gmx.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Gpio controlled clock implementation
13 */
14
15 #include <linux/clk-provider.h>
16 #include <linux/export.h>
17 #include <linux/slab.h>
18 #include <linux/gpio.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/of_gpio.h>
21 #include <linux/err.h>
22 #include <linux/device.h>
23
24 /**
25 * DOC: basic gpio gated clock which can be enabled and disabled
26 * with gpio output
27 * Traits of this clock:
28 * prepare - clk_(un)prepare only ensures parent is (un)prepared
29 * enable - clk_enable and clk_disable are functional & control gpio
30 * rate - inherits rate from parent. No clk_set_rate support
31 * parent - fixed parent. No clk_set_parent support
32 */
33
34 #define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
35
36 static int clk_gpio_gate_enable(struct clk_hw *hw)
37 {
38 struct clk_gpio *clk = to_clk_gpio(hw);
39
40 gpiod_set_value(clk->gpiod, 1);
41
42 return 0;
43 }
44
45 static void clk_gpio_gate_disable(struct clk_hw *hw)
46 {
47 struct clk_gpio *clk = to_clk_gpio(hw);
48
49 gpiod_set_value(clk->gpiod, 0);
50 }
51
52 static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
53 {
54 struct clk_gpio *clk = to_clk_gpio(hw);
55
56 return gpiod_get_value(clk->gpiod);
57 }
58
59 const struct clk_ops clk_gpio_gate_ops = {
60 .enable = clk_gpio_gate_enable,
61 .disable = clk_gpio_gate_disable,
62 .is_enabled = clk_gpio_gate_is_enabled,
63 };
64 EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
65
66 /**
67 * DOC: basic clock multiplexer which can be controlled with a gpio output
68 * Traits of this clock:
69 * prepare - clk_prepare only ensures that parents are prepared
70 * rate - rate is only affected by parent switching. No clk_set_rate support
71 * parent - parent is adjustable through clk_set_parent
72 */
73
74 static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
75 {
76 struct clk_gpio *clk = to_clk_gpio(hw);
77
78 return gpiod_get_value(clk->gpiod);
79 }
80
81 static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
82 {
83 struct clk_gpio *clk = to_clk_gpio(hw);
84
85 gpiod_set_value(clk->gpiod, index);
86
87 return 0;
88 }
89
90 const struct clk_ops clk_gpio_mux_ops = {
91 .get_parent = clk_gpio_mux_get_parent,
92 .set_parent = clk_gpio_mux_set_parent,
93 .determine_rate = __clk_mux_determine_rate,
94 };
95 EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
96
97 static struct clk *clk_register_gpio(struct device *dev, const char *name,
98 const char * const *parent_names, u8 num_parents, unsigned gpio,
99 bool active_low, unsigned long flags,
100 const struct clk_ops *clk_gpio_ops)
101 {
102 struct clk_gpio *clk_gpio;
103 struct clk *clk;
104 struct clk_init_data init = {};
105 unsigned long gpio_flags;
106 int err;
107
108 if (dev)
109 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
110 else
111 clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
112
113 if (!clk_gpio)
114 return ERR_PTR(-ENOMEM);
115
116 if (active_low)
117 gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_HIGH;
118 else
119 gpio_flags = GPIOF_OUT_INIT_LOW;
120
121 if (dev)
122 err = devm_gpio_request_one(dev, gpio, gpio_flags, name);
123 else
124 err = gpio_request_one(gpio, gpio_flags, name);
125 if (err) {
126 if (err != -EPROBE_DEFER)
127 pr_err("%s: %s: Error requesting clock control gpio %u\n",
128 __func__, name, gpio);
129 if (!dev)
130 kfree(clk_gpio);
131
132 return ERR_PTR(err);
133 }
134
135 init.name = name;
136 init.ops = clk_gpio_ops;
137 init.flags = flags | CLK_IS_BASIC;
138 init.parent_names = parent_names;
139 init.num_parents = num_parents;
140
141 clk_gpio->gpiod = gpio_to_desc(gpio);
142 clk_gpio->hw.init = &init;
143
144 if (dev)
145 clk = devm_clk_register(dev, &clk_gpio->hw);
146 else
147 clk = clk_register(NULL, &clk_gpio->hw);
148
149 if (!IS_ERR(clk))
150 return clk;
151
152 if (!dev) {
153 gpiod_put(clk_gpio->gpiod);
154 kfree(clk_gpio);
155 }
156
157 return clk;
158 }
159
160 /**
161 * clk_register_gpio_gate - register a gpio clock gate with the clock framework
162 * @dev: device that is registering this clock
163 * @name: name of this clock
164 * @parent_name: name of this clock's parent
165 * @gpio: gpio number to gate this clock
166 * @active_low: true if gpio should be set to 0 to enable clock
167 * @flags: clock flags
168 */
169 struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
170 const char *parent_name, unsigned gpio, bool active_low,
171 unsigned long flags)
172 {
173 return clk_register_gpio(dev, name,
174 (parent_name ? &parent_name : NULL),
175 (parent_name ? 1 : 0), gpio, active_low, flags,
176 &clk_gpio_gate_ops);
177 }
178 EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
179
180 /**
181 * clk_register_gpio_mux - register a gpio clock mux with the clock framework
182 * @dev: device that is registering this clock
183 * @name: name of this clock
184 * @parent_names: names of this clock's parents
185 * @num_parents: number of parents listed in @parent_names
186 * @gpio: gpio number to gate this clock
187 * @active_low: true if gpio should be set to 0 to enable clock
188 * @flags: clock flags
189 */
190 struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
191 const char * const *parent_names, u8 num_parents, unsigned gpio,
192 bool active_low, unsigned long flags)
193 {
194 if (num_parents != 2) {
195 pr_err("mux-clock %s must have 2 parents\n", name);
196 return ERR_PTR(-EINVAL);
197 }
198
199 return clk_register_gpio(dev, name, parent_names, num_parents,
200 gpio, active_low, flags, &clk_gpio_mux_ops);
201 }
202 EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
203
204 #ifdef CONFIG_OF
205 /**
206 * clk_register_get() has to be delayed, because -EPROBE_DEFER
207 * can not be handled properly at of_clk_init() call time.
208 */
209
210 struct clk_gpio_delayed_register_data {
211 const char *gpio_name;
212 struct device_node *node;
213 struct mutex lock;
214 struct clk *clk;
215 struct clk *(*clk_register_get)(const char *name,
216 const char * const *parent_names, u8 num_parents,
217 unsigned gpio, bool active_low);
218 };
219
220 static struct clk *of_clk_gpio_delayed_register_get(
221 struct of_phandle_args *clkspec, void *_data)
222 {
223 struct clk_gpio_delayed_register_data *data = _data;
224 struct clk *clk;
225 const char **parent_names;
226 int i, num_parents;
227 int gpio;
228 enum of_gpio_flags of_flags;
229
230 mutex_lock(&data->lock);
231
232 if (data->clk) {
233 mutex_unlock(&data->lock);
234 return data->clk;
235 }
236
237 gpio = of_get_named_gpio_flags(data->node, data->gpio_name, 0,
238 &of_flags);
239 if (gpio < 0) {
240 mutex_unlock(&data->lock);
241 if (gpio == -EPROBE_DEFER)
242 pr_debug("%s: %s: GPIOs not yet available, retry later\n",
243 data->node->name, __func__);
244 else
245 pr_err("%s: %s: Can't get '%s' DT property\n",
246 data->node->name, __func__,
247 data->gpio_name);
248 return ERR_PTR(gpio);
249 }
250
251 num_parents = of_clk_get_parent_count(data->node);
252
253 parent_names = kcalloc(num_parents, sizeof(char *), GFP_KERNEL);
254 if (!parent_names) {
255 clk = ERR_PTR(-ENOMEM);
256 goto out;
257 }
258
259 for (i = 0; i < num_parents; i++)
260 parent_names[i] = of_clk_get_parent_name(data->node, i);
261
262 clk = data->clk_register_get(data->node->name, parent_names,
263 num_parents, gpio, of_flags & OF_GPIO_ACTIVE_LOW);
264 if (IS_ERR(clk))
265 goto out;
266
267 data->clk = clk;
268 out:
269 mutex_unlock(&data->lock);
270 kfree(parent_names);
271
272 return clk;
273 }
274
275 static struct clk *of_clk_gpio_gate_delayed_register_get(const char *name,
276 const char * const *parent_names, u8 num_parents,
277 unsigned gpio, bool active_low)
278 {
279 return clk_register_gpio_gate(NULL, name, parent_names[0],
280 gpio, active_low, 0);
281 }
282
283 static struct clk *of_clk_gpio_mux_delayed_register_get(const char *name,
284 const char * const *parent_names, u8 num_parents, unsigned gpio,
285 bool active_low)
286 {
287 return clk_register_gpio_mux(NULL, name, parent_names, num_parents,
288 gpio, active_low, 0);
289 }
290
291 static void __init of_gpio_clk_setup(struct device_node *node,
292 const char *gpio_name,
293 struct clk *(*clk_register_get)(const char *name,
294 const char * const *parent_names,
295 u8 num_parents,
296 unsigned gpio, bool active_low))
297 {
298 struct clk_gpio_delayed_register_data *data;
299
300 data = kzalloc(sizeof(*data), GFP_KERNEL);
301 if (!data)
302 return;
303
304 data->node = node;
305 data->gpio_name = gpio_name;
306 data->clk_register_get = clk_register_get;
307 mutex_init(&data->lock);
308
309 of_clk_add_provider(node, of_clk_gpio_delayed_register_get, data);
310 }
311
312 static void __init of_gpio_gate_clk_setup(struct device_node *node)
313 {
314 of_gpio_clk_setup(node, "enable-gpios",
315 of_clk_gpio_gate_delayed_register_get);
316 }
317 CLK_OF_DECLARE(gpio_gate_clk, "gpio-gate-clock", of_gpio_gate_clk_setup);
318
319 void __init of_gpio_mux_clk_setup(struct device_node *node)
320 {
321 of_gpio_clk_setup(node, "select-gpios",
322 of_clk_gpio_mux_delayed_register_get);
323 }
324 CLK_OF_DECLARE(gpio_mux_clk, "gpio-mux-clock", of_gpio_mux_clk_setup);
325 #endif