2 * Copyright (C) 2005, 2006 IBM Corporation
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Kylene Hall <kjhall@us.ibm.com>
8 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 * Device driver for TCG/TCPA TPM (trusted platform module).
11 * Specifications at www.trustedcomputinggroup.org
13 * This device driver implements the TPM interface as defined in
14 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation, version 2 of the
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/pnp.h>
25 #include <linux/slab.h>
26 #include <linux/interrupt.h>
27 #include <linux/wait.h>
28 #include <linux/acpi.h>
29 #include <linux/freezer.h>
33 TPM_ACCESS_VALID
= 0x80,
34 TPM_ACCESS_ACTIVE_LOCALITY
= 0x20,
35 TPM_ACCESS_REQUEST_PENDING
= 0x04,
36 TPM_ACCESS_REQUEST_USE
= 0x02,
41 TPM_STS_COMMAND_READY
= 0x40,
43 TPM_STS_DATA_AVAIL
= 0x10,
44 TPM_STS_DATA_EXPECT
= 0x08,
48 TPM_GLOBAL_INT_ENABLE
= 0x80000000,
49 TPM_INTF_BURST_COUNT_STATIC
= 0x100,
50 TPM_INTF_CMD_READY_INT
= 0x080,
51 TPM_INTF_INT_EDGE_FALLING
= 0x040,
52 TPM_INTF_INT_EDGE_RISING
= 0x020,
53 TPM_INTF_INT_LEVEL_LOW
= 0x010,
54 TPM_INTF_INT_LEVEL_HIGH
= 0x008,
55 TPM_INTF_LOCALITY_CHANGE_INT
= 0x004,
56 TPM_INTF_STS_VALID_INT
= 0x002,
57 TPM_INTF_DATA_AVAIL_INT
= 0x001,
61 TIS_MEM_BASE
= 0xFED40000,
63 TIS_SHORT_TIMEOUT
= 750, /* ms */
64 TIS_LONG_TIMEOUT
= 2000, /* 2 sec */
67 #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
68 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
69 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
70 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
71 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
72 #define TPM_STS(l) (0x0018 | ((l) << 12))
73 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
75 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
76 #define TPM_RID(l) (0x0F04 | ((l) << 12))
78 static LIST_HEAD(tis_chips
);
79 static DEFINE_MUTEX(tis_lock
);
81 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
82 static int is_itpm(struct pnp_dev
*dev
)
84 struct acpi_device
*acpi
= pnp_acpi_device(dev
);
85 struct acpi_hardware_id
*id
;
87 list_for_each_entry(id
, &acpi
->pnp
.ids
, list
) {
88 if (!strcmp("INTC0102", id
->id
))
95 static inline int is_itpm(struct pnp_dev
*dev
)
101 static int check_locality(struct tpm_chip
*chip
, int l
)
103 if ((ioread8(chip
->vendor
.iobase
+ TPM_ACCESS(l
)) &
104 (TPM_ACCESS_ACTIVE_LOCALITY
| TPM_ACCESS_VALID
)) ==
105 (TPM_ACCESS_ACTIVE_LOCALITY
| TPM_ACCESS_VALID
))
106 return chip
->vendor
.locality
= l
;
111 static void release_locality(struct tpm_chip
*chip
, int l
, int force
)
113 if (force
|| (ioread8(chip
->vendor
.iobase
+ TPM_ACCESS(l
)) &
114 (TPM_ACCESS_REQUEST_PENDING
| TPM_ACCESS_VALID
)) ==
115 (TPM_ACCESS_REQUEST_PENDING
| TPM_ACCESS_VALID
))
116 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY
,
117 chip
->vendor
.iobase
+ TPM_ACCESS(l
));
120 static int request_locality(struct tpm_chip
*chip
, int l
)
122 unsigned long stop
, timeout
;
125 if (check_locality(chip
, l
) >= 0)
128 iowrite8(TPM_ACCESS_REQUEST_USE
,
129 chip
->vendor
.iobase
+ TPM_ACCESS(l
));
131 stop
= jiffies
+ chip
->vendor
.timeout_a
;
133 if (chip
->vendor
.irq
) {
135 timeout
= stop
- jiffies
;
136 if ((long)timeout
<= 0)
138 rc
= wait_event_interruptible_timeout(chip
->vendor
.int_queue
,
144 if (rc
== -ERESTARTSYS
&& freezing(current
)) {
145 clear_thread_flag(TIF_SIGPENDING
);
149 /* wait for burstcount */
151 if (check_locality(chip
, l
) >= 0)
155 while (time_before(jiffies
, stop
));
160 static u8
tpm_tis_status(struct tpm_chip
*chip
)
162 return ioread8(chip
->vendor
.iobase
+
163 TPM_STS(chip
->vendor
.locality
));
166 static void tpm_tis_ready(struct tpm_chip
*chip
)
168 /* this causes the current command to be aborted */
169 iowrite8(TPM_STS_COMMAND_READY
,
170 chip
->vendor
.iobase
+ TPM_STS(chip
->vendor
.locality
));
173 static int get_burstcount(struct tpm_chip
*chip
)
178 /* wait for burstcount */
179 /* which timeout value, spec has 2 answers (c & d) */
180 stop
= jiffies
+ chip
->vendor
.timeout_d
;
182 burstcnt
= ioread8(chip
->vendor
.iobase
+
183 TPM_STS(chip
->vendor
.locality
) + 1);
184 burstcnt
+= ioread8(chip
->vendor
.iobase
+
185 TPM_STS(chip
->vendor
.locality
) +
190 } while (time_before(jiffies
, stop
));
194 static int recv_data(struct tpm_chip
*chip
, u8
*buf
, size_t count
)
196 int size
= 0, burstcnt
;
197 while (size
< count
&&
198 wait_for_tpm_stat(chip
,
199 TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
200 chip
->vendor
.timeout_c
,
201 &chip
->vendor
.read_queue
)
203 burstcnt
= get_burstcount(chip
);
204 for (; burstcnt
> 0 && size
< count
; burstcnt
--)
205 buf
[size
++] = ioread8(chip
->vendor
.iobase
+
206 TPM_DATA_FIFO(chip
->vendor
.
212 static int tpm_tis_recv(struct tpm_chip
*chip
, u8
*buf
, size_t count
)
215 int expected
, status
;
217 if (count
< TPM_HEADER_SIZE
) {
222 /* read first 10 bytes, including tag, paramsize, and result */
224 recv_data(chip
, buf
, TPM_HEADER_SIZE
)) < TPM_HEADER_SIZE
) {
225 dev_err(chip
->dev
, "Unable to read header\n");
229 expected
= be32_to_cpu(*(__be32
*) (buf
+ 2));
230 if (expected
> count
) {
236 recv_data(chip
, &buf
[TPM_HEADER_SIZE
],
237 expected
- TPM_HEADER_SIZE
)) < expected
) {
238 dev_err(chip
->dev
, "Unable to read remainder of result\n");
243 wait_for_tpm_stat(chip
, TPM_STS_VALID
, chip
->vendor
.timeout_c
,
244 &chip
->vendor
.int_queue
);
245 status
= tpm_tis_status(chip
);
246 if (status
& TPM_STS_DATA_AVAIL
) { /* retry? */
247 dev_err(chip
->dev
, "Error left over data\n");
254 release_locality(chip
, chip
->vendor
.locality
, 0);
259 module_param(itpm
, bool, 0444);
260 MODULE_PARM_DESC(itpm
, "Force iTPM workarounds (found on some Lenovo laptops)");
263 * If interrupts are used (signaled by an irq set in the vendor structure)
264 * tpm.c can skip polling for the data to be available as the interrupt is
267 static int tpm_tis_send_data(struct tpm_chip
*chip
, u8
*buf
, size_t len
)
269 int rc
, status
, burstcnt
;
272 if (request_locality(chip
, 0) < 0)
275 status
= tpm_tis_status(chip
);
276 if ((status
& TPM_STS_COMMAND_READY
) == 0) {
278 if (wait_for_tpm_stat
279 (chip
, TPM_STS_COMMAND_READY
, chip
->vendor
.timeout_b
,
280 &chip
->vendor
.int_queue
) < 0) {
286 while (count
< len
- 1) {
287 burstcnt
= get_burstcount(chip
);
288 for (; burstcnt
> 0 && count
< len
- 1; burstcnt
--) {
289 iowrite8(buf
[count
], chip
->vendor
.iobase
+
290 TPM_DATA_FIFO(chip
->vendor
.locality
));
294 wait_for_tpm_stat(chip
, TPM_STS_VALID
, chip
->vendor
.timeout_c
,
295 &chip
->vendor
.int_queue
);
296 status
= tpm_tis_status(chip
);
297 if (!itpm
&& (status
& TPM_STS_DATA_EXPECT
) == 0) {
303 /* write last byte */
305 chip
->vendor
.iobase
+ TPM_DATA_FIFO(chip
->vendor
.locality
));
306 wait_for_tpm_stat(chip
, TPM_STS_VALID
, chip
->vendor
.timeout_c
,
307 &chip
->vendor
.int_queue
);
308 status
= tpm_tis_status(chip
);
309 if ((status
& TPM_STS_DATA_EXPECT
) != 0) {
318 release_locality(chip
, chip
->vendor
.locality
, 0);
323 * If interrupts are used (signaled by an irq set in the vendor structure)
324 * tpm.c can skip polling for the data to be available as the interrupt is
327 static int tpm_tis_send(struct tpm_chip
*chip
, u8
*buf
, size_t len
)
332 rc
= tpm_tis_send_data(chip
, buf
, len
);
338 chip
->vendor
.iobase
+ TPM_STS(chip
->vendor
.locality
));
340 if (chip
->vendor
.irq
) {
341 ordinal
= be32_to_cpu(*((__be32
*) (buf
+ 6)));
342 if (wait_for_tpm_stat
343 (chip
, TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
344 tpm_calc_ordinal_duration(chip
, ordinal
),
345 &chip
->vendor
.read_queue
) < 0) {
353 release_locality(chip
, chip
->vendor
.locality
, 0);
358 * Early probing for iTPM with STS_DATA_EXPECT flaw.
359 * Try sending command without itpm flag set and if that
360 * fails, repeat with itpm flag set.
362 static int probe_itpm(struct tpm_chip
*chip
)
365 u8 cmd_getticks
[] = {
366 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
367 0x00, 0x00, 0x00, 0xf1
369 size_t len
= sizeof(cmd_getticks
);
370 bool rem_itpm
= itpm
;
371 u16 vendor
= ioread16(chip
->vendor
.iobase
+ TPM_DID_VID(0));
373 /* probe only iTPMS */
374 if (vendor
!= TPM_VID_INTEL
)
379 rc
= tpm_tis_send_data(chip
, cmd_getticks
, len
);
384 release_locality(chip
, chip
->vendor
.locality
, 0);
388 rc
= tpm_tis_send_data(chip
, cmd_getticks
, len
);
390 dev_info(chip
->dev
, "Detected an iTPM.\n");
398 release_locality(chip
, chip
->vendor
.locality
, 0);
403 static const struct file_operations tis_ops
= {
404 .owner
= THIS_MODULE
,
409 .release
= tpm_release
,
412 static DEVICE_ATTR(pubek
, S_IRUGO
, tpm_show_pubek
, NULL
);
413 static DEVICE_ATTR(pcrs
, S_IRUGO
, tpm_show_pcrs
, NULL
);
414 static DEVICE_ATTR(enabled
, S_IRUGO
, tpm_show_enabled
, NULL
);
415 static DEVICE_ATTR(active
, S_IRUGO
, tpm_show_active
, NULL
);
416 static DEVICE_ATTR(owned
, S_IRUGO
, tpm_show_owned
, NULL
);
417 static DEVICE_ATTR(temp_deactivated
, S_IRUGO
, tpm_show_temp_deactivated
,
419 static DEVICE_ATTR(caps
, S_IRUGO
, tpm_show_caps_1_2
, NULL
);
420 static DEVICE_ATTR(cancel
, S_IWUSR
| S_IWGRP
, NULL
, tpm_store_cancel
);
421 static DEVICE_ATTR(durations
, S_IRUGO
, tpm_show_durations
, NULL
);
422 static DEVICE_ATTR(timeouts
, S_IRUGO
, tpm_show_timeouts
, NULL
);
424 static struct attribute
*tis_attrs
[] = {
425 &dev_attr_pubek
.attr
,
427 &dev_attr_enabled
.attr
,
428 &dev_attr_active
.attr
,
429 &dev_attr_owned
.attr
,
430 &dev_attr_temp_deactivated
.attr
,
432 &dev_attr_cancel
.attr
,
433 &dev_attr_durations
.attr
,
434 &dev_attr_timeouts
.attr
, NULL
,
437 static struct attribute_group tis_attr_grp
= {
441 static struct tpm_vendor_specific tpm_tis
= {
442 .status
= tpm_tis_status
,
443 .recv
= tpm_tis_recv
,
444 .send
= tpm_tis_send
,
445 .cancel
= tpm_tis_ready
,
446 .req_complete_mask
= TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
447 .req_complete_val
= TPM_STS_DATA_AVAIL
| TPM_STS_VALID
,
448 .req_canceled
= TPM_STS_COMMAND_READY
,
449 .attr_group
= &tis_attr_grp
,
454 static irqreturn_t
tis_int_probe(int irq
, void *dev_id
)
456 struct tpm_chip
*chip
= dev_id
;
459 interrupt
= ioread32(chip
->vendor
.iobase
+
460 TPM_INT_STATUS(chip
->vendor
.locality
));
465 chip
->vendor
.probed_irq
= irq
;
467 /* Clear interrupts handled with TPM_EOI */
469 chip
->vendor
.iobase
+
470 TPM_INT_STATUS(chip
->vendor
.locality
));
474 static irqreturn_t
tis_int_handler(int dummy
, void *dev_id
)
476 struct tpm_chip
*chip
= dev_id
;
480 interrupt
= ioread32(chip
->vendor
.iobase
+
481 TPM_INT_STATUS(chip
->vendor
.locality
));
486 if (interrupt
& TPM_INTF_DATA_AVAIL_INT
)
487 wake_up_interruptible(&chip
->vendor
.read_queue
);
488 if (interrupt
& TPM_INTF_LOCALITY_CHANGE_INT
)
489 for (i
= 0; i
< 5; i
++)
490 if (check_locality(chip
, i
) >= 0)
493 (TPM_INTF_LOCALITY_CHANGE_INT
| TPM_INTF_STS_VALID_INT
|
494 TPM_INTF_CMD_READY_INT
))
495 wake_up_interruptible(&chip
->vendor
.int_queue
);
497 /* Clear interrupts handled with TPM_EOI */
499 chip
->vendor
.iobase
+
500 TPM_INT_STATUS(chip
->vendor
.locality
));
501 ioread32(chip
->vendor
.iobase
+ TPM_INT_STATUS(chip
->vendor
.locality
));
505 static bool interrupts
= 1;
506 module_param(interrupts
, bool, 0444);
507 MODULE_PARM_DESC(interrupts
, "Enable interrupts");
509 static int tpm_tis_init(struct device
*dev
, resource_size_t start
,
510 resource_size_t len
, unsigned int irq
)
512 u32 vendor
, intfcaps
, intmask
;
513 int rc
, i
, irq_s
, irq_e
, probe
;
514 struct tpm_chip
*chip
;
516 if (!(chip
= tpm_register_hardware(dev
, &tpm_tis
)))
519 chip
->vendor
.iobase
= ioremap(start
, len
);
520 if (!chip
->vendor
.iobase
) {
525 /* Default timeouts */
526 chip
->vendor
.timeout_a
= msecs_to_jiffies(TIS_SHORT_TIMEOUT
);
527 chip
->vendor
.timeout_b
= msecs_to_jiffies(TIS_LONG_TIMEOUT
);
528 chip
->vendor
.timeout_c
= msecs_to_jiffies(TIS_SHORT_TIMEOUT
);
529 chip
->vendor
.timeout_d
= msecs_to_jiffies(TIS_SHORT_TIMEOUT
);
531 if (request_locality(chip
, 0) != 0) {
536 vendor
= ioread32(chip
->vendor
.iobase
+ TPM_DID_VID(0));
539 "1.2 TPM (device-id 0x%X, rev-id %d)\n",
540 vendor
>> 16, ioread8(chip
->vendor
.iobase
+ TPM_RID(0)));
543 probe
= probe_itpm(chip
);
548 itpm
= (probe
== 0) ? 0 : 1;
552 dev_info(dev
, "Intel iTPM workaround enabled\n");
555 /* Figure out the capabilities */
557 ioread32(chip
->vendor
.iobase
+
558 TPM_INTF_CAPS(chip
->vendor
.locality
));
559 dev_dbg(dev
, "TPM interface capabilities (0x%x):\n",
561 if (intfcaps
& TPM_INTF_BURST_COUNT_STATIC
)
562 dev_dbg(dev
, "\tBurst Count Static\n");
563 if (intfcaps
& TPM_INTF_CMD_READY_INT
)
564 dev_dbg(dev
, "\tCommand Ready Int Support\n");
565 if (intfcaps
& TPM_INTF_INT_EDGE_FALLING
)
566 dev_dbg(dev
, "\tInterrupt Edge Falling\n");
567 if (intfcaps
& TPM_INTF_INT_EDGE_RISING
)
568 dev_dbg(dev
, "\tInterrupt Edge Rising\n");
569 if (intfcaps
& TPM_INTF_INT_LEVEL_LOW
)
570 dev_dbg(dev
, "\tInterrupt Level Low\n");
571 if (intfcaps
& TPM_INTF_INT_LEVEL_HIGH
)
572 dev_dbg(dev
, "\tInterrupt Level High\n");
573 if (intfcaps
& TPM_INTF_LOCALITY_CHANGE_INT
)
574 dev_dbg(dev
, "\tLocality Change Int Support\n");
575 if (intfcaps
& TPM_INTF_STS_VALID_INT
)
576 dev_dbg(dev
, "\tSts Valid Int Support\n");
577 if (intfcaps
& TPM_INTF_DATA_AVAIL_INT
)
578 dev_dbg(dev
, "\tData Avail Int Support\n");
580 /* get the timeouts before testing for irqs */
581 if (tpm_get_timeouts(chip
)) {
582 dev_err(dev
, "Could not get TPM timeouts and durations\n");
587 if (tpm_do_selftest(chip
)) {
588 dev_err(dev
, "TPM self test failed\n");
593 /* INTERRUPT Setup */
594 init_waitqueue_head(&chip
->vendor
.read_queue
);
595 init_waitqueue_head(&chip
->vendor
.int_queue
);
598 ioread32(chip
->vendor
.iobase
+
599 TPM_INT_ENABLE(chip
->vendor
.locality
));
601 intmask
|= TPM_INTF_CMD_READY_INT
602 | TPM_INTF_LOCALITY_CHANGE_INT
| TPM_INTF_DATA_AVAIL_INT
603 | TPM_INTF_STS_VALID_INT
;
606 chip
->vendor
.iobase
+
607 TPM_INT_ENABLE(chip
->vendor
.locality
));
609 chip
->vendor
.irq
= irq
;
610 if (interrupts
&& !chip
->vendor
.irq
) {
612 ioread8(chip
->vendor
.iobase
+
613 TPM_INT_VECTOR(chip
->vendor
.locality
));
621 for (i
= irq_s
; i
<= irq_e
&& chip
->vendor
.irq
== 0; i
++) {
622 iowrite8(i
, chip
->vendor
.iobase
+
623 TPM_INT_VECTOR(chip
->vendor
.locality
));
625 (i
, tis_int_probe
, IRQF_SHARED
,
626 chip
->vendor
.miscdev
.name
, chip
) != 0) {
628 "Unable to request irq: %d for probe\n",
633 /* Clear all existing */
635 (chip
->vendor
.iobase
+
636 TPM_INT_STATUS(chip
->vendor
.locality
)),
637 chip
->vendor
.iobase
+
638 TPM_INT_STATUS(chip
->vendor
.locality
));
641 iowrite32(intmask
| TPM_GLOBAL_INT_ENABLE
,
642 chip
->vendor
.iobase
+
643 TPM_INT_ENABLE(chip
->vendor
.locality
));
645 chip
->vendor
.probed_irq
= 0;
647 /* Generate Interrupts */
648 tpm_gen_interrupt(chip
);
650 chip
->vendor
.irq
= chip
->vendor
.probed_irq
;
652 /* free_irq will call into tis_int_probe;
653 clear all irqs we haven't seen while doing
656 (chip
->vendor
.iobase
+
657 TPM_INT_STATUS(chip
->vendor
.locality
)),
658 chip
->vendor
.iobase
+
659 TPM_INT_STATUS(chip
->vendor
.locality
));
663 chip
->vendor
.iobase
+
664 TPM_INT_ENABLE(chip
->vendor
.locality
));
668 if (chip
->vendor
.irq
) {
669 iowrite8(chip
->vendor
.irq
,
670 chip
->vendor
.iobase
+
671 TPM_INT_VECTOR(chip
->vendor
.locality
));
673 (chip
->vendor
.irq
, tis_int_handler
, IRQF_SHARED
,
674 chip
->vendor
.miscdev
.name
, chip
) != 0) {
676 "Unable to request irq: %d for use\n",
678 chip
->vendor
.irq
= 0;
680 /* Clear all existing */
682 (chip
->vendor
.iobase
+
683 TPM_INT_STATUS(chip
->vendor
.locality
)),
684 chip
->vendor
.iobase
+
685 TPM_INT_STATUS(chip
->vendor
.locality
));
688 iowrite32(intmask
| TPM_GLOBAL_INT_ENABLE
,
689 chip
->vendor
.iobase
+
690 TPM_INT_ENABLE(chip
->vendor
.locality
));
694 INIT_LIST_HEAD(&chip
->vendor
.list
);
695 mutex_lock(&tis_lock
);
696 list_add(&chip
->vendor
.list
, &tis_chips
);
697 mutex_unlock(&tis_lock
);
702 if (chip
->vendor
.iobase
)
703 iounmap(chip
->vendor
.iobase
);
704 tpm_remove_hardware(chip
->dev
);
708 #if defined(CONFIG_PNP) || defined(CONFIG_PM_SLEEP)
709 static void tpm_tis_reenable_interrupts(struct tpm_chip
*chip
)
713 /* reenable interrupts that device may have lost or
714 BIOS/firmware may have disabled */
715 iowrite8(chip
->vendor
.irq
, chip
->vendor
.iobase
+
716 TPM_INT_VECTOR(chip
->vendor
.locality
));
719 ioread32(chip
->vendor
.iobase
+
720 TPM_INT_ENABLE(chip
->vendor
.locality
));
722 intmask
|= TPM_INTF_CMD_READY_INT
723 | TPM_INTF_LOCALITY_CHANGE_INT
| TPM_INTF_DATA_AVAIL_INT
724 | TPM_INTF_STS_VALID_INT
| TPM_GLOBAL_INT_ENABLE
;
727 chip
->vendor
.iobase
+ TPM_INT_ENABLE(chip
->vendor
.locality
));
732 static int tpm_tis_pnp_init(struct pnp_dev
*pnp_dev
,
733 const struct pnp_device_id
*pnp_id
)
735 resource_size_t start
, len
;
736 unsigned int irq
= 0;
738 start
= pnp_mem_start(pnp_dev
, 0);
739 len
= pnp_mem_len(pnp_dev
, 0);
741 if (pnp_irq_valid(pnp_dev
, 0))
742 irq
= pnp_irq(pnp_dev
, 0);
746 if (is_itpm(pnp_dev
))
749 return tpm_tis_init(&pnp_dev
->dev
, start
, len
, irq
);
752 static int tpm_tis_pnp_suspend(struct pnp_dev
*dev
, pm_message_t msg
)
754 return tpm_pm_suspend(&dev
->dev
);
757 static int tpm_tis_pnp_resume(struct pnp_dev
*dev
)
759 struct tpm_chip
*chip
= pnp_get_drvdata(dev
);
762 if (chip
->vendor
.irq
)
763 tpm_tis_reenable_interrupts(chip
);
765 ret
= tpm_pm_resume(&dev
->dev
);
767 tpm_do_selftest(chip
);
772 static struct pnp_device_id tpm_pnp_tbl
[] = {
773 {"PNP0C31", 0}, /* TPM */
774 {"ATM1200", 0}, /* Atmel */
775 {"IFX0102", 0}, /* Infineon */
776 {"BCM0101", 0}, /* Broadcom */
777 {"BCM0102", 0}, /* Broadcom */
778 {"NSC1200", 0}, /* National */
779 {"ICO0102", 0}, /* Intel */
781 {"", 0}, /* User Specified */
782 {"", 0} /* Terminator */
784 MODULE_DEVICE_TABLE(pnp
, tpm_pnp_tbl
);
786 static void tpm_tis_pnp_remove(struct pnp_dev
*dev
)
788 struct tpm_chip
*chip
= pnp_get_drvdata(dev
);
790 tpm_dev_vendor_release(chip
);
796 static struct pnp_driver tis_pnp_driver
= {
798 .id_table
= tpm_pnp_tbl
,
799 .probe
= tpm_tis_pnp_init
,
800 .suspend
= tpm_tis_pnp_suspend
,
801 .resume
= tpm_tis_pnp_resume
,
802 .remove
= tpm_tis_pnp_remove
,
805 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
806 module_param_string(hid
, tpm_pnp_tbl
[TIS_HID_USR_IDX
].id
,
807 sizeof(tpm_pnp_tbl
[TIS_HID_USR_IDX
].id
), 0444);
808 MODULE_PARM_DESC(hid
, "Set additional specific HID for this driver to probe");
811 #ifdef CONFIG_PM_SLEEP
812 static int tpm_tis_resume(struct device
*dev
)
814 struct tpm_chip
*chip
= dev_get_drvdata(dev
);
816 if (chip
->vendor
.irq
)
817 tpm_tis_reenable_interrupts(chip
);
819 return tpm_pm_resume(dev
);
823 static SIMPLE_DEV_PM_OPS(tpm_tis_pm
, tpm_pm_suspend
, tpm_tis_resume
);
825 static struct platform_driver tis_drv
= {
828 .owner
= THIS_MODULE
,
833 static struct platform_device
*pdev
;
836 module_param(force
, bool, 0444);
837 MODULE_PARM_DESC(force
, "Force device probe rather than using ACPI entry");
838 static int __init
init_tis(void)
843 return pnp_register_driver(&tis_pnp_driver
);
846 rc
= platform_driver_register(&tis_drv
);
849 if (IS_ERR(pdev
=platform_device_register_simple("tpm_tis", -1, NULL
, 0)))
850 return PTR_ERR(pdev
);
851 if((rc
=tpm_tis_init(&pdev
->dev
, TIS_MEM_BASE
, TIS_MEM_LEN
, 0)) != 0) {
852 platform_device_unregister(pdev
);
853 platform_driver_unregister(&tis_drv
);
858 static void __exit
cleanup_tis(void)
860 struct tpm_vendor_specific
*i
, *j
;
861 struct tpm_chip
*chip
;
862 mutex_lock(&tis_lock
);
863 list_for_each_entry_safe(i
, j
, &tis_chips
, list
) {
864 chip
= to_tpm_chip(i
);
865 tpm_remove_hardware(chip
->dev
);
866 iowrite32(~TPM_GLOBAL_INT_ENABLE
&
867 ioread32(chip
->vendor
.iobase
+
868 TPM_INT_ENABLE(chip
->vendor
.
870 chip
->vendor
.iobase
+
871 TPM_INT_ENABLE(chip
->vendor
.locality
));
872 release_locality(chip
, chip
->vendor
.locality
, 1);
873 if (chip
->vendor
.irq
)
874 free_irq(chip
->vendor
.irq
, chip
);
878 mutex_unlock(&tis_lock
);
881 pnp_unregister_driver(&tis_pnp_driver
);
885 platform_device_unregister(pdev
);
886 platform_driver_unregister(&tis_drv
);
889 module_init(init_tis
);
890 module_exit(cleanup_tis
);
891 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
892 MODULE_DESCRIPTION("TPM Driver");
893 MODULE_VERSION("2.0");
894 MODULE_LICENSE("GPL");