drivers/char/pc8736x_gpio.c

   1 /* linux/drivers/char/pc8736x_gpio.c
   2
   3    National Semiconductor PC8736x GPIO driver.  Allows a user space
   4    process to play with the GPIO pins.
   5
   6    Copyright (c) 2005 Jim Cromie <jim.cromie@gmail.com>
   7
   8    adapted from linux/drivers/char/scx200_gpio.c
   9    Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>,
  10 */
  11
  12 #include <linux/config.h>
  13 #include <linux/fs.h>
  14 #include <linux/module.h>
  15 #include <linux/errno.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/io.h>
  19 #include <linux/ioport.h>
  20 #include <linux/mutex.h>
  21 #include <linux/nsc_gpio.h>
  22 #include <linux/platform_device.h>
  23 #include <asm/uaccess.h>
  24
  25 #define DEVNAME "pc8736x_gpio"
  26
  27 MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
  28 MODULE_DESCRIPTION("NatSemi PC-8736x GPIO Pin Driver");
  29 MODULE_LICENSE("GPL");
  30
  31 static int major;               /* default to dynamic major */
  32 module_param(major, int, 0);
  33 MODULE_PARM_DESC(major, "Major device number");
  34
  35 static DEFINE_MUTEX(pc8736x_gpio_config_lock);
  36 static unsigned pc8736x_gpio_base;
  37 static u8 pc8736x_gpio_shadow[4];
  38
  39 #define SIO_BASE1       0x2E    /* 1st command-reg to check */
  40 #define SIO_BASE2       0x4E    /* alt command-reg to check */
  41 #define SIO_BASE_OFFSET 0x20
  42
  43 #define SIO_SID         0x20    /* SuperI/O ID Register */
  44 #define SIO_SID_VALUE   0xe9    /* Expected value in SuperI/O ID Register */
  45
  46 #define SIO_CF1         0x21    /* chip config, bit0 is chip enable */
  47
  48 #define PC8736X_GPIO_SIZE       16
  49
  50 #define SIO_UNIT_SEL    0x7     /* unit select reg */
  51 #define SIO_UNIT_ACT    0x30    /* unit enable */
  52 #define SIO_GPIO_UNIT   0x7     /* unit number of GPIO */
  53 #define SIO_VLM_UNIT    0x0D
  54 #define SIO_TMS_UNIT    0x0E
  55
  56 /* config-space addrs to read/write each unit's runtime addr */
  57 #define SIO_BASE_HADDR          0x60
  58 #define SIO_BASE_LADDR          0x61
  59
  60 /* GPIO config-space pin-control addresses */
  61 #define SIO_GPIO_PIN_SELECT     0xF0
  62 #define SIO_GPIO_PIN_CONFIG     0xF1
  63 #define SIO_GPIO_PIN_EVENT      0xF2
  64
  65 static unsigned char superio_cmd = 0;
  66 static unsigned char selected_device = 0xFF;    /* bogus start val */
  67
  68 /* GPIO port runtime access, functionality */
  69 static int port_offset[] = { 0, 4, 8, 10 };     /* non-uniform offsets ! */
  70 /* static int event_capable[] = { 1, 1, 0, 0 };   ports 2,3 are hobbled */
  71
  72 #define PORT_OUT        0
  73 #define PORT_IN         1
  74 #define PORT_EVT_EN     2
  75 #define PORT_EVT_STST   3
  76
  77 static struct platform_device *pdev;  /* use in dev_*() */
  78
  79 static inline void superio_outb(int addr, int val)
  80 {
  81         outb_p(addr, superio_cmd);
  82         outb_p(val, superio_cmd + 1);
  83 }
  84
  85 static inline int superio_inb(int addr)
  86 {
  87         outb_p(addr, superio_cmd);
  88         return inb_p(superio_cmd + 1);
  89 }
  90
  91 static int pc8736x_superio_present(void)
  92 {
  93         /* try the 2 possible values, read a hardware reg to verify */
  94         superio_cmd = SIO_BASE1;
  95         if (superio_inb(SIO_SID) == SIO_SID_VALUE)
  96                 return superio_cmd;
  97
  98         superio_cmd = SIO_BASE2;
  99         if (superio_inb(SIO_SID) == SIO_SID_VALUE)
 100                 return superio_cmd;
 101
 102         return 0;
 103 }
 104
 105 static void device_select(unsigned devldn)
 106 {
 107         superio_outb(SIO_UNIT_SEL, devldn);
 108         selected_device = devldn;
 109 }
 110
 111 static void select_pin(unsigned iminor)
 112 {
 113         /* select GPIO port/pin from device minor number */
 114         device_select(SIO_GPIO_UNIT);
 115         superio_outb(SIO_GPIO_PIN_SELECT,
 116                      ((iminor << 1) & 0xF0) | (iminor & 0x7));
 117 }
 118
 119 static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits,
 120                                             u32 func_slct)
 121 {
 122         u32 config, new_config;
 123
 124         mutex_lock(&pc8736x_gpio_config_lock);
 125
 126         device_select(SIO_GPIO_UNIT);
 127         select_pin(index);
 128
 129         /* read current config value */
 130         config = superio_inb(func_slct);
 131
 132         /* set new config */
 133         new_config = (config & mask) | bits;
 134         superio_outb(func_slct, new_config);
 135
 136         mutex_unlock(&pc8736x_gpio_config_lock);
 137
 138         return config;
 139 }
 140
 141 static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits)
 142 {
 143         return pc8736x_gpio_configure_fn(index, mask, bits,
 144                                          SIO_GPIO_PIN_CONFIG);
 145 }
 146
 147 static int pc8736x_gpio_get(unsigned minor)
 148 {
 149         int port, bit, val;
 150
 151         port = minor >> 3;
 152         bit = minor & 7;
 153         val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
 154         val >>= bit;
 155         val &= 1;
 156
 157         dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n",
 158                 minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit,
 159                 val);
 160
 161         return val;
 162 }
 163
 164 static void pc8736x_gpio_set(unsigned minor, int val)
 165 {
 166         int port, bit, curval;
 167
 168         minor &= 0x1f;
 169         port = minor >> 3;
 170         bit = minor & 7;
 171         curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
 172
 173         dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n",
 174                 pc8736x_gpio_base + port_offset[port] + PORT_OUT,
 175                 curval, bit, (curval & ~(1 << bit)), val, (val << bit));
 176
 177         val = (curval & ~(1 << bit)) | (val << bit);
 178
 179         dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)"
 180                 " %2x -> %2x\n", minor, port, bit, curval, val);
 181
 182         outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT);
 183
 184         curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
 185         val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
 186
 187         dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val);
 188         pc8736x_gpio_shadow[port] = val;
 189 }
 190
 191 static void pc8736x_gpio_set_high(unsigned index)
 192 {
 193         pc8736x_gpio_set(index, 1);
 194 }
 195
 196 static void pc8736x_gpio_set_low(unsigned index)
 197 {
 198         pc8736x_gpio_set(index, 0);
 199 }
 200
 201 static int pc8736x_gpio_current(unsigned minor)
 202 {
 203         int port, bit;
 204         minor &= 0x1f;
 205         port = minor >> 3;
 206         bit = minor & 7;
 207         return ((pc8736x_gpio_shadow[port] >> bit) & 0x01);
 208 }
 209
 210 static void pc8736x_gpio_change(unsigned index)
 211 {
 212         pc8736x_gpio_set(index, !pc8736x_gpio_current(index));
 213 }
 214
 215 static struct nsc_gpio_ops pc8736x_access = {
 216         .owner          = THIS_MODULE,
 217         .gpio_config    = pc8736x_gpio_configure,
 218         .gpio_dump      = nsc_gpio_dump,
 219         .gpio_get       = pc8736x_gpio_get,
 220         .gpio_set       = pc8736x_gpio_set,
 221         .gpio_set_high  = pc8736x_gpio_set_high,
 222         .gpio_set_low   = pc8736x_gpio_set_low,
 223         .gpio_change    = pc8736x_gpio_change,
 224         .gpio_current   = pc8736x_gpio_current
 225 };
 226
 227 static int pc8736x_gpio_open(struct inode *inode, struct file *file)
 228 {
 229         unsigned m = iminor(inode);
 230         file->private_data = &pc8736x_access;
 231
 232         dev_dbg(&pdev->dev, "open %d\n", m);
 233
 234         if (m > 63)
 235                 return -EINVAL;
 236         return nonseekable_open(inode, file);
 237 }
 238
 239 static const struct file_operations pc8736x_gpio_fops = {
 240         .owner  = THIS_MODULE,
 241         .open   = pc8736x_gpio_open,
 242         .write  = nsc_gpio_write,
 243         .read   = nsc_gpio_read,
 244 };
 245
 246 static void __init pc8736x_init_shadow(void)
 247 {
 248         int port;
 249
 250         /* read the current values driven on the GPIO signals */
 251         for (port = 0; port < 4; ++port)
 252                 pc8736x_gpio_shadow[port]
 253                     = inb_p(pc8736x_gpio_base + port_offset[port]
 254                             + PORT_OUT);
 255
 256 }
 257
 258 static int __init pc8736x_gpio_init(void)
 259 {
 260         int rc = 0;
 261
 262         pdev = platform_device_alloc(DEVNAME, 0);
 263         if (!pdev)
 264                 return -ENOMEM;
 265
 266         rc = platform_device_add(pdev);
 267         if (rc) {
 268                 rc = -ENODEV;
 269                 goto undo_platform_dev_alloc;
 270         }
 271         dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n");
 272
 273         if (!pc8736x_superio_present()) {
 274                 rc = -ENODEV;
 275                 dev_err(&pdev->dev, "no device found\n");
 276                 goto undo_platform_dev_add;
 277         }
 278         pc8736x_access.dev = &pdev->dev;
 279
 280         /* Verify that chip and it's GPIO unit are both enabled.
 281            My BIOS does this, so I take minimum action here
 282          */
 283         rc = superio_inb(SIO_CF1);
 284         if (!(rc & 0x01)) {
 285                 rc = -ENODEV;
 286                 dev_err(&pdev->dev, "device not enabled\n");
 287                 goto undo_platform_dev_add;
 288         }
 289         device_select(SIO_GPIO_UNIT);
 290         if (!superio_inb(SIO_UNIT_ACT)) {
 291                 rc = -ENODEV;
 292                 dev_err(&pdev->dev, "GPIO unit not enabled\n");
 293                 goto undo_platform_dev_add;
 294         }
 295
 296         /* read the GPIO unit base addr that chip responds to */
 297         pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8
 298                              | superio_inb(SIO_BASE_LADDR));
 299
 300         if (!request_region(pc8736x_gpio_base, 16, DEVNAME)) {
 301                 rc = -ENODEV;
 302                 dev_err(&pdev->dev, "GPIO ioport %x busy\n",
 303                         pc8736x_gpio_base);
 304                 goto undo_platform_dev_add;
 305         }
 306         dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base);
 307
 308         rc = register_chrdev(major, DEVNAME, &pc8736x_gpio_fops);
 309         if (rc < 0) {
 310                 dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc);
 311                 goto undo_platform_dev_add;
 312         }
 313         if (!major) {
 314                 major = rc;
 315                 dev_dbg(&pdev->dev, "got dynamic major %d\n", major);
 316         }
 317
 318         pc8736x_init_shadow();
 319         return 0;
 320
 321 undo_platform_dev_add:
 322         platform_device_del(pdev);
 323 undo_platform_dev_alloc:
 324         platform_device_put(pdev);
 325
 326         return rc;
 327 }
 328
 329 static void __exit pc8736x_gpio_cleanup(void)
 330 {
 331         dev_dbg(&pdev->dev, " cleanup\n");
 332
 333         release_region(pc8736x_gpio_base, 16);
 334
 335         unregister_chrdev(major, DEVNAME);
 336 }
 337
 338 EXPORT_SYMBOL(pc8736x_access);
 339
 340 module_init(pc8736x_gpio_init);
 341 module_exit(pc8736x_gpio_cleanup);