fmvj18x_cs: write interrupt ack bit for lan and modem to work simultaneously.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / hpet.c
1 /*
2 * Intel & MS High Precision Event Timer Implementation.
3 *
4 * Copyright (C) 2003 Intel Corporation
5 * Venki Pallipadi
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
25 #include <linux/mm.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
34
35 #include <asm/current.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
40 #include <asm/div64.h>
41
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
45
46 /*
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec.htm
50 */
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
53
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
55
56
57 /* WARNING -- don't get confused. These macros are never used
58 * to write the (single) counter, and rarely to read it.
59 * They're badly named; to fix, someday.
60 */
61 #if BITS_PER_LONG == 64
62 #define write_counter(V, MC) writeq(V, MC)
63 #define read_counter(MC) readq(MC)
64 #else
65 #define write_counter(V, MC) writel(V, MC)
66 #define read_counter(MC) readl(MC)
67 #endif
68
69 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
70
71 /* This clocksource driver currently only works on ia64 */
72 #ifdef CONFIG_IA64
73 static void __iomem *hpet_mctr;
74
75 static cycle_t read_hpet(void)
76 {
77 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
78 }
79
80 static struct clocksource clocksource_hpet = {
81 .name = "hpet",
82 .rating = 250,
83 .read = read_hpet,
84 .mask = CLOCKSOURCE_MASK(64),
85 .mult = 0, /* to be calculated */
86 .shift = 10,
87 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
88 };
89 static struct clocksource *hpet_clocksource;
90 #endif
91
92 /* A lock for concurrent access by app and isr hpet activity. */
93 static DEFINE_SPINLOCK(hpet_lock);
94
95 #define HPET_DEV_NAME (7)
96
97 struct hpet_dev {
98 struct hpets *hd_hpets;
99 struct hpet __iomem *hd_hpet;
100 struct hpet_timer __iomem *hd_timer;
101 unsigned long hd_ireqfreq;
102 unsigned long hd_irqdata;
103 wait_queue_head_t hd_waitqueue;
104 struct fasync_struct *hd_async_queue;
105 unsigned int hd_flags;
106 unsigned int hd_irq;
107 unsigned int hd_hdwirq;
108 char hd_name[HPET_DEV_NAME];
109 };
110
111 struct hpets {
112 struct hpets *hp_next;
113 struct hpet __iomem *hp_hpet;
114 unsigned long hp_hpet_phys;
115 struct clocksource *hp_clocksource;
116 unsigned long long hp_tick_freq;
117 unsigned long hp_delta;
118 unsigned int hp_ntimer;
119 unsigned int hp_which;
120 struct hpet_dev hp_dev[1];
121 };
122
123 static struct hpets *hpets;
124
125 #define HPET_OPEN 0x0001
126 #define HPET_IE 0x0002 /* interrupt enabled */
127 #define HPET_PERIODIC 0x0004
128 #define HPET_SHARED_IRQ 0x0008
129
130
131 #ifndef readq
132 static inline unsigned long long readq(void __iomem *addr)
133 {
134 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
135 }
136 #endif
137
138 #ifndef writeq
139 static inline void writeq(unsigned long long v, void __iomem *addr)
140 {
141 writel(v & 0xffffffff, addr);
142 writel(v >> 32, addr + 4);
143 }
144 #endif
145
146 static irqreturn_t hpet_interrupt(int irq, void *data)
147 {
148 struct hpet_dev *devp;
149 unsigned long isr;
150
151 devp = data;
152 isr = 1 << (devp - devp->hd_hpets->hp_dev);
153
154 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
155 !(isr & readl(&devp->hd_hpet->hpet_isr)))
156 return IRQ_NONE;
157
158 spin_lock(&hpet_lock);
159 devp->hd_irqdata++;
160
161 /*
162 * For non-periodic timers, increment the accumulator.
163 * This has the effect of treating non-periodic like periodic.
164 */
165 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
166 unsigned long m, t;
167
168 t = devp->hd_ireqfreq;
169 m = read_counter(&devp->hd_hpet->hpet_mc);
170 write_counter(t + m + devp->hd_hpets->hp_delta,
171 &devp->hd_timer->hpet_compare);
172 }
173
174 if (devp->hd_flags & HPET_SHARED_IRQ)
175 writel(isr, &devp->hd_hpet->hpet_isr);
176 spin_unlock(&hpet_lock);
177
178 wake_up_interruptible(&devp->hd_waitqueue);
179
180 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
181
182 return IRQ_HANDLED;
183 }
184
185 static void hpet_timer_set_irq(struct hpet_dev *devp)
186 {
187 unsigned long v;
188 int irq, gsi;
189 struct hpet_timer __iomem *timer;
190
191 spin_lock_irq(&hpet_lock);
192 if (devp->hd_hdwirq) {
193 spin_unlock_irq(&hpet_lock);
194 return;
195 }
196
197 timer = devp->hd_timer;
198
199 /* we prefer level triggered mode */
200 v = readl(&timer->hpet_config);
201 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
202 v |= Tn_INT_TYPE_CNF_MASK;
203 writel(v, &timer->hpet_config);
204 }
205 spin_unlock_irq(&hpet_lock);
206
207 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
208 Tn_INT_ROUTE_CAP_SHIFT;
209
210 /*
211 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
212 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
213 */
214 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
215 v &= ~0xf3df;
216 else
217 v &= ~0xffff;
218
219 for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ;
220 irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) {
221
222 if (irq >= nr_irqs) {
223 irq = HPET_MAX_IRQ;
224 break;
225 }
226
227 gsi = acpi_register_gsi(irq, ACPI_LEVEL_SENSITIVE,
228 ACPI_ACTIVE_LOW);
229 if (gsi > 0)
230 break;
231
232 /* FIXME: Setup interrupt source table */
233 }
234
235 if (irq < HPET_MAX_IRQ) {
236 spin_lock_irq(&hpet_lock);
237 v = readl(&timer->hpet_config);
238 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
239 writel(v, &timer->hpet_config);
240 devp->hd_hdwirq = gsi;
241 spin_unlock_irq(&hpet_lock);
242 }
243 return;
244 }
245
246 static int hpet_open(struct inode *inode, struct file *file)
247 {
248 struct hpet_dev *devp;
249 struct hpets *hpetp;
250 int i;
251
252 if (file->f_mode & FMODE_WRITE)
253 return -EINVAL;
254
255 lock_kernel();
256 spin_lock_irq(&hpet_lock);
257
258 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
259 for (i = 0; i < hpetp->hp_ntimer; i++)
260 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
261 continue;
262 else {
263 devp = &hpetp->hp_dev[i];
264 break;
265 }
266
267 if (!devp) {
268 spin_unlock_irq(&hpet_lock);
269 unlock_kernel();
270 return -EBUSY;
271 }
272
273 file->private_data = devp;
274 devp->hd_irqdata = 0;
275 devp->hd_flags |= HPET_OPEN;
276 spin_unlock_irq(&hpet_lock);
277 unlock_kernel();
278
279 hpet_timer_set_irq(devp);
280
281 return 0;
282 }
283
284 static ssize_t
285 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
286 {
287 DECLARE_WAITQUEUE(wait, current);
288 unsigned long data;
289 ssize_t retval;
290 struct hpet_dev *devp;
291
292 devp = file->private_data;
293 if (!devp->hd_ireqfreq)
294 return -EIO;
295
296 if (count < sizeof(unsigned long))
297 return -EINVAL;
298
299 add_wait_queue(&devp->hd_waitqueue, &wait);
300
301 for ( ; ; ) {
302 set_current_state(TASK_INTERRUPTIBLE);
303
304 spin_lock_irq(&hpet_lock);
305 data = devp->hd_irqdata;
306 devp->hd_irqdata = 0;
307 spin_unlock_irq(&hpet_lock);
308
309 if (data)
310 break;
311 else if (file->f_flags & O_NONBLOCK) {
312 retval = -EAGAIN;
313 goto out;
314 } else if (signal_pending(current)) {
315 retval = -ERESTARTSYS;
316 goto out;
317 }
318 schedule();
319 }
320
321 retval = put_user(data, (unsigned long __user *)buf);
322 if (!retval)
323 retval = sizeof(unsigned long);
324 out:
325 __set_current_state(TASK_RUNNING);
326 remove_wait_queue(&devp->hd_waitqueue, &wait);
327
328 return retval;
329 }
330
331 static unsigned int hpet_poll(struct file *file, poll_table * wait)
332 {
333 unsigned long v;
334 struct hpet_dev *devp;
335
336 devp = file->private_data;
337
338 if (!devp->hd_ireqfreq)
339 return 0;
340
341 poll_wait(file, &devp->hd_waitqueue, wait);
342
343 spin_lock_irq(&hpet_lock);
344 v = devp->hd_irqdata;
345 spin_unlock_irq(&hpet_lock);
346
347 if (v != 0)
348 return POLLIN | POLLRDNORM;
349
350 return 0;
351 }
352
353 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
354 {
355 #ifdef CONFIG_HPET_MMAP
356 struct hpet_dev *devp;
357 unsigned long addr;
358
359 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
360 return -EINVAL;
361
362 devp = file->private_data;
363 addr = devp->hd_hpets->hp_hpet_phys;
364
365 if (addr & (PAGE_SIZE - 1))
366 return -ENOSYS;
367
368 vma->vm_flags |= VM_IO;
369 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
370
371 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
372 PAGE_SIZE, vma->vm_page_prot)) {
373 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
374 __func__);
375 return -EAGAIN;
376 }
377
378 return 0;
379 #else
380 return -ENOSYS;
381 #endif
382 }
383
384 static int hpet_fasync(int fd, struct file *file, int on)
385 {
386 struct hpet_dev *devp;
387
388 devp = file->private_data;
389
390 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
391 return 0;
392 else
393 return -EIO;
394 }
395
396 static int hpet_release(struct inode *inode, struct file *file)
397 {
398 struct hpet_dev *devp;
399 struct hpet_timer __iomem *timer;
400 int irq = 0;
401
402 devp = file->private_data;
403 timer = devp->hd_timer;
404
405 spin_lock_irq(&hpet_lock);
406
407 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
408 &timer->hpet_config);
409
410 irq = devp->hd_irq;
411 devp->hd_irq = 0;
412
413 devp->hd_ireqfreq = 0;
414
415 if (devp->hd_flags & HPET_PERIODIC
416 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
417 unsigned long v;
418
419 v = readq(&timer->hpet_config);
420 v ^= Tn_TYPE_CNF_MASK;
421 writeq(v, &timer->hpet_config);
422 }
423
424 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
425 spin_unlock_irq(&hpet_lock);
426
427 if (irq)
428 free_irq(irq, devp);
429
430 if (file->f_flags & FASYNC)
431 hpet_fasync(-1, file, 0);
432
433 file->private_data = NULL;
434 return 0;
435 }
436
437 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
438
439 static int
440 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
441 unsigned long arg)
442 {
443 struct hpet_dev *devp;
444
445 devp = file->private_data;
446 return hpet_ioctl_common(devp, cmd, arg, 0);
447 }
448
449 static int hpet_ioctl_ieon(struct hpet_dev *devp)
450 {
451 struct hpet_timer __iomem *timer;
452 struct hpet __iomem *hpet;
453 struct hpets *hpetp;
454 int irq;
455 unsigned long g, v, t, m;
456 unsigned long flags, isr;
457
458 timer = devp->hd_timer;
459 hpet = devp->hd_hpet;
460 hpetp = devp->hd_hpets;
461
462 if (!devp->hd_ireqfreq)
463 return -EIO;
464
465 spin_lock_irq(&hpet_lock);
466
467 if (devp->hd_flags & HPET_IE) {
468 spin_unlock_irq(&hpet_lock);
469 return -EBUSY;
470 }
471
472 devp->hd_flags |= HPET_IE;
473
474 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
475 devp->hd_flags |= HPET_SHARED_IRQ;
476 spin_unlock_irq(&hpet_lock);
477
478 irq = devp->hd_hdwirq;
479
480 if (irq) {
481 unsigned long irq_flags;
482
483 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
484 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
485 ? IRQF_SHARED : IRQF_DISABLED;
486 if (request_irq(irq, hpet_interrupt, irq_flags,
487 devp->hd_name, (void *)devp)) {
488 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
489 irq = 0;
490 }
491 }
492
493 if (irq == 0) {
494 spin_lock_irq(&hpet_lock);
495 devp->hd_flags ^= HPET_IE;
496 spin_unlock_irq(&hpet_lock);
497 return -EIO;
498 }
499
500 devp->hd_irq = irq;
501 t = devp->hd_ireqfreq;
502 v = readq(&timer->hpet_config);
503
504 /* 64-bit comparators are not yet supported through the ioctls,
505 * so force this into 32-bit mode if it supports both modes
506 */
507 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
508
509 if (devp->hd_flags & HPET_PERIODIC) {
510 write_counter(t, &timer->hpet_compare);
511 g |= Tn_TYPE_CNF_MASK;
512 v |= Tn_TYPE_CNF_MASK;
513 writeq(v, &timer->hpet_config);
514 v |= Tn_VAL_SET_CNF_MASK;
515 writeq(v, &timer->hpet_config);
516 local_irq_save(flags);
517
518 /* NOTE: what we modify here is a hidden accumulator
519 * register supported by periodic-capable comparators.
520 * We never want to modify the (single) counter; that
521 * would affect all the comparators.
522 */
523 m = read_counter(&hpet->hpet_mc);
524 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
525 } else {
526 local_irq_save(flags);
527 m = read_counter(&hpet->hpet_mc);
528 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
529 }
530
531 if (devp->hd_flags & HPET_SHARED_IRQ) {
532 isr = 1 << (devp - devp->hd_hpets->hp_dev);
533 writel(isr, &hpet->hpet_isr);
534 }
535 writeq(g, &timer->hpet_config);
536 local_irq_restore(flags);
537
538 return 0;
539 }
540
541 /* converts Hz to number of timer ticks */
542 static inline unsigned long hpet_time_div(struct hpets *hpets,
543 unsigned long dis)
544 {
545 unsigned long long m;
546
547 m = hpets->hp_tick_freq + (dis >> 1);
548 do_div(m, dis);
549 return (unsigned long)m;
550 }
551
552 static int
553 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
554 {
555 struct hpet_timer __iomem *timer;
556 struct hpet __iomem *hpet;
557 struct hpets *hpetp;
558 int err;
559 unsigned long v;
560
561 switch (cmd) {
562 case HPET_IE_OFF:
563 case HPET_INFO:
564 case HPET_EPI:
565 case HPET_DPI:
566 case HPET_IRQFREQ:
567 timer = devp->hd_timer;
568 hpet = devp->hd_hpet;
569 hpetp = devp->hd_hpets;
570 break;
571 case HPET_IE_ON:
572 return hpet_ioctl_ieon(devp);
573 default:
574 return -EINVAL;
575 }
576
577 err = 0;
578
579 switch (cmd) {
580 case HPET_IE_OFF:
581 if ((devp->hd_flags & HPET_IE) == 0)
582 break;
583 v = readq(&timer->hpet_config);
584 v &= ~Tn_INT_ENB_CNF_MASK;
585 writeq(v, &timer->hpet_config);
586 if (devp->hd_irq) {
587 free_irq(devp->hd_irq, devp);
588 devp->hd_irq = 0;
589 }
590 devp->hd_flags ^= HPET_IE;
591 break;
592 case HPET_INFO:
593 {
594 struct hpet_info info;
595
596 if (devp->hd_ireqfreq)
597 info.hi_ireqfreq =
598 hpet_time_div(hpetp, devp->hd_ireqfreq);
599 else
600 info.hi_ireqfreq = 0;
601 info.hi_flags =
602 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
603 info.hi_hpet = hpetp->hp_which;
604 info.hi_timer = devp - hpetp->hp_dev;
605 if (kernel)
606 memcpy((void *)arg, &info, sizeof(info));
607 else
608 if (copy_to_user((void __user *)arg, &info,
609 sizeof(info)))
610 err = -EFAULT;
611 break;
612 }
613 case HPET_EPI:
614 v = readq(&timer->hpet_config);
615 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
616 err = -ENXIO;
617 break;
618 }
619 devp->hd_flags |= HPET_PERIODIC;
620 break;
621 case HPET_DPI:
622 v = readq(&timer->hpet_config);
623 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
624 err = -ENXIO;
625 break;
626 }
627 if (devp->hd_flags & HPET_PERIODIC &&
628 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
629 v = readq(&timer->hpet_config);
630 v ^= Tn_TYPE_CNF_MASK;
631 writeq(v, &timer->hpet_config);
632 }
633 devp->hd_flags &= ~HPET_PERIODIC;
634 break;
635 case HPET_IRQFREQ:
636 if (!kernel && (arg > hpet_max_freq) &&
637 !capable(CAP_SYS_RESOURCE)) {
638 err = -EACCES;
639 break;
640 }
641
642 if (!arg) {
643 err = -EINVAL;
644 break;
645 }
646
647 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
648 }
649
650 return err;
651 }
652
653 static const struct file_operations hpet_fops = {
654 .owner = THIS_MODULE,
655 .llseek = no_llseek,
656 .read = hpet_read,
657 .poll = hpet_poll,
658 .ioctl = hpet_ioctl,
659 .open = hpet_open,
660 .release = hpet_release,
661 .fasync = hpet_fasync,
662 .mmap = hpet_mmap,
663 };
664
665 static int hpet_is_known(struct hpet_data *hdp)
666 {
667 struct hpets *hpetp;
668
669 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
670 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
671 return 1;
672
673 return 0;
674 }
675
676 static ctl_table hpet_table[] = {
677 {
678 .ctl_name = CTL_UNNUMBERED,
679 .procname = "max-user-freq",
680 .data = &hpet_max_freq,
681 .maxlen = sizeof(int),
682 .mode = 0644,
683 .proc_handler = &proc_dointvec,
684 },
685 {.ctl_name = 0}
686 };
687
688 static ctl_table hpet_root[] = {
689 {
690 .ctl_name = CTL_UNNUMBERED,
691 .procname = "hpet",
692 .maxlen = 0,
693 .mode = 0555,
694 .child = hpet_table,
695 },
696 {.ctl_name = 0}
697 };
698
699 static ctl_table dev_root[] = {
700 {
701 .ctl_name = CTL_DEV,
702 .procname = "dev",
703 .maxlen = 0,
704 .mode = 0555,
705 .child = hpet_root,
706 },
707 {.ctl_name = 0}
708 };
709
710 static struct ctl_table_header *sysctl_header;
711
712 /*
713 * Adjustment for when arming the timer with
714 * initial conditions. That is, main counter
715 * ticks expired before interrupts are enabled.
716 */
717 #define TICK_CALIBRATE (1000UL)
718
719 static unsigned long hpet_calibrate(struct hpets *hpetp)
720 {
721 struct hpet_timer __iomem *timer = NULL;
722 unsigned long t, m, count, i, flags, start;
723 struct hpet_dev *devp;
724 int j;
725 struct hpet __iomem *hpet;
726
727 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
728 if ((devp->hd_flags & HPET_OPEN) == 0) {
729 timer = devp->hd_timer;
730 break;
731 }
732
733 if (!timer)
734 return 0;
735
736 hpet = hpetp->hp_hpet;
737 t = read_counter(&timer->hpet_compare);
738
739 i = 0;
740 count = hpet_time_div(hpetp, TICK_CALIBRATE);
741
742 local_irq_save(flags);
743
744 start = read_counter(&hpet->hpet_mc);
745
746 do {
747 m = read_counter(&hpet->hpet_mc);
748 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
749 } while (i++, (m - start) < count);
750
751 local_irq_restore(flags);
752
753 return (m - start) / i;
754 }
755
756 int hpet_alloc(struct hpet_data *hdp)
757 {
758 u64 cap, mcfg;
759 struct hpet_dev *devp;
760 u32 i, ntimer;
761 struct hpets *hpetp;
762 size_t siz;
763 struct hpet __iomem *hpet;
764 static struct hpets *last = NULL;
765 unsigned long period;
766 unsigned long long temp;
767 u32 remainder;
768
769 /*
770 * hpet_alloc can be called by platform dependent code.
771 * If platform dependent code has allocated the hpet that
772 * ACPI has also reported, then we catch it here.
773 */
774 if (hpet_is_known(hdp)) {
775 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
776 __func__);
777 return 0;
778 }
779
780 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
781 sizeof(struct hpet_dev));
782
783 hpetp = kzalloc(siz, GFP_KERNEL);
784
785 if (!hpetp)
786 return -ENOMEM;
787
788 hpetp->hp_which = hpet_nhpet++;
789 hpetp->hp_hpet = hdp->hd_address;
790 hpetp->hp_hpet_phys = hdp->hd_phys_address;
791
792 hpetp->hp_ntimer = hdp->hd_nirqs;
793
794 for (i = 0; i < hdp->hd_nirqs; i++)
795 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
796
797 hpet = hpetp->hp_hpet;
798
799 cap = readq(&hpet->hpet_cap);
800
801 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
802
803 if (hpetp->hp_ntimer != ntimer) {
804 printk(KERN_WARNING "hpet: number irqs doesn't agree"
805 " with number of timers\n");
806 kfree(hpetp);
807 return -ENODEV;
808 }
809
810 if (last)
811 last->hp_next = hpetp;
812 else
813 hpets = hpetp;
814
815 last = hpetp;
816
817 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
818 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
819 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
820 temp += period >> 1; /* round */
821 do_div(temp, period);
822 hpetp->hp_tick_freq = temp; /* ticks per second */
823
824 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
825 hpetp->hp_which, hdp->hd_phys_address,
826 hpetp->hp_ntimer > 1 ? "s" : "");
827 for (i = 0; i < hpetp->hp_ntimer; i++)
828 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
829 printk("\n");
830
831 temp = hpetp->hp_tick_freq;
832 remainder = do_div(temp, 1000000);
833 printk(KERN_INFO
834 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
835 hpetp->hp_which, hpetp->hp_ntimer,
836 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
837 (unsigned) temp, remainder);
838
839 mcfg = readq(&hpet->hpet_config);
840 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
841 write_counter(0L, &hpet->hpet_mc);
842 mcfg |= HPET_ENABLE_CNF_MASK;
843 writeq(mcfg, &hpet->hpet_config);
844 }
845
846 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
847 struct hpet_timer __iomem *timer;
848
849 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
850
851 devp->hd_hpets = hpetp;
852 devp->hd_hpet = hpet;
853 devp->hd_timer = timer;
854
855 /*
856 * If the timer was reserved by platform code,
857 * then make timer unavailable for opens.
858 */
859 if (hdp->hd_state & (1 << i)) {
860 devp->hd_flags = HPET_OPEN;
861 continue;
862 }
863
864 init_waitqueue_head(&devp->hd_waitqueue);
865 }
866
867 hpetp->hp_delta = hpet_calibrate(hpetp);
868
869 /* This clocksource driver currently only works on ia64 */
870 #ifdef CONFIG_IA64
871 if (!hpet_clocksource) {
872 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
873 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
874 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
875 clocksource_hpet.shift);
876 clocksource_register(&clocksource_hpet);
877 hpetp->hp_clocksource = &clocksource_hpet;
878 hpet_clocksource = &clocksource_hpet;
879 }
880 #endif
881
882 return 0;
883 }
884
885 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
886 {
887 struct hpet_data *hdp;
888 acpi_status status;
889 struct acpi_resource_address64 addr;
890
891 hdp = data;
892
893 status = acpi_resource_to_address64(res, &addr);
894
895 if (ACPI_SUCCESS(status)) {
896 hdp->hd_phys_address = addr.minimum;
897 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
898
899 if (hpet_is_known(hdp)) {
900 iounmap(hdp->hd_address);
901 return AE_ALREADY_EXISTS;
902 }
903 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
904 struct acpi_resource_fixed_memory32 *fixmem32;
905
906 fixmem32 = &res->data.fixed_memory32;
907 if (!fixmem32)
908 return AE_NO_MEMORY;
909
910 hdp->hd_phys_address = fixmem32->address;
911 hdp->hd_address = ioremap(fixmem32->address,
912 HPET_RANGE_SIZE);
913
914 if (hpet_is_known(hdp)) {
915 iounmap(hdp->hd_address);
916 return AE_ALREADY_EXISTS;
917 }
918 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
919 struct acpi_resource_extended_irq *irqp;
920 int i, irq;
921
922 irqp = &res->data.extended_irq;
923
924 for (i = 0; i < irqp->interrupt_count; i++) {
925 irq = acpi_register_gsi(irqp->interrupts[i],
926 irqp->triggering, irqp->polarity);
927 if (irq < 0)
928 return AE_ERROR;
929
930 hdp->hd_irq[hdp->hd_nirqs] = irq;
931 hdp->hd_nirqs++;
932 }
933 }
934
935 return AE_OK;
936 }
937
938 static int hpet_acpi_add(struct acpi_device *device)
939 {
940 acpi_status result;
941 struct hpet_data data;
942
943 memset(&data, 0, sizeof(data));
944
945 result =
946 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
947 hpet_resources, &data);
948
949 if (ACPI_FAILURE(result))
950 return -ENODEV;
951
952 if (!data.hd_address || !data.hd_nirqs) {
953 printk("%s: no address or irqs in _CRS\n", __func__);
954 return -ENODEV;
955 }
956
957 return hpet_alloc(&data);
958 }
959
960 static int hpet_acpi_remove(struct acpi_device *device, int type)
961 {
962 /* XXX need to unregister clocksource, dealloc mem, etc */
963 return -EINVAL;
964 }
965
966 static const struct acpi_device_id hpet_device_ids[] = {
967 {"PNP0103", 0},
968 {"", 0},
969 };
970 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
971
972 static struct acpi_driver hpet_acpi_driver = {
973 .name = "hpet",
974 .ids = hpet_device_ids,
975 .ops = {
976 .add = hpet_acpi_add,
977 .remove = hpet_acpi_remove,
978 },
979 };
980
981 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
982
983 static int __init hpet_init(void)
984 {
985 int result;
986
987 result = misc_register(&hpet_misc);
988 if (result < 0)
989 return -ENODEV;
990
991 sysctl_header = register_sysctl_table(dev_root);
992
993 result = acpi_bus_register_driver(&hpet_acpi_driver);
994 if (result < 0) {
995 if (sysctl_header)
996 unregister_sysctl_table(sysctl_header);
997 misc_deregister(&hpet_misc);
998 return result;
999 }
1000
1001 return 0;
1002 }
1003
1004 static void __exit hpet_exit(void)
1005 {
1006 acpi_bus_unregister_driver(&hpet_acpi_driver);
1007
1008 if (sysctl_header)
1009 unregister_sysctl_table(sysctl_header);
1010 misc_deregister(&hpet_misc);
1011
1012 return;
1013 }
1014
1015 module_init(hpet_init);
1016 module_exit(hpet_exit);
1017 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1018 MODULE_LICENSE("GPL");