drivers/char/drm/drm.h

   1 /**
   2  * \file drm.h
   3  * Header for the Direct Rendering Manager
   4  *
   5  * \author Rickard E. (Rik) Faith <faith@valinux.com>
   6  *
   7  * \par Acknowledgments:
   8  * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
   9  */
  10
  11 /*
  12  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  13  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  14  * All rights reserved.
  15  *
  16  * Permission is hereby granted, free of charge, to any person obtaining a
  17  * copy of this software and associated documentation files (the "Software"),
  18  * to deal in the Software without restriction, including without limitation
  19  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  20  * and/or sell copies of the Software, and to permit persons to whom the
  21  * Software is furnished to do so, subject to the following conditions:
  22  *
  23  * The above copyright notice and this permission notice (including the next
  24  * paragraph) shall be included in all copies or substantial portions of the
  25  * Software.
  26  *
  27  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  28  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  29  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  30  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  31  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  32  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  33  * OTHER DEALINGS IN THE SOFTWARE.
  34  */
  35
  36
  37 #ifndef _DRM_H_
  38 #define _DRM_H_
  39
  40 #if defined(__linux__)
  41 #if defined(__KERNEL__)
  42 #include <linux/config.h>
  43 #endif
  44 #include <asm/ioctl.h>          /* For _IO* macros */
  45 #define DRM_IOCTL_NR(n)         _IOC_NR(n)
  46 #define DRM_IOC_VOID            _IOC_NONE
  47 #define DRM_IOC_READ            _IOC_READ
  48 #define DRM_IOC_WRITE           _IOC_WRITE
  49 #define DRM_IOC_READWRITE       _IOC_READ|_IOC_WRITE
  50 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  51 #elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
  52 #if defined(__FreeBSD__) && defined(IN_MODULE)
  53 /* Prevent name collision when including sys/ioccom.h */
  54 #undef ioctl
  55 #include <sys/ioccom.h>
  56 #define ioctl(a,b,c)            xf86ioctl(a,b,c)
  57 #else
  58 #include <sys/ioccom.h>
  59 #endif /* __FreeBSD__ && xf86ioctl */
  60 #define DRM_IOCTL_NR(n)         ((n) & 0xff)
  61 #define DRM_IOC_VOID            IOC_VOID
  62 #define DRM_IOC_READ            IOC_OUT
  63 #define DRM_IOC_WRITE           IOC_IN
  64 #define DRM_IOC_READWRITE       IOC_INOUT
  65 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  66 #endif
  67
  68 #define XFREE86_VERSION(major,minor,patch,snap) \
  69                 ((major << 16) | (minor << 8) | patch)
  70
  71 #ifndef CONFIG_XFREE86_VERSION
  72 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
  73 #endif
  74
  75 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
  76 #define DRM_PROC_DEVICES "/proc/devices"
  77 #define DRM_PROC_MISC    "/proc/misc"
  78 #define DRM_PROC_DRM     "/proc/drm"
  79 #define DRM_DEV_DRM      "/dev/drm"
  80 #define DRM_DEV_MODE     (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
  81 #define DRM_DEV_UID      0
  82 #define DRM_DEV_GID      0
  83 #endif
  84
  85 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
  86 #define DRM_MAJOR       226
  87 #define DRM_MAX_MINOR   15
  88 #endif
  89 #define DRM_NAME        "drm"     /**< Name in kernel, /dev, and /proc */
  90 #define DRM_MIN_ORDER   5         /**< At least 2^5 bytes = 32 bytes */
  91 #define DRM_MAX_ORDER   22        /**< Up to 2^22 bytes = 4MB */
  92 #define DRM_RAM_PERCENT 10        /**< How much system ram can we lock? */
  93
  94 #define _DRM_LOCK_HELD  0x80000000 /**< Hardware lock is held */
  95 #define _DRM_LOCK_CONT  0x40000000 /**< Hardware lock is contended */
  96 #define _DRM_LOCK_IS_HELD(lock)    ((lock) & _DRM_LOCK_HELD)
  97 #define _DRM_LOCK_IS_CONT(lock)    ((lock) & _DRM_LOCK_CONT)
  98 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  99
 100
 101 typedef unsigned long drm_handle_t;
 102 typedef unsigned int  drm_context_t;
 103 typedef unsigned int  drm_drawable_t;
 104 typedef unsigned int  drm_magic_t;
 105
 106
 107 /**
 108  * Cliprect.
 109  *
 110  * \warning: If you change this structure, make sure you change
 111  * XF86DRIClipRectRec in the server as well
 112  *
 113  * \note KW: Actually it's illegal to change either for
 114  * backwards-compatibility reasons.
 115  */
 116 typedef struct drm_clip_rect {
 117         unsigned short  x1;
 118         unsigned short  y1;
 119         unsigned short  x2;
 120         unsigned short  y2;
 121 } drm_clip_rect_t;
 122
 123
 124 /**
 125  * Texture region,
 126  */
 127 typedef struct drm_tex_region {
 128         unsigned char   next;
 129         unsigned char   prev;
 130         unsigned char   in_use;
 131         unsigned char   padding;
 132         unsigned int    age;
 133 } drm_tex_region_t;
 134
 135 /**
 136  * Hardware lock.
 137  *
 138  * The lock structure is a simple cache-line aligned integer.  To avoid
 139  * processor bus contention on a multiprocessor system, there should not be any
 140  * other data stored in the same cache line.
 141  */
 142 typedef struct drm_hw_lock {
 143         __volatile__ unsigned int lock;         /**< lock variable */
 144         char                      padding[60];  /**< Pad to cache line */
 145 } drm_hw_lock_t;
 146
 147
 148 /**
 149  * DRM_IOCTL_VERSION ioctl argument type.
 150  *
 151  * \sa drmGetVersion().
 152  */
 153 typedef struct drm_version {
 154         int    version_major;     /**< Major version */
 155         int    version_minor;     /**< Minor version */
 156         int    version_patchlevel;/**< Patch level */
 157         size_t name_len;          /**< Length of name buffer */
 158         char   __user *name;      /**< Name of driver */
 159         size_t date_len;          /**< Length of date buffer */
 160         char   __user *date;      /**< User-space buffer to hold date */
 161         size_t desc_len;          /**< Length of desc buffer */
 162         char   __user *desc;      /**< User-space buffer to hold desc */
 163 } drm_version_t;
 164
 165
 166 /**
 167  * DRM_IOCTL_GET_UNIQUE ioctl argument type.
 168  *
 169  * \sa drmGetBusid() and drmSetBusId().
 170  */
 171 typedef struct drm_unique {
 172         size_t unique_len;        /**< Length of unique */
 173         char   __user *unique;    /**< Unique name for driver instantiation */
 174 } drm_unique_t;
 175
 176
 177 typedef struct drm_list {
 178         int              count;   /**< Length of user-space structures */
 179         drm_version_t    __user *version;
 180 } drm_list_t;
 181
 182
 183 typedef struct drm_block {
 184         int              unused;
 185 } drm_block_t;
 186
 187
 188 /**
 189  * DRM_IOCTL_CONTROL ioctl argument type.
 190  *
 191  * \sa drmCtlInstHandler() and drmCtlUninstHandler().
 192  */
 193 typedef struct drm_control {
 194         enum {
 195                 DRM_ADD_COMMAND,
 196                 DRM_RM_COMMAND,
 197                 DRM_INST_HANDLER,
 198                 DRM_UNINST_HANDLER
 199         }                func;
 200         int              irq;
 201 } drm_control_t;
 202
 203
 204 /**
 205  * Type of memory to map.
 206  */
 207 typedef enum drm_map_type {
 208         _DRM_FRAME_BUFFER   = 0,  /**< WC (no caching), no core dump */
 209         _DRM_REGISTERS      = 1,  /**< no caching, no core dump */
 210         _DRM_SHM            = 2,  /**< shared, cached */
 211         _DRM_AGP            = 3,  /**< AGP/GART */
 212         _DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
 213         _DRM_CONSISTENT     = 5,  /**< Consistent memory for PCI DMA */
 214 } drm_map_type_t;
 215
 216
 217 /**
 218  * Memory mapping flags.
 219  */
 220 typedef enum drm_map_flags {
 221         _DRM_RESTRICTED      = 0x01, /**< Cannot be mapped to user-virtual */
 222         _DRM_READ_ONLY       = 0x02,
 223         _DRM_LOCKED          = 0x04, /**< shared, cached, locked */
 224         _DRM_KERNEL          = 0x08, /**< kernel requires access */
 225         _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
 226         _DRM_CONTAINS_LOCK   = 0x20, /**< SHM page that contains lock */
 227         _DRM_REMOVABLE       = 0x40  /**< Removable mapping */
 228 } drm_map_flags_t;
 229
 230
 231 typedef struct drm_ctx_priv_map {
 232         unsigned int    ctx_id;  /**< Context requesting private mapping */
 233         void            *handle; /**< Handle of map */
 234 } drm_ctx_priv_map_t;
 235
 236
 237 /**
 238  * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
 239  * argument type.
 240  *
 241  * \sa drmAddMap().
 242  */
 243 typedef struct drm_map {
 244         unsigned long   offset;  /**< Requested physical address (0 for SAREA)*/
 245         unsigned long   size;    /**< Requested physical size (bytes) */
 246         drm_map_type_t  type;    /**< Type of memory to map */
 247         drm_map_flags_t flags;   /**< Flags */
 248         void            *handle; /**< User-space: "Handle" to pass to mmap() */
 249                                  /**< Kernel-space: kernel-virtual address */
 250         int             mtrr;    /**< MTRR slot used */
 251                                  /*   Private data */
 252 } drm_map_t;
 253
 254
 255 /**
 256  * DRM_IOCTL_GET_CLIENT ioctl argument type.
 257  */
 258 typedef struct drm_client {
 259         int             idx;    /**< Which client desired? */
 260         int             auth;   /**< Is client authenticated? */
 261         unsigned long   pid;    /**< Process ID */
 262         unsigned long   uid;    /**< User ID */
 263         unsigned long   magic;  /**< Magic */
 264         unsigned long   iocs;   /**< Ioctl count */
 265 } drm_client_t;
 266
 267
 268 typedef enum {
 269         _DRM_STAT_LOCK,
 270         _DRM_STAT_OPENS,
 271         _DRM_STAT_CLOSES,
 272         _DRM_STAT_IOCTLS,
 273         _DRM_STAT_LOCKS,
 274         _DRM_STAT_UNLOCKS,
 275         _DRM_STAT_VALUE,        /**< Generic value */
 276         _DRM_STAT_BYTE,         /**< Generic byte counter (1024bytes/K) */
 277         _DRM_STAT_COUNT,        /**< Generic non-byte counter (1000/k) */
 278
 279         _DRM_STAT_IRQ,          /**< IRQ */
 280         _DRM_STAT_PRIMARY,      /**< Primary DMA bytes */
 281         _DRM_STAT_SECONDARY,    /**< Secondary DMA bytes */
 282         _DRM_STAT_DMA,          /**< DMA */
 283         _DRM_STAT_SPECIAL,      /**< Special DMA (e.g., priority or polled) */
 284         _DRM_STAT_MISSED        /**< Missed DMA opportunity */
 285
 286                                 /* Add to the *END* of the list */
 287 } drm_stat_type_t;
 288
 289
 290 /**
 291  * DRM_IOCTL_GET_STATS ioctl argument type.
 292  */
 293 typedef struct drm_stats {
 294         unsigned long count;
 295         struct {
 296                 unsigned long   value;
 297                 drm_stat_type_t type;
 298         } data[15];
 299 } drm_stats_t;
 300
 301
 302 /**
 303  * Hardware locking flags.
 304  */
 305 typedef enum drm_lock_flags {
 306         _DRM_LOCK_READY      = 0x01, /**< Wait until hardware is ready for DMA */
 307         _DRM_LOCK_QUIESCENT  = 0x02, /**< Wait until hardware quiescent */
 308         _DRM_LOCK_FLUSH      = 0x04, /**< Flush this context's DMA queue first */
 309         _DRM_LOCK_FLUSH_ALL  = 0x08, /**< Flush all DMA queues first */
 310                                 /* These *HALT* flags aren't supported yet
 311                                    -- they will be used to support the
 312                                    full-screen DGA-like mode. */
 313         _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
 314         _DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
 315 } drm_lock_flags_t;
 316
 317
 318 /**
 319  * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
 320  *
 321  * \sa drmGetLock() and drmUnlock().
 322  */
 323 typedef struct drm_lock {
 324         int              context;
 325         drm_lock_flags_t flags;
 326 } drm_lock_t;
 327
 328
 329 /**
 330  * DMA flags
 331  *
 332  * \warning
 333  * These values \e must match xf86drm.h.
 334  *
 335  * \sa drm_dma.
 336  */
 337 typedef enum drm_dma_flags {
 338                                       /* Flags for DMA buffer dispatch */
 339         _DRM_DMA_BLOCK        = 0x01, /**<
 340                                        * Block until buffer dispatched.
 341                                        *
 342                                        * \note The buffer may not yet have
 343                                        * been processed by the hardware --
 344                                        * getting a hardware lock with the
 345                                        * hardware quiescent will ensure
 346                                        * that the buffer has been
 347                                        * processed.
 348                                        */
 349         _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
 350         _DRM_DMA_PRIORITY     = 0x04, /**< High priority dispatch */
 351
 352                                       /* Flags for DMA buffer request */
 353         _DRM_DMA_WAIT         = 0x10, /**< Wait for free buffers */
 354         _DRM_DMA_SMALLER_OK   = 0x20, /**< Smaller-than-requested buffers OK */
 355         _DRM_DMA_LARGER_OK    = 0x40  /**< Larger-than-requested buffers OK */
 356 } drm_dma_flags_t;
 357
 358
 359 /**
 360  * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
 361  *
 362  * \sa drmAddBufs().
 363  */
 364 typedef struct drm_buf_desc {
 365         int           count;     /**< Number of buffers of this size */
 366         int           size;      /**< Size in bytes */
 367         int           low_mark;  /**< Low water mark */
 368         int           high_mark; /**< High water mark */
 369         enum {
 370                 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
 371                 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
 372                 _DRM_SG_BUFFER  = 0x04  /**< Scatter/gather memory buffer */
 373         }             flags;
 374         unsigned long agp_start; /**<
 375                                   * Start address of where the AGP buffers are
 376                                   * in the AGP aperture
 377                                   */
 378 } drm_buf_desc_t;
 379
 380
 381 /**
 382  * DRM_IOCTL_INFO_BUFS ioctl argument type.
 383  */
 384 typedef struct drm_buf_info {
 385         int            count;   /**< Entries in list */
 386         drm_buf_desc_t __user *list;
 387 } drm_buf_info_t;
 388
 389
 390 /**
 391  * DRM_IOCTL_FREE_BUFS ioctl argument type.
 392  */
 393 typedef struct drm_buf_free {
 394         int            count;
 395         int            __user *list;
 396 } drm_buf_free_t;
 397
 398
 399 /**
 400  * Buffer information
 401  *
 402  * \sa drm_buf_map.
 403  */
 404 typedef struct drm_buf_pub {
 405         int               idx;         /**< Index into the master buffer list */
 406         int               total;       /**< Buffer size */
 407         int               used;        /**< Amount of buffer in use (for DMA) */
 408         void      __user *address;     /**< Address of buffer */
 409 } drm_buf_pub_t;
 410
 411
 412 /**
 413  * DRM_IOCTL_MAP_BUFS ioctl argument type.
 414  */
 415 typedef struct drm_buf_map {
 416         int           count;    /**< Length of the buffer list */
 417         void          __user *virtual;  /**< Mmap'd area in user-virtual */
 418         drm_buf_pub_t __user *list;     /**< Buffer information */
 419 } drm_buf_map_t;
 420
 421
 422 /**
 423  * DRM_IOCTL_DMA ioctl argument type.
 424  *
 425  * Indices here refer to the offset into the buffer list in drm_buf_get.
 426  *
 427  * \sa drmDMA().
 428  */
 429 typedef struct drm_dma {
 430         int             context;          /**< Context handle */
 431         int             send_count;       /**< Number of buffers to send */
 432         int     __user *send_indices;     /**< List of handles to buffers */
 433         int     __user *send_sizes;       /**< Lengths of data to send */
 434         drm_dma_flags_t flags;            /**< Flags */
 435         int             request_count;    /**< Number of buffers requested */
 436         int             request_size;     /**< Desired size for buffers */
 437         int     __user *request_indices;  /**< Buffer information */
 438         int     __user *request_sizes;
 439         int             granted_count;    /**< Number of buffers granted */
 440 } drm_dma_t;
 441
 442
 443 typedef enum {
 444         _DRM_CONTEXT_PRESERVED = 0x01,
 445         _DRM_CONTEXT_2DONLY    = 0x02
 446 } drm_ctx_flags_t;
 447
 448
 449 /**
 450  * DRM_IOCTL_ADD_CTX ioctl argument type.
 451  *
 452  * \sa drmCreateContext() and drmDestroyContext().
 453  */
 454 typedef struct drm_ctx {
 455         drm_context_t   handle;
 456         drm_ctx_flags_t flags;
 457 } drm_ctx_t;
 458
 459
 460 /**
 461  * DRM_IOCTL_RES_CTX ioctl argument type.
 462  */
 463 typedef struct drm_ctx_res {
 464         int             count;
 465         drm_ctx_t       __user *contexts;
 466 } drm_ctx_res_t;
 467
 468
 469 /**
 470  * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
 471  */
 472 typedef struct drm_draw {
 473         drm_drawable_t  handle;
 474 } drm_draw_t;
 475
 476
 477 /**
 478  * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
 479  */
 480 typedef struct drm_auth {
 481         drm_magic_t     magic;
 482 } drm_auth_t;
 483
 484
 485 /**
 486  * DRM_IOCTL_IRQ_BUSID ioctl argument type.
 487  *
 488  * \sa drmGetInterruptFromBusID().
 489  */
 490 typedef struct drm_irq_busid {
 491         int irq;        /**< IRQ number */
 492         int busnum;     /**< bus number */
 493         int devnum;     /**< device number */
 494         int funcnum;    /**< function number */
 495 } drm_irq_busid_t;
 496
 497
 498 typedef enum {
 499     _DRM_VBLANK_ABSOLUTE = 0x0,         /**< Wait for specific vblank sequence number */
 500     _DRM_VBLANK_RELATIVE = 0x1,         /**< Wait for given number of vblanks */
 501     _DRM_VBLANK_SIGNAL   = 0x40000000   /**< Send signal instead of blocking */
 502 } drm_vblank_seq_type_t;
 503
 504
 505 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
 506
 507
 508 struct drm_wait_vblank_request {
 509         drm_vblank_seq_type_t type;
 510         unsigned int sequence;
 511         unsigned long signal;
 512 };
 513
 514
 515 struct drm_wait_vblank_reply {
 516         drm_vblank_seq_type_t type;
 517         unsigned int sequence;
 518         long tval_sec;
 519         long tval_usec;
 520 };
 521
 522
 523 /**
 524  * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
 525  *
 526  * \sa drmWaitVBlank().
 527  */
 528 typedef union drm_wait_vblank {
 529         struct drm_wait_vblank_request request;
 530         struct drm_wait_vblank_reply reply;
 531 } drm_wait_vblank_t;
 532
 533
 534 /**
 535  * DRM_IOCTL_AGP_ENABLE ioctl argument type.
 536  *
 537  * \sa drmAgpEnable().
 538  */
 539 typedef struct drm_agp_mode {
 540         unsigned long mode;     /**< AGP mode */
 541 } drm_agp_mode_t;
 542
 543
 544 /**
 545  * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
 546  *
 547  * \sa drmAgpAlloc() and drmAgpFree().
 548  */
 549 typedef struct drm_agp_buffer {
 550         unsigned long size;     /**< In bytes -- will round to page boundary */
 551         unsigned long handle;   /**< Used for binding / unbinding */
 552         unsigned long type;     /**< Type of memory to allocate */
 553         unsigned long physical; /**< Physical used by i810 */
 554 } drm_agp_buffer_t;
 555
 556
 557 /**
 558  * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
 559  *
 560  * \sa drmAgpBind() and drmAgpUnbind().
 561  */
 562 typedef struct drm_agp_binding {
 563         unsigned long handle;   /**< From drm_agp_buffer */
 564         unsigned long offset;   /**< In bytes -- will round to page boundary */
 565 } drm_agp_binding_t;
 566
 567
 568 /**
 569  * DRM_IOCTL_AGP_INFO ioctl argument type.
 570  *
 571  * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
 572  * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
 573  * drmAgpVendorId() and drmAgpDeviceId().
 574  */
 575 typedef struct drm_agp_info {
 576         int            agp_version_major;
 577         int            agp_version_minor;
 578         unsigned long  mode;
 579         unsigned long  aperture_base;  /* physical address */
 580         unsigned long  aperture_size;  /* bytes */
 581         unsigned long  memory_allowed; /* bytes */
 582         unsigned long  memory_used;
 583
 584                                 /* PCI information */
 585         unsigned short id_vendor;
 586         unsigned short id_device;
 587 } drm_agp_info_t;
 588
 589
 590 /**
 591  * DRM_IOCTL_SG_ALLOC ioctl argument type.
 592  */
 593 typedef struct drm_scatter_gather {
 594         unsigned long size;     /**< In bytes -- will round to page boundary */
 595         unsigned long handle;   /**< Used for mapping / unmapping */
 596 } drm_scatter_gather_t;
 597
 598 /**
 599  * DRM_IOCTL_SET_VERSION ioctl argument type.
 600  */
 601 typedef struct drm_set_version {
 602         int drm_di_major;
 603         int drm_di_minor;
 604         int drm_dd_major;
 605         int drm_dd_minor;
 606 } drm_set_version_t;
 607
 608
 609 #define DRM_IOCTL_BASE                  'd'
 610 #define DRM_IO(nr)                      _IO(DRM_IOCTL_BASE,nr)
 611 #define DRM_IOR(nr,type)                _IOR(DRM_IOCTL_BASE,nr,type)
 612 #define DRM_IOW(nr,type)                _IOW(DRM_IOCTL_BASE,nr,type)
 613 #define DRM_IOWR(nr,type)               _IOWR(DRM_IOCTL_BASE,nr,type)
 614
 615 #define DRM_IOCTL_VERSION               DRM_IOWR(0x00, drm_version_t)
 616 #define DRM_IOCTL_GET_UNIQUE            DRM_IOWR(0x01, drm_unique_t)
 617 #define DRM_IOCTL_GET_MAGIC             DRM_IOR( 0x02, drm_auth_t)
 618 #define DRM_IOCTL_IRQ_BUSID             DRM_IOWR(0x03, drm_irq_busid_t)
 619 #define DRM_IOCTL_GET_MAP               DRM_IOWR(0x04, drm_map_t)
 620 #define DRM_IOCTL_GET_CLIENT            DRM_IOWR(0x05, drm_client_t)
 621 #define DRM_IOCTL_GET_STATS             DRM_IOR( 0x06, drm_stats_t)
 622 #define DRM_IOCTL_SET_VERSION           DRM_IOWR(0x07, drm_set_version_t)
 623
 624 #define DRM_IOCTL_SET_UNIQUE            DRM_IOW( 0x10, drm_unique_t)
 625 #define DRM_IOCTL_AUTH_MAGIC            DRM_IOW( 0x11, drm_auth_t)
 626 #define DRM_IOCTL_BLOCK                 DRM_IOWR(0x12, drm_block_t)
 627 #define DRM_IOCTL_UNBLOCK               DRM_IOWR(0x13, drm_block_t)
 628 #define DRM_IOCTL_CONTROL               DRM_IOW( 0x14, drm_control_t)
 629 #define DRM_IOCTL_ADD_MAP               DRM_IOWR(0x15, drm_map_t)
 630 #define DRM_IOCTL_ADD_BUFS              DRM_IOWR(0x16, drm_buf_desc_t)
 631 #define DRM_IOCTL_MARK_BUFS             DRM_IOW( 0x17, drm_buf_desc_t)
 632 #define DRM_IOCTL_INFO_BUFS             DRM_IOWR(0x18, drm_buf_info_t)
 633 #define DRM_IOCTL_MAP_BUFS              DRM_IOWR(0x19, drm_buf_map_t)
 634 #define DRM_IOCTL_FREE_BUFS             DRM_IOW( 0x1a, drm_buf_free_t)
 635
 636 #define DRM_IOCTL_RM_MAP                DRM_IOW( 0x1b, drm_map_t)
 637
 638 #define DRM_IOCTL_SET_SAREA_CTX         DRM_IOW( 0x1c, drm_ctx_priv_map_t)
 639 #define DRM_IOCTL_GET_SAREA_CTX         DRM_IOWR(0x1d, drm_ctx_priv_map_t)
 640
 641 #define DRM_IOCTL_ADD_CTX               DRM_IOWR(0x20, drm_ctx_t)
 642 #define DRM_IOCTL_RM_CTX                DRM_IOWR(0x21, drm_ctx_t)
 643 #define DRM_IOCTL_MOD_CTX               DRM_IOW( 0x22, drm_ctx_t)
 644 #define DRM_IOCTL_GET_CTX               DRM_IOWR(0x23, drm_ctx_t)
 645 #define DRM_IOCTL_SWITCH_CTX            DRM_IOW( 0x24, drm_ctx_t)
 646 #define DRM_IOCTL_NEW_CTX               DRM_IOW( 0x25, drm_ctx_t)
 647 #define DRM_IOCTL_RES_CTX               DRM_IOWR(0x26, drm_ctx_res_t)
 648 #define DRM_IOCTL_ADD_DRAW              DRM_IOWR(0x27, drm_draw_t)
 649 #define DRM_IOCTL_RM_DRAW               DRM_IOWR(0x28, drm_draw_t)
 650 #define DRM_IOCTL_DMA                   DRM_IOWR(0x29, drm_dma_t)
 651 #define DRM_IOCTL_LOCK                  DRM_IOW( 0x2a, drm_lock_t)
 652 #define DRM_IOCTL_UNLOCK                DRM_IOW( 0x2b, drm_lock_t)
 653 #define DRM_IOCTL_FINISH                DRM_IOW( 0x2c, drm_lock_t)
 654
 655 #define DRM_IOCTL_AGP_ACQUIRE           DRM_IO(  0x30)
 656 #define DRM_IOCTL_AGP_RELEASE           DRM_IO(  0x31)
 657 #define DRM_IOCTL_AGP_ENABLE            DRM_IOW( 0x32, drm_agp_mode_t)
 658 #define DRM_IOCTL_AGP_INFO              DRM_IOR( 0x33, drm_agp_info_t)
 659 #define DRM_IOCTL_AGP_ALLOC             DRM_IOWR(0x34, drm_agp_buffer_t)
 660 #define DRM_IOCTL_AGP_FREE              DRM_IOW( 0x35, drm_agp_buffer_t)
 661 #define DRM_IOCTL_AGP_BIND              DRM_IOW( 0x36, drm_agp_binding_t)
 662 #define DRM_IOCTL_AGP_UNBIND            DRM_IOW( 0x37, drm_agp_binding_t)
 663
 664 #define DRM_IOCTL_SG_ALLOC              DRM_IOW( 0x38, drm_scatter_gather_t)
 665 #define DRM_IOCTL_SG_FREE               DRM_IOW( 0x39, drm_scatter_gather_t)
 666
 667 #define DRM_IOCTL_WAIT_VBLANK           DRM_IOWR(0x3a, drm_wait_vblank_t)
 668
 669 /**
 670  * Device specific ioctls should only be in their respective headers
 671  * The device specific ioctl range is from 0x40 to 0x79.
 672  *
 673  * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
 674  * drmCommandReadWrite().
 675  */
 676 #define DRM_COMMAND_BASE                0x40
 677
 678 #endif