Pull ibm into release branch
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / agp / generic.c
1 /*
2 * AGPGART driver.
3 * Copyright (C) 2004 Silicon Graphics, Inc.
4 * Copyright (C) 2002-2005 Dave Jones.
5 * Copyright (C) 1999 Jeff Hartmann.
6 * Copyright (C) 1999 Precision Insight, Inc.
7 * Copyright (C) 1999 Xi Graphics, Inc.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * TODO:
28 * - Allocate more than order 0 pages to avoid too much linear map splitting.
29 */
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/init.h>
33 #include <linux/pagemap.h>
34 #include <linux/miscdevice.h>
35 #include <linux/pm.h>
36 #include <linux/agp_backend.h>
37 #include <linux/vmalloc.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/mm.h>
40 #include <asm/io.h>
41 #include <asm/cacheflush.h>
42 #include <asm/pgtable.h>
43 #include "agp.h"
44
45 __u32 *agp_gatt_table;
46 int agp_memory_reserved;
47
48 /*
49 * Needed by the Nforce GART driver for the time being. Would be
50 * nice to do this some other way instead of needing this export.
51 */
52 EXPORT_SYMBOL_GPL(agp_memory_reserved);
53
54 #if defined(CONFIG_X86)
55 int map_page_into_agp(struct page *page)
56 {
57 int i;
58 i = change_page_attr(page, 1, PAGE_KERNEL_NOCACHE);
59 /* Caller's responsibility to call global_flush_tlb() for
60 * performance reasons */
61 return i;
62 }
63 EXPORT_SYMBOL_GPL(map_page_into_agp);
64
65 int unmap_page_from_agp(struct page *page)
66 {
67 int i;
68 i = change_page_attr(page, 1, PAGE_KERNEL);
69 /* Caller's responsibility to call global_flush_tlb() for
70 * performance reasons */
71 return i;
72 }
73 EXPORT_SYMBOL_GPL(unmap_page_from_agp);
74 #endif
75
76 /*
77 * Generic routines for handling agp_memory structures -
78 * They use the basic page allocation routines to do the brunt of the work.
79 */
80
81 void agp_free_key(int key)
82 {
83 if (key < 0)
84 return;
85
86 if (key < MAXKEY)
87 clear_bit(key, agp_bridge->key_list);
88 }
89 EXPORT_SYMBOL(agp_free_key);
90
91
92 static int agp_get_key(void)
93 {
94 int bit;
95
96 bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY);
97 if (bit < MAXKEY) {
98 set_bit(bit, agp_bridge->key_list);
99 return bit;
100 }
101 return -1;
102 }
103
104 /*
105 * Use kmalloc if possible for the page list. Otherwise fall back to
106 * vmalloc. This speeds things up and also saves memory for small AGP
107 * regions.
108 */
109
110 void agp_alloc_page_array(size_t size, struct agp_memory *mem)
111 {
112 mem->memory = NULL;
113 mem->vmalloc_flag = 0;
114
115 if (size <= 2*PAGE_SIZE)
116 mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY);
117 if (mem->memory == NULL) {
118 mem->memory = vmalloc(size);
119 mem->vmalloc_flag = 1;
120 }
121 }
122 EXPORT_SYMBOL(agp_alloc_page_array);
123
124 void agp_free_page_array(struct agp_memory *mem)
125 {
126 if (mem->vmalloc_flag) {
127 vfree(mem->memory);
128 } else {
129 kfree(mem->memory);
130 }
131 }
132 EXPORT_SYMBOL(agp_free_page_array);
133
134
135 static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages)
136 {
137 struct agp_memory *new;
138 unsigned long alloc_size = num_agp_pages*sizeof(struct page *);
139
140 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
141 if (new == NULL)
142 return NULL;
143
144 new->key = agp_get_key();
145
146 if (new->key < 0) {
147 kfree(new);
148 return NULL;
149 }
150
151 agp_alloc_page_array(alloc_size, new);
152
153 if (new->memory == NULL) {
154 agp_free_key(new->key);
155 kfree(new);
156 return NULL;
157 }
158 new->num_scratch_pages = 0;
159 return new;
160 }
161
162 struct agp_memory *agp_create_memory(int scratch_pages)
163 {
164 struct agp_memory *new;
165
166 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
167 if (new == NULL)
168 return NULL;
169
170 new->key = agp_get_key();
171
172 if (new->key < 0) {
173 kfree(new);
174 return NULL;
175 }
176
177 agp_alloc_page_array(PAGE_SIZE * scratch_pages, new);
178
179 if (new->memory == NULL) {
180 agp_free_key(new->key);
181 kfree(new);
182 return NULL;
183 }
184 new->num_scratch_pages = scratch_pages;
185 new->type = AGP_NORMAL_MEMORY;
186 return new;
187 }
188 EXPORT_SYMBOL(agp_create_memory);
189
190 /**
191 * agp_free_memory - free memory associated with an agp_memory pointer.
192 *
193 * @curr: agp_memory pointer to be freed.
194 *
195 * It is the only function that can be called when the backend is not owned
196 * by the caller. (So it can free memory on client death.)
197 */
198 void agp_free_memory(struct agp_memory *curr)
199 {
200 size_t i;
201
202 if (curr == NULL)
203 return;
204
205 if (curr->is_bound == TRUE)
206 agp_unbind_memory(curr);
207
208 if (curr->type >= AGP_USER_TYPES) {
209 agp_generic_free_by_type(curr);
210 return;
211 }
212
213 if (curr->type != 0) {
214 curr->bridge->driver->free_by_type(curr);
215 return;
216 }
217 if (curr->page_count != 0) {
218 for (i = 0; i < curr->page_count; i++) {
219 curr->bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[i]));
220 }
221 flush_agp_mappings();
222 }
223 agp_free_key(curr->key);
224 agp_free_page_array(curr);
225 kfree(curr);
226 }
227 EXPORT_SYMBOL(agp_free_memory);
228
229 #define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
230
231 /**
232 * agp_allocate_memory - allocate a group of pages of a certain type.
233 *
234 * @page_count: size_t argument of the number of pages
235 * @type: u32 argument of the type of memory to be allocated.
236 *
237 * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which
238 * maps to physical ram. Any other type is device dependent.
239 *
240 * It returns NULL whenever memory is unavailable.
241 */
242 struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge,
243 size_t page_count, u32 type)
244 {
245 int scratch_pages;
246 struct agp_memory *new;
247 size_t i;
248
249 if (!bridge)
250 return NULL;
251
252 if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp)
253 return NULL;
254
255 if (type >= AGP_USER_TYPES) {
256 new = agp_generic_alloc_user(page_count, type);
257 if (new)
258 new->bridge = bridge;
259 return new;
260 }
261
262 if (type != 0) {
263 new = bridge->driver->alloc_by_type(page_count, type);
264 if (new)
265 new->bridge = bridge;
266 return new;
267 }
268
269 scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
270
271 new = agp_create_memory(scratch_pages);
272
273 if (new == NULL)
274 return NULL;
275
276 for (i = 0; i < page_count; i++) {
277 void *addr = bridge->driver->agp_alloc_page(bridge);
278
279 if (addr == NULL) {
280 agp_free_memory(new);
281 return NULL;
282 }
283 new->memory[i] = virt_to_gart(addr);
284 new->page_count++;
285 }
286 new->bridge = bridge;
287
288 flush_agp_mappings();
289
290 return new;
291 }
292 EXPORT_SYMBOL(agp_allocate_memory);
293
294
295 /* End - Generic routines for handling agp_memory structures */
296
297
298 static int agp_return_size(void)
299 {
300 int current_size;
301 void *temp;
302
303 temp = agp_bridge->current_size;
304
305 switch (agp_bridge->driver->size_type) {
306 case U8_APER_SIZE:
307 current_size = A_SIZE_8(temp)->size;
308 break;
309 case U16_APER_SIZE:
310 current_size = A_SIZE_16(temp)->size;
311 break;
312 case U32_APER_SIZE:
313 current_size = A_SIZE_32(temp)->size;
314 break;
315 case LVL2_APER_SIZE:
316 current_size = A_SIZE_LVL2(temp)->size;
317 break;
318 case FIXED_APER_SIZE:
319 current_size = A_SIZE_FIX(temp)->size;
320 break;
321 default:
322 current_size = 0;
323 break;
324 }
325
326 current_size -= (agp_memory_reserved / (1024*1024));
327 if (current_size <0)
328 current_size = 0;
329 return current_size;
330 }
331
332
333 int agp_num_entries(void)
334 {
335 int num_entries;
336 void *temp;
337
338 temp = agp_bridge->current_size;
339
340 switch (agp_bridge->driver->size_type) {
341 case U8_APER_SIZE:
342 num_entries = A_SIZE_8(temp)->num_entries;
343 break;
344 case U16_APER_SIZE:
345 num_entries = A_SIZE_16(temp)->num_entries;
346 break;
347 case U32_APER_SIZE:
348 num_entries = A_SIZE_32(temp)->num_entries;
349 break;
350 case LVL2_APER_SIZE:
351 num_entries = A_SIZE_LVL2(temp)->num_entries;
352 break;
353 case FIXED_APER_SIZE:
354 num_entries = A_SIZE_FIX(temp)->num_entries;
355 break;
356 default:
357 num_entries = 0;
358 break;
359 }
360
361 num_entries -= agp_memory_reserved>>PAGE_SHIFT;
362 if (num_entries<0)
363 num_entries = 0;
364 return num_entries;
365 }
366 EXPORT_SYMBOL_GPL(agp_num_entries);
367
368
369 /**
370 * agp_copy_info - copy bridge state information
371 *
372 * @info: agp_kern_info pointer. The caller should insure that this pointer is valid.
373 *
374 * This function copies information about the agp bridge device and the state of
375 * the agp backend into an agp_kern_info pointer.
376 */
377 int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
378 {
379 memset(info, 0, sizeof(struct agp_kern_info));
380 if (!bridge) {
381 info->chipset = NOT_SUPPORTED;
382 return -EIO;
383 }
384
385 info->version.major = bridge->version->major;
386 info->version.minor = bridge->version->minor;
387 info->chipset = SUPPORTED;
388 info->device = bridge->dev;
389 if (bridge->mode & AGPSTAT_MODE_3_0)
390 info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
391 else
392 info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
393 info->aper_base = bridge->gart_bus_addr;
394 info->aper_size = agp_return_size();
395 info->max_memory = bridge->max_memory_agp;
396 info->current_memory = atomic_read(&bridge->current_memory_agp);
397 info->cant_use_aperture = bridge->driver->cant_use_aperture;
398 info->vm_ops = bridge->vm_ops;
399 info->page_mask = ~0UL;
400 return 0;
401 }
402 EXPORT_SYMBOL(agp_copy_info);
403
404 /* End - Routine to copy over information structure */
405
406 /*
407 * Routines for handling swapping of agp_memory into the GATT -
408 * These routines take agp_memory and insert them into the GATT.
409 * They call device specific routines to actually write to the GATT.
410 */
411
412 /**
413 * agp_bind_memory - Bind an agp_memory structure into the GATT.
414 *
415 * @curr: agp_memory pointer
416 * @pg_start: an offset into the graphics aperture translation table
417 *
418 * It returns -EINVAL if the pointer == NULL.
419 * It returns -EBUSY if the area of the table requested is already in use.
420 */
421 int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
422 {
423 int ret_val;
424
425 if (curr == NULL)
426 return -EINVAL;
427
428 if (curr->is_bound == TRUE) {
429 printk(KERN_INFO PFX "memory %p is already bound!\n", curr);
430 return -EINVAL;
431 }
432 if (curr->is_flushed == FALSE) {
433 curr->bridge->driver->cache_flush();
434 curr->is_flushed = TRUE;
435 }
436 ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
437
438 if (ret_val != 0)
439 return ret_val;
440
441 curr->is_bound = TRUE;
442 curr->pg_start = pg_start;
443 return 0;
444 }
445 EXPORT_SYMBOL(agp_bind_memory);
446
447
448 /**
449 * agp_unbind_memory - Removes an agp_memory structure from the GATT
450 *
451 * @curr: agp_memory pointer to be removed from the GATT.
452 *
453 * It returns -EINVAL if this piece of agp_memory is not currently bound to
454 * the graphics aperture translation table or if the agp_memory pointer == NULL
455 */
456 int agp_unbind_memory(struct agp_memory *curr)
457 {
458 int ret_val;
459
460 if (curr == NULL)
461 return -EINVAL;
462
463 if (curr->is_bound != TRUE) {
464 printk(KERN_INFO PFX "memory %p was not bound!\n", curr);
465 return -EINVAL;
466 }
467
468 ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type);
469
470 if (ret_val != 0)
471 return ret_val;
472
473 curr->is_bound = FALSE;
474 curr->pg_start = 0;
475 return 0;
476 }
477 EXPORT_SYMBOL(agp_unbind_memory);
478
479 /* End - Routines for handling swapping of agp_memory into the GATT */
480
481
482 /* Generic Agp routines - Start */
483 static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
484 {
485 u32 tmp;
486
487 if (*requested_mode & AGP2_RESERVED_MASK) {
488 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
489 *requested_mode & AGP2_RESERVED_MASK, *requested_mode);
490 *requested_mode &= ~AGP2_RESERVED_MASK;
491 }
492
493 /*
494 * Some dumb bridges are programmed to disobey the AGP2 spec.
495 * This is likely a BIOS misprogramming rather than poweron default, or
496 * it would be a lot more common.
497 * https://bugs.freedesktop.org/show_bug.cgi?id=8816
498 * AGPv2 spec 6.1.9 states:
499 * The RATE field indicates the data transfer rates supported by this
500 * device. A.G.P. devices must report all that apply.
501 * Fix them up as best we can.
502 */
503 switch (*bridge_agpstat & 7) {
504 case 4:
505 *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X);
506 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate"
507 "Fixing up support for x2 & x1\n");
508 break;
509 case 2:
510 *bridge_agpstat |= AGPSTAT2_1X;
511 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate"
512 "Fixing up support for x1\n");
513 break;
514 default:
515 break;
516 }
517
518 /* Check the speed bits make sense. Only one should be set. */
519 tmp = *requested_mode & 7;
520 switch (tmp) {
521 case 0:
522 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm);
523 *requested_mode |= AGPSTAT2_1X;
524 break;
525 case 1:
526 case 2:
527 break;
528 case 3:
529 *requested_mode &= ~(AGPSTAT2_1X); /* rate=2 */
530 break;
531 case 4:
532 break;
533 case 5:
534 case 6:
535 case 7:
536 *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/
537 break;
538 }
539
540 /* disable SBA if it's not supported */
541 if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA)))
542 *bridge_agpstat &= ~AGPSTAT_SBA;
543
544 /* Set rate */
545 if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X)))
546 *bridge_agpstat &= ~AGPSTAT2_4X;
547
548 if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X)))
549 *bridge_agpstat &= ~AGPSTAT2_2X;
550
551 if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X)))
552 *bridge_agpstat &= ~AGPSTAT2_1X;
553
554 /* Now we know what mode it should be, clear out the unwanted bits. */
555 if (*bridge_agpstat & AGPSTAT2_4X)
556 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X); /* 4X */
557
558 if (*bridge_agpstat & AGPSTAT2_2X)
559 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X); /* 2X */
560
561 if (*bridge_agpstat & AGPSTAT2_1X)
562 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); /* 1X */
563
564 /* Apply any errata. */
565 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
566 *bridge_agpstat &= ~AGPSTAT_FW;
567
568 if (agp_bridge->flags & AGP_ERRATA_SBA)
569 *bridge_agpstat &= ~AGPSTAT_SBA;
570
571 if (agp_bridge->flags & AGP_ERRATA_1X) {
572 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
573 *bridge_agpstat |= AGPSTAT2_1X;
574 }
575
576 /* If we've dropped down to 1X, disable fast writes. */
577 if (*bridge_agpstat & AGPSTAT2_1X)
578 *bridge_agpstat &= ~AGPSTAT_FW;
579 }
580
581 /*
582 * requested_mode = Mode requested by (typically) X.
583 * bridge_agpstat = PCI_AGP_STATUS from agp bridge.
584 * vga_agpstat = PCI_AGP_STATUS from graphic card.
585 */
586 static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
587 {
588 u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat;
589 u32 tmp;
590
591 if (*requested_mode & AGP3_RESERVED_MASK) {
592 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
593 *requested_mode & AGP3_RESERVED_MASK, *requested_mode);
594 *requested_mode &= ~AGP3_RESERVED_MASK;
595 }
596
597 /* Check the speed bits make sense. */
598 tmp = *requested_mode & 7;
599 if (tmp == 0) {
600 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm);
601 *requested_mode |= AGPSTAT3_4X;
602 }
603 if (tmp >= 3) {
604 printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4);
605 *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X;
606 }
607
608 /* ARQSZ - Set the value to the maximum one.
609 * Don't allow the mode register to override values. */
610 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) |
611 max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ)));
612
613 /* Calibration cycle.
614 * Don't allow the mode register to override values. */
615 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) |
616 min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK)));
617
618 /* SBA *must* be supported for AGP v3 */
619 *bridge_agpstat |= AGPSTAT_SBA;
620
621 /*
622 * Set speed.
623 * Check for invalid speeds. This can happen when applications
624 * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
625 */
626 if (*requested_mode & AGPSTAT_MODE_3_0) {
627 /*
628 * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode,
629 * have been passed a 3.0 mode, but with 2.x speed bits set.
630 * AGP2.x 4x -> AGP3.0 4x.
631 */
632 if (*requested_mode & AGPSTAT2_4X) {
633 printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
634 current->comm, *requested_mode);
635 *requested_mode &= ~AGPSTAT2_4X;
636 *requested_mode |= AGPSTAT3_4X;
637 }
638 } else {
639 /*
640 * The caller doesn't know what they are doing. We are in 3.0 mode,
641 * but have been passed an AGP 2.x mode.
642 * Convert AGP 1x,2x,4x -> AGP 3.0 4x.
643 */
644 printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
645 current->comm, *requested_mode);
646 *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
647 *requested_mode |= AGPSTAT3_4X;
648 }
649
650 if (*requested_mode & AGPSTAT3_8X) {
651 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
652 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
653 *bridge_agpstat |= AGPSTAT3_4X;
654 printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm);
655 return;
656 }
657 if (!(*vga_agpstat & AGPSTAT3_8X)) {
658 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
659 *bridge_agpstat |= AGPSTAT3_4X;
660 printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm);
661 return;
662 }
663 /* All set, bridge & device can do AGP x8*/
664 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
665 goto done;
666
667 } else if (*requested_mode & AGPSTAT3_4X) {
668 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
669 *bridge_agpstat |= AGPSTAT3_4X;
670 goto done;
671
672 } else {
673
674 /*
675 * If we didn't specify an AGP mode, we see if both
676 * the graphics card, and the bridge can do x8, and use if so.
677 * If not, we fall back to x4 mode.
678 */
679 if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) {
680 printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode "
681 "supported by bridge & card (x8).\n");
682 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
683 *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
684 } else {
685 printk(KERN_INFO PFX "Fell back to AGPx4 mode because");
686 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
687 printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n",
688 *bridge_agpstat, origbridge);
689 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
690 *bridge_agpstat |= AGPSTAT3_4X;
691 }
692 if (!(*vga_agpstat & AGPSTAT3_8X)) {
693 printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n",
694 *vga_agpstat, origvga);
695 *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
696 *vga_agpstat |= AGPSTAT3_4X;
697 }
698 }
699 }
700
701 done:
702 /* Apply any errata. */
703 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
704 *bridge_agpstat &= ~AGPSTAT_FW;
705
706 if (agp_bridge->flags & AGP_ERRATA_SBA)
707 *bridge_agpstat &= ~AGPSTAT_SBA;
708
709 if (agp_bridge->flags & AGP_ERRATA_1X) {
710 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
711 *bridge_agpstat |= AGPSTAT2_1X;
712 }
713 }
714
715
716 /**
717 * agp_collect_device_status - determine correct agp_cmd from various agp_stat's
718 * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
719 * @requested_mode: requested agp_stat from userspace (Typically from X)
720 * @bridge_agpstat: current agp_stat from AGP bridge.
721 *
722 * This function will hunt for an AGP graphics card, and try to match
723 * the requested mode to the capabilities of both the bridge and the card.
724 */
725 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat)
726 {
727 struct pci_dev *device = NULL;
728 u32 vga_agpstat;
729 u8 cap_ptr;
730
731 for (;;) {
732 device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device);
733 if (!device) {
734 printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
735 return 0;
736 }
737 cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
738 if (cap_ptr)
739 break;
740 }
741
742 /*
743 * Ok, here we have a AGP device. Disable impossible
744 * settings, and adjust the readqueue to the minimum.
745 */
746 pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat);
747
748 /* adjust RQ depth */
749 bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) |
750 min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH),
751 min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH))));
752
753 /* disable FW if it's not supported */
754 if (!((bridge_agpstat & AGPSTAT_FW) &&
755 (vga_agpstat & AGPSTAT_FW) &&
756 (requested_mode & AGPSTAT_FW)))
757 bridge_agpstat &= ~AGPSTAT_FW;
758
759 /* Check to see if we are operating in 3.0 mode */
760 if (agp_bridge->mode & AGPSTAT_MODE_3_0)
761 agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
762 else
763 agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
764
765 pci_dev_put(device);
766 return bridge_agpstat;
767 }
768 EXPORT_SYMBOL(agp_collect_device_status);
769
770
771 void agp_device_command(u32 bridge_agpstat, int agp_v3)
772 {
773 struct pci_dev *device = NULL;
774 int mode;
775
776 mode = bridge_agpstat & 0x7;
777 if (agp_v3)
778 mode *= 4;
779
780 for_each_pci_dev(device) {
781 u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
782 if (!agp)
783 continue;
784
785 printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n",
786 agp_v3 ? 3 : 2, pci_name(device), mode);
787 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
788 }
789 }
790 EXPORT_SYMBOL(agp_device_command);
791
792
793 void get_agp_version(struct agp_bridge_data *bridge)
794 {
795 u32 ncapid;
796
797 /* Exit early if already set by errata workarounds. */
798 if (bridge->major_version != 0)
799 return;
800
801 pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid);
802 bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
803 bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
804 }
805 EXPORT_SYMBOL(get_agp_version);
806
807
808 void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
809 {
810 u32 bridge_agpstat, temp;
811
812 get_agp_version(agp_bridge);
813
814 printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
815 agp_bridge->major_version,
816 agp_bridge->minor_version,
817 pci_name(agp_bridge->dev));
818
819 pci_read_config_dword(agp_bridge->dev,
820 agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
821
822 bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat);
823 if (bridge_agpstat == 0)
824 /* Something bad happened. FIXME: Return error code? */
825 return;
826
827 bridge_agpstat |= AGPSTAT_AGP_ENABLE;
828
829 /* Do AGP version specific frobbing. */
830 if (bridge->major_version >= 3) {
831 if (bridge->mode & AGPSTAT_MODE_3_0) {
832 /* If we have 3.5, we can do the isoch stuff. */
833 if (bridge->minor_version >= 5)
834 agp_3_5_enable(bridge);
835 agp_device_command(bridge_agpstat, TRUE);
836 return;
837 } else {
838 /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
839 bridge_agpstat &= ~(7<<10) ;
840 pci_read_config_dword(bridge->dev,
841 bridge->capndx+AGPCTRL, &temp);
842 temp |= (1<<9);
843 pci_write_config_dword(bridge->dev,
844 bridge->capndx+AGPCTRL, temp);
845
846 printk(KERN_INFO PFX "Device is in legacy mode,"
847 " falling back to 2.x\n");
848 }
849 }
850
851 /* AGP v<3 */
852 agp_device_command(bridge_agpstat, FALSE);
853 }
854 EXPORT_SYMBOL(agp_generic_enable);
855
856
857 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)
858 {
859 char *table;
860 char *table_end;
861 int size;
862 int page_order;
863 int num_entries;
864 int i;
865 void *temp;
866 struct page *page;
867
868 /* The generic routines can't handle 2 level gatt's */
869 if (bridge->driver->size_type == LVL2_APER_SIZE)
870 return -EINVAL;
871
872 table = NULL;
873 i = bridge->aperture_size_idx;
874 temp = bridge->current_size;
875 size = page_order = num_entries = 0;
876
877 if (bridge->driver->size_type != FIXED_APER_SIZE) {
878 do {
879 switch (bridge->driver->size_type) {
880 case U8_APER_SIZE:
881 size = A_SIZE_8(temp)->size;
882 page_order =
883 A_SIZE_8(temp)->page_order;
884 num_entries =
885 A_SIZE_8(temp)->num_entries;
886 break;
887 case U16_APER_SIZE:
888 size = A_SIZE_16(temp)->size;
889 page_order = A_SIZE_16(temp)->page_order;
890 num_entries = A_SIZE_16(temp)->num_entries;
891 break;
892 case U32_APER_SIZE:
893 size = A_SIZE_32(temp)->size;
894 page_order = A_SIZE_32(temp)->page_order;
895 num_entries = A_SIZE_32(temp)->num_entries;
896 break;
897 /* This case will never really happen. */
898 case FIXED_APER_SIZE:
899 case LVL2_APER_SIZE:
900 default:
901 size = page_order = num_entries = 0;
902 break;
903 }
904
905 table = alloc_gatt_pages(page_order);
906
907 if (table == NULL) {
908 i++;
909 switch (bridge->driver->size_type) {
910 case U8_APER_SIZE:
911 bridge->current_size = A_IDX8(bridge);
912 break;
913 case U16_APER_SIZE:
914 bridge->current_size = A_IDX16(bridge);
915 break;
916 case U32_APER_SIZE:
917 bridge->current_size = A_IDX32(bridge);
918 break;
919 /* These cases will never really happen. */
920 case FIXED_APER_SIZE:
921 case LVL2_APER_SIZE:
922 default:
923 break;
924 }
925 temp = bridge->current_size;
926 } else {
927 bridge->aperture_size_idx = i;
928 }
929 } while (!table && (i < bridge->driver->num_aperture_sizes));
930 } else {
931 size = ((struct aper_size_info_fixed *) temp)->size;
932 page_order = ((struct aper_size_info_fixed *) temp)->page_order;
933 num_entries = ((struct aper_size_info_fixed *) temp)->num_entries;
934 table = alloc_gatt_pages(page_order);
935 }
936
937 if (table == NULL)
938 return -ENOMEM;
939
940 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
941
942 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
943 SetPageReserved(page);
944
945 bridge->gatt_table_real = (u32 *) table;
946 agp_gatt_table = (void *)table;
947
948 bridge->driver->cache_flush();
949 bridge->gatt_table = ioremap_nocache(virt_to_gart(table),
950 (PAGE_SIZE * (1 << page_order)));
951 bridge->driver->cache_flush();
952
953 if (bridge->gatt_table == NULL) {
954 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
955 ClearPageReserved(page);
956
957 free_gatt_pages(table, page_order);
958
959 return -ENOMEM;
960 }
961 bridge->gatt_bus_addr = virt_to_gart(bridge->gatt_table_real);
962
963 /* AK: bogus, should encode addresses > 4GB */
964 for (i = 0; i < num_entries; i++) {
965 writel(bridge->scratch_page, bridge->gatt_table+i);
966 readl(bridge->gatt_table+i); /* PCI Posting. */
967 }
968
969 return 0;
970 }
971 EXPORT_SYMBOL(agp_generic_create_gatt_table);
972
973 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)
974 {
975 int page_order;
976 char *table, *table_end;
977 void *temp;
978 struct page *page;
979
980 temp = bridge->current_size;
981
982 switch (bridge->driver->size_type) {
983 case U8_APER_SIZE:
984 page_order = A_SIZE_8(temp)->page_order;
985 break;
986 case U16_APER_SIZE:
987 page_order = A_SIZE_16(temp)->page_order;
988 break;
989 case U32_APER_SIZE:
990 page_order = A_SIZE_32(temp)->page_order;
991 break;
992 case FIXED_APER_SIZE:
993 page_order = A_SIZE_FIX(temp)->page_order;
994 break;
995 case LVL2_APER_SIZE:
996 /* The generic routines can't deal with 2 level gatt's */
997 return -EINVAL;
998 break;
999 default:
1000 page_order = 0;
1001 break;
1002 }
1003
1004 /* Do not worry about freeing memory, because if this is
1005 * called, then all agp memory is deallocated and removed
1006 * from the table. */
1007
1008 iounmap(bridge->gatt_table);
1009 table = (char *) bridge->gatt_table_real;
1010 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
1011
1012 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
1013 ClearPageReserved(page);
1014
1015 free_gatt_pages(bridge->gatt_table_real, page_order);
1016
1017 agp_gatt_table = NULL;
1018 bridge->gatt_table = NULL;
1019 bridge->gatt_table_real = NULL;
1020 bridge->gatt_bus_addr = 0;
1021
1022 return 0;
1023 }
1024 EXPORT_SYMBOL(agp_generic_free_gatt_table);
1025
1026
1027 int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
1028 {
1029 int num_entries;
1030 size_t i;
1031 off_t j;
1032 void *temp;
1033 struct agp_bridge_data *bridge;
1034 int mask_type;
1035
1036 bridge = mem->bridge;
1037 if (!bridge)
1038 return -EINVAL;
1039
1040 if (mem->page_count == 0)
1041 return 0;
1042
1043 temp = bridge->current_size;
1044
1045 switch (bridge->driver->size_type) {
1046 case U8_APER_SIZE:
1047 num_entries = A_SIZE_8(temp)->num_entries;
1048 break;
1049 case U16_APER_SIZE:
1050 num_entries = A_SIZE_16(temp)->num_entries;
1051 break;
1052 case U32_APER_SIZE:
1053 num_entries = A_SIZE_32(temp)->num_entries;
1054 break;
1055 case FIXED_APER_SIZE:
1056 num_entries = A_SIZE_FIX(temp)->num_entries;
1057 break;
1058 case LVL2_APER_SIZE:
1059 /* The generic routines can't deal with 2 level gatt's */
1060 return -EINVAL;
1061 break;
1062 default:
1063 num_entries = 0;
1064 break;
1065 }
1066
1067 num_entries -= agp_memory_reserved/PAGE_SIZE;
1068 if (num_entries < 0) num_entries = 0;
1069
1070 if (type != mem->type)
1071 return -EINVAL;
1072
1073 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1074 if (mask_type != 0) {
1075 /* The generic routines know nothing of memory types */
1076 return -EINVAL;
1077 }
1078
1079 /* AK: could wrap */
1080 if ((pg_start + mem->page_count) > num_entries)
1081 return -EINVAL;
1082
1083 j = pg_start;
1084
1085 while (j < (pg_start + mem->page_count)) {
1086 if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
1087 return -EBUSY;
1088 j++;
1089 }
1090
1091 if (mem->is_flushed == FALSE) {
1092 bridge->driver->cache_flush();
1093 mem->is_flushed = TRUE;
1094 }
1095
1096 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
1097 writel(bridge->driver->mask_memory(bridge, mem->memory[i], mask_type),
1098 bridge->gatt_table+j);
1099 }
1100 readl(bridge->gatt_table+j-1); /* PCI Posting. */
1101
1102 bridge->driver->tlb_flush(mem);
1103 return 0;
1104 }
1105 EXPORT_SYMBOL(agp_generic_insert_memory);
1106
1107
1108 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
1109 {
1110 size_t i;
1111 struct agp_bridge_data *bridge;
1112 int mask_type;
1113
1114 bridge = mem->bridge;
1115 if (!bridge)
1116 return -EINVAL;
1117
1118 if (mem->page_count == 0)
1119 return 0;
1120
1121 if (type != mem->type)
1122 return -EINVAL;
1123
1124 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1125 if (mask_type != 0) {
1126 /* The generic routines know nothing of memory types */
1127 return -EINVAL;
1128 }
1129
1130 /* AK: bogus, should encode addresses > 4GB */
1131 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
1132 writel(bridge->scratch_page, bridge->gatt_table+i);
1133 }
1134 readl(bridge->gatt_table+i-1); /* PCI Posting. */
1135
1136 bridge->driver->tlb_flush(mem);
1137 return 0;
1138 }
1139 EXPORT_SYMBOL(agp_generic_remove_memory);
1140
1141 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type)
1142 {
1143 return NULL;
1144 }
1145 EXPORT_SYMBOL(agp_generic_alloc_by_type);
1146
1147 void agp_generic_free_by_type(struct agp_memory *curr)
1148 {
1149 agp_free_page_array(curr);
1150 agp_free_key(curr->key);
1151 kfree(curr);
1152 }
1153 EXPORT_SYMBOL(agp_generic_free_by_type);
1154
1155 struct agp_memory *agp_generic_alloc_user(size_t page_count, int type)
1156 {
1157 struct agp_memory *new;
1158 int i;
1159 int pages;
1160
1161 pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
1162 new = agp_create_user_memory(page_count);
1163 if (new == NULL)
1164 return NULL;
1165
1166 for (i = 0; i < page_count; i++)
1167 new->memory[i] = 0;
1168 new->page_count = 0;
1169 new->type = type;
1170 new->num_scratch_pages = pages;
1171
1172 return new;
1173 }
1174 EXPORT_SYMBOL(agp_generic_alloc_user);
1175
1176 /*
1177 * Basic Page Allocation Routines -
1178 * These routines handle page allocation and by default they reserve the allocated
1179 * memory. They also handle incrementing the current_memory_agp value, Which is checked
1180 * against a maximum value.
1181 */
1182
1183 void *agp_generic_alloc_page(struct agp_bridge_data *bridge)
1184 {
1185 struct page * page;
1186
1187 page = alloc_page(GFP_KERNEL | GFP_DMA32);
1188 if (page == NULL)
1189 return NULL;
1190
1191 map_page_into_agp(page);
1192
1193 get_page(page);
1194 SetPageLocked(page);
1195 atomic_inc(&agp_bridge->current_memory_agp);
1196 return page_address(page);
1197 }
1198 EXPORT_SYMBOL(agp_generic_alloc_page);
1199
1200
1201 void agp_generic_destroy_page(void *addr)
1202 {
1203 struct page *page;
1204
1205 if (addr == NULL)
1206 return;
1207
1208 page = virt_to_page(addr);
1209 unmap_page_from_agp(page);
1210 put_page(page);
1211 unlock_page(page);
1212 free_page((unsigned long)addr);
1213 atomic_dec(&agp_bridge->current_memory_agp);
1214 }
1215 EXPORT_SYMBOL(agp_generic_destroy_page);
1216
1217 /* End Basic Page Allocation Routines */
1218
1219
1220 /**
1221 * agp_enable - initialise the agp point-to-point connection.
1222 *
1223 * @mode: agp mode register value to configure with.
1224 */
1225 void agp_enable(struct agp_bridge_data *bridge, u32 mode)
1226 {
1227 if (!bridge)
1228 return;
1229 bridge->driver->agp_enable(bridge, mode);
1230 }
1231 EXPORT_SYMBOL(agp_enable);
1232
1233 /* When we remove the global variable agp_bridge from all drivers
1234 * then agp_alloc_bridge and agp_generic_find_bridge need to be updated
1235 */
1236
1237 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev)
1238 {
1239 if (list_empty(&agp_bridges))
1240 return NULL;
1241
1242 return agp_bridge;
1243 }
1244
1245 static void ipi_handler(void *null)
1246 {
1247 flush_agp_cache();
1248 }
1249
1250 void global_cache_flush(void)
1251 {
1252 if (on_each_cpu(ipi_handler, NULL, 1, 1) != 0)
1253 panic(PFX "timed out waiting for the other CPUs!\n");
1254 }
1255 EXPORT_SYMBOL(global_cache_flush);
1256
1257 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
1258 unsigned long addr, int type)
1259 {
1260 /* memory type is ignored in the generic routine */
1261 if (bridge->driver->masks)
1262 return addr | bridge->driver->masks[0].mask;
1263 else
1264 return addr;
1265 }
1266 EXPORT_SYMBOL(agp_generic_mask_memory);
1267
1268 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
1269 int type)
1270 {
1271 if (type >= AGP_USER_TYPES)
1272 return 0;
1273 return type;
1274 }
1275 EXPORT_SYMBOL(agp_generic_type_to_mask_type);
1276
1277 /*
1278 * These functions are implemented according to the AGPv3 spec,
1279 * which covers implementation details that had previously been
1280 * left open.
1281 */
1282
1283 int agp3_generic_fetch_size(void)
1284 {
1285 u16 temp_size;
1286 int i;
1287 struct aper_size_info_16 *values;
1288
1289 pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
1290 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
1291
1292 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
1293 if (temp_size == values[i].size_value) {
1294 agp_bridge->previous_size =
1295 agp_bridge->current_size = (void *) (values + i);
1296
1297 agp_bridge->aperture_size_idx = i;
1298 return values[i].size;
1299 }
1300 }
1301 return 0;
1302 }
1303 EXPORT_SYMBOL(agp3_generic_fetch_size);
1304
1305 void agp3_generic_tlbflush(struct agp_memory *mem)
1306 {
1307 u32 ctrl;
1308 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1309 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
1310 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
1311 }
1312 EXPORT_SYMBOL(agp3_generic_tlbflush);
1313
1314 int agp3_generic_configure(void)
1315 {
1316 u32 temp;
1317 struct aper_size_info_16 *current_size;
1318
1319 current_size = A_SIZE_16(agp_bridge->current_size);
1320
1321 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1322 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1323
1324 /* set aperture size */
1325 pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
1326 /* set gart pointer */
1327 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
1328 /* enable aperture and GTLB */
1329 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
1330 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN);
1331 return 0;
1332 }
1333 EXPORT_SYMBOL(agp3_generic_configure);
1334
1335 void agp3_generic_cleanup(void)
1336 {
1337 u32 ctrl;
1338 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1339 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
1340 }
1341 EXPORT_SYMBOL(agp3_generic_cleanup);
1342
1343 const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
1344 {
1345 {4096, 1048576, 10,0x000},
1346 {2048, 524288, 9, 0x800},
1347 {1024, 262144, 8, 0xc00},
1348 { 512, 131072, 7, 0xe00},
1349 { 256, 65536, 6, 0xf00},
1350 { 128, 32768, 5, 0xf20},
1351 { 64, 16384, 4, 0xf30},
1352 { 32, 8192, 3, 0xf38},
1353 { 16, 4096, 2, 0xf3c},
1354 { 8, 2048, 1, 0xf3e},
1355 { 4, 1024, 0, 0xf3f}
1356 };
1357 EXPORT_SYMBOL(agp3_generic_sizes);
1358