2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
42 #include <asm-generic/io-64-nonatomic-lo-hi.h>
44 #define NVME_Q_DEPTH 1024
45 #define NVME_AQ_DEPTH 64
46 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
47 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
48 #define ADMIN_TIMEOUT (admin_timeout * HZ)
49 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
50 #define IOD_TIMEOUT (retry_time * HZ)
52 static unsigned char admin_timeout
= 60;
53 module_param(admin_timeout
, byte
, 0644);
54 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
56 unsigned char nvme_io_timeout
= 30;
57 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
58 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
60 static unsigned char retry_time
= 30;
61 module_param(retry_time
, byte
, 0644);
62 MODULE_PARM_DESC(retry_time
, "time in seconds to retry failed I/O");
64 static unsigned char shutdown_timeout
= 5;
65 module_param(shutdown_timeout
, byte
, 0644);
66 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
68 static int nvme_major
;
69 module_param(nvme_major
, int, 0);
71 static int use_threaded_interrupts
;
72 module_param(use_threaded_interrupts
, int, 0);
74 static DEFINE_SPINLOCK(dev_list_lock
);
75 static LIST_HEAD(dev_list
);
76 static struct task_struct
*nvme_thread
;
77 static struct workqueue_struct
*nvme_workq
;
78 static wait_queue_head_t nvme_kthread_wait
;
79 static struct notifier_block nvme_nb
;
81 static void nvme_reset_failed_dev(struct work_struct
*ws
);
82 static int nvme_process_cq(struct nvme_queue
*nvmeq
);
84 struct async_cmd_info
{
85 struct kthread_work work
;
86 struct kthread_worker
*worker
;
94 * An NVM Express queue. Each device has at least two (one for admin
95 * commands and one for I/O commands).
98 struct llist_node node
;
99 struct device
*q_dmadev
;
100 struct nvme_dev
*dev
;
101 char irqname
[24]; /* nvme4294967295-65535\0 */
103 struct nvme_command
*sq_cmds
;
104 volatile struct nvme_completion
*cqes
;
105 dma_addr_t sq_dma_addr
;
106 dma_addr_t cq_dma_addr
;
116 struct async_cmd_info cmdinfo
;
117 struct blk_mq_hw_ctx
*hctx
;
121 * Check we didin't inadvertently grow the command struct
123 static inline void _nvme_check_size(void)
125 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
126 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
127 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
129 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
130 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
131 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
134 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
135 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
139 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
140 struct nvme_completion
*);
142 struct nvme_cmd_info
{
143 nvme_completion_fn fn
;
146 struct nvme_queue
*nvmeq
;
147 struct nvme_iod iod
[0];
151 * Max size of iod being embedded in the request payload
153 #define NVME_INT_PAGES 2
154 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
157 * Will slightly overestimate the number of pages needed. This is OK
158 * as it only leads to a small amount of wasted memory for the lifetime of
161 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
163 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->page_size
, dev
->page_size
);
164 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
167 static unsigned int nvme_cmd_size(struct nvme_dev
*dev
)
169 unsigned int ret
= sizeof(struct nvme_cmd_info
);
171 ret
+= sizeof(struct nvme_iod
);
172 ret
+= sizeof(__le64
*) * nvme_npages(NVME_INT_BYTES(dev
), dev
);
173 ret
+= sizeof(struct scatterlist
) * NVME_INT_PAGES
;
178 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
179 unsigned int hctx_idx
)
181 struct nvme_dev
*dev
= data
;
182 struct nvme_queue
*nvmeq
= dev
->queues
[0];
184 WARN_ON(nvmeq
->hctx
);
186 hctx
->driver_data
= nvmeq
;
190 static int nvme_admin_init_request(void *data
, struct request
*req
,
191 unsigned int hctx_idx
, unsigned int rq_idx
,
192 unsigned int numa_node
)
194 struct nvme_dev
*dev
= data
;
195 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
196 struct nvme_queue
*nvmeq
= dev
->queues
[0];
203 static void nvme_exit_hctx(struct blk_mq_hw_ctx
*hctx
, unsigned int hctx_idx
)
205 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
210 static int nvme_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
211 unsigned int hctx_idx
)
213 struct nvme_dev
*dev
= data
;
214 struct nvme_queue
*nvmeq
= dev
->queues
[
215 (hctx_idx
% dev
->queue_count
) + 1];
220 /* nvmeq queues are shared between namespaces. We assume here that
221 * blk-mq map the tags so they match up with the nvme queue tags. */
222 WARN_ON(nvmeq
->hctx
->tags
!= hctx
->tags
);
224 hctx
->driver_data
= nvmeq
;
228 static int nvme_init_request(void *data
, struct request
*req
,
229 unsigned int hctx_idx
, unsigned int rq_idx
,
230 unsigned int numa_node
)
232 struct nvme_dev
*dev
= data
;
233 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
234 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
241 static void nvme_set_info(struct nvme_cmd_info
*cmd
, void *ctx
,
242 nvme_completion_fn handler
)
249 static void *iod_get_private(struct nvme_iod
*iod
)
251 return (void *) (iod
->private & ~0x1UL
);
255 * If bit 0 is set, the iod is embedded in the request payload.
257 static bool iod_should_kfree(struct nvme_iod
*iod
)
259 return (iod
->private & 0x01) == 0;
262 /* Special values must be less than 0x1000 */
263 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
264 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
265 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
266 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
268 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
269 struct nvme_completion
*cqe
)
271 if (ctx
== CMD_CTX_CANCELLED
)
273 if (ctx
== CMD_CTX_COMPLETED
) {
274 dev_warn(nvmeq
->q_dmadev
,
275 "completed id %d twice on queue %d\n",
276 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
279 if (ctx
== CMD_CTX_INVALID
) {
280 dev_warn(nvmeq
->q_dmadev
,
281 "invalid id %d completed on queue %d\n",
282 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
285 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
288 static void *cancel_cmd_info(struct nvme_cmd_info
*cmd
, nvme_completion_fn
*fn
)
295 cmd
->fn
= special_completion
;
296 cmd
->ctx
= CMD_CTX_CANCELLED
;
300 static void async_req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
301 struct nvme_completion
*cqe
)
303 struct request
*req
= ctx
;
305 u32 result
= le32_to_cpup(&cqe
->result
);
306 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
308 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
309 ++nvmeq
->dev
->event_limit
;
310 if (status
== NVME_SC_SUCCESS
)
311 dev_warn(nvmeq
->q_dmadev
,
312 "async event result %08x\n", result
);
314 blk_mq_free_hctx_request(nvmeq
->hctx
, req
);
317 static void abort_completion(struct nvme_queue
*nvmeq
, void *ctx
,
318 struct nvme_completion
*cqe
)
320 struct request
*req
= ctx
;
322 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
323 u32 result
= le32_to_cpup(&cqe
->result
);
325 blk_mq_free_hctx_request(nvmeq
->hctx
, req
);
327 dev_warn(nvmeq
->q_dmadev
, "Abort status:%x result:%x", status
, result
);
328 ++nvmeq
->dev
->abort_limit
;
331 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
332 struct nvme_completion
*cqe
)
334 struct async_cmd_info
*cmdinfo
= ctx
;
335 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
336 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
337 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
338 blk_mq_free_hctx_request(nvmeq
->hctx
, cmdinfo
->req
);
341 static inline struct nvme_cmd_info
*get_cmd_from_tag(struct nvme_queue
*nvmeq
,
344 struct blk_mq_hw_ctx
*hctx
= nvmeq
->hctx
;
345 struct request
*req
= blk_mq_tag_to_rq(hctx
->tags
, tag
);
347 return blk_mq_rq_to_pdu(req
);
351 * Called with local interrupts disabled and the q_lock held. May not sleep.
353 static void *nvme_finish_cmd(struct nvme_queue
*nvmeq
, int tag
,
354 nvme_completion_fn
*fn
)
356 struct nvme_cmd_info
*cmd
= get_cmd_from_tag(nvmeq
, tag
);
358 if (tag
>= nvmeq
->q_depth
) {
359 *fn
= special_completion
;
360 return CMD_CTX_INVALID
;
365 cmd
->fn
= special_completion
;
366 cmd
->ctx
= CMD_CTX_COMPLETED
;
371 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
372 * @nvmeq: The queue to use
373 * @cmd: The command to send
375 * Safe to use from interrupt context
377 static int __nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
379 u16 tail
= nvmeq
->sq_tail
;
381 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
382 if (++tail
== nvmeq
->q_depth
)
384 writel(tail
, nvmeq
->q_db
);
385 nvmeq
->sq_tail
= tail
;
390 static int nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
394 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
395 ret
= __nvme_submit_cmd(nvmeq
, cmd
);
396 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
400 static __le64
**iod_list(struct nvme_iod
*iod
)
402 return ((void *)iod
) + iod
->offset
;
405 static inline void iod_init(struct nvme_iod
*iod
, unsigned nbytes
,
406 unsigned nseg
, unsigned long private)
408 iod
->private = private;
409 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
411 iod
->length
= nbytes
;
415 static struct nvme_iod
*
416 __nvme_alloc_iod(unsigned nseg
, unsigned bytes
, struct nvme_dev
*dev
,
417 unsigned long priv
, gfp_t gfp
)
419 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
420 sizeof(__le64
*) * nvme_npages(bytes
, dev
) +
421 sizeof(struct scatterlist
) * nseg
, gfp
);
424 iod_init(iod
, bytes
, nseg
, priv
);
429 static struct nvme_iod
*nvme_alloc_iod(struct request
*rq
, struct nvme_dev
*dev
,
432 unsigned size
= !(rq
->cmd_flags
& REQ_DISCARD
) ? blk_rq_bytes(rq
) :
433 sizeof(struct nvme_dsm_range
);
434 unsigned long mask
= 0;
435 struct nvme_iod
*iod
;
437 if (rq
->nr_phys_segments
<= NVME_INT_PAGES
&&
438 size
<= NVME_INT_BYTES(dev
)) {
439 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(rq
);
443 iod_init(iod
, size
, rq
->nr_phys_segments
,
444 (unsigned long) rq
| 0x01);
448 return __nvme_alloc_iod(rq
->nr_phys_segments
, size
, dev
,
449 (unsigned long) rq
, gfp
);
452 void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
454 const int last_prp
= dev
->page_size
/ 8 - 1;
456 __le64
**list
= iod_list(iod
);
457 dma_addr_t prp_dma
= iod
->first_dma
;
459 if (iod
->npages
== 0)
460 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
461 for (i
= 0; i
< iod
->npages
; i
++) {
462 __le64
*prp_list
= list
[i
];
463 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
464 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
465 prp_dma
= next_prp_dma
;
468 if (iod_should_kfree(iod
))
472 static int nvme_error_status(u16 status
)
474 switch (status
& 0x7ff) {
475 case NVME_SC_SUCCESS
:
477 case NVME_SC_CAP_EXCEEDED
:
484 static void req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
485 struct nvme_completion
*cqe
)
487 struct nvme_iod
*iod
= ctx
;
488 struct request
*req
= iod_get_private(iod
);
489 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
491 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
493 if (unlikely(status
)) {
494 if (!(status
& NVME_SC_DNR
|| blk_noretry_request(req
))
495 && (jiffies
- req
->start_time
) < req
->timeout
) {
496 blk_mq_requeue_request(req
);
497 blk_mq_kick_requeue_list(req
->q
);
500 req
->errors
= nvme_error_status(status
);
505 dev_warn(&nvmeq
->dev
->pci_dev
->dev
,
506 "completing aborted command with status:%04x\n",
510 dma_unmap_sg(&nvmeq
->dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
511 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
512 nvme_free_iod(nvmeq
->dev
, iod
);
514 blk_mq_complete_request(req
);
517 /* length is in bytes. gfp flags indicates whether we may sleep. */
518 int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
, int total_len
,
521 struct dma_pool
*pool
;
522 int length
= total_len
;
523 struct scatterlist
*sg
= iod
->sg
;
524 int dma_len
= sg_dma_len(sg
);
525 u64 dma_addr
= sg_dma_address(sg
);
526 int offset
= offset_in_page(dma_addr
);
528 __le64
**list
= iod_list(iod
);
531 u32 page_size
= dev
->page_size
;
533 length
-= (page_size
- offset
);
537 dma_len
-= (page_size
- offset
);
539 dma_addr
+= (page_size
- offset
);
542 dma_addr
= sg_dma_address(sg
);
543 dma_len
= sg_dma_len(sg
);
546 if (length
<= page_size
) {
547 iod
->first_dma
= dma_addr
;
551 nprps
= DIV_ROUND_UP(length
, page_size
);
552 if (nprps
<= (256 / 8)) {
553 pool
= dev
->prp_small_pool
;
556 pool
= dev
->prp_page_pool
;
560 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
562 iod
->first_dma
= dma_addr
;
564 return (total_len
- length
) + page_size
;
567 iod
->first_dma
= prp_dma
;
570 if (i
== page_size
>> 3) {
571 __le64
*old_prp_list
= prp_list
;
572 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
574 return total_len
- length
;
575 list
[iod
->npages
++] = prp_list
;
576 prp_list
[0] = old_prp_list
[i
- 1];
577 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
580 prp_list
[i
++] = cpu_to_le64(dma_addr
);
581 dma_len
-= page_size
;
582 dma_addr
+= page_size
;
590 dma_addr
= sg_dma_address(sg
);
591 dma_len
= sg_dma_len(sg
);
598 * We reuse the small pool to allocate the 16-byte range here as it is not
599 * worth having a special pool for these or additional cases to handle freeing
602 static void nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
603 struct request
*req
, struct nvme_iod
*iod
)
605 struct nvme_dsm_range
*range
=
606 (struct nvme_dsm_range
*)iod_list(iod
)[0];
607 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
609 range
->cattr
= cpu_to_le32(0);
610 range
->nlb
= cpu_to_le32(blk_rq_bytes(req
) >> ns
->lba_shift
);
611 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
613 memset(cmnd
, 0, sizeof(*cmnd
));
614 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
615 cmnd
->dsm
.command_id
= req
->tag
;
616 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
617 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
619 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
621 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
623 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
626 static void nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
629 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
631 memset(cmnd
, 0, sizeof(*cmnd
));
632 cmnd
->common
.opcode
= nvme_cmd_flush
;
633 cmnd
->common
.command_id
= cmdid
;
634 cmnd
->common
.nsid
= cpu_to_le32(ns
->ns_id
);
636 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
638 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
641 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
644 struct request
*req
= iod_get_private(iod
);
645 struct nvme_command
*cmnd
;
649 if (req
->cmd_flags
& REQ_FUA
)
650 control
|= NVME_RW_FUA
;
651 if (req
->cmd_flags
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
652 control
|= NVME_RW_LR
;
654 if (req
->cmd_flags
& REQ_RAHEAD
)
655 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
657 cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
658 memset(cmnd
, 0, sizeof(*cmnd
));
660 cmnd
->rw
.opcode
= (rq_data_dir(req
) ? nvme_cmd_write
: nvme_cmd_read
);
661 cmnd
->rw
.command_id
= req
->tag
;
662 cmnd
->rw
.nsid
= cpu_to_le32(ns
->ns_id
);
663 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
664 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
665 cmnd
->rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
666 cmnd
->rw
.length
= cpu_to_le16((blk_rq_bytes(req
) >> ns
->lba_shift
) - 1);
667 cmnd
->rw
.control
= cpu_to_le16(control
);
668 cmnd
->rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
670 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
672 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
677 static int nvme_queue_rq(struct blk_mq_hw_ctx
*hctx
,
678 const struct blk_mq_queue_data
*bd
)
680 struct nvme_ns
*ns
= hctx
->queue
->queuedata
;
681 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
682 struct request
*req
= bd
->rq
;
683 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
684 struct nvme_iod
*iod
;
685 enum dma_data_direction dma_dir
;
687 iod
= nvme_alloc_iod(req
, ns
->dev
, GFP_ATOMIC
);
689 return BLK_MQ_RQ_QUEUE_BUSY
;
691 if (req
->cmd_flags
& REQ_DISCARD
) {
694 * We reuse the small pool to allocate the 16-byte range here
695 * as it is not worth having a special pool for these or
696 * additional cases to handle freeing the iod.
698 range
= dma_pool_alloc(nvmeq
->dev
->prp_small_pool
,
703 iod_list(iod
)[0] = (__le64
*)range
;
705 } else if (req
->nr_phys_segments
) {
706 dma_dir
= rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
708 sg_init_table(iod
->sg
, req
->nr_phys_segments
);
709 iod
->nents
= blk_rq_map_sg(req
->q
, req
, iod
->sg
);
713 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
))
716 if (blk_rq_bytes(req
) !=
717 nvme_setup_prps(nvmeq
->dev
, iod
, blk_rq_bytes(req
), GFP_ATOMIC
)) {
718 dma_unmap_sg(&nvmeq
->dev
->pci_dev
->dev
, iod
->sg
,
719 iod
->nents
, dma_dir
);
724 blk_mq_start_request(req
);
726 nvme_set_info(cmd
, iod
, req_completion
);
727 spin_lock_irq(&nvmeq
->q_lock
);
728 if (req
->cmd_flags
& REQ_DISCARD
)
729 nvme_submit_discard(nvmeq
, ns
, req
, iod
);
730 else if (req
->cmd_flags
& REQ_FLUSH
)
731 nvme_submit_flush(nvmeq
, ns
, req
->tag
);
733 nvme_submit_iod(nvmeq
, iod
, ns
);
735 nvme_process_cq(nvmeq
);
736 spin_unlock_irq(&nvmeq
->q_lock
);
737 return BLK_MQ_RQ_QUEUE_OK
;
740 nvme_free_iod(nvmeq
->dev
, iod
);
741 return BLK_MQ_RQ_QUEUE_ERROR
;
743 nvme_free_iod(nvmeq
->dev
, iod
);
744 return BLK_MQ_RQ_QUEUE_BUSY
;
747 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
751 head
= nvmeq
->cq_head
;
752 phase
= nvmeq
->cq_phase
;
756 nvme_completion_fn fn
;
757 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
758 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
760 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
761 if (++head
== nvmeq
->q_depth
) {
765 ctx
= nvme_finish_cmd(nvmeq
, cqe
.command_id
, &fn
);
766 fn(nvmeq
, ctx
, &cqe
);
769 /* If the controller ignores the cq head doorbell and continuously
770 * writes to the queue, it is theoretically possible to wrap around
771 * the queue twice and mistakenly return IRQ_NONE. Linux only
772 * requires that 0.1% of your interrupts are handled, so this isn't
775 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
778 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
779 nvmeq
->cq_head
= head
;
780 nvmeq
->cq_phase
= phase
;
786 /* Admin queue isn't initialized as a request queue. If at some point this
787 * happens anyway, make sure to notify the user */
788 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx
*hctx
,
789 const struct blk_mq_queue_data
*bd
)
792 return BLK_MQ_RQ_QUEUE_ERROR
;
795 static irqreturn_t
nvme_irq(int irq
, void *data
)
798 struct nvme_queue
*nvmeq
= data
;
799 spin_lock(&nvmeq
->q_lock
);
800 nvme_process_cq(nvmeq
);
801 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
803 spin_unlock(&nvmeq
->q_lock
);
807 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
809 struct nvme_queue
*nvmeq
= data
;
810 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
811 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
813 return IRQ_WAKE_THREAD
;
816 static void nvme_abort_cmd_info(struct nvme_queue
*nvmeq
, struct nvme_cmd_info
*
819 spin_lock_irq(&nvmeq
->q_lock
);
820 cancel_cmd_info(cmd_info
, NULL
);
821 spin_unlock_irq(&nvmeq
->q_lock
);
824 struct sync_cmd_info
{
825 struct task_struct
*task
;
830 static void sync_completion(struct nvme_queue
*nvmeq
, void *ctx
,
831 struct nvme_completion
*cqe
)
833 struct sync_cmd_info
*cmdinfo
= ctx
;
834 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
835 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
836 wake_up_process(cmdinfo
->task
);
840 * Returns 0 on success. If the result is negative, it's a Linux error code;
841 * if the result is positive, it's an NVM Express status code
843 static int nvme_submit_sync_cmd(struct request
*req
, struct nvme_command
*cmd
,
844 u32
*result
, unsigned timeout
)
847 struct sync_cmd_info cmdinfo
;
848 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
849 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
851 cmdinfo
.task
= current
;
852 cmdinfo
.status
= -EINTR
;
854 cmd
->common
.command_id
= req
->tag
;
856 nvme_set_info(cmd_rq
, &cmdinfo
, sync_completion
);
858 set_current_state(TASK_KILLABLE
);
859 ret
= nvme_submit_cmd(nvmeq
, cmd
);
861 nvme_finish_cmd(nvmeq
, req
->tag
, NULL
);
862 set_current_state(TASK_RUNNING
);
864 ret
= schedule_timeout(timeout
);
867 * Ensure that sync_completion has either run, or that it will
870 nvme_abort_cmd_info(nvmeq
, blk_mq_rq_to_pdu(req
));
873 * We never got the completion
875 if (cmdinfo
.status
== -EINTR
)
879 *result
= cmdinfo
.result
;
881 return cmdinfo
.status
;
884 static int nvme_submit_async_admin_req(struct nvme_dev
*dev
)
886 struct nvme_queue
*nvmeq
= dev
->queues
[0];
887 struct nvme_command c
;
888 struct nvme_cmd_info
*cmd_info
;
891 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
, false);
895 cmd_info
= blk_mq_rq_to_pdu(req
);
896 nvme_set_info(cmd_info
, req
, async_req_completion
);
898 memset(&c
, 0, sizeof(c
));
899 c
.common
.opcode
= nvme_admin_async_event
;
900 c
.common
.command_id
= req
->tag
;
902 return __nvme_submit_cmd(nvmeq
, &c
);
905 static int nvme_submit_admin_async_cmd(struct nvme_dev
*dev
,
906 struct nvme_command
*cmd
,
907 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
909 struct nvme_queue
*nvmeq
= dev
->queues
[0];
911 struct nvme_cmd_info
*cmd_rq
;
913 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
917 req
->timeout
= timeout
;
918 cmd_rq
= blk_mq_rq_to_pdu(req
);
920 nvme_set_info(cmd_rq
, cmdinfo
, async_completion
);
921 cmdinfo
->status
= -EINTR
;
923 cmd
->common
.command_id
= req
->tag
;
925 return nvme_submit_cmd(nvmeq
, cmd
);
928 static int __nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
929 u32
*result
, unsigned timeout
)
934 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
937 res
= nvme_submit_sync_cmd(req
, cmd
, result
, timeout
);
938 blk_mq_free_request(req
);
942 int nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
945 return __nvme_submit_admin_cmd(dev
, cmd
, result
, ADMIN_TIMEOUT
);
948 int nvme_submit_io_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
949 struct nvme_command
*cmd
, u32
*result
)
954 req
= blk_mq_alloc_request(ns
->queue
, WRITE
, (GFP_KERNEL
|__GFP_WAIT
),
958 res
= nvme_submit_sync_cmd(req
, cmd
, result
, NVME_IO_TIMEOUT
);
959 blk_mq_free_request(req
);
963 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
965 struct nvme_command c
;
967 memset(&c
, 0, sizeof(c
));
968 c
.delete_queue
.opcode
= opcode
;
969 c
.delete_queue
.qid
= cpu_to_le16(id
);
971 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
974 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
975 struct nvme_queue
*nvmeq
)
977 struct nvme_command c
;
978 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
980 memset(&c
, 0, sizeof(c
));
981 c
.create_cq
.opcode
= nvme_admin_create_cq
;
982 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
983 c
.create_cq
.cqid
= cpu_to_le16(qid
);
984 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
985 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
986 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
988 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
991 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
992 struct nvme_queue
*nvmeq
)
994 struct nvme_command c
;
995 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
997 memset(&c
, 0, sizeof(c
));
998 c
.create_sq
.opcode
= nvme_admin_create_sq
;
999 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
1000 c
.create_sq
.sqid
= cpu_to_le16(qid
);
1001 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1002 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
1003 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1005 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1008 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1010 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1013 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1015 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1018 int nvme_identify(struct nvme_dev
*dev
, unsigned nsid
, unsigned cns
,
1019 dma_addr_t dma_addr
)
1021 struct nvme_command c
;
1023 memset(&c
, 0, sizeof(c
));
1024 c
.identify
.opcode
= nvme_admin_identify
;
1025 c
.identify
.nsid
= cpu_to_le32(nsid
);
1026 c
.identify
.prp1
= cpu_to_le64(dma_addr
);
1027 c
.identify
.cns
= cpu_to_le32(cns
);
1029 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1032 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1033 dma_addr_t dma_addr
, u32
*result
)
1035 struct nvme_command c
;
1037 memset(&c
, 0, sizeof(c
));
1038 c
.features
.opcode
= nvme_admin_get_features
;
1039 c
.features
.nsid
= cpu_to_le32(nsid
);
1040 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1041 c
.features
.fid
= cpu_to_le32(fid
);
1043 return nvme_submit_admin_cmd(dev
, &c
, result
);
1046 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1047 dma_addr_t dma_addr
, u32
*result
)
1049 struct nvme_command c
;
1051 memset(&c
, 0, sizeof(c
));
1052 c
.features
.opcode
= nvme_admin_set_features
;
1053 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1054 c
.features
.fid
= cpu_to_le32(fid
);
1055 c
.features
.dword11
= cpu_to_le32(dword11
);
1057 return nvme_submit_admin_cmd(dev
, &c
, result
);
1061 * nvme_abort_req - Attempt aborting a request
1063 * Schedule controller reset if the command was already aborted once before and
1064 * still hasn't been returned to the driver, or if this is the admin queue.
1066 static void nvme_abort_req(struct request
*req
)
1068 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
1069 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
1070 struct nvme_dev
*dev
= nvmeq
->dev
;
1071 struct request
*abort_req
;
1072 struct nvme_cmd_info
*abort_cmd
;
1073 struct nvme_command cmd
;
1075 if (!nvmeq
->qid
|| cmd_rq
->aborted
) {
1076 if (work_busy(&dev
->reset_work
))
1078 list_del_init(&dev
->node
);
1079 dev_warn(&dev
->pci_dev
->dev
,
1080 "I/O %d QID %d timeout, reset controller\n",
1081 req
->tag
, nvmeq
->qid
);
1082 dev
->reset_workfn
= nvme_reset_failed_dev
;
1083 queue_work(nvme_workq
, &dev
->reset_work
);
1087 if (!dev
->abort_limit
)
1090 abort_req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
,
1092 if (IS_ERR(abort_req
))
1095 abort_cmd
= blk_mq_rq_to_pdu(abort_req
);
1096 nvme_set_info(abort_cmd
, abort_req
, abort_completion
);
1098 memset(&cmd
, 0, sizeof(cmd
));
1099 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1100 cmd
.abort
.cid
= req
->tag
;
1101 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1102 cmd
.abort
.command_id
= abort_req
->tag
;
1105 cmd_rq
->aborted
= 1;
1107 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", req
->tag
,
1109 if (nvme_submit_cmd(dev
->queues
[0], &cmd
) < 0) {
1110 dev_warn(nvmeq
->q_dmadev
,
1111 "Could not abort I/O %d QID %d",
1112 req
->tag
, nvmeq
->qid
);
1113 blk_mq_free_request(abort_req
);
1117 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx
*hctx
,
1118 struct request
*req
, void *data
, bool reserved
)
1120 struct nvme_queue
*nvmeq
= data
;
1122 nvme_completion_fn fn
;
1123 struct nvme_cmd_info
*cmd
;
1124 static struct nvme_completion cqe
= {
1125 .status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1),
1128 cmd
= blk_mq_rq_to_pdu(req
);
1130 if (cmd
->ctx
== CMD_CTX_CANCELLED
)
1133 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n",
1134 req
->tag
, nvmeq
->qid
);
1135 ctx
= cancel_cmd_info(cmd
, &fn
);
1136 fn(nvmeq
, ctx
, &cqe
);
1139 static enum blk_eh_timer_return
nvme_timeout(struct request
*req
, bool reserved
)
1141 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
1142 struct nvme_queue
*nvmeq
= cmd
->nvmeq
;
1144 dev_warn(nvmeq
->q_dmadev
, "Timeout I/O %d QID %d\n", req
->tag
,
1146 if (nvmeq
->dev
->initialized
)
1147 nvme_abort_req(req
);
1150 * The aborted req will be completed on receiving the abort req.
1151 * We enable the timer again. If hit twice, it'll cause a device reset,
1152 * as the device then is in a faulty state.
1154 return BLK_EH_RESET_TIMER
;
1157 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1159 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1160 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1161 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1162 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1166 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1170 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1171 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1173 dev
->queues
[i
] = NULL
;
1174 nvme_free_queue(nvmeq
);
1179 * nvme_suspend_queue - put queue into suspended state
1180 * @nvmeq - queue to suspend
1182 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1186 spin_lock_irq(&nvmeq
->q_lock
);
1187 if (nvmeq
->cq_vector
== -1) {
1188 spin_unlock_irq(&nvmeq
->q_lock
);
1191 vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1192 nvmeq
->dev
->online_queues
--;
1193 nvmeq
->cq_vector
= -1;
1194 spin_unlock_irq(&nvmeq
->q_lock
);
1196 irq_set_affinity_hint(vector
, NULL
);
1197 free_irq(vector
, nvmeq
);
1202 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1204 struct blk_mq_hw_ctx
*hctx
= nvmeq
->hctx
;
1206 spin_lock_irq(&nvmeq
->q_lock
);
1207 nvme_process_cq(nvmeq
);
1208 if (hctx
&& hctx
->tags
)
1209 blk_mq_tag_busy_iter(hctx
, nvme_cancel_queue_ios
, nvmeq
);
1210 spin_unlock_irq(&nvmeq
->q_lock
);
1213 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1215 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1219 if (nvme_suspend_queue(nvmeq
))
1222 /* Don't tell the adapter to delete the admin queue.
1223 * Don't tell a removed adapter to delete IO queues. */
1224 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1225 adapter_delete_sq(dev
, qid
);
1226 adapter_delete_cq(dev
, qid
);
1228 nvme_clear_queue(nvmeq
);
1231 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1234 struct device
*dmadev
= &dev
->pci_dev
->dev
;
1235 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
), GFP_KERNEL
);
1239 nvmeq
->cqes
= dma_zalloc_coherent(dmadev
, CQ_SIZE(depth
),
1240 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1244 nvmeq
->sq_cmds
= dma_alloc_coherent(dmadev
, SQ_SIZE(depth
),
1245 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1246 if (!nvmeq
->sq_cmds
)
1249 nvmeq
->q_dmadev
= dmadev
;
1251 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1252 dev
->instance
, qid
);
1253 spin_lock_init(&nvmeq
->q_lock
);
1255 nvmeq
->cq_phase
= 1;
1256 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1257 nvmeq
->q_depth
= depth
;
1260 dev
->queues
[qid
] = nvmeq
;
1265 dma_free_coherent(dmadev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1266 nvmeq
->cq_dma_addr
);
1272 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1275 if (use_threaded_interrupts
)
1276 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1277 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1279 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1280 IRQF_SHARED
, name
, nvmeq
);
1283 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1285 struct nvme_dev
*dev
= nvmeq
->dev
;
1287 spin_lock_irq(&nvmeq
->q_lock
);
1290 nvmeq
->cq_phase
= 1;
1291 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1292 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1293 dev
->online_queues
++;
1294 spin_unlock_irq(&nvmeq
->q_lock
);
1297 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1299 struct nvme_dev
*dev
= nvmeq
->dev
;
1302 nvmeq
->cq_vector
= qid
- 1;
1303 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1307 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1311 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1315 nvme_init_queue(nvmeq
, qid
);
1319 adapter_delete_sq(dev
, qid
);
1321 adapter_delete_cq(dev
, qid
);
1325 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1327 unsigned long timeout
;
1328 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1330 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1332 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1334 if (fatal_signal_pending(current
))
1336 if (time_after(jiffies
, timeout
)) {
1337 dev_err(&dev
->pci_dev
->dev
,
1338 "Device not ready; aborting %s\n", enabled
?
1339 "initialisation" : "reset");
1348 * If the device has been passed off to us in an enabled state, just clear
1349 * the enabled bit. The spec says we should set the 'shutdown notification
1350 * bits', but doing so may cause the device to complete commands to the
1351 * admin queue ... and we don't know what memory that might be pointing at!
1353 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1355 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1356 dev
->ctrl_config
&= ~NVME_CC_ENABLE
;
1357 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1359 return nvme_wait_ready(dev
, cap
, false);
1362 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1364 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1365 dev
->ctrl_config
|= NVME_CC_ENABLE
;
1366 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1368 return nvme_wait_ready(dev
, cap
, true);
1371 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1373 unsigned long timeout
;
1375 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1376 dev
->ctrl_config
|= NVME_CC_SHN_NORMAL
;
1378 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1380 timeout
= SHUTDOWN_TIMEOUT
+ jiffies
;
1381 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1382 NVME_CSTS_SHST_CMPLT
) {
1384 if (fatal_signal_pending(current
))
1386 if (time_after(jiffies
, timeout
)) {
1387 dev_err(&dev
->pci_dev
->dev
,
1388 "Device shutdown incomplete; abort shutdown\n");
1396 static struct blk_mq_ops nvme_mq_admin_ops
= {
1397 .queue_rq
= nvme_admin_queue_rq
,
1398 .map_queue
= blk_mq_map_queue
,
1399 .init_hctx
= nvme_admin_init_hctx
,
1400 .exit_hctx
= nvme_exit_hctx
,
1401 .init_request
= nvme_admin_init_request
,
1402 .timeout
= nvme_timeout
,
1405 static struct blk_mq_ops nvme_mq_ops
= {
1406 .queue_rq
= nvme_queue_rq
,
1407 .map_queue
= blk_mq_map_queue
,
1408 .init_hctx
= nvme_init_hctx
,
1409 .exit_hctx
= nvme_exit_hctx
,
1410 .init_request
= nvme_init_request
,
1411 .timeout
= nvme_timeout
,
1414 static int nvme_alloc_admin_tags(struct nvme_dev
*dev
)
1416 if (!dev
->admin_q
) {
1417 dev
->admin_tagset
.ops
= &nvme_mq_admin_ops
;
1418 dev
->admin_tagset
.nr_hw_queues
= 1;
1419 dev
->admin_tagset
.queue_depth
= NVME_AQ_DEPTH
- 1;
1420 dev
->admin_tagset
.timeout
= ADMIN_TIMEOUT
;
1421 dev
->admin_tagset
.numa_node
= dev_to_node(&dev
->pci_dev
->dev
);
1422 dev
->admin_tagset
.cmd_size
= nvme_cmd_size(dev
);
1423 dev
->admin_tagset
.driver_data
= dev
;
1425 if (blk_mq_alloc_tag_set(&dev
->admin_tagset
))
1428 dev
->admin_q
= blk_mq_init_queue(&dev
->admin_tagset
);
1429 if (IS_ERR(dev
->admin_q
)) {
1430 blk_mq_free_tag_set(&dev
->admin_tagset
);
1438 static void nvme_free_admin_tags(struct nvme_dev
*dev
)
1441 blk_mq_free_tag_set(&dev
->admin_tagset
);
1444 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1448 u64 cap
= readq(&dev
->bar
->cap
);
1449 struct nvme_queue
*nvmeq
;
1450 unsigned page_shift
= PAGE_SHIFT
;
1451 unsigned dev_page_min
= NVME_CAP_MPSMIN(cap
) + 12;
1452 unsigned dev_page_max
= NVME_CAP_MPSMAX(cap
) + 12;
1454 if (page_shift
< dev_page_min
) {
1455 dev_err(&dev
->pci_dev
->dev
,
1456 "Minimum device page size (%u) too large for "
1457 "host (%u)\n", 1 << dev_page_min
,
1461 if (page_shift
> dev_page_max
) {
1462 dev_info(&dev
->pci_dev
->dev
,
1463 "Device maximum page size (%u) smaller than "
1464 "host (%u); enabling work-around\n",
1465 1 << dev_page_max
, 1 << page_shift
);
1466 page_shift
= dev_page_max
;
1469 result
= nvme_disable_ctrl(dev
, cap
);
1473 nvmeq
= dev
->queues
[0];
1475 nvmeq
= nvme_alloc_queue(dev
, 0, NVME_AQ_DEPTH
);
1480 aqa
= nvmeq
->q_depth
- 1;
1483 dev
->page_size
= 1 << page_shift
;
1485 dev
->ctrl_config
= NVME_CC_CSS_NVM
;
1486 dev
->ctrl_config
|= (page_shift
- 12) << NVME_CC_MPS_SHIFT
;
1487 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1488 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1490 writel(aqa
, &dev
->bar
->aqa
);
1491 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1492 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1494 result
= nvme_enable_ctrl(dev
, cap
);
1498 result
= nvme_alloc_admin_tags(dev
);
1502 nvmeq
->cq_vector
= 0;
1503 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1510 nvme_free_admin_tags(dev
);
1512 nvme_free_queues(dev
, 0);
1516 struct nvme_iod
*nvme_map_user_pages(struct nvme_dev
*dev
, int write
,
1517 unsigned long addr
, unsigned length
)
1519 int i
, err
, count
, nents
, offset
;
1520 struct scatterlist
*sg
;
1521 struct page
**pages
;
1522 struct nvme_iod
*iod
;
1525 return ERR_PTR(-EINVAL
);
1526 if (!length
|| length
> INT_MAX
- PAGE_SIZE
)
1527 return ERR_PTR(-EINVAL
);
1529 offset
= offset_in_page(addr
);
1530 count
= DIV_ROUND_UP(offset
+ length
, PAGE_SIZE
);
1531 pages
= kcalloc(count
, sizeof(*pages
), GFP_KERNEL
);
1533 return ERR_PTR(-ENOMEM
);
1535 err
= get_user_pages_fast(addr
, count
, 1, pages
);
1543 iod
= __nvme_alloc_iod(count
, length
, dev
, 0, GFP_KERNEL
);
1548 sg_init_table(sg
, count
);
1549 for (i
= 0; i
< count
; i
++) {
1550 sg_set_page(&sg
[i
], pages
[i
],
1551 min_t(unsigned, length
, PAGE_SIZE
- offset
),
1553 length
-= (PAGE_SIZE
- offset
);
1556 sg_mark_end(&sg
[i
- 1]);
1559 nents
= dma_map_sg(&dev
->pci_dev
->dev
, sg
, count
,
1560 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1570 for (i
= 0; i
< count
; i
++)
1573 return ERR_PTR(err
);
1576 void nvme_unmap_user_pages(struct nvme_dev
*dev
, int write
,
1577 struct nvme_iod
*iod
)
1581 dma_unmap_sg(&dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
1582 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1584 for (i
= 0; i
< iod
->nents
; i
++)
1585 put_page(sg_page(&iod
->sg
[i
]));
1588 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1590 struct nvme_dev
*dev
= ns
->dev
;
1591 struct nvme_user_io io
;
1592 struct nvme_command c
;
1593 unsigned length
, meta_len
;
1595 struct nvme_iod
*iod
, *meta_iod
= NULL
;
1596 dma_addr_t meta_dma_addr
;
1597 void *meta
, *uninitialized_var(meta_mem
);
1599 if (copy_from_user(&io
, uio
, sizeof(io
)))
1601 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1602 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1604 if (meta_len
&& ((io
.metadata
& 3) || !io
.metadata
))
1607 switch (io
.opcode
) {
1608 case nvme_cmd_write
:
1610 case nvme_cmd_compare
:
1611 iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.addr
, length
);
1618 return PTR_ERR(iod
);
1620 memset(&c
, 0, sizeof(c
));
1621 c
.rw
.opcode
= io
.opcode
;
1622 c
.rw
.flags
= io
.flags
;
1623 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1624 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1625 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1626 c
.rw
.control
= cpu_to_le16(io
.control
);
1627 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1628 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1629 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1630 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1633 meta_iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.metadata
,
1635 if (IS_ERR(meta_iod
)) {
1636 status
= PTR_ERR(meta_iod
);
1641 meta_mem
= dma_alloc_coherent(&dev
->pci_dev
->dev
, meta_len
,
1642 &meta_dma_addr
, GFP_KERNEL
);
1648 if (io
.opcode
& 1) {
1649 int meta_offset
= 0;
1651 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1652 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1653 meta_iod
->sg
[i
].offset
;
1654 memcpy(meta_mem
+ meta_offset
, meta
,
1655 meta_iod
->sg
[i
].length
);
1656 kunmap_atomic(meta
);
1657 meta_offset
+= meta_iod
->sg
[i
].length
;
1661 c
.rw
.metadata
= cpu_to_le64(meta_dma_addr
);
1664 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1665 c
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1666 c
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
1668 if (length
!= (io
.nblocks
+ 1) << ns
->lba_shift
)
1671 status
= nvme_submit_io_cmd(dev
, ns
, &c
, NULL
);
1674 if (status
== NVME_SC_SUCCESS
&& !(io
.opcode
& 1)) {
1675 int meta_offset
= 0;
1677 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1678 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1679 meta_iod
->sg
[i
].offset
;
1680 memcpy(meta
, meta_mem
+ meta_offset
,
1681 meta_iod
->sg
[i
].length
);
1682 kunmap_atomic(meta
);
1683 meta_offset
+= meta_iod
->sg
[i
].length
;
1687 dma_free_coherent(&dev
->pci_dev
->dev
, meta_len
, meta_mem
,
1692 nvme_unmap_user_pages(dev
, io
.opcode
& 1, iod
);
1693 nvme_free_iod(dev
, iod
);
1696 nvme_unmap_user_pages(dev
, io
.opcode
& 1, meta_iod
);
1697 nvme_free_iod(dev
, meta_iod
);
1703 static int nvme_user_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
1704 struct nvme_passthru_cmd __user
*ucmd
)
1706 struct nvme_passthru_cmd cmd
;
1707 struct nvme_command c
;
1709 struct nvme_iod
*uninitialized_var(iod
);
1712 if (!capable(CAP_SYS_ADMIN
))
1714 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1717 memset(&c
, 0, sizeof(c
));
1718 c
.common
.opcode
= cmd
.opcode
;
1719 c
.common
.flags
= cmd
.flags
;
1720 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1721 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1722 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1723 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1724 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1725 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1726 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1727 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1728 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1730 length
= cmd
.data_len
;
1732 iod
= nvme_map_user_pages(dev
, cmd
.opcode
& 1, cmd
.addr
,
1735 return PTR_ERR(iod
);
1736 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1737 c
.common
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1738 c
.common
.prp2
= cpu_to_le64(iod
->first_dma
);
1741 timeout
= cmd
.timeout_ms
? msecs_to_jiffies(cmd
.timeout_ms
) :
1744 if (length
!= cmd
.data_len
)
1747 struct request
*req
;
1749 req
= blk_mq_alloc_request(ns
->queue
, WRITE
,
1750 (GFP_KERNEL
|__GFP_WAIT
), false);
1752 status
= PTR_ERR(req
);
1754 status
= nvme_submit_sync_cmd(req
, &c
, &cmd
.result
,
1756 blk_mq_free_request(req
);
1759 status
= __nvme_submit_admin_cmd(dev
, &c
, &cmd
.result
, timeout
);
1762 nvme_unmap_user_pages(dev
, cmd
.opcode
& 1, iod
);
1763 nvme_free_iod(dev
, iod
);
1766 if ((status
>= 0) && copy_to_user(&ucmd
->result
, &cmd
.result
,
1767 sizeof(cmd
.result
)))
1773 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1776 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1780 force_successful_syscall_return();
1782 case NVME_IOCTL_ADMIN_CMD
:
1783 return nvme_user_cmd(ns
->dev
, NULL
, (void __user
*)arg
);
1784 case NVME_IOCTL_IO_CMD
:
1785 return nvme_user_cmd(ns
->dev
, ns
, (void __user
*)arg
);
1786 case NVME_IOCTL_SUBMIT_IO
:
1787 return nvme_submit_io(ns
, (void __user
*)arg
);
1788 case SG_GET_VERSION_NUM
:
1789 return nvme_sg_get_version_num((void __user
*)arg
);
1791 return nvme_sg_io(ns
, (void __user
*)arg
);
1797 #ifdef CONFIG_COMPAT
1798 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1799 unsigned int cmd
, unsigned long arg
)
1803 return -ENOIOCTLCMD
;
1805 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1808 #define nvme_compat_ioctl NULL
1811 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1816 spin_lock(&dev_list_lock
);
1817 ns
= bdev
->bd_disk
->private_data
;
1820 else if (!kref_get_unless_zero(&ns
->dev
->kref
))
1822 spin_unlock(&dev_list_lock
);
1827 static void nvme_free_dev(struct kref
*kref
);
1829 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1831 struct nvme_ns
*ns
= disk
->private_data
;
1832 struct nvme_dev
*dev
= ns
->dev
;
1834 kref_put(&dev
->kref
, nvme_free_dev
);
1837 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1839 /* some standard values */
1840 geo
->heads
= 1 << 6;
1841 geo
->sectors
= 1 << 5;
1842 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1846 static int nvme_revalidate_disk(struct gendisk
*disk
)
1848 struct nvme_ns
*ns
= disk
->private_data
;
1849 struct nvme_dev
*dev
= ns
->dev
;
1850 struct nvme_id_ns
*id
;
1851 dma_addr_t dma_addr
;
1854 id
= dma_alloc_coherent(&dev
->pci_dev
->dev
, 4096, &dma_addr
,
1857 dev_warn(&dev
->pci_dev
->dev
, "%s: Memory alocation failure\n",
1862 if (nvme_identify(dev
, ns
->ns_id
, 0, dma_addr
))
1865 lbaf
= id
->flbas
& 0xf;
1866 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
1868 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
1869 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
1871 dma_free_coherent(&dev
->pci_dev
->dev
, 4096, id
, dma_addr
);
1875 static const struct block_device_operations nvme_fops
= {
1876 .owner
= THIS_MODULE
,
1877 .ioctl
= nvme_ioctl
,
1878 .compat_ioctl
= nvme_compat_ioctl
,
1880 .release
= nvme_release
,
1881 .getgeo
= nvme_getgeo
,
1882 .revalidate_disk
= nvme_revalidate_disk
,
1885 static int nvme_kthread(void *data
)
1887 struct nvme_dev
*dev
, *next
;
1889 while (!kthread_should_stop()) {
1890 set_current_state(TASK_INTERRUPTIBLE
);
1891 spin_lock(&dev_list_lock
);
1892 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
1894 if (readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
&&
1896 if (work_busy(&dev
->reset_work
))
1898 list_del_init(&dev
->node
);
1899 dev_warn(&dev
->pci_dev
->dev
,
1900 "Failed status: %x, reset controller\n",
1901 readl(&dev
->bar
->csts
));
1902 dev
->reset_workfn
= nvme_reset_failed_dev
;
1903 queue_work(nvme_workq
, &dev
->reset_work
);
1906 for (i
= 0; i
< dev
->queue_count
; i
++) {
1907 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1910 spin_lock_irq(&nvmeq
->q_lock
);
1911 nvme_process_cq(nvmeq
);
1913 while ((i
== 0) && (dev
->event_limit
> 0)) {
1914 if (nvme_submit_async_admin_req(dev
))
1918 spin_unlock_irq(&nvmeq
->q_lock
);
1921 spin_unlock(&dev_list_lock
);
1922 schedule_timeout(round_jiffies_relative(HZ
));
1927 static void nvme_config_discard(struct nvme_ns
*ns
)
1929 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1930 ns
->queue
->limits
.discard_zeroes_data
= 0;
1931 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1932 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1933 ns
->queue
->limits
.max_discard_sectors
= 0xffffffff;
1934 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
1937 static struct nvme_ns
*nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
,
1938 struct nvme_id_ns
*id
, struct nvme_lba_range_type
*rt
)
1941 struct gendisk
*disk
;
1942 int node
= dev_to_node(&dev
->pci_dev
->dev
);
1945 if (rt
->attributes
& NVME_LBART_ATTRIB_HIDE
)
1948 ns
= kzalloc_node(sizeof(*ns
), GFP_KERNEL
, node
);
1951 ns
->queue
= blk_mq_init_queue(&dev
->tagset
);
1952 if (IS_ERR(ns
->queue
))
1954 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
1955 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
1956 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS
, ns
->queue
);
1958 ns
->queue
->queuedata
= ns
;
1960 disk
= alloc_disk_node(0, node
);
1962 goto out_free_queue
;
1966 lbaf
= id
->flbas
& 0xf;
1967 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
1968 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
1969 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
1970 if (dev
->max_hw_sectors
)
1971 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
1972 if (dev
->stripe_size
)
1973 blk_queue_chunk_sectors(ns
->queue
, dev
->stripe_size
>> 9);
1974 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
1975 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
1977 disk
->major
= nvme_major
;
1978 disk
->first_minor
= 0;
1979 disk
->fops
= &nvme_fops
;
1980 disk
->private_data
= ns
;
1981 disk
->queue
= ns
->queue
;
1982 disk
->driverfs_dev
= &dev
->pci_dev
->dev
;
1983 disk
->flags
= GENHD_FL_EXT_DEVT
;
1984 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
1985 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
1987 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
1988 nvme_config_discard(ns
);
1993 blk_cleanup_queue(ns
->queue
);
1999 static void nvme_create_io_queues(struct nvme_dev
*dev
)
2003 for (i
= dev
->queue_count
; i
<= dev
->max_qid
; i
++)
2004 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
))
2007 for (i
= dev
->online_queues
; i
<= dev
->queue_count
- 1; i
++)
2008 if (nvme_create_queue(dev
->queues
[i
], i
))
2012 static int set_queue_count(struct nvme_dev
*dev
, int count
)
2016 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
2018 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
2023 dev_err(&dev
->pci_dev
->dev
, "Could not set queue count (%d)\n",
2027 return min(result
& 0xffff, result
>> 16) + 1;
2030 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
2032 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
2035 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
2037 struct nvme_queue
*adminq
= dev
->queues
[0];
2038 struct pci_dev
*pdev
= dev
->pci_dev
;
2039 int result
, i
, vecs
, nr_io_queues
, size
;
2041 nr_io_queues
= num_possible_cpus();
2042 result
= set_queue_count(dev
, nr_io_queues
);
2045 if (result
< nr_io_queues
)
2046 nr_io_queues
= result
;
2048 size
= db_bar_size(dev
, nr_io_queues
);
2052 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
2055 if (!--nr_io_queues
)
2057 size
= db_bar_size(dev
, nr_io_queues
);
2059 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2060 adminq
->q_db
= dev
->dbs
;
2063 /* Deregister the admin queue's interrupt */
2064 free_irq(dev
->entry
[0].vector
, adminq
);
2067 * If we enable msix early due to not intx, disable it again before
2068 * setting up the full range we need.
2071 pci_disable_msix(pdev
);
2073 for (i
= 0; i
< nr_io_queues
; i
++)
2074 dev
->entry
[i
].entry
= i
;
2075 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2077 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2081 for (i
= 0; i
< vecs
; i
++)
2082 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2087 * Should investigate if there's a performance win from allocating
2088 * more queues than interrupt vectors; it might allow the submission
2089 * path to scale better, even if the receive path is limited by the
2090 * number of interrupts.
2092 nr_io_queues
= vecs
;
2093 dev
->max_qid
= nr_io_queues
;
2095 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2099 /* Free previously allocated queues that are no longer usable */
2100 nvme_free_queues(dev
, nr_io_queues
+ 1);
2101 nvme_create_io_queues(dev
);
2106 nvme_free_queues(dev
, 1);
2111 * Return: error value if an error occurred setting up the queues or calling
2112 * Identify Device. 0 if these succeeded, even if adding some of the
2113 * namespaces failed. At the moment, these failures are silent. TBD which
2114 * failures should be reported.
2116 static int nvme_dev_add(struct nvme_dev
*dev
)
2118 struct pci_dev
*pdev
= dev
->pci_dev
;
2122 struct nvme_id_ctrl
*ctrl
;
2123 struct nvme_id_ns
*id_ns
;
2125 dma_addr_t dma_addr
;
2126 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2128 mem
= dma_alloc_coherent(&pdev
->dev
, 8192, &dma_addr
, GFP_KERNEL
);
2132 res
= nvme_identify(dev
, 0, 1, dma_addr
);
2134 dev_err(&pdev
->dev
, "Identify Controller failed (%d)\n", res
);
2140 nn
= le32_to_cpup(&ctrl
->nn
);
2141 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2142 dev
->abort_limit
= ctrl
->acl
+ 1;
2143 dev
->vwc
= ctrl
->vwc
;
2144 dev
->event_limit
= min(ctrl
->aerl
+ 1, 8);
2145 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2146 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2147 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2149 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2150 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2151 (pdev
->device
== 0x0953) && ctrl
->vs
[3]) {
2152 unsigned int max_hw_sectors
;
2154 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2155 max_hw_sectors
= dev
->stripe_size
>> (shift
- 9);
2156 if (dev
->max_hw_sectors
) {
2157 dev
->max_hw_sectors
= min(max_hw_sectors
,
2158 dev
->max_hw_sectors
);
2160 dev
->max_hw_sectors
= max_hw_sectors
;
2163 dev
->tagset
.ops
= &nvme_mq_ops
;
2164 dev
->tagset
.nr_hw_queues
= dev
->online_queues
- 1;
2165 dev
->tagset
.timeout
= NVME_IO_TIMEOUT
;
2166 dev
->tagset
.numa_node
= dev_to_node(&dev
->pci_dev
->dev
);
2167 dev
->tagset
.queue_depth
=
2168 min_t(int, dev
->q_depth
, BLK_MQ_MAX_DEPTH
) - 1;
2169 dev
->tagset
.cmd_size
= nvme_cmd_size(dev
);
2170 dev
->tagset
.flags
= BLK_MQ_F_SHOULD_MERGE
;
2171 dev
->tagset
.driver_data
= dev
;
2173 if (blk_mq_alloc_tag_set(&dev
->tagset
))
2177 for (i
= 1; i
<= nn
; i
++) {
2178 res
= nvme_identify(dev
, i
, 0, dma_addr
);
2182 if (id_ns
->ncap
== 0)
2185 res
= nvme_get_features(dev
, NVME_FEAT_LBA_RANGE
, i
,
2186 dma_addr
+ 4096, NULL
);
2188 memset(mem
+ 4096, 0, 4096);
2190 ns
= nvme_alloc_ns(dev
, i
, mem
, mem
+ 4096);
2192 list_add_tail(&ns
->list
, &dev
->namespaces
);
2194 list_for_each_entry(ns
, &dev
->namespaces
, list
)
2199 dma_free_coherent(&dev
->pci_dev
->dev
, 8192, mem
, dma_addr
);
2203 static int nvme_dev_map(struct nvme_dev
*dev
)
2206 int bars
, result
= -ENOMEM
;
2207 struct pci_dev
*pdev
= dev
->pci_dev
;
2209 if (pci_enable_device_mem(pdev
))
2212 dev
->entry
[0].vector
= pdev
->irq
;
2213 pci_set_master(pdev
);
2214 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2218 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2221 if (dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64)) &&
2222 dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32)))
2225 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2229 if (readl(&dev
->bar
->csts
) == -1) {
2235 * Some devices don't advertse INTx interrupts, pre-enable a single
2236 * MSIX vec for setup. We'll adjust this later.
2239 result
= pci_enable_msix(pdev
, dev
->entry
, 1);
2244 cap
= readq(&dev
->bar
->cap
);
2245 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2246 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2247 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2255 pci_release_regions(pdev
);
2257 pci_disable_device(pdev
);
2261 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2263 if (dev
->pci_dev
->msi_enabled
)
2264 pci_disable_msi(dev
->pci_dev
);
2265 else if (dev
->pci_dev
->msix_enabled
)
2266 pci_disable_msix(dev
->pci_dev
);
2271 pci_release_regions(dev
->pci_dev
);
2274 if (pci_is_enabled(dev
->pci_dev
))
2275 pci_disable_device(dev
->pci_dev
);
2278 struct nvme_delq_ctx
{
2279 struct task_struct
*waiter
;
2280 struct kthread_worker
*worker
;
2284 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2286 dq
->waiter
= current
;
2290 set_current_state(TASK_KILLABLE
);
2291 if (!atomic_read(&dq
->refcount
))
2293 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2294 fatal_signal_pending(current
)) {
2295 set_current_state(TASK_RUNNING
);
2297 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2298 nvme_disable_queue(dev
, 0);
2300 send_sig(SIGKILL
, dq
->worker
->task
, 1);
2301 flush_kthread_worker(dq
->worker
);
2305 set_current_state(TASK_RUNNING
);
2308 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2310 atomic_dec(&dq
->refcount
);
2312 wake_up_process(dq
->waiter
);
2315 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2317 atomic_inc(&dq
->refcount
);
2321 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2323 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2325 nvme_clear_queue(nvmeq
);
2329 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2330 kthread_work_func_t fn
)
2332 struct nvme_command c
;
2334 memset(&c
, 0, sizeof(c
));
2335 c
.delete_queue
.opcode
= opcode
;
2336 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2338 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2339 return nvme_submit_admin_async_cmd(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
,
2343 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2345 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2347 nvme_del_queue_end(nvmeq
);
2350 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2352 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2353 nvme_del_cq_work_handler
);
2356 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2358 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2360 int status
= nvmeq
->cmdinfo
.status
;
2363 status
= nvme_delete_cq(nvmeq
);
2365 nvme_del_queue_end(nvmeq
);
2368 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2370 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2371 nvme_del_sq_work_handler
);
2374 static void nvme_del_queue_start(struct kthread_work
*work
)
2376 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2378 allow_signal(SIGKILL
);
2379 if (nvme_delete_sq(nvmeq
))
2380 nvme_del_queue_end(nvmeq
);
2383 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2386 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2387 struct nvme_delq_ctx dq
;
2388 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2389 &worker
, "nvme%d", dev
->instance
);
2391 if (IS_ERR(kworker_task
)) {
2392 dev_err(&dev
->pci_dev
->dev
,
2393 "Failed to create queue del task\n");
2394 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2395 nvme_disable_queue(dev
, i
);
2400 atomic_set(&dq
.refcount
, 0);
2401 dq
.worker
= &worker
;
2402 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2403 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2405 if (nvme_suspend_queue(nvmeq
))
2407 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2408 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2409 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2410 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2412 nvme_wait_dq(&dq
, dev
);
2413 kthread_stop(kworker_task
);
2417 * Remove the node from the device list and check
2418 * for whether or not we need to stop the nvme_thread.
2420 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2422 struct task_struct
*tmp
= NULL
;
2424 spin_lock(&dev_list_lock
);
2425 list_del_init(&dev
->node
);
2426 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2430 spin_unlock(&dev_list_lock
);
2436 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2441 dev
->initialized
= 0;
2442 nvme_dev_list_remove(dev
);
2445 csts
= readl(&dev
->bar
->csts
);
2446 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2447 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2448 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2449 nvme_suspend_queue(nvmeq
);
2450 nvme_clear_queue(nvmeq
);
2453 nvme_disable_io_queues(dev
);
2454 nvme_shutdown_ctrl(dev
);
2455 nvme_disable_queue(dev
, 0);
2457 nvme_dev_unmap(dev
);
2460 static void nvme_dev_remove_admin(struct nvme_dev
*dev
)
2462 if (dev
->admin_q
&& !blk_queue_dying(dev
->admin_q
))
2463 blk_cleanup_queue(dev
->admin_q
);
2466 static void nvme_dev_remove(struct nvme_dev
*dev
)
2470 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2471 if (ns
->disk
->flags
& GENHD_FL_UP
)
2472 del_gendisk(ns
->disk
);
2473 if (!blk_queue_dying(ns
->queue
))
2474 blk_cleanup_queue(ns
->queue
);
2478 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2480 struct device
*dmadev
= &dev
->pci_dev
->dev
;
2481 dev
->prp_page_pool
= dma_pool_create("prp list page", dmadev
,
2482 PAGE_SIZE
, PAGE_SIZE
, 0);
2483 if (!dev
->prp_page_pool
)
2486 /* Optimisation for I/Os between 4k and 128k */
2487 dev
->prp_small_pool
= dma_pool_create("prp list 256", dmadev
,
2489 if (!dev
->prp_small_pool
) {
2490 dma_pool_destroy(dev
->prp_page_pool
);
2496 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2498 dma_pool_destroy(dev
->prp_page_pool
);
2499 dma_pool_destroy(dev
->prp_small_pool
);
2502 static DEFINE_IDA(nvme_instance_ida
);
2504 static int nvme_set_instance(struct nvme_dev
*dev
)
2506 int instance
, error
;
2509 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2512 spin_lock(&dev_list_lock
);
2513 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2514 spin_unlock(&dev_list_lock
);
2515 } while (error
== -EAGAIN
);
2520 dev
->instance
= instance
;
2524 static void nvme_release_instance(struct nvme_dev
*dev
)
2526 spin_lock(&dev_list_lock
);
2527 ida_remove(&nvme_instance_ida
, dev
->instance
);
2528 spin_unlock(&dev_list_lock
);
2531 static void nvme_free_namespaces(struct nvme_dev
*dev
)
2533 struct nvme_ns
*ns
, *next
;
2535 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2536 list_del(&ns
->list
);
2538 spin_lock(&dev_list_lock
);
2539 ns
->disk
->private_data
= NULL
;
2540 spin_unlock(&dev_list_lock
);
2547 static void nvme_free_dev(struct kref
*kref
)
2549 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2551 pci_dev_put(dev
->pci_dev
);
2552 nvme_free_namespaces(dev
);
2553 nvme_release_instance(dev
);
2554 blk_mq_free_tag_set(&dev
->tagset
);
2560 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2562 struct nvme_dev
*dev
= container_of(f
->private_data
, struct nvme_dev
,
2564 kref_get(&dev
->kref
);
2565 f
->private_data
= dev
;
2569 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2571 struct nvme_dev
*dev
= f
->private_data
;
2572 kref_put(&dev
->kref
, nvme_free_dev
);
2576 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2578 struct nvme_dev
*dev
= f
->private_data
;
2582 case NVME_IOCTL_ADMIN_CMD
:
2583 return nvme_user_cmd(dev
, NULL
, (void __user
*)arg
);
2584 case NVME_IOCTL_IO_CMD
:
2585 if (list_empty(&dev
->namespaces
))
2587 ns
= list_first_entry(&dev
->namespaces
, struct nvme_ns
, list
);
2588 return nvme_user_cmd(dev
, ns
, (void __user
*)arg
);
2594 static const struct file_operations nvme_dev_fops
= {
2595 .owner
= THIS_MODULE
,
2596 .open
= nvme_dev_open
,
2597 .release
= nvme_dev_release
,
2598 .unlocked_ioctl
= nvme_dev_ioctl
,
2599 .compat_ioctl
= nvme_dev_ioctl
,
2602 static void nvme_set_irq_hints(struct nvme_dev
*dev
)
2604 struct nvme_queue
*nvmeq
;
2607 for (i
= 0; i
< dev
->online_queues
; i
++) {
2608 nvmeq
= dev
->queues
[i
];
2613 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2614 nvmeq
->hctx
->cpumask
);
2618 static int nvme_dev_start(struct nvme_dev
*dev
)
2621 bool start_thread
= false;
2623 result
= nvme_dev_map(dev
);
2627 result
= nvme_configure_admin_queue(dev
);
2631 spin_lock(&dev_list_lock
);
2632 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
2633 start_thread
= true;
2636 list_add(&dev
->node
, &dev_list
);
2637 spin_unlock(&dev_list_lock
);
2640 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2641 wake_up_all(&nvme_kthread_wait
);
2643 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2645 if (IS_ERR_OR_NULL(nvme_thread
)) {
2646 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2650 nvme_init_queue(dev
->queues
[0], 0);
2652 result
= nvme_setup_io_queues(dev
);
2656 nvme_set_irq_hints(dev
);
2661 nvme_disable_queue(dev
, 0);
2662 nvme_dev_list_remove(dev
);
2664 nvme_dev_unmap(dev
);
2668 static int nvme_remove_dead_ctrl(void *arg
)
2670 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
2671 struct pci_dev
*pdev
= dev
->pci_dev
;
2673 if (pci_get_drvdata(pdev
))
2674 pci_stop_and_remove_bus_device_locked(pdev
);
2675 kref_put(&dev
->kref
, nvme_free_dev
);
2679 static void nvme_remove_disks(struct work_struct
*ws
)
2681 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2683 nvme_free_queues(dev
, 1);
2684 nvme_dev_remove(dev
);
2687 static int nvme_dev_resume(struct nvme_dev
*dev
)
2691 ret
= nvme_dev_start(dev
);
2694 if (dev
->online_queues
< 2) {
2695 spin_lock(&dev_list_lock
);
2696 dev
->reset_workfn
= nvme_remove_disks
;
2697 queue_work(nvme_workq
, &dev
->reset_work
);
2698 spin_unlock(&dev_list_lock
);
2700 dev
->initialized
= 1;
2704 static void nvme_dev_reset(struct nvme_dev
*dev
)
2706 nvme_dev_shutdown(dev
);
2707 if (nvme_dev_resume(dev
)) {
2708 dev_warn(&dev
->pci_dev
->dev
, "Device failed to resume\n");
2709 kref_get(&dev
->kref
);
2710 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
2712 dev_err(&dev
->pci_dev
->dev
,
2713 "Failed to start controller remove task\n");
2714 kref_put(&dev
->kref
, nvme_free_dev
);
2719 static void nvme_reset_failed_dev(struct work_struct
*ws
)
2721 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2722 nvme_dev_reset(dev
);
2725 static void nvme_reset_workfn(struct work_struct
*work
)
2727 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, reset_work
);
2728 dev
->reset_workfn(work
);
2731 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2733 int node
, result
= -ENOMEM
;
2734 struct nvme_dev
*dev
;
2736 node
= dev_to_node(&pdev
->dev
);
2737 if (node
== NUMA_NO_NODE
)
2738 set_dev_node(&pdev
->dev
, 0);
2740 dev
= kzalloc_node(sizeof(*dev
), GFP_KERNEL
, node
);
2743 dev
->entry
= kzalloc_node(num_possible_cpus() * sizeof(*dev
->entry
),
2747 dev
->queues
= kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2752 INIT_LIST_HEAD(&dev
->namespaces
);
2753 dev
->reset_workfn
= nvme_reset_failed_dev
;
2754 INIT_WORK(&dev
->reset_work
, nvme_reset_workfn
);
2755 dev
->pci_dev
= pci_dev_get(pdev
);
2756 pci_set_drvdata(pdev
, dev
);
2757 result
= nvme_set_instance(dev
);
2761 result
= nvme_setup_prp_pools(dev
);
2765 kref_init(&dev
->kref
);
2766 result
= nvme_dev_start(dev
);
2770 if (dev
->online_queues
> 1)
2771 result
= nvme_dev_add(dev
);
2775 scnprintf(dev
->name
, sizeof(dev
->name
), "nvme%d", dev
->instance
);
2776 dev
->miscdev
.minor
= MISC_DYNAMIC_MINOR
;
2777 dev
->miscdev
.parent
= &pdev
->dev
;
2778 dev
->miscdev
.name
= dev
->name
;
2779 dev
->miscdev
.fops
= &nvme_dev_fops
;
2780 result
= misc_register(&dev
->miscdev
);
2784 nvme_set_irq_hints(dev
);
2786 dev
->initialized
= 1;
2790 nvme_dev_remove(dev
);
2791 nvme_dev_remove_admin(dev
);
2792 nvme_free_namespaces(dev
);
2794 nvme_dev_shutdown(dev
);
2796 nvme_free_queues(dev
, 0);
2797 nvme_release_prp_pools(dev
);
2799 nvme_release_instance(dev
);
2801 pci_dev_put(dev
->pci_dev
);
2809 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
2811 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2814 nvme_dev_shutdown(dev
);
2816 nvme_dev_resume(dev
);
2819 static void nvme_shutdown(struct pci_dev
*pdev
)
2821 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2822 nvme_dev_shutdown(dev
);
2825 static void nvme_remove(struct pci_dev
*pdev
)
2827 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2829 spin_lock(&dev_list_lock
);
2830 list_del_init(&dev
->node
);
2831 spin_unlock(&dev_list_lock
);
2833 pci_set_drvdata(pdev
, NULL
);
2834 flush_work(&dev
->reset_work
);
2835 misc_deregister(&dev
->miscdev
);
2836 nvme_dev_remove(dev
);
2837 nvme_dev_shutdown(dev
);
2838 nvme_dev_remove_admin(dev
);
2839 nvme_free_queues(dev
, 0);
2840 nvme_free_admin_tags(dev
);
2841 nvme_release_prp_pools(dev
);
2842 kref_put(&dev
->kref
, nvme_free_dev
);
2845 /* These functions are yet to be implemented */
2846 #define nvme_error_detected NULL
2847 #define nvme_dump_registers NULL
2848 #define nvme_link_reset NULL
2849 #define nvme_slot_reset NULL
2850 #define nvme_error_resume NULL
2852 #ifdef CONFIG_PM_SLEEP
2853 static int nvme_suspend(struct device
*dev
)
2855 struct pci_dev
*pdev
= to_pci_dev(dev
);
2856 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2858 nvme_dev_shutdown(ndev
);
2862 static int nvme_resume(struct device
*dev
)
2864 struct pci_dev
*pdev
= to_pci_dev(dev
);
2865 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2867 if (nvme_dev_resume(ndev
) && !work_busy(&ndev
->reset_work
)) {
2868 ndev
->reset_workfn
= nvme_reset_failed_dev
;
2869 queue_work(nvme_workq
, &ndev
->reset_work
);
2875 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
2877 static const struct pci_error_handlers nvme_err_handler
= {
2878 .error_detected
= nvme_error_detected
,
2879 .mmio_enabled
= nvme_dump_registers
,
2880 .link_reset
= nvme_link_reset
,
2881 .slot_reset
= nvme_slot_reset
,
2882 .resume
= nvme_error_resume
,
2883 .reset_notify
= nvme_reset_notify
,
2886 /* Move to pci_ids.h later */
2887 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
2889 static const struct pci_device_id nvme_id_table
[] = {
2890 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
2893 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
2895 static struct pci_driver nvme_driver
= {
2897 .id_table
= nvme_id_table
,
2898 .probe
= nvme_probe
,
2899 .remove
= nvme_remove
,
2900 .shutdown
= nvme_shutdown
,
2902 .pm
= &nvme_dev_pm_ops
,
2904 .err_handler
= &nvme_err_handler
,
2907 static int __init
nvme_init(void)
2911 init_waitqueue_head(&nvme_kthread_wait
);
2913 nvme_workq
= create_singlethread_workqueue("nvme");
2917 result
= register_blkdev(nvme_major
, "nvme");
2920 else if (result
> 0)
2921 nvme_major
= result
;
2923 result
= pci_register_driver(&nvme_driver
);
2925 goto unregister_blkdev
;
2929 unregister_blkdev(nvme_major
, "nvme");
2931 destroy_workqueue(nvme_workq
);
2935 static void __exit
nvme_exit(void)
2937 pci_unregister_driver(&nvme_driver
);
2938 unregister_hotcpu_notifier(&nvme_nb
);
2939 unregister_blkdev(nvme_major
, "nvme");
2940 destroy_workqueue(nvme_workq
);
2941 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
2945 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2946 MODULE_LICENSE("GPL");
2947 MODULE_VERSION("1.0");
2948 module_init(nvme_init
);
2949 module_exit(nvme_exit
);