Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / block / cciss.c
1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/major.h>
31 #include <linux/fs.h>
32 #include <linux/bio.h>
33 #include <linux/blkpg.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/init.h>
38 #include <linux/jiffies.h>
39 #include <linux/hdreg.h>
40 #include <linux/spinlock.h>
41 #include <linux/compat.h>
42 #include <linux/mutex.h>
43 #include <asm/uaccess.h>
44 #include <asm/io.h>
45
46 #include <linux/dma-mapping.h>
47 #include <linux/blkdev.h>
48 #include <linux/genhd.h>
49 #include <linux/completion.h>
50 #include <scsi/scsi.h>
51 #include <scsi/sg.h>
52 #include <scsi/scsi_ioctl.h>
53 #include <linux/cdrom.h>
54 #include <linux/scatterlist.h>
55 #include <linux/kthread.h>
56
57 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
58 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
60
61 /* Embedded module documentation macros - see modules.h */
62 MODULE_AUTHOR("Hewlett-Packard Company");
63 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
64 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65 MODULE_VERSION("3.6.26");
66 MODULE_LICENSE("GPL");
67
68 static DEFINE_MUTEX(cciss_mutex);
69 static struct proc_dir_entry *proc_cciss;
70
71 #include "cciss_cmd.h"
72 #include "cciss.h"
73 #include <linux/cciss_ioctl.h>
74
75 /* define the PCI info for the cards we can control */
76 static const struct pci_device_id cciss_pci_device_id[] = {
77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
97 {0,}
98 };
99
100 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
101
102 /* board_id = Subsystem Device ID & Vendor ID
103 * product = Marketing Name for the board
104 * access = Address of the struct of function pointers
105 */
106 static struct board_type products[] = {
107 {0x40700E11, "Smart Array 5300", &SA5_access},
108 {0x40800E11, "Smart Array 5i", &SA5B_access},
109 {0x40820E11, "Smart Array 532", &SA5B_access},
110 {0x40830E11, "Smart Array 5312", &SA5B_access},
111 {0x409A0E11, "Smart Array 641", &SA5_access},
112 {0x409B0E11, "Smart Array 642", &SA5_access},
113 {0x409C0E11, "Smart Array 6400", &SA5_access},
114 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
115 {0x40910E11, "Smart Array 6i", &SA5_access},
116 {0x3225103C, "Smart Array P600", &SA5_access},
117 {0x3223103C, "Smart Array P800", &SA5_access},
118 {0x3234103C, "Smart Array P400", &SA5_access},
119 {0x3235103C, "Smart Array P400i", &SA5_access},
120 {0x3211103C, "Smart Array E200i", &SA5_access},
121 {0x3212103C, "Smart Array E200", &SA5_access},
122 {0x3213103C, "Smart Array E200i", &SA5_access},
123 {0x3214103C, "Smart Array E200i", &SA5_access},
124 {0x3215103C, "Smart Array E200i", &SA5_access},
125 {0x3237103C, "Smart Array E500", &SA5_access},
126 {0x3223103C, "Smart Array P800", &SA5_access},
127 {0x3234103C, "Smart Array P400", &SA5_access},
128 {0x323D103C, "Smart Array P700m", &SA5_access},
129 };
130
131 /* How long to wait (in milliseconds) for board to go into simple mode */
132 #define MAX_CONFIG_WAIT 30000
133 #define MAX_IOCTL_CONFIG_WAIT 1000
134
135 /*define how many times we will try a command because of bus resets */
136 #define MAX_CMD_RETRIES 3
137
138 #define MAX_CTLR 32
139
140 /* Originally cciss driver only supports 8 major numbers */
141 #define MAX_CTLR_ORIG 8
142
143 static ctlr_info_t *hba[MAX_CTLR];
144
145 static struct task_struct *cciss_scan_thread;
146 static DEFINE_MUTEX(scan_mutex);
147 static LIST_HEAD(scan_q);
148
149 static void do_cciss_request(struct request_queue *q);
150 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
151 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
152 static int cciss_open(struct block_device *bdev, fmode_t mode);
153 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
154 static int cciss_release(struct gendisk *disk, fmode_t mode);
155 static int do_ioctl(struct block_device *bdev, fmode_t mode,
156 unsigned int cmd, unsigned long arg);
157 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
158 unsigned int cmd, unsigned long arg);
159 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
160
161 static int cciss_revalidate(struct gendisk *disk);
162 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
163 static int deregister_disk(ctlr_info_t *h, int drv_index,
164 int clear_all, int via_ioctl);
165
166 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
167 sector_t *total_size, unsigned int *block_size);
168 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
169 sector_t *total_size, unsigned int *block_size);
170 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
171 sector_t total_size,
172 unsigned int block_size, InquiryData_struct *inq_buff,
173 drive_info_struct *drv);
174 static void __devinit cciss_interrupt_mode(ctlr_info_t *);
175 static void start_io(ctlr_info_t *h);
176 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
177 __u8 page_code, unsigned char scsi3addr[],
178 int cmd_type);
179 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
180 int attempt_retry);
181 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
182
183 static int add_to_scan_list(struct ctlr_info *h);
184 static int scan_thread(void *data);
185 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
186 static void cciss_hba_release(struct device *dev);
187 static void cciss_device_release(struct device *dev);
188 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
189 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
190 static inline u32 next_command(ctlr_info_t *h);
191 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
192 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
193 u64 *cfg_offset);
194 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
195 unsigned long *memory_bar);
196
197
198 /* performant mode helper functions */
199 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
200 int *bucket_map);
201 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
202
203 #ifdef CONFIG_PROC_FS
204 static void cciss_procinit(ctlr_info_t *h);
205 #else
206 static void cciss_procinit(ctlr_info_t *h)
207 {
208 }
209 #endif /* CONFIG_PROC_FS */
210
211 #ifdef CONFIG_COMPAT
212 static int cciss_compat_ioctl(struct block_device *, fmode_t,
213 unsigned, unsigned long);
214 #endif
215
216 static const struct block_device_operations cciss_fops = {
217 .owner = THIS_MODULE,
218 .open = cciss_unlocked_open,
219 .release = cciss_release,
220 .ioctl = do_ioctl,
221 .getgeo = cciss_getgeo,
222 #ifdef CONFIG_COMPAT
223 .compat_ioctl = cciss_compat_ioctl,
224 #endif
225 .revalidate_disk = cciss_revalidate,
226 };
227
228 /* set_performant_mode: Modify the tag for cciss performant
229 * set bit 0 for pull model, bits 3-1 for block fetch
230 * register number
231 */
232 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
233 {
234 if (likely(h->transMethod == CFGTBL_Trans_Performant))
235 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
236 }
237
238 /*
239 * Enqueuing and dequeuing functions for cmdlists.
240 */
241 static inline void addQ(struct hlist_head *list, CommandList_struct *c)
242 {
243 hlist_add_head(&c->list, list);
244 }
245
246 static inline void removeQ(CommandList_struct *c)
247 {
248 /*
249 * After kexec/dump some commands might still
250 * be in flight, which the firmware will try
251 * to complete. Resetting the firmware doesn't work
252 * with old fw revisions, so we have to mark
253 * them off as 'stale' to prevent the driver from
254 * falling over.
255 */
256 if (WARN_ON(hlist_unhashed(&c->list))) {
257 c->cmd_type = CMD_MSG_STALE;
258 return;
259 }
260
261 hlist_del_init(&c->list);
262 }
263
264 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
265 CommandList_struct *c)
266 {
267 unsigned long flags;
268 set_performant_mode(h, c);
269 spin_lock_irqsave(&h->lock, flags);
270 addQ(&h->reqQ, c);
271 h->Qdepth++;
272 if (h->Qdepth > h->maxQsinceinit)
273 h->maxQsinceinit = h->Qdepth;
274 start_io(h);
275 spin_unlock_irqrestore(&h->lock, flags);
276 }
277
278 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
279 int nr_cmds)
280 {
281 int i;
282
283 if (!cmd_sg_list)
284 return;
285 for (i = 0; i < nr_cmds; i++) {
286 kfree(cmd_sg_list[i]);
287 cmd_sg_list[i] = NULL;
288 }
289 kfree(cmd_sg_list);
290 }
291
292 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
293 ctlr_info_t *h, int chainsize, int nr_cmds)
294 {
295 int j;
296 SGDescriptor_struct **cmd_sg_list;
297
298 if (chainsize <= 0)
299 return NULL;
300
301 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
302 if (!cmd_sg_list)
303 return NULL;
304
305 /* Build up chain blocks for each command */
306 for (j = 0; j < nr_cmds; j++) {
307 /* Need a block of chainsized s/g elements. */
308 cmd_sg_list[j] = kmalloc((chainsize *
309 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
310 if (!cmd_sg_list[j]) {
311 dev_err(&h->pdev->dev, "Cannot get memory "
312 "for s/g chains.\n");
313 goto clean;
314 }
315 }
316 return cmd_sg_list;
317 clean:
318 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
319 return NULL;
320 }
321
322 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
323 {
324 SGDescriptor_struct *chain_sg;
325 u64bit temp64;
326
327 if (c->Header.SGTotal <= h->max_cmd_sgentries)
328 return;
329
330 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
331 temp64.val32.lower = chain_sg->Addr.lower;
332 temp64.val32.upper = chain_sg->Addr.upper;
333 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
334 }
335
336 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
337 SGDescriptor_struct *chain_block, int len)
338 {
339 SGDescriptor_struct *chain_sg;
340 u64bit temp64;
341
342 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
343 chain_sg->Ext = CCISS_SG_CHAIN;
344 chain_sg->Len = len;
345 temp64.val = pci_map_single(h->pdev, chain_block, len,
346 PCI_DMA_TODEVICE);
347 chain_sg->Addr.lower = temp64.val32.lower;
348 chain_sg->Addr.upper = temp64.val32.upper;
349 }
350
351 #include "cciss_scsi.c" /* For SCSI tape support */
352
353 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
354 "UNKNOWN"
355 };
356 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
357
358 #ifdef CONFIG_PROC_FS
359
360 /*
361 * Report information about this controller.
362 */
363 #define ENG_GIG 1000000000
364 #define ENG_GIG_FACTOR (ENG_GIG/512)
365 #define ENGAGE_SCSI "engage scsi"
366
367 static void cciss_seq_show_header(struct seq_file *seq)
368 {
369 ctlr_info_t *h = seq->private;
370
371 seq_printf(seq, "%s: HP %s Controller\n"
372 "Board ID: 0x%08lx\n"
373 "Firmware Version: %c%c%c%c\n"
374 "IRQ: %d\n"
375 "Logical drives: %d\n"
376 "Current Q depth: %d\n"
377 "Current # commands on controller: %d\n"
378 "Max Q depth since init: %d\n"
379 "Max # commands on controller since init: %d\n"
380 "Max SG entries since init: %d\n",
381 h->devname,
382 h->product_name,
383 (unsigned long)h->board_id,
384 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
385 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
386 h->num_luns,
387 h->Qdepth, h->commands_outstanding,
388 h->maxQsinceinit, h->max_outstanding, h->maxSG);
389
390 #ifdef CONFIG_CISS_SCSI_TAPE
391 cciss_seq_tape_report(seq, h);
392 #endif /* CONFIG_CISS_SCSI_TAPE */
393 }
394
395 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
396 {
397 ctlr_info_t *h = seq->private;
398 unsigned long flags;
399
400 /* prevent displaying bogus info during configuration
401 * or deconfiguration of a logical volume
402 */
403 spin_lock_irqsave(&h->lock, flags);
404 if (h->busy_configuring) {
405 spin_unlock_irqrestore(&h->lock, flags);
406 return ERR_PTR(-EBUSY);
407 }
408 h->busy_configuring = 1;
409 spin_unlock_irqrestore(&h->lock, flags);
410
411 if (*pos == 0)
412 cciss_seq_show_header(seq);
413
414 return pos;
415 }
416
417 static int cciss_seq_show(struct seq_file *seq, void *v)
418 {
419 sector_t vol_sz, vol_sz_frac;
420 ctlr_info_t *h = seq->private;
421 unsigned ctlr = h->ctlr;
422 loff_t *pos = v;
423 drive_info_struct *drv = h->drv[*pos];
424
425 if (*pos > h->highest_lun)
426 return 0;
427
428 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
429 return 0;
430
431 if (drv->heads == 0)
432 return 0;
433
434 vol_sz = drv->nr_blocks;
435 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
436 vol_sz_frac *= 100;
437 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
438
439 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
440 drv->raid_level = RAID_UNKNOWN;
441 seq_printf(seq, "cciss/c%dd%d:"
442 "\t%4u.%02uGB\tRAID %s\n",
443 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
444 raid_label[drv->raid_level]);
445 return 0;
446 }
447
448 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
449 {
450 ctlr_info_t *h = seq->private;
451
452 if (*pos > h->highest_lun)
453 return NULL;
454 *pos += 1;
455
456 return pos;
457 }
458
459 static void cciss_seq_stop(struct seq_file *seq, void *v)
460 {
461 ctlr_info_t *h = seq->private;
462
463 /* Only reset h->busy_configuring if we succeeded in setting
464 * it during cciss_seq_start. */
465 if (v == ERR_PTR(-EBUSY))
466 return;
467
468 h->busy_configuring = 0;
469 }
470
471 static const struct seq_operations cciss_seq_ops = {
472 .start = cciss_seq_start,
473 .show = cciss_seq_show,
474 .next = cciss_seq_next,
475 .stop = cciss_seq_stop,
476 };
477
478 static int cciss_seq_open(struct inode *inode, struct file *file)
479 {
480 int ret = seq_open(file, &cciss_seq_ops);
481 struct seq_file *seq = file->private_data;
482
483 if (!ret)
484 seq->private = PDE(inode)->data;
485
486 return ret;
487 }
488
489 static ssize_t
490 cciss_proc_write(struct file *file, const char __user *buf,
491 size_t length, loff_t *ppos)
492 {
493 int err;
494 char *buffer;
495
496 #ifndef CONFIG_CISS_SCSI_TAPE
497 return -EINVAL;
498 #endif
499
500 if (!buf || length > PAGE_SIZE - 1)
501 return -EINVAL;
502
503 buffer = (char *)__get_free_page(GFP_KERNEL);
504 if (!buffer)
505 return -ENOMEM;
506
507 err = -EFAULT;
508 if (copy_from_user(buffer, buf, length))
509 goto out;
510 buffer[length] = '\0';
511
512 #ifdef CONFIG_CISS_SCSI_TAPE
513 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
514 struct seq_file *seq = file->private_data;
515 ctlr_info_t *h = seq->private;
516
517 err = cciss_engage_scsi(h);
518 if (err == 0)
519 err = length;
520 } else
521 #endif /* CONFIG_CISS_SCSI_TAPE */
522 err = -EINVAL;
523 /* might be nice to have "disengage" too, but it's not
524 safely possible. (only 1 module use count, lock issues.) */
525
526 out:
527 free_page((unsigned long)buffer);
528 return err;
529 }
530
531 static const struct file_operations cciss_proc_fops = {
532 .owner = THIS_MODULE,
533 .open = cciss_seq_open,
534 .read = seq_read,
535 .llseek = seq_lseek,
536 .release = seq_release,
537 .write = cciss_proc_write,
538 };
539
540 static void __devinit cciss_procinit(ctlr_info_t *h)
541 {
542 struct proc_dir_entry *pde;
543
544 if (proc_cciss == NULL)
545 proc_cciss = proc_mkdir("driver/cciss", NULL);
546 if (!proc_cciss)
547 return;
548 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
549 S_IROTH, proc_cciss,
550 &cciss_proc_fops, h);
551 }
552 #endif /* CONFIG_PROC_FS */
553
554 #define MAX_PRODUCT_NAME_LEN 19
555
556 #define to_hba(n) container_of(n, struct ctlr_info, dev)
557 #define to_drv(n) container_of(n, drive_info_struct, dev)
558
559 static ssize_t host_store_rescan(struct device *dev,
560 struct device_attribute *attr,
561 const char *buf, size_t count)
562 {
563 struct ctlr_info *h = to_hba(dev);
564
565 add_to_scan_list(h);
566 wake_up_process(cciss_scan_thread);
567 wait_for_completion_interruptible(&h->scan_wait);
568
569 return count;
570 }
571 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
572
573 static ssize_t dev_show_unique_id(struct device *dev,
574 struct device_attribute *attr,
575 char *buf)
576 {
577 drive_info_struct *drv = to_drv(dev);
578 struct ctlr_info *h = to_hba(drv->dev.parent);
579 __u8 sn[16];
580 unsigned long flags;
581 int ret = 0;
582
583 spin_lock_irqsave(&h->lock, flags);
584 if (h->busy_configuring)
585 ret = -EBUSY;
586 else
587 memcpy(sn, drv->serial_no, sizeof(sn));
588 spin_unlock_irqrestore(&h->lock, flags);
589
590 if (ret)
591 return ret;
592 else
593 return snprintf(buf, 16 * 2 + 2,
594 "%02X%02X%02X%02X%02X%02X%02X%02X"
595 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
596 sn[0], sn[1], sn[2], sn[3],
597 sn[4], sn[5], sn[6], sn[7],
598 sn[8], sn[9], sn[10], sn[11],
599 sn[12], sn[13], sn[14], sn[15]);
600 }
601 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
602
603 static ssize_t dev_show_vendor(struct device *dev,
604 struct device_attribute *attr,
605 char *buf)
606 {
607 drive_info_struct *drv = to_drv(dev);
608 struct ctlr_info *h = to_hba(drv->dev.parent);
609 char vendor[VENDOR_LEN + 1];
610 unsigned long flags;
611 int ret = 0;
612
613 spin_lock_irqsave(&h->lock, flags);
614 if (h->busy_configuring)
615 ret = -EBUSY;
616 else
617 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
618 spin_unlock_irqrestore(&h->lock, flags);
619
620 if (ret)
621 return ret;
622 else
623 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
624 }
625 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
626
627 static ssize_t dev_show_model(struct device *dev,
628 struct device_attribute *attr,
629 char *buf)
630 {
631 drive_info_struct *drv = to_drv(dev);
632 struct ctlr_info *h = to_hba(drv->dev.parent);
633 char model[MODEL_LEN + 1];
634 unsigned long flags;
635 int ret = 0;
636
637 spin_lock_irqsave(&h->lock, flags);
638 if (h->busy_configuring)
639 ret = -EBUSY;
640 else
641 memcpy(model, drv->model, MODEL_LEN + 1);
642 spin_unlock_irqrestore(&h->lock, flags);
643
644 if (ret)
645 return ret;
646 else
647 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
648 }
649 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
650
651 static ssize_t dev_show_rev(struct device *dev,
652 struct device_attribute *attr,
653 char *buf)
654 {
655 drive_info_struct *drv = to_drv(dev);
656 struct ctlr_info *h = to_hba(drv->dev.parent);
657 char rev[REV_LEN + 1];
658 unsigned long flags;
659 int ret = 0;
660
661 spin_lock_irqsave(&h->lock, flags);
662 if (h->busy_configuring)
663 ret = -EBUSY;
664 else
665 memcpy(rev, drv->rev, REV_LEN + 1);
666 spin_unlock_irqrestore(&h->lock, flags);
667
668 if (ret)
669 return ret;
670 else
671 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
672 }
673 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
674
675 static ssize_t cciss_show_lunid(struct device *dev,
676 struct device_attribute *attr, char *buf)
677 {
678 drive_info_struct *drv = to_drv(dev);
679 struct ctlr_info *h = to_hba(drv->dev.parent);
680 unsigned long flags;
681 unsigned char lunid[8];
682
683 spin_lock_irqsave(&h->lock, flags);
684 if (h->busy_configuring) {
685 spin_unlock_irqrestore(&h->lock, flags);
686 return -EBUSY;
687 }
688 if (!drv->heads) {
689 spin_unlock_irqrestore(&h->lock, flags);
690 return -ENOTTY;
691 }
692 memcpy(lunid, drv->LunID, sizeof(lunid));
693 spin_unlock_irqrestore(&h->lock, flags);
694 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
695 lunid[0], lunid[1], lunid[2], lunid[3],
696 lunid[4], lunid[5], lunid[6], lunid[7]);
697 }
698 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
699
700 static ssize_t cciss_show_raid_level(struct device *dev,
701 struct device_attribute *attr, char *buf)
702 {
703 drive_info_struct *drv = to_drv(dev);
704 struct ctlr_info *h = to_hba(drv->dev.parent);
705 int raid;
706 unsigned long flags;
707
708 spin_lock_irqsave(&h->lock, flags);
709 if (h->busy_configuring) {
710 spin_unlock_irqrestore(&h->lock, flags);
711 return -EBUSY;
712 }
713 raid = drv->raid_level;
714 spin_unlock_irqrestore(&h->lock, flags);
715 if (raid < 0 || raid > RAID_UNKNOWN)
716 raid = RAID_UNKNOWN;
717
718 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
719 raid_label[raid]);
720 }
721 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
722
723 static ssize_t cciss_show_usage_count(struct device *dev,
724 struct device_attribute *attr, char *buf)
725 {
726 drive_info_struct *drv = to_drv(dev);
727 struct ctlr_info *h = to_hba(drv->dev.parent);
728 unsigned long flags;
729 int count;
730
731 spin_lock_irqsave(&h->lock, flags);
732 if (h->busy_configuring) {
733 spin_unlock_irqrestore(&h->lock, flags);
734 return -EBUSY;
735 }
736 count = drv->usage_count;
737 spin_unlock_irqrestore(&h->lock, flags);
738 return snprintf(buf, 20, "%d\n", count);
739 }
740 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
741
742 static struct attribute *cciss_host_attrs[] = {
743 &dev_attr_rescan.attr,
744 NULL
745 };
746
747 static struct attribute_group cciss_host_attr_group = {
748 .attrs = cciss_host_attrs,
749 };
750
751 static const struct attribute_group *cciss_host_attr_groups[] = {
752 &cciss_host_attr_group,
753 NULL
754 };
755
756 static struct device_type cciss_host_type = {
757 .name = "cciss_host",
758 .groups = cciss_host_attr_groups,
759 .release = cciss_hba_release,
760 };
761
762 static struct attribute *cciss_dev_attrs[] = {
763 &dev_attr_unique_id.attr,
764 &dev_attr_model.attr,
765 &dev_attr_vendor.attr,
766 &dev_attr_rev.attr,
767 &dev_attr_lunid.attr,
768 &dev_attr_raid_level.attr,
769 &dev_attr_usage_count.attr,
770 NULL
771 };
772
773 static struct attribute_group cciss_dev_attr_group = {
774 .attrs = cciss_dev_attrs,
775 };
776
777 static const struct attribute_group *cciss_dev_attr_groups[] = {
778 &cciss_dev_attr_group,
779 NULL
780 };
781
782 static struct device_type cciss_dev_type = {
783 .name = "cciss_device",
784 .groups = cciss_dev_attr_groups,
785 .release = cciss_device_release,
786 };
787
788 static struct bus_type cciss_bus_type = {
789 .name = "cciss",
790 };
791
792 /*
793 * cciss_hba_release is called when the reference count
794 * of h->dev goes to zero.
795 */
796 static void cciss_hba_release(struct device *dev)
797 {
798 /*
799 * nothing to do, but need this to avoid a warning
800 * about not having a release handler from lib/kref.c.
801 */
802 }
803
804 /*
805 * Initialize sysfs entry for each controller. This sets up and registers
806 * the 'cciss#' directory for each individual controller under
807 * /sys/bus/pci/devices/<dev>/.
808 */
809 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
810 {
811 device_initialize(&h->dev);
812 h->dev.type = &cciss_host_type;
813 h->dev.bus = &cciss_bus_type;
814 dev_set_name(&h->dev, "%s", h->devname);
815 h->dev.parent = &h->pdev->dev;
816
817 return device_add(&h->dev);
818 }
819
820 /*
821 * Remove sysfs entries for an hba.
822 */
823 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
824 {
825 device_del(&h->dev);
826 put_device(&h->dev); /* final put. */
827 }
828
829 /* cciss_device_release is called when the reference count
830 * of h->drv[x]dev goes to zero.
831 */
832 static void cciss_device_release(struct device *dev)
833 {
834 drive_info_struct *drv = to_drv(dev);
835 kfree(drv);
836 }
837
838 /*
839 * Initialize sysfs for each logical drive. This sets up and registers
840 * the 'c#d#' directory for each individual logical drive under
841 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
842 * /sys/block/cciss!c#d# to this entry.
843 */
844 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
845 int drv_index)
846 {
847 struct device *dev;
848
849 if (h->drv[drv_index]->device_initialized)
850 return 0;
851
852 dev = &h->drv[drv_index]->dev;
853 device_initialize(dev);
854 dev->type = &cciss_dev_type;
855 dev->bus = &cciss_bus_type;
856 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
857 dev->parent = &h->dev;
858 h->drv[drv_index]->device_initialized = 1;
859 return device_add(dev);
860 }
861
862 /*
863 * Remove sysfs entries for a logical drive.
864 */
865 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
866 int ctlr_exiting)
867 {
868 struct device *dev = &h->drv[drv_index]->dev;
869
870 /* special case for c*d0, we only destroy it on controller exit */
871 if (drv_index == 0 && !ctlr_exiting)
872 return;
873
874 device_del(dev);
875 put_device(dev); /* the "final" put. */
876 h->drv[drv_index] = NULL;
877 }
878
879 /*
880 * For operations that cannot sleep, a command block is allocated at init,
881 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
882 * which ones are free or in use.
883 */
884 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
885 {
886 CommandList_struct *c;
887 int i;
888 u64bit temp64;
889 dma_addr_t cmd_dma_handle, err_dma_handle;
890
891 do {
892 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
893 if (i == h->nr_cmds)
894 return NULL;
895 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
896 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
897 c = h->cmd_pool + i;
898 memset(c, 0, sizeof(CommandList_struct));
899 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
900 c->err_info = h->errinfo_pool + i;
901 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
902 err_dma_handle = h->errinfo_pool_dhandle
903 + i * sizeof(ErrorInfo_struct);
904 h->nr_allocs++;
905
906 c->cmdindex = i;
907
908 INIT_HLIST_NODE(&c->list);
909 c->busaddr = (__u32) cmd_dma_handle;
910 temp64.val = (__u64) err_dma_handle;
911 c->ErrDesc.Addr.lower = temp64.val32.lower;
912 c->ErrDesc.Addr.upper = temp64.val32.upper;
913 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
914
915 c->ctlr = h->ctlr;
916 return c;
917 }
918
919 /* allocate a command using pci_alloc_consistent, used for ioctls,
920 * etc., not for the main i/o path.
921 */
922 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
923 {
924 CommandList_struct *c;
925 u64bit temp64;
926 dma_addr_t cmd_dma_handle, err_dma_handle;
927
928 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
929 sizeof(CommandList_struct), &cmd_dma_handle);
930 if (c == NULL)
931 return NULL;
932 memset(c, 0, sizeof(CommandList_struct));
933
934 c->cmdindex = -1;
935
936 c->err_info = (ErrorInfo_struct *)
937 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
938 &err_dma_handle);
939
940 if (c->err_info == NULL) {
941 pci_free_consistent(h->pdev,
942 sizeof(CommandList_struct), c, cmd_dma_handle);
943 return NULL;
944 }
945 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
946
947 INIT_HLIST_NODE(&c->list);
948 c->busaddr = (__u32) cmd_dma_handle;
949 temp64.val = (__u64) err_dma_handle;
950 c->ErrDesc.Addr.lower = temp64.val32.lower;
951 c->ErrDesc.Addr.upper = temp64.val32.upper;
952 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
953
954 c->ctlr = h->ctlr;
955 return c;
956 }
957
958 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
959 {
960 int i;
961
962 i = c - h->cmd_pool;
963 clear_bit(i & (BITS_PER_LONG - 1),
964 h->cmd_pool_bits + (i / BITS_PER_LONG));
965 h->nr_frees++;
966 }
967
968 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
969 {
970 u64bit temp64;
971
972 temp64.val32.lower = c->ErrDesc.Addr.lower;
973 temp64.val32.upper = c->ErrDesc.Addr.upper;
974 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
975 c->err_info, (dma_addr_t) temp64.val);
976 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
977 c, (dma_addr_t) c->busaddr);
978 }
979
980 static inline ctlr_info_t *get_host(struct gendisk *disk)
981 {
982 return disk->queue->queuedata;
983 }
984
985 static inline drive_info_struct *get_drv(struct gendisk *disk)
986 {
987 return disk->private_data;
988 }
989
990 /*
991 * Open. Make sure the device is really there.
992 */
993 static int cciss_open(struct block_device *bdev, fmode_t mode)
994 {
995 ctlr_info_t *h = get_host(bdev->bd_disk);
996 drive_info_struct *drv = get_drv(bdev->bd_disk);
997
998 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
999 if (drv->busy_configuring)
1000 return -EBUSY;
1001 /*
1002 * Root is allowed to open raw volume zero even if it's not configured
1003 * so array config can still work. Root is also allowed to open any
1004 * volume that has a LUN ID, so it can issue IOCTL to reread the
1005 * disk information. I don't think I really like this
1006 * but I'm already using way to many device nodes to claim another one
1007 * for "raw controller".
1008 */
1009 if (drv->heads == 0) {
1010 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1011 /* if not node 0 make sure it is a partition = 0 */
1012 if (MINOR(bdev->bd_dev) & 0x0f) {
1013 return -ENXIO;
1014 /* if it is, make sure we have a LUN ID */
1015 } else if (memcmp(drv->LunID, CTLR_LUNID,
1016 sizeof(drv->LunID))) {
1017 return -ENXIO;
1018 }
1019 }
1020 if (!capable(CAP_SYS_ADMIN))
1021 return -EPERM;
1022 }
1023 drv->usage_count++;
1024 h->usage_count++;
1025 return 0;
1026 }
1027
1028 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1029 {
1030 int ret;
1031
1032 mutex_lock(&cciss_mutex);
1033 ret = cciss_open(bdev, mode);
1034 mutex_unlock(&cciss_mutex);
1035
1036 return ret;
1037 }
1038
1039 /*
1040 * Close. Sync first.
1041 */
1042 static int cciss_release(struct gendisk *disk, fmode_t mode)
1043 {
1044 ctlr_info_t *h;
1045 drive_info_struct *drv;
1046
1047 mutex_lock(&cciss_mutex);
1048 h = get_host(disk);
1049 drv = get_drv(disk);
1050 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1051 drv->usage_count--;
1052 h->usage_count--;
1053 mutex_unlock(&cciss_mutex);
1054 return 0;
1055 }
1056
1057 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1058 unsigned cmd, unsigned long arg)
1059 {
1060 int ret;
1061 mutex_lock(&cciss_mutex);
1062 ret = cciss_ioctl(bdev, mode, cmd, arg);
1063 mutex_unlock(&cciss_mutex);
1064 return ret;
1065 }
1066
1067 #ifdef CONFIG_COMPAT
1068
1069 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1070 unsigned cmd, unsigned long arg);
1071 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1072 unsigned cmd, unsigned long arg);
1073
1074 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1075 unsigned cmd, unsigned long arg)
1076 {
1077 switch (cmd) {
1078 case CCISS_GETPCIINFO:
1079 case CCISS_GETINTINFO:
1080 case CCISS_SETINTINFO:
1081 case CCISS_GETNODENAME:
1082 case CCISS_SETNODENAME:
1083 case CCISS_GETHEARTBEAT:
1084 case CCISS_GETBUSTYPES:
1085 case CCISS_GETFIRMVER:
1086 case CCISS_GETDRIVVER:
1087 case CCISS_REVALIDVOLS:
1088 case CCISS_DEREGDISK:
1089 case CCISS_REGNEWDISK:
1090 case CCISS_REGNEWD:
1091 case CCISS_RESCANDISK:
1092 case CCISS_GETLUNINFO:
1093 return do_ioctl(bdev, mode, cmd, arg);
1094
1095 case CCISS_PASSTHRU32:
1096 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1097 case CCISS_BIG_PASSTHRU32:
1098 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1099
1100 default:
1101 return -ENOIOCTLCMD;
1102 }
1103 }
1104
1105 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1106 unsigned cmd, unsigned long arg)
1107 {
1108 IOCTL32_Command_struct __user *arg32 =
1109 (IOCTL32_Command_struct __user *) arg;
1110 IOCTL_Command_struct arg64;
1111 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1112 int err;
1113 u32 cp;
1114
1115 err = 0;
1116 err |=
1117 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1118 sizeof(arg64.LUN_info));
1119 err |=
1120 copy_from_user(&arg64.Request, &arg32->Request,
1121 sizeof(arg64.Request));
1122 err |=
1123 copy_from_user(&arg64.error_info, &arg32->error_info,
1124 sizeof(arg64.error_info));
1125 err |= get_user(arg64.buf_size, &arg32->buf_size);
1126 err |= get_user(cp, &arg32->buf);
1127 arg64.buf = compat_ptr(cp);
1128 err |= copy_to_user(p, &arg64, sizeof(arg64));
1129
1130 if (err)
1131 return -EFAULT;
1132
1133 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1134 if (err)
1135 return err;
1136 err |=
1137 copy_in_user(&arg32->error_info, &p->error_info,
1138 sizeof(arg32->error_info));
1139 if (err)
1140 return -EFAULT;
1141 return err;
1142 }
1143
1144 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1145 unsigned cmd, unsigned long arg)
1146 {
1147 BIG_IOCTL32_Command_struct __user *arg32 =
1148 (BIG_IOCTL32_Command_struct __user *) arg;
1149 BIG_IOCTL_Command_struct arg64;
1150 BIG_IOCTL_Command_struct __user *p =
1151 compat_alloc_user_space(sizeof(arg64));
1152 int err;
1153 u32 cp;
1154
1155 memset(&arg64, 0, sizeof(arg64));
1156 err = 0;
1157 err |=
1158 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1159 sizeof(arg64.LUN_info));
1160 err |=
1161 copy_from_user(&arg64.Request, &arg32->Request,
1162 sizeof(arg64.Request));
1163 err |=
1164 copy_from_user(&arg64.error_info, &arg32->error_info,
1165 sizeof(arg64.error_info));
1166 err |= get_user(arg64.buf_size, &arg32->buf_size);
1167 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1168 err |= get_user(cp, &arg32->buf);
1169 arg64.buf = compat_ptr(cp);
1170 err |= copy_to_user(p, &arg64, sizeof(arg64));
1171
1172 if (err)
1173 return -EFAULT;
1174
1175 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1176 if (err)
1177 return err;
1178 err |=
1179 copy_in_user(&arg32->error_info, &p->error_info,
1180 sizeof(arg32->error_info));
1181 if (err)
1182 return -EFAULT;
1183 return err;
1184 }
1185 #endif
1186
1187 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1188 {
1189 drive_info_struct *drv = get_drv(bdev->bd_disk);
1190
1191 if (!drv->cylinders)
1192 return -ENXIO;
1193
1194 geo->heads = drv->heads;
1195 geo->sectors = drv->sectors;
1196 geo->cylinders = drv->cylinders;
1197 return 0;
1198 }
1199
1200 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1201 {
1202 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1203 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1204 (void)check_for_unit_attention(h, c);
1205 }
1206
1207 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1208 {
1209 cciss_pci_info_struct pciinfo;
1210
1211 if (!argp)
1212 return -EINVAL;
1213 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1214 pciinfo.bus = h->pdev->bus->number;
1215 pciinfo.dev_fn = h->pdev->devfn;
1216 pciinfo.board_id = h->board_id;
1217 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1218 return -EFAULT;
1219 return 0;
1220 }
1221
1222 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1223 {
1224 cciss_coalint_struct intinfo;
1225
1226 if (!argp)
1227 return -EINVAL;
1228 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1229 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1230 if (copy_to_user
1231 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1232 return -EFAULT;
1233 return 0;
1234 }
1235
1236 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1237 {
1238 cciss_coalint_struct intinfo;
1239 unsigned long flags;
1240 int i;
1241
1242 if (!argp)
1243 return -EINVAL;
1244 if (!capable(CAP_SYS_ADMIN))
1245 return -EPERM;
1246 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1247 return -EFAULT;
1248 if ((intinfo.delay == 0) && (intinfo.count == 0))
1249 return -EINVAL;
1250 spin_lock_irqsave(&h->lock, flags);
1251 /* Update the field, and then ring the doorbell */
1252 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1253 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1254 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1255
1256 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1257 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1258 break;
1259 udelay(1000); /* delay and try again */
1260 }
1261 spin_unlock_irqrestore(&h->lock, flags);
1262 if (i >= MAX_IOCTL_CONFIG_WAIT)
1263 return -EAGAIN;
1264 return 0;
1265 }
1266
1267 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1268 {
1269 NodeName_type NodeName;
1270 int i;
1271
1272 if (!argp)
1273 return -EINVAL;
1274 for (i = 0; i < 16; i++)
1275 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1276 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1277 return -EFAULT;
1278 return 0;
1279 }
1280
1281 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1282 {
1283 NodeName_type NodeName;
1284 unsigned long flags;
1285 int i;
1286
1287 if (!argp)
1288 return -EINVAL;
1289 if (!capable(CAP_SYS_ADMIN))
1290 return -EPERM;
1291 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1292 return -EFAULT;
1293 spin_lock_irqsave(&h->lock, flags);
1294 /* Update the field, and then ring the doorbell */
1295 for (i = 0; i < 16; i++)
1296 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1297 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1298 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1299 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1300 break;
1301 udelay(1000); /* delay and try again */
1302 }
1303 spin_unlock_irqrestore(&h->lock, flags);
1304 if (i >= MAX_IOCTL_CONFIG_WAIT)
1305 return -EAGAIN;
1306 return 0;
1307 }
1308
1309 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1310 {
1311 Heartbeat_type heartbeat;
1312
1313 if (!argp)
1314 return -EINVAL;
1315 heartbeat = readl(&h->cfgtable->HeartBeat);
1316 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1317 return -EFAULT;
1318 return 0;
1319 }
1320
1321 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1322 {
1323 BusTypes_type BusTypes;
1324
1325 if (!argp)
1326 return -EINVAL;
1327 BusTypes = readl(&h->cfgtable->BusTypes);
1328 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1329 return -EFAULT;
1330 return 0;
1331 }
1332
1333 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1334 {
1335 FirmwareVer_type firmware;
1336
1337 if (!argp)
1338 return -EINVAL;
1339 memcpy(firmware, h->firm_ver, 4);
1340
1341 if (copy_to_user
1342 (argp, firmware, sizeof(FirmwareVer_type)))
1343 return -EFAULT;
1344 return 0;
1345 }
1346
1347 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1348 {
1349 DriverVer_type DriverVer = DRIVER_VERSION;
1350
1351 if (!argp)
1352 return -EINVAL;
1353 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1354 return -EFAULT;
1355 return 0;
1356 }
1357
1358 static int cciss_getluninfo(ctlr_info_t *h,
1359 struct gendisk *disk, void __user *argp)
1360 {
1361 LogvolInfo_struct luninfo;
1362 drive_info_struct *drv = get_drv(disk);
1363
1364 if (!argp)
1365 return -EINVAL;
1366 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1367 luninfo.num_opens = drv->usage_count;
1368 luninfo.num_parts = 0;
1369 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1370 return -EFAULT;
1371 return 0;
1372 }
1373
1374 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1375 {
1376 IOCTL_Command_struct iocommand;
1377 CommandList_struct *c;
1378 char *buff = NULL;
1379 u64bit temp64;
1380 DECLARE_COMPLETION_ONSTACK(wait);
1381
1382 if (!argp)
1383 return -EINVAL;
1384
1385 if (!capable(CAP_SYS_RAWIO))
1386 return -EPERM;
1387
1388 if (copy_from_user
1389 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1390 return -EFAULT;
1391 if ((iocommand.buf_size < 1) &&
1392 (iocommand.Request.Type.Direction != XFER_NONE)) {
1393 return -EINVAL;
1394 }
1395 if (iocommand.buf_size > 0) {
1396 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1397 if (buff == NULL)
1398 return -EFAULT;
1399 }
1400 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1401 /* Copy the data into the buffer we created */
1402 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1403 kfree(buff);
1404 return -EFAULT;
1405 }
1406 } else {
1407 memset(buff, 0, iocommand.buf_size);
1408 }
1409 c = cmd_special_alloc(h);
1410 if (!c) {
1411 kfree(buff);
1412 return -ENOMEM;
1413 }
1414 /* Fill in the command type */
1415 c->cmd_type = CMD_IOCTL_PEND;
1416 /* Fill in Command Header */
1417 c->Header.ReplyQueue = 0; /* unused in simple mode */
1418 if (iocommand.buf_size > 0) { /* buffer to fill */
1419 c->Header.SGList = 1;
1420 c->Header.SGTotal = 1;
1421 } else { /* no buffers to fill */
1422 c->Header.SGList = 0;
1423 c->Header.SGTotal = 0;
1424 }
1425 c->Header.LUN = iocommand.LUN_info;
1426 /* use the kernel address the cmd block for tag */
1427 c->Header.Tag.lower = c->busaddr;
1428
1429 /* Fill in Request block */
1430 c->Request = iocommand.Request;
1431
1432 /* Fill in the scatter gather information */
1433 if (iocommand.buf_size > 0) {
1434 temp64.val = pci_map_single(h->pdev, buff,
1435 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1436 c->SG[0].Addr.lower = temp64.val32.lower;
1437 c->SG[0].Addr.upper = temp64.val32.upper;
1438 c->SG[0].Len = iocommand.buf_size;
1439 c->SG[0].Ext = 0; /* we are not chaining */
1440 }
1441 c->waiting = &wait;
1442
1443 enqueue_cmd_and_start_io(h, c);
1444 wait_for_completion(&wait);
1445
1446 /* unlock the buffers from DMA */
1447 temp64.val32.lower = c->SG[0].Addr.lower;
1448 temp64.val32.upper = c->SG[0].Addr.upper;
1449 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1450 PCI_DMA_BIDIRECTIONAL);
1451 check_ioctl_unit_attention(h, c);
1452
1453 /* Copy the error information out */
1454 iocommand.error_info = *(c->err_info);
1455 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1456 kfree(buff);
1457 cmd_special_free(h, c);
1458 return -EFAULT;
1459 }
1460
1461 if (iocommand.Request.Type.Direction == XFER_READ) {
1462 /* Copy the data out of the buffer we created */
1463 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1464 kfree(buff);
1465 cmd_special_free(h, c);
1466 return -EFAULT;
1467 }
1468 }
1469 kfree(buff);
1470 cmd_special_free(h, c);
1471 return 0;
1472 }
1473
1474 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1475 {
1476 BIG_IOCTL_Command_struct *ioc;
1477 CommandList_struct *c;
1478 unsigned char **buff = NULL;
1479 int *buff_size = NULL;
1480 u64bit temp64;
1481 BYTE sg_used = 0;
1482 int status = 0;
1483 int i;
1484 DECLARE_COMPLETION_ONSTACK(wait);
1485 __u32 left;
1486 __u32 sz;
1487 BYTE __user *data_ptr;
1488
1489 if (!argp)
1490 return -EINVAL;
1491 if (!capable(CAP_SYS_RAWIO))
1492 return -EPERM;
1493 ioc = (BIG_IOCTL_Command_struct *)
1494 kmalloc(sizeof(*ioc), GFP_KERNEL);
1495 if (!ioc) {
1496 status = -ENOMEM;
1497 goto cleanup1;
1498 }
1499 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1500 status = -EFAULT;
1501 goto cleanup1;
1502 }
1503 if ((ioc->buf_size < 1) &&
1504 (ioc->Request.Type.Direction != XFER_NONE)) {
1505 status = -EINVAL;
1506 goto cleanup1;
1507 }
1508 /* Check kmalloc limits using all SGs */
1509 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1510 status = -EINVAL;
1511 goto cleanup1;
1512 }
1513 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1514 status = -EINVAL;
1515 goto cleanup1;
1516 }
1517 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1518 if (!buff) {
1519 status = -ENOMEM;
1520 goto cleanup1;
1521 }
1522 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1523 if (!buff_size) {
1524 status = -ENOMEM;
1525 goto cleanup1;
1526 }
1527 left = ioc->buf_size;
1528 data_ptr = ioc->buf;
1529 while (left) {
1530 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1531 buff_size[sg_used] = sz;
1532 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1533 if (buff[sg_used] == NULL) {
1534 status = -ENOMEM;
1535 goto cleanup1;
1536 }
1537 if (ioc->Request.Type.Direction == XFER_WRITE) {
1538 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1539 status = -EFAULT;
1540 goto cleanup1;
1541 }
1542 } else {
1543 memset(buff[sg_used], 0, sz);
1544 }
1545 left -= sz;
1546 data_ptr += sz;
1547 sg_used++;
1548 }
1549 c = cmd_special_alloc(h);
1550 if (!c) {
1551 status = -ENOMEM;
1552 goto cleanup1;
1553 }
1554 c->cmd_type = CMD_IOCTL_PEND;
1555 c->Header.ReplyQueue = 0;
1556 c->Header.SGList = sg_used;
1557 c->Header.SGTotal = sg_used;
1558 c->Header.LUN = ioc->LUN_info;
1559 c->Header.Tag.lower = c->busaddr;
1560
1561 c->Request = ioc->Request;
1562 for (i = 0; i < sg_used; i++) {
1563 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1564 PCI_DMA_BIDIRECTIONAL);
1565 c->SG[i].Addr.lower = temp64.val32.lower;
1566 c->SG[i].Addr.upper = temp64.val32.upper;
1567 c->SG[i].Len = buff_size[i];
1568 c->SG[i].Ext = 0; /* we are not chaining */
1569 }
1570 c->waiting = &wait;
1571 enqueue_cmd_and_start_io(h, c);
1572 wait_for_completion(&wait);
1573 /* unlock the buffers from DMA */
1574 for (i = 0; i < sg_used; i++) {
1575 temp64.val32.lower = c->SG[i].Addr.lower;
1576 temp64.val32.upper = c->SG[i].Addr.upper;
1577 pci_unmap_single(h->pdev,
1578 (dma_addr_t) temp64.val, buff_size[i],
1579 PCI_DMA_BIDIRECTIONAL);
1580 }
1581 check_ioctl_unit_attention(h, c);
1582 /* Copy the error information out */
1583 ioc->error_info = *(c->err_info);
1584 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1585 cmd_special_free(h, c);
1586 status = -EFAULT;
1587 goto cleanup1;
1588 }
1589 if (ioc->Request.Type.Direction == XFER_READ) {
1590 /* Copy the data out of the buffer we created */
1591 BYTE __user *ptr = ioc->buf;
1592 for (i = 0; i < sg_used; i++) {
1593 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1594 cmd_special_free(h, c);
1595 status = -EFAULT;
1596 goto cleanup1;
1597 }
1598 ptr += buff_size[i];
1599 }
1600 }
1601 cmd_special_free(h, c);
1602 status = 0;
1603 cleanup1:
1604 if (buff) {
1605 for (i = 0; i < sg_used; i++)
1606 kfree(buff[i]);
1607 kfree(buff);
1608 }
1609 kfree(buff_size);
1610 kfree(ioc);
1611 return status;
1612 }
1613
1614 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1615 unsigned int cmd, unsigned long arg)
1616 {
1617 struct gendisk *disk = bdev->bd_disk;
1618 ctlr_info_t *h = get_host(disk);
1619 void __user *argp = (void __user *)arg;
1620
1621 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1622 cmd, arg);
1623 switch (cmd) {
1624 case CCISS_GETPCIINFO:
1625 return cciss_getpciinfo(h, argp);
1626 case CCISS_GETINTINFO:
1627 return cciss_getintinfo(h, argp);
1628 case CCISS_SETINTINFO:
1629 return cciss_setintinfo(h, argp);
1630 case CCISS_GETNODENAME:
1631 return cciss_getnodename(h, argp);
1632 case CCISS_SETNODENAME:
1633 return cciss_setnodename(h, argp);
1634 case CCISS_GETHEARTBEAT:
1635 return cciss_getheartbeat(h, argp);
1636 case CCISS_GETBUSTYPES:
1637 return cciss_getbustypes(h, argp);
1638 case CCISS_GETFIRMVER:
1639 return cciss_getfirmver(h, argp);
1640 case CCISS_GETDRIVVER:
1641 return cciss_getdrivver(h, argp);
1642 case CCISS_DEREGDISK:
1643 case CCISS_REGNEWD:
1644 case CCISS_REVALIDVOLS:
1645 return rebuild_lun_table(h, 0, 1);
1646 case CCISS_GETLUNINFO:
1647 return cciss_getluninfo(h, disk, argp);
1648 case CCISS_PASSTHRU:
1649 return cciss_passthru(h, argp);
1650 case CCISS_BIG_PASSTHRU:
1651 return cciss_bigpassthru(h, argp);
1652
1653 /* scsi_cmd_ioctl handles these, below, though some are not */
1654 /* very meaningful for cciss. SG_IO is the main one people want. */
1655
1656 case SG_GET_VERSION_NUM:
1657 case SG_SET_TIMEOUT:
1658 case SG_GET_TIMEOUT:
1659 case SG_GET_RESERVED_SIZE:
1660 case SG_SET_RESERVED_SIZE:
1661 case SG_EMULATED_HOST:
1662 case SG_IO:
1663 case SCSI_IOCTL_SEND_COMMAND:
1664 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
1665
1666 /* scsi_cmd_ioctl would normally handle these, below, but */
1667 /* they aren't a good fit for cciss, as CD-ROMs are */
1668 /* not supported, and we don't have any bus/target/lun */
1669 /* which we present to the kernel. */
1670
1671 case CDROM_SEND_PACKET:
1672 case CDROMCLOSETRAY:
1673 case CDROMEJECT:
1674 case SCSI_IOCTL_GET_IDLUN:
1675 case SCSI_IOCTL_GET_BUS_NUMBER:
1676 default:
1677 return -ENOTTY;
1678 }
1679 }
1680
1681 static void cciss_check_queues(ctlr_info_t *h)
1682 {
1683 int start_queue = h->next_to_run;
1684 int i;
1685
1686 /* check to see if we have maxed out the number of commands that can
1687 * be placed on the queue. If so then exit. We do this check here
1688 * in case the interrupt we serviced was from an ioctl and did not
1689 * free any new commands.
1690 */
1691 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1692 return;
1693
1694 /* We have room on the queue for more commands. Now we need to queue
1695 * them up. We will also keep track of the next queue to run so
1696 * that every queue gets a chance to be started first.
1697 */
1698 for (i = 0; i < h->highest_lun + 1; i++) {
1699 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1700 /* make sure the disk has been added and the drive is real
1701 * because this can be called from the middle of init_one.
1702 */
1703 if (!h->drv[curr_queue])
1704 continue;
1705 if (!(h->drv[curr_queue]->queue) ||
1706 !(h->drv[curr_queue]->heads))
1707 continue;
1708 blk_start_queue(h->gendisk[curr_queue]->queue);
1709
1710 /* check to see if we have maxed out the number of commands
1711 * that can be placed on the queue.
1712 */
1713 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1714 if (curr_queue == start_queue) {
1715 h->next_to_run =
1716 (start_queue + 1) % (h->highest_lun + 1);
1717 break;
1718 } else {
1719 h->next_to_run = curr_queue;
1720 break;
1721 }
1722 }
1723 }
1724 }
1725
1726 static void cciss_softirq_done(struct request *rq)
1727 {
1728 CommandList_struct *c = rq->completion_data;
1729 ctlr_info_t *h = hba[c->ctlr];
1730 SGDescriptor_struct *curr_sg = c->SG;
1731 u64bit temp64;
1732 unsigned long flags;
1733 int i, ddir;
1734 int sg_index = 0;
1735
1736 if (c->Request.Type.Direction == XFER_READ)
1737 ddir = PCI_DMA_FROMDEVICE;
1738 else
1739 ddir = PCI_DMA_TODEVICE;
1740
1741 /* command did not need to be retried */
1742 /* unmap the DMA mapping for all the scatter gather elements */
1743 for (i = 0; i < c->Header.SGList; i++) {
1744 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1745 cciss_unmap_sg_chain_block(h, c);
1746 /* Point to the next block */
1747 curr_sg = h->cmd_sg_list[c->cmdindex];
1748 sg_index = 0;
1749 }
1750 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1751 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1752 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1753 ddir);
1754 ++sg_index;
1755 }
1756
1757 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1758
1759 /* set the residual count for pc requests */
1760 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1761 rq->resid_len = c->err_info->ResidualCnt;
1762
1763 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1764
1765 spin_lock_irqsave(&h->lock, flags);
1766 cmd_free(h, c);
1767 cciss_check_queues(h);
1768 spin_unlock_irqrestore(&h->lock, flags);
1769 }
1770
1771 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1772 unsigned char scsi3addr[], uint32_t log_unit)
1773 {
1774 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1775 sizeof(h->drv[log_unit]->LunID));
1776 }
1777
1778 /* This function gets the SCSI vendor, model, and revision of a logical drive
1779 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1780 * they cannot be read.
1781 */
1782 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1783 char *vendor, char *model, char *rev)
1784 {
1785 int rc;
1786 InquiryData_struct *inq_buf;
1787 unsigned char scsi3addr[8];
1788
1789 *vendor = '\0';
1790 *model = '\0';
1791 *rev = '\0';
1792
1793 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1794 if (!inq_buf)
1795 return;
1796
1797 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1798 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1799 scsi3addr, TYPE_CMD);
1800 if (rc == IO_OK) {
1801 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1802 vendor[VENDOR_LEN] = '\0';
1803 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1804 model[MODEL_LEN] = '\0';
1805 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1806 rev[REV_LEN] = '\0';
1807 }
1808
1809 kfree(inq_buf);
1810 return;
1811 }
1812
1813 /* This function gets the serial number of a logical drive via
1814 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1815 * number cannot be had, for whatever reason, 16 bytes of 0xff
1816 * are returned instead.
1817 */
1818 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1819 unsigned char *serial_no, int buflen)
1820 {
1821 #define PAGE_83_INQ_BYTES 64
1822 int rc;
1823 unsigned char *buf;
1824 unsigned char scsi3addr[8];
1825
1826 if (buflen > 16)
1827 buflen = 16;
1828 memset(serial_no, 0xff, buflen);
1829 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1830 if (!buf)
1831 return;
1832 memset(serial_no, 0, buflen);
1833 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1834 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1835 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1836 if (rc == IO_OK)
1837 memcpy(serial_no, &buf[8], buflen);
1838 kfree(buf);
1839 return;
1840 }
1841
1842 /*
1843 * cciss_add_disk sets up the block device queue for a logical drive
1844 */
1845 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1846 int drv_index)
1847 {
1848 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1849 if (!disk->queue)
1850 goto init_queue_failure;
1851 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1852 disk->major = h->major;
1853 disk->first_minor = drv_index << NWD_SHIFT;
1854 disk->fops = &cciss_fops;
1855 if (cciss_create_ld_sysfs_entry(h, drv_index))
1856 goto cleanup_queue;
1857 disk->private_data = h->drv[drv_index];
1858 disk->driverfs_dev = &h->drv[drv_index]->dev;
1859
1860 /* Set up queue information */
1861 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1862
1863 /* This is a hardware imposed limit. */
1864 blk_queue_max_segments(disk->queue, h->maxsgentries);
1865
1866 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1867
1868 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1869
1870 disk->queue->queuedata = h;
1871
1872 blk_queue_logical_block_size(disk->queue,
1873 h->drv[drv_index]->block_size);
1874
1875 /* Make sure all queue data is written out before */
1876 /* setting h->drv[drv_index]->queue, as setting this */
1877 /* allows the interrupt handler to start the queue */
1878 wmb();
1879 h->drv[drv_index]->queue = disk->queue;
1880 add_disk(disk);
1881 return 0;
1882
1883 cleanup_queue:
1884 blk_cleanup_queue(disk->queue);
1885 disk->queue = NULL;
1886 init_queue_failure:
1887 return -1;
1888 }
1889
1890 /* This function will check the usage_count of the drive to be updated/added.
1891 * If the usage_count is zero and it is a heretofore unknown drive, or,
1892 * the drive's capacity, geometry, or serial number has changed,
1893 * then the drive information will be updated and the disk will be
1894 * re-registered with the kernel. If these conditions don't hold,
1895 * then it will be left alone for the next reboot. The exception to this
1896 * is disk 0 which will always be left registered with the kernel since it
1897 * is also the controller node. Any changes to disk 0 will show up on
1898 * the next reboot.
1899 */
1900 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1901 int first_time, int via_ioctl)
1902 {
1903 struct gendisk *disk;
1904 InquiryData_struct *inq_buff = NULL;
1905 unsigned int block_size;
1906 sector_t total_size;
1907 unsigned long flags = 0;
1908 int ret = 0;
1909 drive_info_struct *drvinfo;
1910
1911 /* Get information about the disk and modify the driver structure */
1912 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1913 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1914 if (inq_buff == NULL || drvinfo == NULL)
1915 goto mem_msg;
1916
1917 /* testing to see if 16-byte CDBs are already being used */
1918 if (h->cciss_read == CCISS_READ_16) {
1919 cciss_read_capacity_16(h, drv_index,
1920 &total_size, &block_size);
1921
1922 } else {
1923 cciss_read_capacity(h, drv_index, &total_size, &block_size);
1924 /* if read_capacity returns all F's this volume is >2TB */
1925 /* in size so we switch to 16-byte CDB's for all */
1926 /* read/write ops */
1927 if (total_size == 0xFFFFFFFFULL) {
1928 cciss_read_capacity_16(h, drv_index,
1929 &total_size, &block_size);
1930 h->cciss_read = CCISS_READ_16;
1931 h->cciss_write = CCISS_WRITE_16;
1932 } else {
1933 h->cciss_read = CCISS_READ_10;
1934 h->cciss_write = CCISS_WRITE_10;
1935 }
1936 }
1937
1938 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
1939 inq_buff, drvinfo);
1940 drvinfo->block_size = block_size;
1941 drvinfo->nr_blocks = total_size + 1;
1942
1943 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
1944 drvinfo->model, drvinfo->rev);
1945 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
1946 sizeof(drvinfo->serial_no));
1947 /* Save the lunid in case we deregister the disk, below. */
1948 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1949 sizeof(drvinfo->LunID));
1950
1951 /* Is it the same disk we already know, and nothing's changed? */
1952 if (h->drv[drv_index]->raid_level != -1 &&
1953 ((memcmp(drvinfo->serial_no,
1954 h->drv[drv_index]->serial_no, 16) == 0) &&
1955 drvinfo->block_size == h->drv[drv_index]->block_size &&
1956 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1957 drvinfo->heads == h->drv[drv_index]->heads &&
1958 drvinfo->sectors == h->drv[drv_index]->sectors &&
1959 drvinfo->cylinders == h->drv[drv_index]->cylinders))
1960 /* The disk is unchanged, nothing to update */
1961 goto freeret;
1962
1963 /* If we get here it's not the same disk, or something's changed,
1964 * so we need to * deregister it, and re-register it, if it's not
1965 * in use.
1966 * If the disk already exists then deregister it before proceeding
1967 * (unless it's the first disk (for the controller node).
1968 */
1969 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
1970 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
1971 spin_lock_irqsave(&h->lock, flags);
1972 h->drv[drv_index]->busy_configuring = 1;
1973 spin_unlock_irqrestore(&h->lock, flags);
1974
1975 /* deregister_disk sets h->drv[drv_index]->queue = NULL
1976 * which keeps the interrupt handler from starting
1977 * the queue.
1978 */
1979 ret = deregister_disk(h, drv_index, 0, via_ioctl);
1980 }
1981
1982 /* If the disk is in use return */
1983 if (ret)
1984 goto freeret;
1985
1986 /* Save the new information from cciss_geometry_inquiry
1987 * and serial number inquiry. If the disk was deregistered
1988 * above, then h->drv[drv_index] will be NULL.
1989 */
1990 if (h->drv[drv_index] == NULL) {
1991 drvinfo->device_initialized = 0;
1992 h->drv[drv_index] = drvinfo;
1993 drvinfo = NULL; /* so it won't be freed below. */
1994 } else {
1995 /* special case for cxd0 */
1996 h->drv[drv_index]->block_size = drvinfo->block_size;
1997 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
1998 h->drv[drv_index]->heads = drvinfo->heads;
1999 h->drv[drv_index]->sectors = drvinfo->sectors;
2000 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2001 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2002 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2003 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2004 VENDOR_LEN + 1);
2005 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2006 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2007 }
2008
2009 ++h->num_luns;
2010 disk = h->gendisk[drv_index];
2011 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2012
2013 /* If it's not disk 0 (drv_index != 0)
2014 * or if it was disk 0, but there was previously
2015 * no actual corresponding configured logical drive
2016 * (raid_leve == -1) then we want to update the
2017 * logical drive's information.
2018 */
2019 if (drv_index || first_time) {
2020 if (cciss_add_disk(h, disk, drv_index) != 0) {
2021 cciss_free_gendisk(h, drv_index);
2022 cciss_free_drive_info(h, drv_index);
2023 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2024 drv_index);
2025 --h->num_luns;
2026 }
2027 }
2028
2029 freeret:
2030 kfree(inq_buff);
2031 kfree(drvinfo);
2032 return;
2033 mem_msg:
2034 dev_err(&h->pdev->dev, "out of memory\n");
2035 goto freeret;
2036 }
2037
2038 /* This function will find the first index of the controllers drive array
2039 * that has a null drv pointer and allocate the drive info struct and
2040 * will return that index This is where new drives will be added.
2041 * If the index to be returned is greater than the highest_lun index for
2042 * the controller then highest_lun is set * to this new index.
2043 * If there are no available indexes or if tha allocation fails, then -1
2044 * is returned. * "controller_node" is used to know if this is a real
2045 * logical drive, or just the controller node, which determines if this
2046 * counts towards highest_lun.
2047 */
2048 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2049 {
2050 int i;
2051 drive_info_struct *drv;
2052
2053 /* Search for an empty slot for our drive info */
2054 for (i = 0; i < CISS_MAX_LUN; i++) {
2055
2056 /* if not cxd0 case, and it's occupied, skip it. */
2057 if (h->drv[i] && i != 0)
2058 continue;
2059 /*
2060 * If it's cxd0 case, and drv is alloc'ed already, and a
2061 * disk is configured there, skip it.
2062 */
2063 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2064 continue;
2065
2066 /*
2067 * We've found an empty slot. Update highest_lun
2068 * provided this isn't just the fake cxd0 controller node.
2069 */
2070 if (i > h->highest_lun && !controller_node)
2071 h->highest_lun = i;
2072
2073 /* If adding a real disk at cxd0, and it's already alloc'ed */
2074 if (i == 0 && h->drv[i] != NULL)
2075 return i;
2076
2077 /*
2078 * Found an empty slot, not already alloc'ed. Allocate it.
2079 * Mark it with raid_level == -1, so we know it's new later on.
2080 */
2081 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2082 if (!drv)
2083 return -1;
2084 drv->raid_level = -1; /* so we know it's new */
2085 h->drv[i] = drv;
2086 return i;
2087 }
2088 return -1;
2089 }
2090
2091 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2092 {
2093 kfree(h->drv[drv_index]);
2094 h->drv[drv_index] = NULL;
2095 }
2096
2097 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2098 {
2099 put_disk(h->gendisk[drv_index]);
2100 h->gendisk[drv_index] = NULL;
2101 }
2102
2103 /* cciss_add_gendisk finds a free hba[]->drv structure
2104 * and allocates a gendisk if needed, and sets the lunid
2105 * in the drvinfo structure. It returns the index into
2106 * the ->drv[] array, or -1 if none are free.
2107 * is_controller_node indicates whether highest_lun should
2108 * count this disk, or if it's only being added to provide
2109 * a means to talk to the controller in case no logical
2110 * drives have yet been configured.
2111 */
2112 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2113 int controller_node)
2114 {
2115 int drv_index;
2116
2117 drv_index = cciss_alloc_drive_info(h, controller_node);
2118 if (drv_index == -1)
2119 return -1;
2120
2121 /*Check if the gendisk needs to be allocated */
2122 if (!h->gendisk[drv_index]) {
2123 h->gendisk[drv_index] =
2124 alloc_disk(1 << NWD_SHIFT);
2125 if (!h->gendisk[drv_index]) {
2126 dev_err(&h->pdev->dev,
2127 "could not allocate a new disk %d\n",
2128 drv_index);
2129 goto err_free_drive_info;
2130 }
2131 }
2132 memcpy(h->drv[drv_index]->LunID, lunid,
2133 sizeof(h->drv[drv_index]->LunID));
2134 if (cciss_create_ld_sysfs_entry(h, drv_index))
2135 goto err_free_disk;
2136 /* Don't need to mark this busy because nobody */
2137 /* else knows about this disk yet to contend */
2138 /* for access to it. */
2139 h->drv[drv_index]->busy_configuring = 0;
2140 wmb();
2141 return drv_index;
2142
2143 err_free_disk:
2144 cciss_free_gendisk(h, drv_index);
2145 err_free_drive_info:
2146 cciss_free_drive_info(h, drv_index);
2147 return -1;
2148 }
2149
2150 /* This is for the special case of a controller which
2151 * has no logical drives. In this case, we still need
2152 * to register a disk so the controller can be accessed
2153 * by the Array Config Utility.
2154 */
2155 static void cciss_add_controller_node(ctlr_info_t *h)
2156 {
2157 struct gendisk *disk;
2158 int drv_index;
2159
2160 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2161 return;
2162
2163 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2164 if (drv_index == -1)
2165 goto error;
2166 h->drv[drv_index]->block_size = 512;
2167 h->drv[drv_index]->nr_blocks = 0;
2168 h->drv[drv_index]->heads = 0;
2169 h->drv[drv_index]->sectors = 0;
2170 h->drv[drv_index]->cylinders = 0;
2171 h->drv[drv_index]->raid_level = -1;
2172 memset(h->drv[drv_index]->serial_no, 0, 16);
2173 disk = h->gendisk[drv_index];
2174 if (cciss_add_disk(h, disk, drv_index) == 0)
2175 return;
2176 cciss_free_gendisk(h, drv_index);
2177 cciss_free_drive_info(h, drv_index);
2178 error:
2179 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2180 return;
2181 }
2182
2183 /* This function will add and remove logical drives from the Logical
2184 * drive array of the controller and maintain persistency of ordering
2185 * so that mount points are preserved until the next reboot. This allows
2186 * for the removal of logical drives in the middle of the drive array
2187 * without a re-ordering of those drives.
2188 * INPUT
2189 * h = The controller to perform the operations on
2190 */
2191 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2192 int via_ioctl)
2193 {
2194 int num_luns;
2195 ReportLunData_struct *ld_buff = NULL;
2196 int return_code;
2197 int listlength = 0;
2198 int i;
2199 int drv_found;
2200 int drv_index = 0;
2201 unsigned char lunid[8] = CTLR_LUNID;
2202 unsigned long flags;
2203
2204 if (!capable(CAP_SYS_RAWIO))
2205 return -EPERM;
2206
2207 /* Set busy_configuring flag for this operation */
2208 spin_lock_irqsave(&h->lock, flags);
2209 if (h->busy_configuring) {
2210 spin_unlock_irqrestore(&h->lock, flags);
2211 return -EBUSY;
2212 }
2213 h->busy_configuring = 1;
2214 spin_unlock_irqrestore(&h->lock, flags);
2215
2216 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2217 if (ld_buff == NULL)
2218 goto mem_msg;
2219
2220 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2221 sizeof(ReportLunData_struct),
2222 0, CTLR_LUNID, TYPE_CMD);
2223
2224 if (return_code == IO_OK)
2225 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2226 else { /* reading number of logical volumes failed */
2227 dev_warn(&h->pdev->dev,
2228 "report logical volume command failed\n");
2229 listlength = 0;
2230 goto freeret;
2231 }
2232
2233 num_luns = listlength / 8; /* 8 bytes per entry */
2234 if (num_luns > CISS_MAX_LUN) {
2235 num_luns = CISS_MAX_LUN;
2236 dev_warn(&h->pdev->dev, "more luns configured"
2237 " on controller than can be handled by"
2238 " this driver.\n");
2239 }
2240
2241 if (num_luns == 0)
2242 cciss_add_controller_node(h);
2243
2244 /* Compare controller drive array to driver's drive array
2245 * to see if any drives are missing on the controller due
2246 * to action of Array Config Utility (user deletes drive)
2247 * and deregister logical drives which have disappeared.
2248 */
2249 for (i = 0; i <= h->highest_lun; i++) {
2250 int j;
2251 drv_found = 0;
2252
2253 /* skip holes in the array from already deleted drives */
2254 if (h->drv[i] == NULL)
2255 continue;
2256
2257 for (j = 0; j < num_luns; j++) {
2258 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2259 if (memcmp(h->drv[i]->LunID, lunid,
2260 sizeof(lunid)) == 0) {
2261 drv_found = 1;
2262 break;
2263 }
2264 }
2265 if (!drv_found) {
2266 /* Deregister it from the OS, it's gone. */
2267 spin_lock_irqsave(&h->lock, flags);
2268 h->drv[i]->busy_configuring = 1;
2269 spin_unlock_irqrestore(&h->lock, flags);
2270 return_code = deregister_disk(h, i, 1, via_ioctl);
2271 if (h->drv[i] != NULL)
2272 h->drv[i]->busy_configuring = 0;
2273 }
2274 }
2275
2276 /* Compare controller drive array to driver's drive array.
2277 * Check for updates in the drive information and any new drives
2278 * on the controller due to ACU adding logical drives, or changing
2279 * a logical drive's size, etc. Reregister any new/changed drives
2280 */
2281 for (i = 0; i < num_luns; i++) {
2282 int j;
2283
2284 drv_found = 0;
2285
2286 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2287 /* Find if the LUN is already in the drive array
2288 * of the driver. If so then update its info
2289 * if not in use. If it does not exist then find
2290 * the first free index and add it.
2291 */
2292 for (j = 0; j <= h->highest_lun; j++) {
2293 if (h->drv[j] != NULL &&
2294 memcmp(h->drv[j]->LunID, lunid,
2295 sizeof(h->drv[j]->LunID)) == 0) {
2296 drv_index = j;
2297 drv_found = 1;
2298 break;
2299 }
2300 }
2301
2302 /* check if the drive was found already in the array */
2303 if (!drv_found) {
2304 drv_index = cciss_add_gendisk(h, lunid, 0);
2305 if (drv_index == -1)
2306 goto freeret;
2307 }
2308 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2309 } /* end for */
2310
2311 freeret:
2312 kfree(ld_buff);
2313 h->busy_configuring = 0;
2314 /* We return -1 here to tell the ACU that we have registered/updated
2315 * all of the drives that we can and to keep it from calling us
2316 * additional times.
2317 */
2318 return -1;
2319 mem_msg:
2320 dev_err(&h->pdev->dev, "out of memory\n");
2321 h->busy_configuring = 0;
2322 goto freeret;
2323 }
2324
2325 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2326 {
2327 /* zero out the disk size info */
2328 drive_info->nr_blocks = 0;
2329 drive_info->block_size = 0;
2330 drive_info->heads = 0;
2331 drive_info->sectors = 0;
2332 drive_info->cylinders = 0;
2333 drive_info->raid_level = -1;
2334 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2335 memset(drive_info->model, 0, sizeof(drive_info->model));
2336 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2337 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2338 /*
2339 * don't clear the LUNID though, we need to remember which
2340 * one this one is.
2341 */
2342 }
2343
2344 /* This function will deregister the disk and it's queue from the
2345 * kernel. It must be called with the controller lock held and the
2346 * drv structures busy_configuring flag set. It's parameters are:
2347 *
2348 * disk = This is the disk to be deregistered
2349 * drv = This is the drive_info_struct associated with the disk to be
2350 * deregistered. It contains information about the disk used
2351 * by the driver.
2352 * clear_all = This flag determines whether or not the disk information
2353 * is going to be completely cleared out and the highest_lun
2354 * reset. Sometimes we want to clear out information about
2355 * the disk in preparation for re-adding it. In this case
2356 * the highest_lun should be left unchanged and the LunID
2357 * should not be cleared.
2358 * via_ioctl
2359 * This indicates whether we've reached this path via ioctl.
2360 * This affects the maximum usage count allowed for c0d0 to be messed with.
2361 * If this path is reached via ioctl(), then the max_usage_count will
2362 * be 1, as the process calling ioctl() has got to have the device open.
2363 * If we get here via sysfs, then the max usage count will be zero.
2364 */
2365 static int deregister_disk(ctlr_info_t *h, int drv_index,
2366 int clear_all, int via_ioctl)
2367 {
2368 int i;
2369 struct gendisk *disk;
2370 drive_info_struct *drv;
2371 int recalculate_highest_lun;
2372
2373 if (!capable(CAP_SYS_RAWIO))
2374 return -EPERM;
2375
2376 drv = h->drv[drv_index];
2377 disk = h->gendisk[drv_index];
2378
2379 /* make sure logical volume is NOT is use */
2380 if (clear_all || (h->gendisk[0] == disk)) {
2381 if (drv->usage_count > via_ioctl)
2382 return -EBUSY;
2383 } else if (drv->usage_count > 0)
2384 return -EBUSY;
2385
2386 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2387
2388 /* invalidate the devices and deregister the disk. If it is disk
2389 * zero do not deregister it but just zero out it's values. This
2390 * allows us to delete disk zero but keep the controller registered.
2391 */
2392 if (h->gendisk[0] != disk) {
2393 struct request_queue *q = disk->queue;
2394 if (disk->flags & GENHD_FL_UP) {
2395 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2396 del_gendisk(disk);
2397 }
2398 if (q)
2399 blk_cleanup_queue(q);
2400 /* If clear_all is set then we are deleting the logical
2401 * drive, not just refreshing its info. For drives
2402 * other than disk 0 we will call put_disk. We do not
2403 * do this for disk 0 as we need it to be able to
2404 * configure the controller.
2405 */
2406 if (clear_all){
2407 /* This isn't pretty, but we need to find the
2408 * disk in our array and NULL our the pointer.
2409 * This is so that we will call alloc_disk if
2410 * this index is used again later.
2411 */
2412 for (i=0; i < CISS_MAX_LUN; i++){
2413 if (h->gendisk[i] == disk) {
2414 h->gendisk[i] = NULL;
2415 break;
2416 }
2417 }
2418 put_disk(disk);
2419 }
2420 } else {
2421 set_capacity(disk, 0);
2422 cciss_clear_drive_info(drv);
2423 }
2424
2425 --h->num_luns;
2426
2427 /* if it was the last disk, find the new hightest lun */
2428 if (clear_all && recalculate_highest_lun) {
2429 int newhighest = -1;
2430 for (i = 0; i <= h->highest_lun; i++) {
2431 /* if the disk has size > 0, it is available */
2432 if (h->drv[i] && h->drv[i]->heads)
2433 newhighest = i;
2434 }
2435 h->highest_lun = newhighest;
2436 }
2437 return 0;
2438 }
2439
2440 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2441 size_t size, __u8 page_code, unsigned char *scsi3addr,
2442 int cmd_type)
2443 {
2444 u64bit buff_dma_handle;
2445 int status = IO_OK;
2446
2447 c->cmd_type = CMD_IOCTL_PEND;
2448 c->Header.ReplyQueue = 0;
2449 if (buff != NULL) {
2450 c->Header.SGList = 1;
2451 c->Header.SGTotal = 1;
2452 } else {
2453 c->Header.SGList = 0;
2454 c->Header.SGTotal = 0;
2455 }
2456 c->Header.Tag.lower = c->busaddr;
2457 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2458
2459 c->Request.Type.Type = cmd_type;
2460 if (cmd_type == TYPE_CMD) {
2461 switch (cmd) {
2462 case CISS_INQUIRY:
2463 /* are we trying to read a vital product page */
2464 if (page_code != 0) {
2465 c->Request.CDB[1] = 0x01;
2466 c->Request.CDB[2] = page_code;
2467 }
2468 c->Request.CDBLen = 6;
2469 c->Request.Type.Attribute = ATTR_SIMPLE;
2470 c->Request.Type.Direction = XFER_READ;
2471 c->Request.Timeout = 0;
2472 c->Request.CDB[0] = CISS_INQUIRY;
2473 c->Request.CDB[4] = size & 0xFF;
2474 break;
2475 case CISS_REPORT_LOG:
2476 case CISS_REPORT_PHYS:
2477 /* Talking to controller so It's a physical command
2478 mode = 00 target = 0. Nothing to write.
2479 */
2480 c->Request.CDBLen = 12;
2481 c->Request.Type.Attribute = ATTR_SIMPLE;
2482 c->Request.Type.Direction = XFER_READ;
2483 c->Request.Timeout = 0;
2484 c->Request.CDB[0] = cmd;
2485 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2486 c->Request.CDB[7] = (size >> 16) & 0xFF;
2487 c->Request.CDB[8] = (size >> 8) & 0xFF;
2488 c->Request.CDB[9] = size & 0xFF;
2489 break;
2490
2491 case CCISS_READ_CAPACITY:
2492 c->Request.CDBLen = 10;
2493 c->Request.Type.Attribute = ATTR_SIMPLE;
2494 c->Request.Type.Direction = XFER_READ;
2495 c->Request.Timeout = 0;
2496 c->Request.CDB[0] = cmd;
2497 break;
2498 case CCISS_READ_CAPACITY_16:
2499 c->Request.CDBLen = 16;
2500 c->Request.Type.Attribute = ATTR_SIMPLE;
2501 c->Request.Type.Direction = XFER_READ;
2502 c->Request.Timeout = 0;
2503 c->Request.CDB[0] = cmd;
2504 c->Request.CDB[1] = 0x10;
2505 c->Request.CDB[10] = (size >> 24) & 0xFF;
2506 c->Request.CDB[11] = (size >> 16) & 0xFF;
2507 c->Request.CDB[12] = (size >> 8) & 0xFF;
2508 c->Request.CDB[13] = size & 0xFF;
2509 c->Request.Timeout = 0;
2510 c->Request.CDB[0] = cmd;
2511 break;
2512 case CCISS_CACHE_FLUSH:
2513 c->Request.CDBLen = 12;
2514 c->Request.Type.Attribute = ATTR_SIMPLE;
2515 c->Request.Type.Direction = XFER_WRITE;
2516 c->Request.Timeout = 0;
2517 c->Request.CDB[0] = BMIC_WRITE;
2518 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2519 break;
2520 case TEST_UNIT_READY:
2521 c->Request.CDBLen = 6;
2522 c->Request.Type.Attribute = ATTR_SIMPLE;
2523 c->Request.Type.Direction = XFER_NONE;
2524 c->Request.Timeout = 0;
2525 break;
2526 default:
2527 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2528 return IO_ERROR;
2529 }
2530 } else if (cmd_type == TYPE_MSG) {
2531 switch (cmd) {
2532 case 0: /* ABORT message */
2533 c->Request.CDBLen = 12;
2534 c->Request.Type.Attribute = ATTR_SIMPLE;
2535 c->Request.Type.Direction = XFER_WRITE;
2536 c->Request.Timeout = 0;
2537 c->Request.CDB[0] = cmd; /* abort */
2538 c->Request.CDB[1] = 0; /* abort a command */
2539 /* buff contains the tag of the command to abort */
2540 memcpy(&c->Request.CDB[4], buff, 8);
2541 break;
2542 case 1: /* RESET message */
2543 c->Request.CDBLen = 16;
2544 c->Request.Type.Attribute = ATTR_SIMPLE;
2545 c->Request.Type.Direction = XFER_NONE;
2546 c->Request.Timeout = 0;
2547 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2548 c->Request.CDB[0] = cmd; /* reset */
2549 c->Request.CDB[1] = 0x03; /* reset a target */
2550 break;
2551 case 3: /* No-Op message */
2552 c->Request.CDBLen = 1;
2553 c->Request.Type.Attribute = ATTR_SIMPLE;
2554 c->Request.Type.Direction = XFER_WRITE;
2555 c->Request.Timeout = 0;
2556 c->Request.CDB[0] = cmd;
2557 break;
2558 default:
2559 dev_warn(&h->pdev->dev,
2560 "unknown message type %d\n", cmd);
2561 return IO_ERROR;
2562 }
2563 } else {
2564 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2565 return IO_ERROR;
2566 }
2567 /* Fill in the scatter gather information */
2568 if (size > 0) {
2569 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2570 buff, size,
2571 PCI_DMA_BIDIRECTIONAL);
2572 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2573 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2574 c->SG[0].Len = size;
2575 c->SG[0].Ext = 0; /* we are not chaining */
2576 }
2577 return status;
2578 }
2579
2580 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2581 {
2582 switch (c->err_info->ScsiStatus) {
2583 case SAM_STAT_GOOD:
2584 return IO_OK;
2585 case SAM_STAT_CHECK_CONDITION:
2586 switch (0xf & c->err_info->SenseInfo[2]) {
2587 case 0: return IO_OK; /* no sense */
2588 case 1: return IO_OK; /* recovered error */
2589 default:
2590 if (check_for_unit_attention(h, c))
2591 return IO_NEEDS_RETRY;
2592 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2593 "check condition, sense key = 0x%02x\n",
2594 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2595 }
2596 break;
2597 default:
2598 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2599 "scsi status = 0x%02x\n",
2600 c->Request.CDB[0], c->err_info->ScsiStatus);
2601 break;
2602 }
2603 return IO_ERROR;
2604 }
2605
2606 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2607 {
2608 int return_status = IO_OK;
2609
2610 if (c->err_info->CommandStatus == CMD_SUCCESS)
2611 return IO_OK;
2612
2613 switch (c->err_info->CommandStatus) {
2614 case CMD_TARGET_STATUS:
2615 return_status = check_target_status(h, c);
2616 break;
2617 case CMD_DATA_UNDERRUN:
2618 case CMD_DATA_OVERRUN:
2619 /* expected for inquiry and report lun commands */
2620 break;
2621 case CMD_INVALID:
2622 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2623 "reported invalid\n", c->Request.CDB[0]);
2624 return_status = IO_ERROR;
2625 break;
2626 case CMD_PROTOCOL_ERR:
2627 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2628 "protocol error\n", c->Request.CDB[0]);
2629 return_status = IO_ERROR;
2630 break;
2631 case CMD_HARDWARE_ERR:
2632 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2633 " hardware error\n", c->Request.CDB[0]);
2634 return_status = IO_ERROR;
2635 break;
2636 case CMD_CONNECTION_LOST:
2637 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2638 "connection lost\n", c->Request.CDB[0]);
2639 return_status = IO_ERROR;
2640 break;
2641 case CMD_ABORTED:
2642 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2643 "aborted\n", c->Request.CDB[0]);
2644 return_status = IO_ERROR;
2645 break;
2646 case CMD_ABORT_FAILED:
2647 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2648 "abort failed\n", c->Request.CDB[0]);
2649 return_status = IO_ERROR;
2650 break;
2651 case CMD_UNSOLICITED_ABORT:
2652 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2653 c->Request.CDB[0]);
2654 return_status = IO_NEEDS_RETRY;
2655 break;
2656 default:
2657 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2658 "unknown status %x\n", c->Request.CDB[0],
2659 c->err_info->CommandStatus);
2660 return_status = IO_ERROR;
2661 }
2662 return return_status;
2663 }
2664
2665 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2666 int attempt_retry)
2667 {
2668 DECLARE_COMPLETION_ONSTACK(wait);
2669 u64bit buff_dma_handle;
2670 int return_status = IO_OK;
2671
2672 resend_cmd2:
2673 c->waiting = &wait;
2674 enqueue_cmd_and_start_io(h, c);
2675
2676 wait_for_completion(&wait);
2677
2678 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2679 goto command_done;
2680
2681 return_status = process_sendcmd_error(h, c);
2682
2683 if (return_status == IO_NEEDS_RETRY &&
2684 c->retry_count < MAX_CMD_RETRIES) {
2685 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2686 c->Request.CDB[0]);
2687 c->retry_count++;
2688 /* erase the old error information */
2689 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2690 return_status = IO_OK;
2691 INIT_COMPLETION(wait);
2692 goto resend_cmd2;
2693 }
2694
2695 command_done:
2696 /* unlock the buffers from DMA */
2697 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2698 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2699 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2700 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2701 return return_status;
2702 }
2703
2704 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2705 __u8 page_code, unsigned char scsi3addr[],
2706 int cmd_type)
2707 {
2708 CommandList_struct *c;
2709 int return_status;
2710
2711 c = cmd_special_alloc(h);
2712 if (!c)
2713 return -ENOMEM;
2714 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2715 scsi3addr, cmd_type);
2716 if (return_status == IO_OK)
2717 return_status = sendcmd_withirq_core(h, c, 1);
2718
2719 cmd_special_free(h, c);
2720 return return_status;
2721 }
2722
2723 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2724 sector_t total_size,
2725 unsigned int block_size,
2726 InquiryData_struct *inq_buff,
2727 drive_info_struct *drv)
2728 {
2729 int return_code;
2730 unsigned long t;
2731 unsigned char scsi3addr[8];
2732
2733 memset(inq_buff, 0, sizeof(InquiryData_struct));
2734 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2735 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2736 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2737 if (return_code == IO_OK) {
2738 if (inq_buff->data_byte[8] == 0xFF) {
2739 dev_warn(&h->pdev->dev,
2740 "reading geometry failed, volume "
2741 "does not support reading geometry\n");
2742 drv->heads = 255;
2743 drv->sectors = 32; /* Sectors per track */
2744 drv->cylinders = total_size + 1;
2745 drv->raid_level = RAID_UNKNOWN;
2746 } else {
2747 drv->heads = inq_buff->data_byte[6];
2748 drv->sectors = inq_buff->data_byte[7];
2749 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2750 drv->cylinders += inq_buff->data_byte[5];
2751 drv->raid_level = inq_buff->data_byte[8];
2752 }
2753 drv->block_size = block_size;
2754 drv->nr_blocks = total_size + 1;
2755 t = drv->heads * drv->sectors;
2756 if (t > 1) {
2757 sector_t real_size = total_size + 1;
2758 unsigned long rem = sector_div(real_size, t);
2759 if (rem)
2760 real_size++;
2761 drv->cylinders = real_size;
2762 }
2763 } else { /* Get geometry failed */
2764 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2765 }
2766 }
2767
2768 static void
2769 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2770 unsigned int *block_size)
2771 {
2772 ReadCapdata_struct *buf;
2773 int return_code;
2774 unsigned char scsi3addr[8];
2775
2776 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2777 if (!buf) {
2778 dev_warn(&h->pdev->dev, "out of memory\n");
2779 return;
2780 }
2781
2782 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2783 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2784 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2785 if (return_code == IO_OK) {
2786 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2787 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2788 } else { /* read capacity command failed */
2789 dev_warn(&h->pdev->dev, "read capacity failed\n");
2790 *total_size = 0;
2791 *block_size = BLOCK_SIZE;
2792 }
2793 kfree(buf);
2794 }
2795
2796 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2797 sector_t *total_size, unsigned int *block_size)
2798 {
2799 ReadCapdata_struct_16 *buf;
2800 int return_code;
2801 unsigned char scsi3addr[8];
2802
2803 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2804 if (!buf) {
2805 dev_warn(&h->pdev->dev, "out of memory\n");
2806 return;
2807 }
2808
2809 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2810 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2811 buf, sizeof(ReadCapdata_struct_16),
2812 0, scsi3addr, TYPE_CMD);
2813 if (return_code == IO_OK) {
2814 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2815 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2816 } else { /* read capacity command failed */
2817 dev_warn(&h->pdev->dev, "read capacity failed\n");
2818 *total_size = 0;
2819 *block_size = BLOCK_SIZE;
2820 }
2821 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2822 (unsigned long long)*total_size+1, *block_size);
2823 kfree(buf);
2824 }
2825
2826 static int cciss_revalidate(struct gendisk *disk)
2827 {
2828 ctlr_info_t *h = get_host(disk);
2829 drive_info_struct *drv = get_drv(disk);
2830 int logvol;
2831 int FOUND = 0;
2832 unsigned int block_size;
2833 sector_t total_size;
2834 InquiryData_struct *inq_buff = NULL;
2835
2836 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
2837 if (!h->drv[logvol])
2838 continue;
2839 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2840 sizeof(drv->LunID)) == 0) {
2841 FOUND = 1;
2842 break;
2843 }
2844 }
2845
2846 if (!FOUND)
2847 return 1;
2848
2849 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2850 if (inq_buff == NULL) {
2851 dev_warn(&h->pdev->dev, "out of memory\n");
2852 return 1;
2853 }
2854 if (h->cciss_read == CCISS_READ_10) {
2855 cciss_read_capacity(h, logvol,
2856 &total_size, &block_size);
2857 } else {
2858 cciss_read_capacity_16(h, logvol,
2859 &total_size, &block_size);
2860 }
2861 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2862 inq_buff, drv);
2863
2864 blk_queue_logical_block_size(drv->queue, drv->block_size);
2865 set_capacity(disk, drv->nr_blocks);
2866
2867 kfree(inq_buff);
2868 return 0;
2869 }
2870
2871 /*
2872 * Map (physical) PCI mem into (virtual) kernel space
2873 */
2874 static void __iomem *remap_pci_mem(ulong base, ulong size)
2875 {
2876 ulong page_base = ((ulong) base) & PAGE_MASK;
2877 ulong page_offs = ((ulong) base) - page_base;
2878 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2879
2880 return page_remapped ? (page_remapped + page_offs) : NULL;
2881 }
2882
2883 /*
2884 * Takes jobs of the Q and sends them to the hardware, then puts it on
2885 * the Q to wait for completion.
2886 */
2887 static void start_io(ctlr_info_t *h)
2888 {
2889 CommandList_struct *c;
2890
2891 while (!hlist_empty(&h->reqQ)) {
2892 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
2893 /* can't do anything if fifo is full */
2894 if ((h->access.fifo_full(h))) {
2895 dev_warn(&h->pdev->dev, "fifo full\n");
2896 break;
2897 }
2898
2899 /* Get the first entry from the Request Q */
2900 removeQ(c);
2901 h->Qdepth--;
2902
2903 /* Tell the controller execute command */
2904 h->access.submit_command(h, c);
2905
2906 /* Put job onto the completed Q */
2907 addQ(&h->cmpQ, c);
2908 }
2909 }
2910
2911 /* Assumes that h->lock is held. */
2912 /* Zeros out the error record and then resends the command back */
2913 /* to the controller */
2914 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
2915 {
2916 /* erase the old error information */
2917 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2918
2919 /* add it to software queue and then send it to the controller */
2920 addQ(&h->reqQ, c);
2921 h->Qdepth++;
2922 if (h->Qdepth > h->maxQsinceinit)
2923 h->maxQsinceinit = h->Qdepth;
2924
2925 start_io(h);
2926 }
2927
2928 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2929 unsigned int msg_byte, unsigned int host_byte,
2930 unsigned int driver_byte)
2931 {
2932 /* inverse of macros in scsi.h */
2933 return (scsi_status_byte & 0xff) |
2934 ((msg_byte & 0xff) << 8) |
2935 ((host_byte & 0xff) << 16) |
2936 ((driver_byte & 0xff) << 24);
2937 }
2938
2939 static inline int evaluate_target_status(ctlr_info_t *h,
2940 CommandList_struct *cmd, int *retry_cmd)
2941 {
2942 unsigned char sense_key;
2943 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2944 int error_value;
2945
2946 *retry_cmd = 0;
2947 /* If we get in here, it means we got "target status", that is, scsi status */
2948 status_byte = cmd->err_info->ScsiStatus;
2949 driver_byte = DRIVER_OK;
2950 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2951
2952 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
2953 host_byte = DID_PASSTHROUGH;
2954 else
2955 host_byte = DID_OK;
2956
2957 error_value = make_status_bytes(status_byte, msg_byte,
2958 host_byte, driver_byte);
2959
2960 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
2961 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
2962 dev_warn(&h->pdev->dev, "cmd %p "
2963 "has SCSI Status 0x%x\n",
2964 cmd, cmd->err_info->ScsiStatus);
2965 return error_value;
2966 }
2967
2968 /* check the sense key */
2969 sense_key = 0xf & cmd->err_info->SenseInfo[2];
2970 /* no status or recovered error */
2971 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
2972 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
2973 error_value = 0;
2974
2975 if (check_for_unit_attention(h, cmd)) {
2976 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
2977 return 0;
2978 }
2979
2980 /* Not SG_IO or similar? */
2981 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
2982 if (error_value != 0)
2983 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
2984 " sense key = 0x%x\n", cmd, sense_key);
2985 return error_value;
2986 }
2987
2988 /* SG_IO or similar, copy sense data back */
2989 if (cmd->rq->sense) {
2990 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
2991 cmd->rq->sense_len = cmd->err_info->SenseLen;
2992 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
2993 cmd->rq->sense_len);
2994 } else
2995 cmd->rq->sense_len = 0;
2996
2997 return error_value;
2998 }
2999
3000 /* checks the status of the job and calls complete buffers to mark all
3001 * buffers for the completed job. Note that this function does not need
3002 * to hold the hba/queue lock.
3003 */
3004 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3005 int timeout)
3006 {
3007 int retry_cmd = 0;
3008 struct request *rq = cmd->rq;
3009
3010 rq->errors = 0;
3011
3012 if (timeout)
3013 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3014
3015 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3016 goto after_error_processing;
3017
3018 switch (cmd->err_info->CommandStatus) {
3019 case CMD_TARGET_STATUS:
3020 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3021 break;
3022 case CMD_DATA_UNDERRUN:
3023 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3024 dev_warn(&h->pdev->dev, "cmd %p has"
3025 " completed with data underrun "
3026 "reported\n", cmd);
3027 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3028 }
3029 break;
3030 case CMD_DATA_OVERRUN:
3031 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3032 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3033 " completed with data overrun "
3034 "reported\n", cmd);
3035 break;
3036 case CMD_INVALID:
3037 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3038 "reported invalid\n", cmd);
3039 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3040 cmd->err_info->CommandStatus, DRIVER_OK,
3041 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3042 DID_PASSTHROUGH : DID_ERROR);
3043 break;
3044 case CMD_PROTOCOL_ERR:
3045 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3046 "protocol error\n", cmd);
3047 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3048 cmd->err_info->CommandStatus, DRIVER_OK,
3049 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3050 DID_PASSTHROUGH : DID_ERROR);
3051 break;
3052 case CMD_HARDWARE_ERR:
3053 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3054 " hardware error\n", cmd);
3055 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3056 cmd->err_info->CommandStatus, DRIVER_OK,
3057 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3058 DID_PASSTHROUGH : DID_ERROR);
3059 break;
3060 case CMD_CONNECTION_LOST:
3061 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3062 "connection lost\n", cmd);
3063 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3064 cmd->err_info->CommandStatus, DRIVER_OK,
3065 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3066 DID_PASSTHROUGH : DID_ERROR);
3067 break;
3068 case CMD_ABORTED:
3069 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3070 "aborted\n", cmd);
3071 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3072 cmd->err_info->CommandStatus, DRIVER_OK,
3073 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3074 DID_PASSTHROUGH : DID_ABORT);
3075 break;
3076 case CMD_ABORT_FAILED:
3077 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3078 "abort failed\n", cmd);
3079 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3080 cmd->err_info->CommandStatus, DRIVER_OK,
3081 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3082 DID_PASSTHROUGH : DID_ERROR);
3083 break;
3084 case CMD_UNSOLICITED_ABORT:
3085 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3086 "abort %p\n", h->ctlr, cmd);
3087 if (cmd->retry_count < MAX_CMD_RETRIES) {
3088 retry_cmd = 1;
3089 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3090 cmd->retry_count++;
3091 } else
3092 dev_warn(&h->pdev->dev,
3093 "%p retried too many times\n", cmd);
3094 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3095 cmd->err_info->CommandStatus, DRIVER_OK,
3096 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3097 DID_PASSTHROUGH : DID_ABORT);
3098 break;
3099 case CMD_TIMEOUT:
3100 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3101 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3102 cmd->err_info->CommandStatus, DRIVER_OK,
3103 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3104 DID_PASSTHROUGH : DID_ERROR);
3105 break;
3106 default:
3107 dev_warn(&h->pdev->dev, "cmd %p returned "
3108 "unknown status %x\n", cmd,
3109 cmd->err_info->CommandStatus);
3110 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3111 cmd->err_info->CommandStatus, DRIVER_OK,
3112 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3113 DID_PASSTHROUGH : DID_ERROR);
3114 }
3115
3116 after_error_processing:
3117
3118 /* We need to return this command */
3119 if (retry_cmd) {
3120 resend_cciss_cmd(h, cmd);
3121 return;
3122 }
3123 cmd->rq->completion_data = cmd;
3124 blk_complete_request(cmd->rq);
3125 }
3126
3127 static inline u32 cciss_tag_contains_index(u32 tag)
3128 {
3129 #define DIRECT_LOOKUP_BIT 0x10
3130 return tag & DIRECT_LOOKUP_BIT;
3131 }
3132
3133 static inline u32 cciss_tag_to_index(u32 tag)
3134 {
3135 #define DIRECT_LOOKUP_SHIFT 5
3136 return tag >> DIRECT_LOOKUP_SHIFT;
3137 }
3138
3139 static inline u32 cciss_tag_discard_error_bits(u32 tag)
3140 {
3141 #define CCISS_ERROR_BITS 0x03
3142 return tag & ~CCISS_ERROR_BITS;
3143 }
3144
3145 static inline void cciss_mark_tag_indexed(u32 *tag)
3146 {
3147 *tag |= DIRECT_LOOKUP_BIT;
3148 }
3149
3150 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3151 {
3152 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3153 }
3154
3155 /*
3156 * Get a request and submit it to the controller.
3157 */
3158 static void do_cciss_request(struct request_queue *q)
3159 {
3160 ctlr_info_t *h = q->queuedata;
3161 CommandList_struct *c;
3162 sector_t start_blk;
3163 int seg;
3164 struct request *creq;
3165 u64bit temp64;
3166 struct scatterlist *tmp_sg;
3167 SGDescriptor_struct *curr_sg;
3168 drive_info_struct *drv;
3169 int i, dir;
3170 int sg_index = 0;
3171 int chained = 0;
3172
3173 /* We call start_io here in case there is a command waiting on the
3174 * queue that has not been sent.
3175 */
3176 if (blk_queue_plugged(q))
3177 goto startio;
3178
3179 queue:
3180 creq = blk_peek_request(q);
3181 if (!creq)
3182 goto startio;
3183
3184 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3185
3186 c = cmd_alloc(h);
3187 if (!c)
3188 goto full;
3189
3190 blk_start_request(creq);
3191
3192 tmp_sg = h->scatter_list[c->cmdindex];
3193 spin_unlock_irq(q->queue_lock);
3194
3195 c->cmd_type = CMD_RWREQ;
3196 c->rq = creq;
3197
3198 /* fill in the request */
3199 drv = creq->rq_disk->private_data;
3200 c->Header.ReplyQueue = 0; /* unused in simple mode */
3201 /* got command from pool, so use the command block index instead */
3202 /* for direct lookups. */
3203 /* The first 2 bits are reserved for controller error reporting. */
3204 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3205 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3206 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3207 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3208 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3209 c->Request.Type.Attribute = ATTR_SIMPLE;
3210 c->Request.Type.Direction =
3211 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3212 c->Request.Timeout = 0; /* Don't time out */
3213 c->Request.CDB[0] =
3214 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3215 start_blk = blk_rq_pos(creq);
3216 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3217 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3218 sg_init_table(tmp_sg, h->maxsgentries);
3219 seg = blk_rq_map_sg(q, creq, tmp_sg);
3220
3221 /* get the DMA records for the setup */
3222 if (c->Request.Type.Direction == XFER_READ)
3223 dir = PCI_DMA_FROMDEVICE;
3224 else
3225 dir = PCI_DMA_TODEVICE;
3226
3227 curr_sg = c->SG;
3228 sg_index = 0;
3229 chained = 0;
3230
3231 for (i = 0; i < seg; i++) {
3232 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3233 !chained && ((seg - i) > 1)) {
3234 /* Point to next chain block. */
3235 curr_sg = h->cmd_sg_list[c->cmdindex];
3236 sg_index = 0;
3237 chained = 1;
3238 }
3239 curr_sg[sg_index].Len = tmp_sg[i].length;
3240 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3241 tmp_sg[i].offset,
3242 tmp_sg[i].length, dir);
3243 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3244 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3245 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3246 ++sg_index;
3247 }
3248 if (chained)
3249 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3250 (seg - (h->max_cmd_sgentries - 1)) *
3251 sizeof(SGDescriptor_struct));
3252
3253 /* track how many SG entries we are using */
3254 if (seg > h->maxSG)
3255 h->maxSG = seg;
3256
3257 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3258 "chained[%d]\n",
3259 blk_rq_sectors(creq), seg, chained);
3260
3261 c->Header.SGTotal = seg + chained;
3262 if (seg <= h->max_cmd_sgentries)
3263 c->Header.SGList = c->Header.SGTotal;
3264 else
3265 c->Header.SGList = h->max_cmd_sgentries;
3266 set_performant_mode(h, c);
3267
3268 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3269 if(h->cciss_read == CCISS_READ_10) {
3270 c->Request.CDB[1] = 0;
3271 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3272 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3273 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3274 c->Request.CDB[5] = start_blk & 0xff;
3275 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3276 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3277 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3278 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3279 } else {
3280 u32 upper32 = upper_32_bits(start_blk);
3281
3282 c->Request.CDBLen = 16;
3283 c->Request.CDB[1]= 0;
3284 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3285 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3286 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3287 c->Request.CDB[5]= upper32 & 0xff;
3288 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3289 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3290 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3291 c->Request.CDB[9]= start_blk & 0xff;
3292 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3293 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3294 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3295 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3296 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3297 }
3298 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3299 c->Request.CDBLen = creq->cmd_len;
3300 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3301 } else {
3302 dev_warn(&h->pdev->dev, "bad request type %d\n",
3303 creq->cmd_type);
3304 BUG();
3305 }
3306
3307 spin_lock_irq(q->queue_lock);
3308
3309 addQ(&h->reqQ, c);
3310 h->Qdepth++;
3311 if (h->Qdepth > h->maxQsinceinit)
3312 h->maxQsinceinit = h->Qdepth;
3313
3314 goto queue;
3315 full:
3316 blk_stop_queue(q);
3317 startio:
3318 /* We will already have the driver lock here so not need
3319 * to lock it.
3320 */
3321 start_io(h);
3322 }
3323
3324 static inline unsigned long get_next_completion(ctlr_info_t *h)
3325 {
3326 return h->access.command_completed(h);
3327 }
3328
3329 static inline int interrupt_pending(ctlr_info_t *h)
3330 {
3331 return h->access.intr_pending(h);
3332 }
3333
3334 static inline long interrupt_not_for_us(ctlr_info_t *h)
3335 {
3336 return ((h->access.intr_pending(h) == 0) ||
3337 (h->interrupts_enabled == 0));
3338 }
3339
3340 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3341 u32 raw_tag)
3342 {
3343 if (unlikely(tag_index >= h->nr_cmds)) {
3344 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3345 return 1;
3346 }
3347 return 0;
3348 }
3349
3350 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3351 u32 raw_tag)
3352 {
3353 removeQ(c);
3354 if (likely(c->cmd_type == CMD_RWREQ))
3355 complete_command(h, c, 0);
3356 else if (c->cmd_type == CMD_IOCTL_PEND)
3357 complete(c->waiting);
3358 #ifdef CONFIG_CISS_SCSI_TAPE
3359 else if (c->cmd_type == CMD_SCSI)
3360 complete_scsi_command(c, 0, raw_tag);
3361 #endif
3362 }
3363
3364 static inline u32 next_command(ctlr_info_t *h)
3365 {
3366 u32 a;
3367
3368 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3369 return h->access.command_completed(h);
3370
3371 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3372 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3373 (h->reply_pool_head)++;
3374 h->commands_outstanding--;
3375 } else {
3376 a = FIFO_EMPTY;
3377 }
3378 /* Check for wraparound */
3379 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3380 h->reply_pool_head = h->reply_pool;
3381 h->reply_pool_wraparound ^= 1;
3382 }
3383 return a;
3384 }
3385
3386 /* process completion of an indexed ("direct lookup") command */
3387 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3388 {
3389 u32 tag_index;
3390 CommandList_struct *c;
3391
3392 tag_index = cciss_tag_to_index(raw_tag);
3393 if (bad_tag(h, tag_index, raw_tag))
3394 return next_command(h);
3395 c = h->cmd_pool + tag_index;
3396 finish_cmd(h, c, raw_tag);
3397 return next_command(h);
3398 }
3399
3400 /* process completion of a non-indexed command */
3401 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3402 {
3403 u32 tag;
3404 CommandList_struct *c = NULL;
3405 struct hlist_node *tmp;
3406 __u32 busaddr_masked, tag_masked;
3407
3408 tag = cciss_tag_discard_error_bits(raw_tag);
3409 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3410 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3411 tag_masked = cciss_tag_discard_error_bits(tag);
3412 if (busaddr_masked == tag_masked) {
3413 finish_cmd(h, c, raw_tag);
3414 return next_command(h);
3415 }
3416 }
3417 bad_tag(h, h->nr_cmds + 1, raw_tag);
3418 return next_command(h);
3419 }
3420
3421 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3422 {
3423 ctlr_info_t *h = dev_id;
3424 unsigned long flags;
3425 u32 raw_tag;
3426
3427 if (interrupt_not_for_us(h))
3428 return IRQ_NONE;
3429 spin_lock_irqsave(&h->lock, flags);
3430 while (interrupt_pending(h)) {
3431 raw_tag = get_next_completion(h);
3432 while (raw_tag != FIFO_EMPTY) {
3433 if (cciss_tag_contains_index(raw_tag))
3434 raw_tag = process_indexed_cmd(h, raw_tag);
3435 else
3436 raw_tag = process_nonindexed_cmd(h, raw_tag);
3437 }
3438 }
3439 spin_unlock_irqrestore(&h->lock, flags);
3440 return IRQ_HANDLED;
3441 }
3442
3443 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3444 * check the interrupt pending register because it is not set.
3445 */
3446 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3447 {
3448 ctlr_info_t *h = dev_id;
3449 unsigned long flags;
3450 u32 raw_tag;
3451
3452 spin_lock_irqsave(&h->lock, flags);
3453 raw_tag = get_next_completion(h);
3454 while (raw_tag != FIFO_EMPTY) {
3455 if (cciss_tag_contains_index(raw_tag))
3456 raw_tag = process_indexed_cmd(h, raw_tag);
3457 else
3458 raw_tag = process_nonindexed_cmd(h, raw_tag);
3459 }
3460 spin_unlock_irqrestore(&h->lock, flags);
3461 return IRQ_HANDLED;
3462 }
3463
3464 /**
3465 * add_to_scan_list() - add controller to rescan queue
3466 * @h: Pointer to the controller.
3467 *
3468 * Adds the controller to the rescan queue if not already on the queue.
3469 *
3470 * returns 1 if added to the queue, 0 if skipped (could be on the
3471 * queue already, or the controller could be initializing or shutting
3472 * down).
3473 **/
3474 static int add_to_scan_list(struct ctlr_info *h)
3475 {
3476 struct ctlr_info *test_h;
3477 int found = 0;
3478 int ret = 0;
3479
3480 if (h->busy_initializing)
3481 return 0;
3482
3483 if (!mutex_trylock(&h->busy_shutting_down))
3484 return 0;
3485
3486 mutex_lock(&scan_mutex);
3487 list_for_each_entry(test_h, &scan_q, scan_list) {
3488 if (test_h == h) {
3489 found = 1;
3490 break;
3491 }
3492 }
3493 if (!found && !h->busy_scanning) {
3494 INIT_COMPLETION(h->scan_wait);
3495 list_add_tail(&h->scan_list, &scan_q);
3496 ret = 1;
3497 }
3498 mutex_unlock(&scan_mutex);
3499 mutex_unlock(&h->busy_shutting_down);
3500
3501 return ret;
3502 }
3503
3504 /**
3505 * remove_from_scan_list() - remove controller from rescan queue
3506 * @h: Pointer to the controller.
3507 *
3508 * Removes the controller from the rescan queue if present. Blocks if
3509 * the controller is currently conducting a rescan. The controller
3510 * can be in one of three states:
3511 * 1. Doesn't need a scan
3512 * 2. On the scan list, but not scanning yet (we remove it)
3513 * 3. Busy scanning (and not on the list). In this case we want to wait for
3514 * the scan to complete to make sure the scanning thread for this
3515 * controller is completely idle.
3516 **/
3517 static void remove_from_scan_list(struct ctlr_info *h)
3518 {
3519 struct ctlr_info *test_h, *tmp_h;
3520
3521 mutex_lock(&scan_mutex);
3522 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3523 if (test_h == h) { /* state 2. */
3524 list_del(&h->scan_list);
3525 complete_all(&h->scan_wait);
3526 mutex_unlock(&scan_mutex);
3527 return;
3528 }
3529 }
3530 if (h->busy_scanning) { /* state 3. */
3531 mutex_unlock(&scan_mutex);
3532 wait_for_completion(&h->scan_wait);
3533 } else { /* state 1, nothing to do. */
3534 mutex_unlock(&scan_mutex);
3535 }
3536 }
3537
3538 /**
3539 * scan_thread() - kernel thread used to rescan controllers
3540 * @data: Ignored.
3541 *
3542 * A kernel thread used scan for drive topology changes on
3543 * controllers. The thread processes only one controller at a time
3544 * using a queue. Controllers are added to the queue using
3545 * add_to_scan_list() and removed from the queue either after done
3546 * processing or using remove_from_scan_list().
3547 *
3548 * returns 0.
3549 **/
3550 static int scan_thread(void *data)
3551 {
3552 struct ctlr_info *h;
3553
3554 while (1) {
3555 set_current_state(TASK_INTERRUPTIBLE);
3556 schedule();
3557 if (kthread_should_stop())
3558 break;
3559
3560 while (1) {
3561 mutex_lock(&scan_mutex);
3562 if (list_empty(&scan_q)) {
3563 mutex_unlock(&scan_mutex);
3564 break;
3565 }
3566
3567 h = list_entry(scan_q.next,
3568 struct ctlr_info,
3569 scan_list);
3570 list_del(&h->scan_list);
3571 h->busy_scanning = 1;
3572 mutex_unlock(&scan_mutex);
3573
3574 rebuild_lun_table(h, 0, 0);
3575 complete_all(&h->scan_wait);
3576 mutex_lock(&scan_mutex);
3577 h->busy_scanning = 0;
3578 mutex_unlock(&scan_mutex);
3579 }
3580 }
3581
3582 return 0;
3583 }
3584
3585 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3586 {
3587 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3588 return 0;
3589
3590 switch (c->err_info->SenseInfo[12]) {
3591 case STATE_CHANGED:
3592 dev_warn(&h->pdev->dev, "a state change "
3593 "detected, command retried\n");
3594 return 1;
3595 break;
3596 case LUN_FAILED:
3597 dev_warn(&h->pdev->dev, "LUN failure "
3598 "detected, action required\n");
3599 return 1;
3600 break;
3601 case REPORT_LUNS_CHANGED:
3602 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3603 /*
3604 * Here, we could call add_to_scan_list and wake up the scan thread,
3605 * except that it's quite likely that we will get more than one
3606 * REPORT_LUNS_CHANGED condition in quick succession, which means
3607 * that those which occur after the first one will likely happen
3608 * *during* the scan_thread's rescan. And the rescan code is not
3609 * robust enough to restart in the middle, undoing what it has already
3610 * done, and it's not clear that it's even possible to do this, since
3611 * part of what it does is notify the block layer, which starts
3612 * doing it's own i/o to read partition tables and so on, and the
3613 * driver doesn't have visibility to know what might need undoing.
3614 * In any event, if possible, it is horribly complicated to get right
3615 * so we just don't do it for now.
3616 *
3617 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3618 */
3619 return 1;
3620 break;
3621 case POWER_OR_RESET:
3622 dev_warn(&h->pdev->dev,
3623 "a power on or device reset detected\n");
3624 return 1;
3625 break;
3626 case UNIT_ATTENTION_CLEARED:
3627 dev_warn(&h->pdev->dev,
3628 "unit attention cleared by another initiator\n");
3629 return 1;
3630 break;
3631 default:
3632 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3633 return 1;
3634 }
3635 }
3636
3637 /*
3638 * We cannot read the structure directly, for portability we must use
3639 * the io functions.
3640 * This is for debug only.
3641 */
3642 static void print_cfg_table(ctlr_info_t *h)
3643 {
3644 int i;
3645 char temp_name[17];
3646 CfgTable_struct *tb = h->cfgtable;
3647
3648 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3649 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3650 for (i = 0; i < 4; i++)
3651 temp_name[i] = readb(&(tb->Signature[i]));
3652 temp_name[4] = '\0';
3653 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3654 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3655 readl(&(tb->SpecValence)));
3656 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3657 readl(&(tb->TransportSupport)));
3658 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3659 readl(&(tb->TransportActive)));
3660 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3661 readl(&(tb->HostWrite.TransportRequest)));
3662 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3663 readl(&(tb->HostWrite.CoalIntDelay)));
3664 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3665 readl(&(tb->HostWrite.CoalIntCount)));
3666 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3667 readl(&(tb->CmdsOutMax)));
3668 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3669 readl(&(tb->BusTypes)));
3670 for (i = 0; i < 16; i++)
3671 temp_name[i] = readb(&(tb->ServerName[i]));
3672 temp_name[16] = '\0';
3673 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3674 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3675 readl(&(tb->HeartBeat)));
3676 }
3677
3678 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3679 {
3680 int i, offset, mem_type, bar_type;
3681 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3682 return 0;
3683 offset = 0;
3684 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3685 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3686 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3687 offset += 4;
3688 else {
3689 mem_type = pci_resource_flags(pdev, i) &
3690 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3691 switch (mem_type) {
3692 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3693 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3694 offset += 4; /* 32 bit */
3695 break;
3696 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3697 offset += 8;
3698 break;
3699 default: /* reserved in PCI 2.2 */
3700 dev_warn(&pdev->dev,
3701 "Base address is invalid\n");
3702 return -1;
3703 break;
3704 }
3705 }
3706 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3707 return i + 1;
3708 }
3709 return -1;
3710 }
3711
3712 /* Fill in bucket_map[], given nsgs (the max number of
3713 * scatter gather elements supported) and bucket[],
3714 * which is an array of 8 integers. The bucket[] array
3715 * contains 8 different DMA transfer sizes (in 16
3716 * byte increments) which the controller uses to fetch
3717 * commands. This function fills in bucket_map[], which
3718 * maps a given number of scatter gather elements to one of
3719 * the 8 DMA transfer sizes. The point of it is to allow the
3720 * controller to only do as much DMA as needed to fetch the
3721 * command, with the DMA transfer size encoded in the lower
3722 * bits of the command address.
3723 */
3724 static void calc_bucket_map(int bucket[], int num_buckets,
3725 int nsgs, int *bucket_map)
3726 {
3727 int i, j, b, size;
3728
3729 /* even a command with 0 SGs requires 4 blocks */
3730 #define MINIMUM_TRANSFER_BLOCKS 4
3731 #define NUM_BUCKETS 8
3732 /* Note, bucket_map must have nsgs+1 entries. */
3733 for (i = 0; i <= nsgs; i++) {
3734 /* Compute size of a command with i SG entries */
3735 size = i + MINIMUM_TRANSFER_BLOCKS;
3736 b = num_buckets; /* Assume the biggest bucket */
3737 /* Find the bucket that is just big enough */
3738 for (j = 0; j < 8; j++) {
3739 if (bucket[j] >= size) {
3740 b = j;
3741 break;
3742 }
3743 }
3744 /* for a command with i SG entries, use bucket b. */
3745 bucket_map[i] = b;
3746 }
3747 }
3748
3749 static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3750 {
3751 int i;
3752
3753 /* under certain very rare conditions, this can take awhile.
3754 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3755 * as we enter this code.) */
3756 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3757 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3758 break;
3759 usleep_range(10000, 20000);
3760 }
3761 }
3762
3763 static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3764 {
3765 /* This is a bit complicated. There are 8 registers on
3766 * the controller which we write to to tell it 8 different
3767 * sizes of commands which there may be. It's a way of
3768 * reducing the DMA done to fetch each command. Encoded into
3769 * each command's tag are 3 bits which communicate to the controller
3770 * which of the eight sizes that command fits within. The size of
3771 * each command depends on how many scatter gather entries there are.
3772 * Each SG entry requires 16 bytes. The eight registers are programmed
3773 * with the number of 16-byte blocks a command of that size requires.
3774 * The smallest command possible requires 5 such 16 byte blocks.
3775 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3776 * blocks. Note, this only extends to the SG entries contained
3777 * within the command block, and does not extend to chained blocks
3778 * of SG elements. bft[] contains the eight values we write to
3779 * the registers. They are not evenly distributed, but have more
3780 * sizes for small commands, and fewer sizes for larger commands.
3781 */
3782 __u32 trans_offset;
3783 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3784 /*
3785 * 5 = 1 s/g entry or 4k
3786 * 6 = 2 s/g entry or 8k
3787 * 8 = 4 s/g entry or 16k
3788 * 10 = 6 s/g entry or 24k
3789 */
3790 unsigned long register_value;
3791 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3792
3793 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3794
3795 /* Controller spec: zero out this buffer. */
3796 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3797 h->reply_pool_head = h->reply_pool;
3798
3799 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3800 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3801 h->blockFetchTable);
3802 writel(bft[0], &h->transtable->BlockFetch0);
3803 writel(bft[1], &h->transtable->BlockFetch1);
3804 writel(bft[2], &h->transtable->BlockFetch2);
3805 writel(bft[3], &h->transtable->BlockFetch3);
3806 writel(bft[4], &h->transtable->BlockFetch4);
3807 writel(bft[5], &h->transtable->BlockFetch5);
3808 writel(bft[6], &h->transtable->BlockFetch6);
3809 writel(bft[7], &h->transtable->BlockFetch7);
3810
3811 /* size of controller ring buffer */
3812 writel(h->max_commands, &h->transtable->RepQSize);
3813 writel(1, &h->transtable->RepQCount);
3814 writel(0, &h->transtable->RepQCtrAddrLow32);
3815 writel(0, &h->transtable->RepQCtrAddrHigh32);
3816 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3817 writel(0, &h->transtable->RepQAddr0High32);
3818 writel(CFGTBL_Trans_Performant,
3819 &(h->cfgtable->HostWrite.TransportRequest));
3820
3821 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3822 cciss_wait_for_mode_change_ack(h);
3823 register_value = readl(&(h->cfgtable->TransportActive));
3824 if (!(register_value & CFGTBL_Trans_Performant))
3825 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
3826 " performant mode\n");
3827 }
3828
3829 static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3830 {
3831 __u32 trans_support;
3832
3833 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3834 /* Attempt to put controller into performant mode if supported */
3835 /* Does board support performant mode? */
3836 trans_support = readl(&(h->cfgtable->TransportSupport));
3837 if (!(trans_support & PERFORMANT_MODE))
3838 return;
3839
3840 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
3841 /* Performant mode demands commands on a 32 byte boundary
3842 * pci_alloc_consistent aligns on page boundarys already.
3843 * Just need to check if divisible by 32
3844 */
3845 if ((sizeof(CommandList_struct) % 32) != 0) {
3846 dev_warn(&h->pdev->dev, "%s %d %s\n",
3847 "cciss info: command size[",
3848 (int)sizeof(CommandList_struct),
3849 "] not divisible by 32, no performant mode..\n");
3850 return;
3851 }
3852
3853 /* Performant mode ring buffer and supporting data structures */
3854 h->reply_pool = (__u64 *)pci_alloc_consistent(
3855 h->pdev, h->max_commands * sizeof(__u64),
3856 &(h->reply_pool_dhandle));
3857
3858 /* Need a block fetch table for performant mode */
3859 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3860 sizeof(__u32)), GFP_KERNEL);
3861
3862 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3863 goto clean_up;
3864
3865 cciss_enter_performant_mode(h);
3866
3867 /* Change the access methods to the performant access methods */
3868 h->access = SA5_performant_access;
3869 h->transMethod = CFGTBL_Trans_Performant;
3870
3871 return;
3872 clean_up:
3873 kfree(h->blockFetchTable);
3874 if (h->reply_pool)
3875 pci_free_consistent(h->pdev,
3876 h->max_commands * sizeof(__u64),
3877 h->reply_pool,
3878 h->reply_pool_dhandle);
3879 return;
3880
3881 } /* cciss_put_controller_into_performant_mode */
3882
3883 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3884 * controllers that are capable. If not, we use IO-APIC mode.
3885 */
3886
3887 static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
3888 {
3889 #ifdef CONFIG_PCI_MSI
3890 int err;
3891 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3892 {0, 2}, {0, 3}
3893 };
3894
3895 /* Some boards advertise MSI but don't really support it */
3896 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3897 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3898 goto default_int_mode;
3899
3900 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3901 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
3902 if (!err) {
3903 h->intr[0] = cciss_msix_entries[0].vector;
3904 h->intr[1] = cciss_msix_entries[1].vector;
3905 h->intr[2] = cciss_msix_entries[2].vector;
3906 h->intr[3] = cciss_msix_entries[3].vector;
3907 h->msix_vector = 1;
3908 return;
3909 }
3910 if (err > 0) {
3911 dev_warn(&h->pdev->dev,
3912 "only %d MSI-X vectors available\n", err);
3913 goto default_int_mode;
3914 } else {
3915 dev_warn(&h->pdev->dev,
3916 "MSI-X init failed %d\n", err);
3917 goto default_int_mode;
3918 }
3919 }
3920 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3921 if (!pci_enable_msi(h->pdev))
3922 h->msi_vector = 1;
3923 else
3924 dev_warn(&h->pdev->dev, "MSI init failed\n");
3925 }
3926 default_int_mode:
3927 #endif /* CONFIG_PCI_MSI */
3928 /* if we get here we're going to use the default interrupt mode */
3929 h->intr[PERF_MODE_INT] = h->pdev->irq;
3930 return;
3931 }
3932
3933 static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3934 {
3935 int i;
3936 u32 subsystem_vendor_id, subsystem_device_id;
3937
3938 subsystem_vendor_id = pdev->subsystem_vendor;
3939 subsystem_device_id = pdev->subsystem_device;
3940 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3941 subsystem_vendor_id;
3942
3943 for (i = 0; i < ARRAY_SIZE(products); i++)
3944 if (*board_id == products[i].board_id)
3945 return i;
3946 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3947 *board_id);
3948 return -ENODEV;
3949 }
3950
3951 static inline bool cciss_board_disabled(ctlr_info_t *h)
3952 {
3953 u16 command;
3954
3955 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
3956 return ((command & PCI_COMMAND_MEMORY) == 0);
3957 }
3958
3959 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
3960 unsigned long *memory_bar)
3961 {
3962 int i;
3963
3964 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3965 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3966 /* addressing mode bits already removed */
3967 *memory_bar = pci_resource_start(pdev, i);
3968 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3969 *memory_bar);
3970 return 0;
3971 }
3972 dev_warn(&pdev->dev, "no memory BAR found\n");
3973 return -ENODEV;
3974 }
3975
3976 static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
3977 void __iomem *vaddr, int wait_for_ready)
3978 #define BOARD_READY 1
3979 #define BOARD_NOT_READY 0
3980 {
3981 int i, iterations;
3982 u32 scratchpad;
3983
3984 if (wait_for_ready)
3985 iterations = CCISS_BOARD_READY_ITERATIONS;
3986 else
3987 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
3988
3989 for (i = 0; i < iterations; i++) {
3990 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3991 if (wait_for_ready) {
3992 if (scratchpad == CCISS_FIRMWARE_READY)
3993 return 0;
3994 } else {
3995 if (scratchpad != CCISS_FIRMWARE_READY)
3996 return 0;
3997 }
3998 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
3999 }
4000 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4001 return -ENODEV;
4002 }
4003
4004 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4005 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4006 u64 *cfg_offset)
4007 {
4008 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4009 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4010 *cfg_base_addr &= (u32) 0x0000ffff;
4011 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4012 if (*cfg_base_addr_index == -1) {
4013 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4014 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4015 return -ENODEV;
4016 }
4017 return 0;
4018 }
4019
4020 static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4021 {
4022 u64 cfg_offset;
4023 u32 cfg_base_addr;
4024 u64 cfg_base_addr_index;
4025 u32 trans_offset;
4026 int rc;
4027
4028 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4029 &cfg_base_addr_index, &cfg_offset);
4030 if (rc)
4031 return rc;
4032 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4033 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4034 if (!h->cfgtable)
4035 return -ENOMEM;
4036 /* Find performant mode table. */
4037 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4038 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4039 cfg_base_addr_index)+cfg_offset+trans_offset,
4040 sizeof(*h->transtable));
4041 if (!h->transtable)
4042 return -ENOMEM;
4043 return 0;
4044 }
4045
4046 static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4047 {
4048 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4049
4050 /* Limit commands in memory limited kdump scenario. */
4051 if (reset_devices && h->max_commands > 32)
4052 h->max_commands = 32;
4053
4054 if (h->max_commands < 16) {
4055 dev_warn(&h->pdev->dev, "Controller reports "
4056 "max supported commands of %d, an obvious lie. "
4057 "Using 16. Ensure that firmware is up to date.\n",
4058 h->max_commands);
4059 h->max_commands = 16;
4060 }
4061 }
4062
4063 /* Interrogate the hardware for some limits:
4064 * max commands, max SG elements without chaining, and with chaining,
4065 * SG chain block size, etc.
4066 */
4067 static void __devinit cciss_find_board_params(ctlr_info_t *h)
4068 {
4069 cciss_get_max_perf_mode_cmds(h);
4070 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4071 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4072 /*
4073 * Limit in-command s/g elements to 32 save dma'able memory.
4074 * Howvever spec says if 0, use 31
4075 */
4076 h->max_cmd_sgentries = 31;
4077 if (h->maxsgentries > 512) {
4078 h->max_cmd_sgentries = 32;
4079 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4080 h->maxsgentries--; /* save one for chain pointer */
4081 } else {
4082 h->maxsgentries = 31; /* default to traditional values */
4083 h->chainsize = 0;
4084 }
4085 }
4086
4087 static inline bool CISS_signature_present(ctlr_info_t *h)
4088 {
4089 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4090 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4091 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4092 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4093 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4094 return false;
4095 }
4096 return true;
4097 }
4098
4099 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4100 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4101 {
4102 #ifdef CONFIG_X86
4103 u32 prefetch;
4104
4105 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4106 prefetch |= 0x100;
4107 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4108 #endif
4109 }
4110
4111 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4112 * in a prefetch beyond physical memory.
4113 */
4114 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4115 {
4116 u32 dma_prefetch;
4117 __u32 dma_refetch;
4118
4119 if (h->board_id != 0x3225103C)
4120 return;
4121 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4122 dma_prefetch |= 0x8000;
4123 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4124 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4125 dma_refetch |= 0x1;
4126 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4127 }
4128
4129 static int __devinit cciss_pci_init(ctlr_info_t *h)
4130 {
4131 int prod_index, err;
4132
4133 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4134 if (prod_index < 0)
4135 return -ENODEV;
4136 h->product_name = products[prod_index].product_name;
4137 h->access = *(products[prod_index].access);
4138
4139 if (cciss_board_disabled(h)) {
4140 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4141 return -ENODEV;
4142 }
4143 err = pci_enable_device(h->pdev);
4144 if (err) {
4145 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4146 return err;
4147 }
4148
4149 err = pci_request_regions(h->pdev, "cciss");
4150 if (err) {
4151 dev_warn(&h->pdev->dev,
4152 "Cannot obtain PCI resources, aborting\n");
4153 return err;
4154 }
4155
4156 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4157 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4158
4159 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4160 * else we use the IO-APIC interrupt assigned to us by system ROM.
4161 */
4162 cciss_interrupt_mode(h);
4163 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4164 if (err)
4165 goto err_out_free_res;
4166 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4167 if (!h->vaddr) {
4168 err = -ENOMEM;
4169 goto err_out_free_res;
4170 }
4171 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4172 if (err)
4173 goto err_out_free_res;
4174 err = cciss_find_cfgtables(h);
4175 if (err)
4176 goto err_out_free_res;
4177 print_cfg_table(h);
4178 cciss_find_board_params(h);
4179
4180 if (!CISS_signature_present(h)) {
4181 err = -ENODEV;
4182 goto err_out_free_res;
4183 }
4184 cciss_enable_scsi_prefetch(h);
4185 cciss_p600_dma_prefetch_quirk(h);
4186 cciss_put_controller_into_performant_mode(h);
4187 return 0;
4188
4189 err_out_free_res:
4190 /*
4191 * Deliberately omit pci_disable_device(): it does something nasty to
4192 * Smart Array controllers that pci_enable_device does not undo
4193 */
4194 if (h->transtable)
4195 iounmap(h->transtable);
4196 if (h->cfgtable)
4197 iounmap(h->cfgtable);
4198 if (h->vaddr)
4199 iounmap(h->vaddr);
4200 pci_release_regions(h->pdev);
4201 return err;
4202 }
4203
4204 /* Function to find the first free pointer into our hba[] array
4205 * Returns -1 if no free entries are left.
4206 */
4207 static int alloc_cciss_hba(struct pci_dev *pdev)
4208 {
4209 int i;
4210
4211 for (i = 0; i < MAX_CTLR; i++) {
4212 if (!hba[i]) {
4213 ctlr_info_t *h;
4214
4215 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4216 if (!h)
4217 goto Enomem;
4218 hba[i] = h;
4219 return i;
4220 }
4221 }
4222 dev_warn(&pdev->dev, "This driver supports a maximum"
4223 " of %d controllers.\n", MAX_CTLR);
4224 return -1;
4225 Enomem:
4226 dev_warn(&pdev->dev, "out of memory.\n");
4227 return -1;
4228 }
4229
4230 static void free_hba(ctlr_info_t *h)
4231 {
4232 int i;
4233
4234 hba[h->ctlr] = NULL;
4235 for (i = 0; i < h->highest_lun + 1; i++)
4236 if (h->gendisk[i] != NULL)
4237 put_disk(h->gendisk[i]);
4238 kfree(h);
4239 }
4240
4241 /* Send a message CDB to the firmware. */
4242 static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4243 {
4244 typedef struct {
4245 CommandListHeader_struct CommandHeader;
4246 RequestBlock_struct Request;
4247 ErrDescriptor_struct ErrorDescriptor;
4248 } Command;
4249 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4250 Command *cmd;
4251 dma_addr_t paddr64;
4252 uint32_t paddr32, tag;
4253 void __iomem *vaddr;
4254 int i, err;
4255
4256 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4257 if (vaddr == NULL)
4258 return -ENOMEM;
4259
4260 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4261 CCISS commands, so they must be allocated from the lower 4GiB of
4262 memory. */
4263 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4264 if (err) {
4265 iounmap(vaddr);
4266 return -ENOMEM;
4267 }
4268
4269 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4270 if (cmd == NULL) {
4271 iounmap(vaddr);
4272 return -ENOMEM;
4273 }
4274
4275 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4276 although there's no guarantee, we assume that the address is at
4277 least 4-byte aligned (most likely, it's page-aligned). */
4278 paddr32 = paddr64;
4279
4280 cmd->CommandHeader.ReplyQueue = 0;
4281 cmd->CommandHeader.SGList = 0;
4282 cmd->CommandHeader.SGTotal = 0;
4283 cmd->CommandHeader.Tag.lower = paddr32;
4284 cmd->CommandHeader.Tag.upper = 0;
4285 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4286
4287 cmd->Request.CDBLen = 16;
4288 cmd->Request.Type.Type = TYPE_MSG;
4289 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4290 cmd->Request.Type.Direction = XFER_NONE;
4291 cmd->Request.Timeout = 0; /* Don't time out */
4292 cmd->Request.CDB[0] = opcode;
4293 cmd->Request.CDB[1] = type;
4294 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4295
4296 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4297 cmd->ErrorDescriptor.Addr.upper = 0;
4298 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4299
4300 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4301
4302 for (i = 0; i < 10; i++) {
4303 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4304 if ((tag & ~3) == paddr32)
4305 break;
4306 schedule_timeout_uninterruptible(HZ);
4307 }
4308
4309 iounmap(vaddr);
4310
4311 /* we leak the DMA buffer here ... no choice since the controller could
4312 still complete the command. */
4313 if (i == 10) {
4314 dev_err(&pdev->dev,
4315 "controller message %02x:%02x timed out\n",
4316 opcode, type);
4317 return -ETIMEDOUT;
4318 }
4319
4320 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4321
4322 if (tag & 2) {
4323 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4324 opcode, type);
4325 return -EIO;
4326 }
4327
4328 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4329 opcode, type);
4330 return 0;
4331 }
4332
4333 #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4334 #define cciss_noop(p) cciss_message(p, 3, 0)
4335
4336 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4337 void * __iomem vaddr, bool use_doorbell)
4338 {
4339 u16 pmcsr;
4340 int pos;
4341
4342 if (use_doorbell) {
4343 /* For everything after the P600, the PCI power state method
4344 * of resetting the controller doesn't work, so we have this
4345 * other way using the doorbell register.
4346 */
4347 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4348 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4349 msleep(1000);
4350 } else { /* Try to do it the PCI power state way */
4351
4352 /* Quoting from the Open CISS Specification: "The Power
4353 * Management Control/Status Register (CSR) controls the power
4354 * state of the device. The normal operating state is D0,
4355 * CSR=00h. The software off state is D3, CSR=03h. To reset
4356 * the controller, place the interface device in D3 then to D0,
4357 * this causes a secondary PCI reset which will reset the
4358 * controller." */
4359
4360 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4361 if (pos == 0) {
4362 dev_err(&pdev->dev,
4363 "cciss_controller_hard_reset: "
4364 "PCI PM not supported\n");
4365 return -ENODEV;
4366 }
4367 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4368 /* enter the D3hot power management state */
4369 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4370 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4371 pmcsr |= PCI_D3hot;
4372 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4373
4374 msleep(500);
4375
4376 /* enter the D0 power management state */
4377 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4378 pmcsr |= PCI_D0;
4379 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4380
4381 msleep(500);
4382 }
4383 return 0;
4384 }
4385
4386 /* This does a hard reset of the controller using PCI power management
4387 * states or using the doorbell register. */
4388 static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4389 {
4390 u64 cfg_offset;
4391 u32 cfg_base_addr;
4392 u64 cfg_base_addr_index;
4393 void __iomem *vaddr;
4394 unsigned long paddr;
4395 u32 misc_fw_support, active_transport;
4396 int rc;
4397 CfgTable_struct __iomem *cfgtable;
4398 bool use_doorbell;
4399 u32 board_id;
4400 u16 command_register;
4401
4402 /* For controllers as old a the p600, this is very nearly
4403 * the same thing as
4404 *
4405 * pci_save_state(pci_dev);
4406 * pci_set_power_state(pci_dev, PCI_D3hot);
4407 * pci_set_power_state(pci_dev, PCI_D0);
4408 * pci_restore_state(pci_dev);
4409 *
4410 * For controllers newer than the P600, the pci power state
4411 * method of resetting doesn't work so we have another way
4412 * using the doorbell register.
4413 */
4414
4415 /* Exclude 640x boards. These are two pci devices in one slot
4416 * which share a battery backed cache module. One controls the
4417 * cache, the other accesses the cache through the one that controls
4418 * it. If we reset the one controlling the cache, the other will
4419 * likely not be happy. Just forbid resetting this conjoined mess.
4420 */
4421 cciss_lookup_board_id(pdev, &board_id);
4422 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4423 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4424 "due to shared cache module.");
4425 return -ENODEV;
4426 }
4427
4428 /* Save the PCI command register */
4429 pci_read_config_word(pdev, 4, &command_register);
4430 /* Turn the board off. This is so that later pci_restore_state()
4431 * won't turn the board on before the rest of config space is ready.
4432 */
4433 pci_disable_device(pdev);
4434 pci_save_state(pdev);
4435
4436 /* find the first memory BAR, so we can find the cfg table */
4437 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4438 if (rc)
4439 return rc;
4440 vaddr = remap_pci_mem(paddr, 0x250);
4441 if (!vaddr)
4442 return -ENOMEM;
4443
4444 /* find cfgtable in order to check if reset via doorbell is supported */
4445 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4446 &cfg_base_addr_index, &cfg_offset);
4447 if (rc)
4448 goto unmap_vaddr;
4449 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4450 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4451 if (!cfgtable) {
4452 rc = -ENOMEM;
4453 goto unmap_vaddr;
4454 }
4455
4456 /* If reset via doorbell register is supported, use that. */
4457 misc_fw_support = readl(&cfgtable->misc_fw_support);
4458 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4459
4460 /* The doorbell reset seems to cause lockups on some Smart
4461 * Arrays (e.g. P410, P410i, maybe others). Until this is
4462 * fixed or at least isolated, avoid the doorbell reset.
4463 */
4464 use_doorbell = 0;
4465
4466 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4467 if (rc)
4468 goto unmap_cfgtable;
4469 pci_restore_state(pdev);
4470 rc = pci_enable_device(pdev);
4471 if (rc) {
4472 dev_warn(&pdev->dev, "failed to enable device.\n");
4473 goto unmap_cfgtable;
4474 }
4475 pci_write_config_word(pdev, 4, command_register);
4476
4477 /* Some devices (notably the HP Smart Array 5i Controller)
4478 need a little pause here */
4479 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4480
4481 /* Wait for board to become not ready, then ready. */
4482 dev_info(&pdev->dev, "Waiting for board to become ready.\n");
4483 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4484 if (rc) /* Don't bail, might be E500, etc. which can't be reset */
4485 dev_warn(&pdev->dev,
4486 "failed waiting for board to become not ready\n");
4487 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4488 if (rc) {
4489 dev_warn(&pdev->dev,
4490 "failed waiting for board to become ready\n");
4491 goto unmap_cfgtable;
4492 }
4493 dev_info(&pdev->dev, "board ready.\n");
4494
4495 /* Controller should be in simple mode at this point. If it's not,
4496 * It means we're on one of those controllers which doesn't support
4497 * the doorbell reset method and on which the PCI power management reset
4498 * method doesn't work (P800, for example.)
4499 * In those cases, don't try to proceed, as it generally doesn't work.
4500 */
4501 active_transport = readl(&cfgtable->TransportActive);
4502 if (active_transport & PERFORMANT_MODE) {
4503 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4504 " Ignoring controller.\n");
4505 rc = -ENODEV;
4506 }
4507
4508 unmap_cfgtable:
4509 iounmap(cfgtable);
4510
4511 unmap_vaddr:
4512 iounmap(vaddr);
4513 return rc;
4514 }
4515
4516 static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4517 {
4518 int rc, i;
4519
4520 if (!reset_devices)
4521 return 0;
4522
4523 /* Reset the controller with a PCI power-cycle or via doorbell */
4524 rc = cciss_kdump_hard_reset_controller(pdev);
4525
4526 /* -ENOTSUPP here means we cannot reset the controller
4527 * but it's already (and still) up and running in
4528 * "performant mode". Or, it might be 640x, which can't reset
4529 * due to concerns about shared bbwc between 6402/6404 pair.
4530 */
4531 if (rc == -ENOTSUPP)
4532 return 0; /* just try to do the kdump anyhow. */
4533 if (rc)
4534 return -ENODEV;
4535
4536 /* Now try to get the controller to respond to a no-op */
4537 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4538 if (cciss_noop(pdev) == 0)
4539 break;
4540 else
4541 dev_warn(&pdev->dev, "no-op failed%s\n",
4542 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4543 "; re-trying" : ""));
4544 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4545 }
4546 return 0;
4547 }
4548
4549 /*
4550 * This is it. Find all the controllers and register them. I really hate
4551 * stealing all these major device numbers.
4552 * returns the number of block devices registered.
4553 */
4554 static int __devinit cciss_init_one(struct pci_dev *pdev,
4555 const struct pci_device_id *ent)
4556 {
4557 int i;
4558 int j = 0;
4559 int k = 0;
4560 int rc;
4561 int dac, return_code;
4562 InquiryData_struct *inq_buff;
4563 ctlr_info_t *h;
4564
4565 rc = cciss_init_reset_devices(pdev);
4566 if (rc)
4567 return rc;
4568 i = alloc_cciss_hba(pdev);
4569 if (i < 0)
4570 return -1;
4571
4572 h = hba[i];
4573 h->pdev = pdev;
4574 h->busy_initializing = 1;
4575 INIT_HLIST_HEAD(&h->cmpQ);
4576 INIT_HLIST_HEAD(&h->reqQ);
4577 mutex_init(&h->busy_shutting_down);
4578
4579 if (cciss_pci_init(h) != 0)
4580 goto clean_no_release_regions;
4581
4582 sprintf(h->devname, "cciss%d", i);
4583 h->ctlr = i;
4584
4585 init_completion(&h->scan_wait);
4586
4587 if (cciss_create_hba_sysfs_entry(h))
4588 goto clean0;
4589
4590 /* configure PCI DMA stuff */
4591 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
4592 dac = 1;
4593 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
4594 dac = 0;
4595 else {
4596 dev_err(&h->pdev->dev, "no suitable DMA available\n");
4597 goto clean1;
4598 }
4599
4600 /*
4601 * register with the major number, or get a dynamic major number
4602 * by passing 0 as argument. This is done for greater than
4603 * 8 controller support.
4604 */
4605 if (i < MAX_CTLR_ORIG)
4606 h->major = COMPAQ_CISS_MAJOR + i;
4607 rc = register_blkdev(h->major, h->devname);
4608 if (rc == -EBUSY || rc == -EINVAL) {
4609 dev_err(&h->pdev->dev,
4610 "Unable to get major number %d for %s "
4611 "on hba %d\n", h->major, h->devname, i);
4612 goto clean1;
4613 } else {
4614 if (i >= MAX_CTLR_ORIG)
4615 h->major = rc;
4616 }
4617
4618 /* make sure the board interrupts are off */
4619 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4620 if (h->msi_vector || h->msix_vector) {
4621 if (request_irq(h->intr[PERF_MODE_INT],
4622 do_cciss_msix_intr,
4623 IRQF_DISABLED, h->devname, h)) {
4624 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4625 h->intr[PERF_MODE_INT], h->devname);
4626 goto clean2;
4627 }
4628 } else {
4629 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4630 IRQF_DISABLED, h->devname, h)) {
4631 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4632 h->intr[PERF_MODE_INT], h->devname);
4633 goto clean2;
4634 }
4635 }
4636
4637 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
4638 h->devname, pdev->device, pci_name(pdev),
4639 h->intr[PERF_MODE_INT], dac ? "" : " not");
4640
4641 h->cmd_pool_bits =
4642 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4643 * sizeof(unsigned long), GFP_KERNEL);
4644 h->cmd_pool = (CommandList_struct *)
4645 pci_alloc_consistent(h->pdev,
4646 h->nr_cmds * sizeof(CommandList_struct),
4647 &(h->cmd_pool_dhandle));
4648 h->errinfo_pool = (ErrorInfo_struct *)
4649 pci_alloc_consistent(h->pdev,
4650 h->nr_cmds * sizeof(ErrorInfo_struct),
4651 &(h->errinfo_pool_dhandle));
4652 if ((h->cmd_pool_bits == NULL)
4653 || (h->cmd_pool == NULL)
4654 || (h->errinfo_pool == NULL)) {
4655 dev_err(&h->pdev->dev, "out of memory");
4656 goto clean4;
4657 }
4658
4659 /* Need space for temp scatter list */
4660 h->scatter_list = kmalloc(h->max_commands *
4661 sizeof(struct scatterlist *),
4662 GFP_KERNEL);
4663 if (!h->scatter_list)
4664 goto clean4;
4665
4666 for (k = 0; k < h->nr_cmds; k++) {
4667 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4668 h->maxsgentries,
4669 GFP_KERNEL);
4670 if (h->scatter_list[k] == NULL) {
4671 dev_err(&h->pdev->dev,
4672 "could not allocate s/g lists\n");
4673 goto clean4;
4674 }
4675 }
4676 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4677 h->chainsize, h->nr_cmds);
4678 if (!h->cmd_sg_list && h->chainsize > 0)
4679 goto clean4;
4680
4681 spin_lock_init(&h->lock);
4682
4683 /* Initialize the pdev driver private data.
4684 have it point to h. */
4685 pci_set_drvdata(pdev, h);
4686 /* command and error info recs zeroed out before
4687 they are used */
4688 memset(h->cmd_pool_bits, 0,
4689 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4690 * sizeof(unsigned long));
4691
4692 h->num_luns = 0;
4693 h->highest_lun = -1;
4694 for (j = 0; j < CISS_MAX_LUN; j++) {
4695 h->drv[j] = NULL;
4696 h->gendisk[j] = NULL;
4697 }
4698
4699 cciss_scsi_setup(h);
4700
4701 /* Turn the interrupts on so we can service requests */
4702 h->access.set_intr_mask(h, CCISS_INTR_ON);
4703
4704 /* Get the firmware version */
4705 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4706 if (inq_buff == NULL) {
4707 dev_err(&h->pdev->dev, "out of memory\n");
4708 goto clean4;
4709 }
4710
4711 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
4712 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
4713 if (return_code == IO_OK) {
4714 h->firm_ver[0] = inq_buff->data_byte[32];
4715 h->firm_ver[1] = inq_buff->data_byte[33];
4716 h->firm_ver[2] = inq_buff->data_byte[34];
4717 h->firm_ver[3] = inq_buff->data_byte[35];
4718 } else { /* send command failed */
4719 dev_warn(&h->pdev->dev, "unable to determine firmware"
4720 " version of controller\n");
4721 }
4722 kfree(inq_buff);
4723
4724 cciss_procinit(h);
4725
4726 h->cciss_max_sectors = 8192;
4727
4728 rebuild_lun_table(h, 1, 0);
4729 h->busy_initializing = 0;
4730 return 1;
4731
4732 clean4:
4733 kfree(h->cmd_pool_bits);
4734 /* Free up sg elements */
4735 for (k-- ; k >= 0; k--)
4736 kfree(h->scatter_list[k]);
4737 kfree(h->scatter_list);
4738 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4739 if (h->cmd_pool)
4740 pci_free_consistent(h->pdev,
4741 h->nr_cmds * sizeof(CommandList_struct),
4742 h->cmd_pool, h->cmd_pool_dhandle);
4743 if (h->errinfo_pool)
4744 pci_free_consistent(h->pdev,
4745 h->nr_cmds * sizeof(ErrorInfo_struct),
4746 h->errinfo_pool,
4747 h->errinfo_pool_dhandle);
4748 free_irq(h->intr[PERF_MODE_INT], h);
4749 clean2:
4750 unregister_blkdev(h->major, h->devname);
4751 clean1:
4752 cciss_destroy_hba_sysfs_entry(h);
4753 clean0:
4754 pci_release_regions(pdev);
4755 clean_no_release_regions:
4756 h->busy_initializing = 0;
4757
4758 /*
4759 * Deliberately omit pci_disable_device(): it does something nasty to
4760 * Smart Array controllers that pci_enable_device does not undo
4761 */
4762 pci_set_drvdata(pdev, NULL);
4763 free_hba(h);
4764 return -1;
4765 }
4766
4767 static void cciss_shutdown(struct pci_dev *pdev)
4768 {
4769 ctlr_info_t *h;
4770 char *flush_buf;
4771 int return_code;
4772
4773 h = pci_get_drvdata(pdev);
4774 flush_buf = kzalloc(4, GFP_KERNEL);
4775 if (!flush_buf) {
4776 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
4777 return;
4778 }
4779 /* write all data in the battery backed cache to disk */
4780 memset(flush_buf, 0, 4);
4781 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
4782 4, 0, CTLR_LUNID, TYPE_CMD);
4783 kfree(flush_buf);
4784 if (return_code != IO_OK)
4785 dev_warn(&h->pdev->dev, "Error flushing cache\n");
4786 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4787 free_irq(h->intr[PERF_MODE_INT], h);
4788 }
4789
4790 static void __devexit cciss_remove_one(struct pci_dev *pdev)
4791 {
4792 ctlr_info_t *h;
4793 int i, j;
4794
4795 if (pci_get_drvdata(pdev) == NULL) {
4796 dev_err(&pdev->dev, "Unable to remove device\n");
4797 return;
4798 }
4799
4800 h = pci_get_drvdata(pdev);
4801 i = h->ctlr;
4802 if (hba[i] == NULL) {
4803 dev_err(&pdev->dev, "device appears to already be removed\n");
4804 return;
4805 }
4806
4807 mutex_lock(&h->busy_shutting_down);
4808
4809 remove_from_scan_list(h);
4810 remove_proc_entry(h->devname, proc_cciss);
4811 unregister_blkdev(h->major, h->devname);
4812
4813 /* remove it from the disk list */
4814 for (j = 0; j < CISS_MAX_LUN; j++) {
4815 struct gendisk *disk = h->gendisk[j];
4816 if (disk) {
4817 struct request_queue *q = disk->queue;
4818
4819 if (disk->flags & GENHD_FL_UP) {
4820 cciss_destroy_ld_sysfs_entry(h, j, 1);
4821 del_gendisk(disk);
4822 }
4823 if (q)
4824 blk_cleanup_queue(q);
4825 }
4826 }
4827
4828 #ifdef CONFIG_CISS_SCSI_TAPE
4829 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
4830 #endif
4831
4832 cciss_shutdown(pdev);
4833
4834 #ifdef CONFIG_PCI_MSI
4835 if (h->msix_vector)
4836 pci_disable_msix(h->pdev);
4837 else if (h->msi_vector)
4838 pci_disable_msi(h->pdev);
4839 #endif /* CONFIG_PCI_MSI */
4840
4841 iounmap(h->transtable);
4842 iounmap(h->cfgtable);
4843 iounmap(h->vaddr);
4844
4845 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4846 h->cmd_pool, h->cmd_pool_dhandle);
4847 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4848 h->errinfo_pool, h->errinfo_pool_dhandle);
4849 kfree(h->cmd_pool_bits);
4850 /* Free up sg elements */
4851 for (j = 0; j < h->nr_cmds; j++)
4852 kfree(h->scatter_list[j]);
4853 kfree(h->scatter_list);
4854 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4855 /*
4856 * Deliberately omit pci_disable_device(): it does something nasty to
4857 * Smart Array controllers that pci_enable_device does not undo
4858 */
4859 pci_release_regions(pdev);
4860 pci_set_drvdata(pdev, NULL);
4861 cciss_destroy_hba_sysfs_entry(h);
4862 mutex_unlock(&h->busy_shutting_down);
4863 free_hba(h);
4864 }
4865
4866 static struct pci_driver cciss_pci_driver = {
4867 .name = "cciss",
4868 .probe = cciss_init_one,
4869 .remove = __devexit_p(cciss_remove_one),
4870 .id_table = cciss_pci_device_id, /* id_table */
4871 .shutdown = cciss_shutdown,
4872 };
4873
4874 /*
4875 * This is it. Register the PCI driver information for the cards we control
4876 * the OS will call our registered routines when it finds one of our cards.
4877 */
4878 static int __init cciss_init(void)
4879 {
4880 int err;
4881
4882 /*
4883 * The hardware requires that commands are aligned on a 64-bit
4884 * boundary. Given that we use pci_alloc_consistent() to allocate an
4885 * array of them, the size must be a multiple of 8 bytes.
4886 */
4887 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
4888 printk(KERN_INFO DRIVER_NAME "\n");
4889
4890 err = bus_register(&cciss_bus_type);
4891 if (err)
4892 return err;
4893
4894 /* Start the scan thread */
4895 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4896 if (IS_ERR(cciss_scan_thread)) {
4897 err = PTR_ERR(cciss_scan_thread);
4898 goto err_bus_unregister;
4899 }
4900
4901 /* Register for our PCI devices */
4902 err = pci_register_driver(&cciss_pci_driver);
4903 if (err)
4904 goto err_thread_stop;
4905
4906 return err;
4907
4908 err_thread_stop:
4909 kthread_stop(cciss_scan_thread);
4910 err_bus_unregister:
4911 bus_unregister(&cciss_bus_type);
4912
4913 return err;
4914 }
4915
4916 static void __exit cciss_cleanup(void)
4917 {
4918 int i;
4919
4920 pci_unregister_driver(&cciss_pci_driver);
4921 /* double check that all controller entrys have been removed */
4922 for (i = 0; i < MAX_CTLR; i++) {
4923 if (hba[i] != NULL) {
4924 dev_warn(&hba[i]->pdev->dev,
4925 "had to remove controller\n");
4926 cciss_remove_one(hba[i]->pdev);
4927 }
4928 }
4929 kthread_stop(cciss_scan_thread);
4930 if (proc_cciss)
4931 remove_proc_entry("driver/cciss", NULL);
4932 bus_unregister(&cciss_bus_type);
4933 }
4934
4935 module_init(cciss_init);
4936 module_exit(cciss_cleanup);