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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / atm / nicstar.c
1 /******************************************************************************
2 *
3 * nicstar.c
4 *
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
6 *
7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
8 * It was taken from the frle-0.22 device driver.
9 * As the file doesn't have a copyright notice, in the file
10 * nicstarmac.copyright I put the copyright notice from the
11 * frle-0.22 device driver.
12 * Some code is based on the nicstar driver by M. Welsh.
13 *
14 * Author: Rui Prior (rprior@inescn.pt)
15 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
16 *
17 *
18 * (C) INESC 1999
19 *
20 *
21 ******************************************************************************/
22
23
24 /**** IMPORTANT INFORMATION ***************************************************
25 *
26 * There are currently three types of spinlocks:
27 *
28 * 1 - Per card interrupt spinlock (to protect structures and such)
29 * 2 - Per SCQ scq spinlock
30 * 3 - Per card resource spinlock (to access registers, etc.)
31 *
32 * These must NEVER be grabbed in reverse order.
33 *
34 ******************************************************************************/
35
36 /* Header files ***************************************************************/
37
38 #include <linux/module.h>
39 #include <linux/kernel.h>
40 #include <linux/skbuff.h>
41 #include <linux/atmdev.h>
42 #include <linux/atm.h>
43 #include <linux/pci.h>
44 #include <linux/types.h>
45 #include <linux/string.h>
46 #include <linux/delay.h>
47 #include <linux/init.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/interrupt.h>
51 #include <linux/bitops.h>
52 #include <asm/io.h>
53 #include <asm/uaccess.h>
54 #include <asm/atomic.h>
55 #include "nicstar.h"
56 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
57 #include "suni.h"
58 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
59 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
60 #include "idt77105.h"
61 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
62
63 #if BITS_PER_LONG != 32
64 # error FIXME: this driver requires a 32-bit platform
65 #endif
66
67 /* Additional code ************************************************************/
68
69 #include "nicstarmac.c"
70
71
72 /* Configurable parameters ****************************************************/
73
74 #undef PHY_LOOPBACK
75 #undef TX_DEBUG
76 #undef RX_DEBUG
77 #undef GENERAL_DEBUG
78 #undef EXTRA_DEBUG
79
80 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
81 you're going to use only raw ATM */
82
83
84 /* Do not touch these *********************************************************/
85
86 #ifdef TX_DEBUG
87 #define TXPRINTK(args...) printk(args)
88 #else
89 #define TXPRINTK(args...)
90 #endif /* TX_DEBUG */
91
92 #ifdef RX_DEBUG
93 #define RXPRINTK(args...) printk(args)
94 #else
95 #define RXPRINTK(args...)
96 #endif /* RX_DEBUG */
97
98 #ifdef GENERAL_DEBUG
99 #define PRINTK(args...) printk(args)
100 #else
101 #define PRINTK(args...)
102 #endif /* GENERAL_DEBUG */
103
104 #ifdef EXTRA_DEBUG
105 #define XPRINTK(args...) printk(args)
106 #else
107 #define XPRINTK(args...)
108 #endif /* EXTRA_DEBUG */
109
110
111 /* Macros *********************************************************************/
112
113 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
114
115 #define NS_DELAY mdelay(1)
116
117 #define ALIGN_BUS_ADDR(addr, alignment) \
118 ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
119 #define ALIGN_ADDRESS(addr, alignment) \
120 bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
121
122 #undef CEIL
123
124 #ifndef ATM_SKB
125 #define ATM_SKB(s) (&(s)->atm)
126 #endif
127
128 /* Spinlock debugging stuff */
129 #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
130 #define ns_grab_int_lock(card,flags) \
131 do { \
132 unsigned long nsdsf, nsdsf2; \
133 local_irq_save(flags); \
134 save_flags(nsdsf); cli();\
135 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
136 (flags)&(1<<9)?"en":"dis"); \
137 if (spin_is_locked(&(card)->int_lock) && \
138 (card)->cpu_int == smp_processor_id()) { \
139 printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
140 __LINE__, smp_processor_id(), (card)->has_int_lock, \
141 (card)->cpu_int); \
142 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
143 } \
144 if (spin_is_locked(&(card)->res_lock) && \
145 (card)->cpu_res == smp_processor_id()) { \
146 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
147 __LINE__, smp_processor_id(), (card)->has_res_lock, \
148 (card)->cpu_res); \
149 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
150 } \
151 spin_lock_irq(&(card)->int_lock); \
152 (card)->has_int_lock = __LINE__; \
153 (card)->cpu_int = smp_processor_id(); \
154 restore_flags(nsdsf); } while (0)
155 #define ns_grab_res_lock(card,flags) \
156 do { \
157 unsigned long nsdsf, nsdsf2; \
158 local_irq_save(flags); \
159 save_flags(nsdsf); cli();\
160 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
161 (flags)&(1<<9)?"en":"dis"); \
162 if (spin_is_locked(&(card)->res_lock) && \
163 (card)->cpu_res == smp_processor_id()) { \
164 printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
165 __LINE__, smp_processor_id(), (card)->has_res_lock, \
166 (card)->cpu_res); \
167 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
168 } \
169 spin_lock_irq(&(card)->res_lock); \
170 (card)->has_res_lock = __LINE__; \
171 (card)->cpu_res = smp_processor_id(); \
172 restore_flags(nsdsf); } while (0)
173 #define ns_grab_scq_lock(card,scq,flags) \
174 do { \
175 unsigned long nsdsf, nsdsf2; \
176 local_irq_save(flags); \
177 save_flags(nsdsf); cli();\
178 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
179 (flags)&(1<<9)?"en":"dis"); \
180 if (spin_is_locked(&(scq)->lock) && \
181 (scq)->cpu_lock == smp_processor_id()) { \
182 printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
183 __LINE__, smp_processor_id(), (scq)->has_lock, \
184 (scq)->cpu_lock); \
185 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
186 } \
187 if (spin_is_locked(&(card)->res_lock) && \
188 (card)->cpu_res == smp_processor_id()) { \
189 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
190 __LINE__, smp_processor_id(), (card)->has_res_lock, \
191 (card)->cpu_res); \
192 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
193 } \
194 spin_lock_irq(&(scq)->lock); \
195 (scq)->has_lock = __LINE__; \
196 (scq)->cpu_lock = smp_processor_id(); \
197 restore_flags(nsdsf); } while (0)
198 #else /* !NS_DEBUG_SPINLOCKS */
199 #define ns_grab_int_lock(card,flags) \
200 spin_lock_irqsave(&(card)->int_lock,(flags))
201 #define ns_grab_res_lock(card,flags) \
202 spin_lock_irqsave(&(card)->res_lock,(flags))
203 #define ns_grab_scq_lock(card,scq,flags) \
204 spin_lock_irqsave(&(scq)->lock,flags)
205 #endif /* NS_DEBUG_SPINLOCKS */
206
207
208 /* Function declarations ******************************************************/
209
210 static u32 ns_read_sram(ns_dev *card, u32 sram_address);
211 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
212 static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
213 static void __devinit ns_init_card_error(ns_dev *card, int error);
214 static scq_info *get_scq(int size, u32 scd);
215 static void free_scq(scq_info *scq, struct atm_vcc *vcc);
216 static void push_rxbufs(ns_dev *, struct sk_buff *);
217 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
218 static int ns_open(struct atm_vcc *vcc);
219 static void ns_close(struct atm_vcc *vcc);
220 static void fill_tst(ns_dev *card, int n, vc_map *vc);
221 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
222 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
223 struct sk_buff *skb);
224 static void process_tsq(ns_dev *card);
225 static void drain_scq(ns_dev *card, scq_info *scq, int pos);
226 static void process_rsq(ns_dev *card);
227 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
228 #ifdef NS_USE_DESTRUCTORS
229 static void ns_sb_destructor(struct sk_buff *sb);
230 static void ns_lb_destructor(struct sk_buff *lb);
231 static void ns_hb_destructor(struct sk_buff *hb);
232 #endif /* NS_USE_DESTRUCTORS */
233 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
234 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
235 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
236 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
237 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
238 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
239 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
240 static void which_list(ns_dev *card, struct sk_buff *skb);
241 static void ns_poll(unsigned long arg);
242 static int ns_parse_mac(char *mac, unsigned char *esi);
243 static short ns_h2i(char c);
244 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
245 unsigned long addr);
246 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
247
248
249
250 /* Global variables ***********************************************************/
251
252 static struct ns_dev *cards[NS_MAX_CARDS];
253 static unsigned num_cards;
254 static struct atmdev_ops atm_ops =
255 {
256 .open = ns_open,
257 .close = ns_close,
258 .ioctl = ns_ioctl,
259 .send = ns_send,
260 .phy_put = ns_phy_put,
261 .phy_get = ns_phy_get,
262 .proc_read = ns_proc_read,
263 .owner = THIS_MODULE,
264 };
265 static struct timer_list ns_timer;
266 static char *mac[NS_MAX_CARDS];
267 module_param_array(mac, charp, NULL, 0);
268 MODULE_LICENSE("GPL");
269
270
271 /* Functions*******************************************************************/
272
273 static int __devinit nicstar_init_one(struct pci_dev *pcidev,
274 const struct pci_device_id *ent)
275 {
276 static int index = -1;
277 unsigned int error;
278
279 index++;
280 cards[index] = NULL;
281
282 error = ns_init_card(index, pcidev);
283 if (error) {
284 cards[index--] = NULL; /* don't increment index */
285 goto err_out;
286 }
287
288 return 0;
289 err_out:
290 return -ENODEV;
291 }
292
293
294
295 static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
296 {
297 int i, j;
298 ns_dev *card = pci_get_drvdata(pcidev);
299 struct sk_buff *hb;
300 struct sk_buff *iovb;
301 struct sk_buff *lb;
302 struct sk_buff *sb;
303
304 i = card->index;
305
306 if (cards[i] == NULL)
307 return;
308
309 if (card->atmdev->phy && card->atmdev->phy->stop)
310 card->atmdev->phy->stop(card->atmdev);
311
312 /* Stop everything */
313 writel(0x00000000, card->membase + CFG);
314
315 /* De-register device */
316 atm_dev_deregister(card->atmdev);
317
318 /* Disable PCI device */
319 pci_disable_device(pcidev);
320
321 /* Free up resources */
322 j = 0;
323 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
324 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
325 {
326 dev_kfree_skb_any(hb);
327 j++;
328 }
329 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
330 j = 0;
331 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
332 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
333 {
334 dev_kfree_skb_any(iovb);
335 j++;
336 }
337 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
338 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
339 dev_kfree_skb_any(lb);
340 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
341 dev_kfree_skb_any(sb);
342 free_scq(card->scq0, NULL);
343 for (j = 0; j < NS_FRSCD_NUM; j++)
344 {
345 if (card->scd2vc[j] != NULL)
346 free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
347 }
348 kfree(card->rsq.org);
349 kfree(card->tsq.org);
350 free_irq(card->pcidev->irq, card);
351 iounmap(card->membase);
352 kfree(card);
353 }
354
355
356
357 static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
358 {
359 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
360 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
361 {0,} /* terminate list */
362 };
363 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
364
365
366
367 static struct pci_driver nicstar_driver = {
368 .name = "nicstar",
369 .id_table = nicstar_pci_tbl,
370 .probe = nicstar_init_one,
371 .remove = __devexit_p(nicstar_remove_one),
372 };
373
374
375
376 static int __init nicstar_init(void)
377 {
378 unsigned error = 0; /* Initialized to remove compile warning */
379
380 XPRINTK("nicstar: nicstar_init() called.\n");
381
382 error = pci_register_driver(&nicstar_driver);
383
384 TXPRINTK("nicstar: TX debug enabled.\n");
385 RXPRINTK("nicstar: RX debug enabled.\n");
386 PRINTK("nicstar: General debug enabled.\n");
387 #ifdef PHY_LOOPBACK
388 printk("nicstar: using PHY loopback.\n");
389 #endif /* PHY_LOOPBACK */
390 XPRINTK("nicstar: nicstar_init() returned.\n");
391
392 if (!error) {
393 init_timer(&ns_timer);
394 ns_timer.expires = jiffies + NS_POLL_PERIOD;
395 ns_timer.data = 0UL;
396 ns_timer.function = ns_poll;
397 add_timer(&ns_timer);
398 }
399
400 return error;
401 }
402
403
404
405 static void __exit nicstar_cleanup(void)
406 {
407 XPRINTK("nicstar: nicstar_cleanup() called.\n");
408
409 del_timer(&ns_timer);
410
411 pci_unregister_driver(&nicstar_driver);
412
413 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
414 }
415
416
417
418 static u32 ns_read_sram(ns_dev *card, u32 sram_address)
419 {
420 unsigned long flags;
421 u32 data;
422 sram_address <<= 2;
423 sram_address &= 0x0007FFFC; /* address must be dword aligned */
424 sram_address |= 0x50000000; /* SRAM read command */
425 ns_grab_res_lock(card, flags);
426 while (CMD_BUSY(card));
427 writel(sram_address, card->membase + CMD);
428 while (CMD_BUSY(card));
429 data = readl(card->membase + DR0);
430 spin_unlock_irqrestore(&card->res_lock, flags);
431 return data;
432 }
433
434
435
436 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
437 {
438 unsigned long flags;
439 int i, c;
440 count--; /* count range now is 0..3 instead of 1..4 */
441 c = count;
442 c <<= 2; /* to use increments of 4 */
443 ns_grab_res_lock(card, flags);
444 while (CMD_BUSY(card));
445 for (i = 0; i <= c; i += 4)
446 writel(*(value++), card->membase + i);
447 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
448 so card->membase + DR0 == card->membase */
449 sram_address <<= 2;
450 sram_address &= 0x0007FFFC;
451 sram_address |= (0x40000000 | count);
452 writel(sram_address, card->membase + CMD);
453 spin_unlock_irqrestore(&card->res_lock, flags);
454 }
455
456
457 static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
458 {
459 int j;
460 struct ns_dev *card = NULL;
461 unsigned char pci_latency;
462 unsigned error;
463 u32 data;
464 u32 u32d[4];
465 u32 ns_cfg_rctsize;
466 int bcount;
467 unsigned long membase;
468
469 error = 0;
470
471 if (pci_enable_device(pcidev))
472 {
473 printk("nicstar%d: can't enable PCI device\n", i);
474 error = 2;
475 ns_init_card_error(card, error);
476 return error;
477 }
478
479 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
480 {
481 printk("nicstar%d: can't allocate memory for device structure.\n", i);
482 error = 2;
483 ns_init_card_error(card, error);
484 return error;
485 }
486 cards[i] = card;
487 spin_lock_init(&card->int_lock);
488 spin_lock_init(&card->res_lock);
489
490 pci_set_drvdata(pcidev, card);
491
492 card->index = i;
493 card->atmdev = NULL;
494 card->pcidev = pcidev;
495 membase = pci_resource_start(pcidev, 1);
496 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
497 if (card->membase == 0)
498 {
499 printk("nicstar%d: can't ioremap() membase.\n",i);
500 error = 3;
501 ns_init_card_error(card, error);
502 return error;
503 }
504 PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
505
506 pci_set_master(pcidev);
507
508 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
509 {
510 printk("nicstar%d: can't read PCI latency timer.\n", i);
511 error = 6;
512 ns_init_card_error(card, error);
513 return error;
514 }
515 #ifdef NS_PCI_LATENCY
516 if (pci_latency < NS_PCI_LATENCY)
517 {
518 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
519 for (j = 1; j < 4; j++)
520 {
521 if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
522 break;
523 }
524 if (j == 4)
525 {
526 printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
527 error = 7;
528 ns_init_card_error(card, error);
529 return error;
530 }
531 }
532 #endif /* NS_PCI_LATENCY */
533
534 /* Clear timer overflow */
535 data = readl(card->membase + STAT);
536 if (data & NS_STAT_TMROF)
537 writel(NS_STAT_TMROF, card->membase + STAT);
538
539 /* Software reset */
540 writel(NS_CFG_SWRST, card->membase + CFG);
541 NS_DELAY;
542 writel(0x00000000, card->membase + CFG);
543
544 /* PHY reset */
545 writel(0x00000008, card->membase + GP);
546 NS_DELAY;
547 writel(0x00000001, card->membase + GP);
548 NS_DELAY;
549 while (CMD_BUSY(card));
550 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
551 NS_DELAY;
552
553 /* Detect PHY type */
554 while (CMD_BUSY(card));
555 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
556 while (CMD_BUSY(card));
557 data = readl(card->membase + DR0);
558 switch(data) {
559 case 0x00000009:
560 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
561 card->max_pcr = ATM_25_PCR;
562 while(CMD_BUSY(card));
563 writel(0x00000008, card->membase + DR0);
564 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
565 /* Clear an eventual pending interrupt */
566 writel(NS_STAT_SFBQF, card->membase + STAT);
567 #ifdef PHY_LOOPBACK
568 while(CMD_BUSY(card));
569 writel(0x00000022, card->membase + DR0);
570 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
571 #endif /* PHY_LOOPBACK */
572 break;
573 case 0x00000030:
574 case 0x00000031:
575 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
576 card->max_pcr = ATM_OC3_PCR;
577 #ifdef PHY_LOOPBACK
578 while(CMD_BUSY(card));
579 writel(0x00000002, card->membase + DR0);
580 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
581 #endif /* PHY_LOOPBACK */
582 break;
583 default:
584 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
585 error = 8;
586 ns_init_card_error(card, error);
587 return error;
588 }
589 writel(0x00000000, card->membase + GP);
590
591 /* Determine SRAM size */
592 data = 0x76543210;
593 ns_write_sram(card, 0x1C003, &data, 1);
594 data = 0x89ABCDEF;
595 ns_write_sram(card, 0x14003, &data, 1);
596 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
597 ns_read_sram(card, 0x1C003) == 0x76543210)
598 card->sram_size = 128;
599 else
600 card->sram_size = 32;
601 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
602
603 card->rct_size = NS_MAX_RCTSIZE;
604
605 #if (NS_MAX_RCTSIZE == 4096)
606 if (card->sram_size == 128)
607 printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
608 #elif (NS_MAX_RCTSIZE == 16384)
609 if (card->sram_size == 32)
610 {
611 printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
612 card->rct_size = 4096;
613 }
614 #else
615 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
616 #endif
617
618 card->vpibits = NS_VPIBITS;
619 if (card->rct_size == 4096)
620 card->vcibits = 12 - NS_VPIBITS;
621 else /* card->rct_size == 16384 */
622 card->vcibits = 14 - NS_VPIBITS;
623
624 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
625 if (mac[i] == NULL)
626 nicstar_init_eprom(card->membase);
627
628 if (request_irq(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED, "nicstar", card) != 0)
629 {
630 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
631 error = 9;
632 ns_init_card_error(card, error);
633 return error;
634 }
635
636 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
637 writel(0x00000000, card->membase + VPM);
638
639 /* Initialize TSQ */
640 card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
641 if (card->tsq.org == NULL)
642 {
643 printk("nicstar%d: can't allocate TSQ.\n", i);
644 error = 10;
645 ns_init_card_error(card, error);
646 return error;
647 }
648 card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
649 card->tsq.next = card->tsq.base;
650 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
651 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
652 ns_tsi_init(card->tsq.base + j);
653 writel(0x00000000, card->membase + TSQH);
654 writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
655 PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
656 (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
657
658 /* Initialize RSQ */
659 card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
660 if (card->rsq.org == NULL)
661 {
662 printk("nicstar%d: can't allocate RSQ.\n", i);
663 error = 11;
664 ns_init_card_error(card, error);
665 return error;
666 }
667 card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
668 card->rsq.next = card->rsq.base;
669 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
670 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
671 ns_rsqe_init(card->rsq.base + j);
672 writel(0x00000000, card->membase + RSQH);
673 writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
674 PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
675
676 /* Initialize SCQ0, the only VBR SCQ used */
677 card->scq1 = NULL;
678 card->scq2 = NULL;
679 card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
680 if (card->scq0 == NULL)
681 {
682 printk("nicstar%d: can't get SCQ0.\n", i);
683 error = 12;
684 ns_init_card_error(card, error);
685 return error;
686 }
687 u32d[0] = (u32) virt_to_bus(card->scq0->base);
688 u32d[1] = (u32) 0x00000000;
689 u32d[2] = (u32) 0xffffffff;
690 u32d[3] = (u32) 0x00000000;
691 ns_write_sram(card, NS_VRSCD0, u32d, 4);
692 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
693 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
694 card->scq0->scd = NS_VRSCD0;
695 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
696
697 /* Initialize TSTs */
698 card->tst_addr = NS_TST0;
699 card->tst_free_entries = NS_TST_NUM_ENTRIES;
700 data = NS_TST_OPCODE_VARIABLE;
701 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
702 ns_write_sram(card, NS_TST0 + j, &data, 1);
703 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
704 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
705 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
706 ns_write_sram(card, NS_TST1 + j, &data, 1);
707 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
708 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
709 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
710 card->tste2vc[j] = NULL;
711 writel(NS_TST0 << 2, card->membase + TSTB);
712
713
714 /* Initialize RCT. AAL type is set on opening the VC. */
715 #ifdef RCQ_SUPPORT
716 u32d[0] = NS_RCTE_RAWCELLINTEN;
717 #else
718 u32d[0] = 0x00000000;
719 #endif /* RCQ_SUPPORT */
720 u32d[1] = 0x00000000;
721 u32d[2] = 0x00000000;
722 u32d[3] = 0xFFFFFFFF;
723 for (j = 0; j < card->rct_size; j++)
724 ns_write_sram(card, j * 4, u32d, 4);
725
726 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
727
728 for (j = 0; j < NS_FRSCD_NUM; j++)
729 card->scd2vc[j] = NULL;
730
731 /* Initialize buffer levels */
732 card->sbnr.min = MIN_SB;
733 card->sbnr.init = NUM_SB;
734 card->sbnr.max = MAX_SB;
735 card->lbnr.min = MIN_LB;
736 card->lbnr.init = NUM_LB;
737 card->lbnr.max = MAX_LB;
738 card->iovnr.min = MIN_IOVB;
739 card->iovnr.init = NUM_IOVB;
740 card->iovnr.max = MAX_IOVB;
741 card->hbnr.min = MIN_HB;
742 card->hbnr.init = NUM_HB;
743 card->hbnr.max = MAX_HB;
744
745 card->sm_handle = 0x00000000;
746 card->sm_addr = 0x00000000;
747 card->lg_handle = 0x00000000;
748 card->lg_addr = 0x00000000;
749
750 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
751
752 /* Pre-allocate some huge buffers */
753 skb_queue_head_init(&card->hbpool.queue);
754 card->hbpool.count = 0;
755 for (j = 0; j < NUM_HB; j++)
756 {
757 struct sk_buff *hb;
758 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
759 if (hb == NULL)
760 {
761 printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
762 i, j, NUM_HB);
763 error = 13;
764 ns_init_card_error(card, error);
765 return error;
766 }
767 NS_SKB_CB(hb)->buf_type = BUF_NONE;
768 skb_queue_tail(&card->hbpool.queue, hb);
769 card->hbpool.count++;
770 }
771
772
773 /* Allocate large buffers */
774 skb_queue_head_init(&card->lbpool.queue);
775 card->lbpool.count = 0; /* Not used */
776 for (j = 0; j < NUM_LB; j++)
777 {
778 struct sk_buff *lb;
779 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
780 if (lb == NULL)
781 {
782 printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
783 i, j, NUM_LB);
784 error = 14;
785 ns_init_card_error(card, error);
786 return error;
787 }
788 NS_SKB_CB(lb)->buf_type = BUF_LG;
789 skb_queue_tail(&card->lbpool.queue, lb);
790 skb_reserve(lb, NS_SMBUFSIZE);
791 push_rxbufs(card, lb);
792 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
793 if (j == 1)
794 {
795 card->rcbuf = lb;
796 card->rawch = (u32) virt_to_bus(lb->data);
797 }
798 }
799 /* Test for strange behaviour which leads to crashes */
800 if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
801 {
802 printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
803 i, j, bcount);
804 error = 14;
805 ns_init_card_error(card, error);
806 return error;
807 }
808
809
810 /* Allocate small buffers */
811 skb_queue_head_init(&card->sbpool.queue);
812 card->sbpool.count = 0; /* Not used */
813 for (j = 0; j < NUM_SB; j++)
814 {
815 struct sk_buff *sb;
816 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
817 if (sb == NULL)
818 {
819 printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
820 i, j, NUM_SB);
821 error = 15;
822 ns_init_card_error(card, error);
823 return error;
824 }
825 NS_SKB_CB(sb)->buf_type = BUF_SM;
826 skb_queue_tail(&card->sbpool.queue, sb);
827 skb_reserve(sb, NS_AAL0_HEADER);
828 push_rxbufs(card, sb);
829 }
830 /* Test for strange behaviour which leads to crashes */
831 if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
832 {
833 printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
834 i, j, bcount);
835 error = 15;
836 ns_init_card_error(card, error);
837 return error;
838 }
839
840
841 /* Allocate iovec buffers */
842 skb_queue_head_init(&card->iovpool.queue);
843 card->iovpool.count = 0;
844 for (j = 0; j < NUM_IOVB; j++)
845 {
846 struct sk_buff *iovb;
847 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
848 if (iovb == NULL)
849 {
850 printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
851 i, j, NUM_IOVB);
852 error = 16;
853 ns_init_card_error(card, error);
854 return error;
855 }
856 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
857 skb_queue_tail(&card->iovpool.queue, iovb);
858 card->iovpool.count++;
859 }
860
861 card->intcnt = 0;
862
863 /* Configure NICStAR */
864 if (card->rct_size == 4096)
865 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
866 else /* (card->rct_size == 16384) */
867 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
868
869 card->efbie = 1;
870
871 /* Register device */
872 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
873 if (card->atmdev == NULL)
874 {
875 printk("nicstar%d: can't register device.\n", i);
876 error = 17;
877 ns_init_card_error(card, error);
878 return error;
879 }
880
881 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
882 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
883 card->atmdev->esi, 6);
884 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
885 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
886 card->atmdev->esi, 6);
887 }
888 }
889
890 printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
891 card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
892 card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
893
894 card->atmdev->dev_data = card;
895 card->atmdev->ci_range.vpi_bits = card->vpibits;
896 card->atmdev->ci_range.vci_bits = card->vcibits;
897 card->atmdev->link_rate = card->max_pcr;
898 card->atmdev->phy = NULL;
899
900 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
901 if (card->max_pcr == ATM_OC3_PCR)
902 suni_init(card->atmdev);
903 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
904
905 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
906 if (card->max_pcr == ATM_25_PCR)
907 idt77105_init(card->atmdev);
908 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
909
910 if (card->atmdev->phy && card->atmdev->phy->start)
911 card->atmdev->phy->start(card->atmdev);
912
913 writel(NS_CFG_RXPATH |
914 NS_CFG_SMBUFSIZE |
915 NS_CFG_LGBUFSIZE |
916 NS_CFG_EFBIE |
917 NS_CFG_RSQSIZE |
918 NS_CFG_VPIBITS |
919 ns_cfg_rctsize |
920 NS_CFG_RXINT_NODELAY |
921 NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
922 NS_CFG_RSQAFIE |
923 NS_CFG_TXEN |
924 NS_CFG_TXIE |
925 NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
926 NS_CFG_PHYIE,
927 card->membase + CFG);
928
929 num_cards++;
930
931 return error;
932 }
933
934
935
936 static void __devinit ns_init_card_error(ns_dev *card, int error)
937 {
938 if (error >= 17)
939 {
940 writel(0x00000000, card->membase + CFG);
941 }
942 if (error >= 16)
943 {
944 struct sk_buff *iovb;
945 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
946 dev_kfree_skb_any(iovb);
947 }
948 if (error >= 15)
949 {
950 struct sk_buff *sb;
951 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
952 dev_kfree_skb_any(sb);
953 free_scq(card->scq0, NULL);
954 }
955 if (error >= 14)
956 {
957 struct sk_buff *lb;
958 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
959 dev_kfree_skb_any(lb);
960 }
961 if (error >= 13)
962 {
963 struct sk_buff *hb;
964 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
965 dev_kfree_skb_any(hb);
966 }
967 if (error >= 12)
968 {
969 kfree(card->rsq.org);
970 }
971 if (error >= 11)
972 {
973 kfree(card->tsq.org);
974 }
975 if (error >= 10)
976 {
977 free_irq(card->pcidev->irq, card);
978 }
979 if (error >= 4)
980 {
981 iounmap(card->membase);
982 }
983 if (error >= 3)
984 {
985 pci_disable_device(card->pcidev);
986 kfree(card);
987 }
988 }
989
990
991
992 static scq_info *get_scq(int size, u32 scd)
993 {
994 scq_info *scq;
995 int i;
996
997 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
998 return NULL;
999
1000 scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
1001 if (scq == NULL)
1002 return NULL;
1003 scq->org = kmalloc(2 * size, GFP_KERNEL);
1004 if (scq->org == NULL)
1005 {
1006 kfree(scq);
1007 return NULL;
1008 }
1009 scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
1010 (size / NS_SCQE_SIZE), GFP_KERNEL);
1011 if (scq->skb == NULL)
1012 {
1013 kfree(scq->org);
1014 kfree(scq);
1015 return NULL;
1016 }
1017 scq->num_entries = size / NS_SCQE_SIZE;
1018 scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
1019 scq->next = scq->base;
1020 scq->last = scq->base + (scq->num_entries - 1);
1021 scq->tail = scq->last;
1022 scq->scd = scd;
1023 scq->num_entries = size / NS_SCQE_SIZE;
1024 scq->tbd_count = 0;
1025 init_waitqueue_head(&scq->scqfull_waitq);
1026 scq->full = 0;
1027 spin_lock_init(&scq->lock);
1028
1029 for (i = 0; i < scq->num_entries; i++)
1030 scq->skb[i] = NULL;
1031
1032 return scq;
1033 }
1034
1035
1036
1037 /* For variable rate SCQ vcc must be NULL */
1038 static void free_scq(scq_info *scq, struct atm_vcc *vcc)
1039 {
1040 int i;
1041
1042 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1043 for (i = 0; i < scq->num_entries; i++)
1044 {
1045 if (scq->skb[i] != NULL)
1046 {
1047 vcc = ATM_SKB(scq->skb[i])->vcc;
1048 if (vcc->pop != NULL)
1049 vcc->pop(vcc, scq->skb[i]);
1050 else
1051 dev_kfree_skb_any(scq->skb[i]);
1052 }
1053 }
1054 else /* vcc must be != NULL */
1055 {
1056 if (vcc == NULL)
1057 {
1058 printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
1059 for (i = 0; i < scq->num_entries; i++)
1060 dev_kfree_skb_any(scq->skb[i]);
1061 }
1062 else
1063 for (i = 0; i < scq->num_entries; i++)
1064 {
1065 if (scq->skb[i] != NULL)
1066 {
1067 if (vcc->pop != NULL)
1068 vcc->pop(vcc, scq->skb[i]);
1069 else
1070 dev_kfree_skb_any(scq->skb[i]);
1071 }
1072 }
1073 }
1074 kfree(scq->skb);
1075 kfree(scq->org);
1076 kfree(scq);
1077 }
1078
1079
1080
1081 /* The handles passed must be pointers to the sk_buff containing the small
1082 or large buffer(s) cast to u32. */
1083 static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
1084 {
1085 struct ns_skb_cb *cb = NS_SKB_CB(skb);
1086 u32 handle1, addr1;
1087 u32 handle2, addr2;
1088 u32 stat;
1089 unsigned long flags;
1090
1091 /* *BARF* */
1092 handle2 = addr2 = 0;
1093 handle1 = (u32)skb;
1094 addr1 = (u32)virt_to_bus(skb->data);
1095
1096 #ifdef GENERAL_DEBUG
1097 if (!addr1)
1098 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
1099 #endif /* GENERAL_DEBUG */
1100
1101 stat = readl(card->membase + STAT);
1102 card->sbfqc = ns_stat_sfbqc_get(stat);
1103 card->lbfqc = ns_stat_lfbqc_get(stat);
1104 if (cb->buf_type == BUF_SM)
1105 {
1106 if (!addr2)
1107 {
1108 if (card->sm_addr)
1109 {
1110 addr2 = card->sm_addr;
1111 handle2 = card->sm_handle;
1112 card->sm_addr = 0x00000000;
1113 card->sm_handle = 0x00000000;
1114 }
1115 else /* (!sm_addr) */
1116 {
1117 card->sm_addr = addr1;
1118 card->sm_handle = handle1;
1119 }
1120 }
1121 }
1122 else /* buf_type == BUF_LG */
1123 {
1124 if (!addr2)
1125 {
1126 if (card->lg_addr)
1127 {
1128 addr2 = card->lg_addr;
1129 handle2 = card->lg_handle;
1130 card->lg_addr = 0x00000000;
1131 card->lg_handle = 0x00000000;
1132 }
1133 else /* (!lg_addr) */
1134 {
1135 card->lg_addr = addr1;
1136 card->lg_handle = handle1;
1137 }
1138 }
1139 }
1140
1141 if (addr2)
1142 {
1143 if (cb->buf_type == BUF_SM)
1144 {
1145 if (card->sbfqc >= card->sbnr.max)
1146 {
1147 skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
1148 dev_kfree_skb_any((struct sk_buff *) handle1);
1149 skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
1150 dev_kfree_skb_any((struct sk_buff *) handle2);
1151 return;
1152 }
1153 else
1154 card->sbfqc += 2;
1155 }
1156 else /* (buf_type == BUF_LG) */
1157 {
1158 if (card->lbfqc >= card->lbnr.max)
1159 {
1160 skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
1161 dev_kfree_skb_any((struct sk_buff *) handle1);
1162 skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
1163 dev_kfree_skb_any((struct sk_buff *) handle2);
1164 return;
1165 }
1166 else
1167 card->lbfqc += 2;
1168 }
1169
1170 ns_grab_res_lock(card, flags);
1171
1172 while (CMD_BUSY(card));
1173 writel(addr2, card->membase + DR3);
1174 writel(handle2, card->membase + DR2);
1175 writel(addr1, card->membase + DR1);
1176 writel(handle1, card->membase + DR0);
1177 writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
1178
1179 spin_unlock_irqrestore(&card->res_lock, flags);
1180
1181 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
1182 (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
1183 }
1184
1185 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1186 card->lbfqc >= card->lbnr.min)
1187 {
1188 card->efbie = 1;
1189 writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
1190 }
1191
1192 return;
1193 }
1194
1195
1196
1197 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1198 {
1199 u32 stat_r;
1200 ns_dev *card;
1201 struct atm_dev *dev;
1202 unsigned long flags;
1203
1204 card = (ns_dev *) dev_id;
1205 dev = card->atmdev;
1206 card->intcnt++;
1207
1208 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1209
1210 ns_grab_int_lock(card, flags);
1211
1212 stat_r = readl(card->membase + STAT);
1213
1214 /* Transmit Status Indicator has been written to T. S. Queue */
1215 if (stat_r & NS_STAT_TSIF)
1216 {
1217 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1218 process_tsq(card);
1219 writel(NS_STAT_TSIF, card->membase + STAT);
1220 }
1221
1222 /* Incomplete CS-PDU has been transmitted */
1223 if (stat_r & NS_STAT_TXICP)
1224 {
1225 writel(NS_STAT_TXICP, card->membase + STAT);
1226 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1227 card->index);
1228 }
1229
1230 /* Transmit Status Queue 7/8 full */
1231 if (stat_r & NS_STAT_TSQF)
1232 {
1233 writel(NS_STAT_TSQF, card->membase + STAT);
1234 PRINTK("nicstar%d: TSQ full.\n", card->index);
1235 process_tsq(card);
1236 }
1237
1238 /* Timer overflow */
1239 if (stat_r & NS_STAT_TMROF)
1240 {
1241 writel(NS_STAT_TMROF, card->membase + STAT);
1242 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1243 }
1244
1245 /* PHY device interrupt signal active */
1246 if (stat_r & NS_STAT_PHYI)
1247 {
1248 writel(NS_STAT_PHYI, card->membase + STAT);
1249 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1250 if (dev->phy && dev->phy->interrupt) {
1251 dev->phy->interrupt(dev);
1252 }
1253 }
1254
1255 /* Small Buffer Queue is full */
1256 if (stat_r & NS_STAT_SFBQF)
1257 {
1258 writel(NS_STAT_SFBQF, card->membase + STAT);
1259 printk("nicstar%d: Small free buffer queue is full.\n", card->index);
1260 }
1261
1262 /* Large Buffer Queue is full */
1263 if (stat_r & NS_STAT_LFBQF)
1264 {
1265 writel(NS_STAT_LFBQF, card->membase + STAT);
1266 printk("nicstar%d: Large free buffer queue is full.\n", card->index);
1267 }
1268
1269 /* Receive Status Queue is full */
1270 if (stat_r & NS_STAT_RSQF)
1271 {
1272 writel(NS_STAT_RSQF, card->membase + STAT);
1273 printk("nicstar%d: RSQ full.\n", card->index);
1274 process_rsq(card);
1275 }
1276
1277 /* Complete CS-PDU received */
1278 if (stat_r & NS_STAT_EOPDU)
1279 {
1280 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1281 process_rsq(card);
1282 writel(NS_STAT_EOPDU, card->membase + STAT);
1283 }
1284
1285 /* Raw cell received */
1286 if (stat_r & NS_STAT_RAWCF)
1287 {
1288 writel(NS_STAT_RAWCF, card->membase + STAT);
1289 #ifndef RCQ_SUPPORT
1290 printk("nicstar%d: Raw cell received and no support yet...\n",
1291 card->index);
1292 #endif /* RCQ_SUPPORT */
1293 /* NOTE: the following procedure may keep a raw cell pending until the
1294 next interrupt. As this preliminary support is only meant to
1295 avoid buffer leakage, this is not an issue. */
1296 while (readl(card->membase + RAWCT) != card->rawch)
1297 {
1298 ns_rcqe *rawcell;
1299
1300 rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
1301 if (ns_rcqe_islast(rawcell))
1302 {
1303 struct sk_buff *oldbuf;
1304
1305 oldbuf = card->rcbuf;
1306 card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
1307 card->rawch = (u32) virt_to_bus(card->rcbuf->data);
1308 recycle_rx_buf(card, oldbuf);
1309 }
1310 else
1311 card->rawch += NS_RCQE_SIZE;
1312 }
1313 }
1314
1315 /* Small buffer queue is empty */
1316 if (stat_r & NS_STAT_SFBQE)
1317 {
1318 int i;
1319 struct sk_buff *sb;
1320
1321 writel(NS_STAT_SFBQE, card->membase + STAT);
1322 printk("nicstar%d: Small free buffer queue empty.\n",
1323 card->index);
1324 for (i = 0; i < card->sbnr.min; i++)
1325 {
1326 sb = dev_alloc_skb(NS_SMSKBSIZE);
1327 if (sb == NULL)
1328 {
1329 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1330 card->efbie = 0;
1331 break;
1332 }
1333 NS_SKB_CB(sb)->buf_type = BUF_SM;
1334 skb_queue_tail(&card->sbpool.queue, sb);
1335 skb_reserve(sb, NS_AAL0_HEADER);
1336 push_rxbufs(card, sb);
1337 }
1338 card->sbfqc = i;
1339 process_rsq(card);
1340 }
1341
1342 /* Large buffer queue empty */
1343 if (stat_r & NS_STAT_LFBQE)
1344 {
1345 int i;
1346 struct sk_buff *lb;
1347
1348 writel(NS_STAT_LFBQE, card->membase + STAT);
1349 printk("nicstar%d: Large free buffer queue empty.\n",
1350 card->index);
1351 for (i = 0; i < card->lbnr.min; i++)
1352 {
1353 lb = dev_alloc_skb(NS_LGSKBSIZE);
1354 if (lb == NULL)
1355 {
1356 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1357 card->efbie = 0;
1358 break;
1359 }
1360 NS_SKB_CB(lb)->buf_type = BUF_LG;
1361 skb_queue_tail(&card->lbpool.queue, lb);
1362 skb_reserve(lb, NS_SMBUFSIZE);
1363 push_rxbufs(card, lb);
1364 }
1365 card->lbfqc = i;
1366 process_rsq(card);
1367 }
1368
1369 /* Receive Status Queue is 7/8 full */
1370 if (stat_r & NS_STAT_RSQAF)
1371 {
1372 writel(NS_STAT_RSQAF, card->membase + STAT);
1373 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1374 process_rsq(card);
1375 }
1376
1377 spin_unlock_irqrestore(&card->int_lock, flags);
1378 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1379 return IRQ_HANDLED;
1380 }
1381
1382
1383
1384 static int ns_open(struct atm_vcc *vcc)
1385 {
1386 ns_dev *card;
1387 vc_map *vc;
1388 unsigned long tmpl, modl;
1389 int tcr, tcra; /* target cell rate, and absolute value */
1390 int n = 0; /* Number of entries in the TST. Initialized to remove
1391 the compiler warning. */
1392 u32 u32d[4];
1393 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1394 warning. How I wish compilers were clever enough to
1395 tell which variables can truly be used
1396 uninitialized... */
1397 int inuse; /* tx or rx vc already in use by another vcc */
1398 short vpi = vcc->vpi;
1399 int vci = vcc->vci;
1400
1401 card = (ns_dev *) vcc->dev->dev_data;
1402 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
1403 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1404 {
1405 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1406 return -EINVAL;
1407 }
1408
1409 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1410 vcc->dev_data = vc;
1411
1412 inuse = 0;
1413 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1414 inuse = 1;
1415 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1416 inuse += 2;
1417 if (inuse)
1418 {
1419 printk("nicstar%d: %s vci already in use.\n", card->index,
1420 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1421 return -EINVAL;
1422 }
1423
1424 set_bit(ATM_VF_ADDR,&vcc->flags);
1425
1426 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1427 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1428 needed to do that. */
1429 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1430 {
1431 scq_info *scq;
1432
1433 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1434 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1435 {
1436 /* Check requested cell rate and availability of SCD */
1437 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
1438 vcc->qos.txtp.min_pcr == 0)
1439 {
1440 PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1441 card->index);
1442 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1443 clear_bit(ATM_VF_ADDR,&vcc->flags);
1444 return -EINVAL;
1445 }
1446
1447 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1448 tcra = tcr >= 0 ? tcr : -tcr;
1449
1450 PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
1451 vcc->qos.txtp.max_pcr);
1452
1453 tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
1454 modl = tmpl % card->max_pcr;
1455
1456 n = (int)(tmpl / card->max_pcr);
1457 if (tcr > 0)
1458 {
1459 if (modl > 0) n++;
1460 }
1461 else if (tcr == 0)
1462 {
1463 if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
1464 {
1465 PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
1466 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1467 clear_bit(ATM_VF_ADDR,&vcc->flags);
1468 return -EINVAL;
1469 }
1470 }
1471
1472 if (n == 0)
1473 {
1474 printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
1475 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1476 clear_bit(ATM_VF_ADDR,&vcc->flags);
1477 return -EINVAL;
1478 }
1479
1480 if (n > (card->tst_free_entries - NS_TST_RESERVED))
1481 {
1482 PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
1483 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1484 clear_bit(ATM_VF_ADDR,&vcc->flags);
1485 return -EINVAL;
1486 }
1487 else
1488 card->tst_free_entries -= n;
1489
1490 XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
1491 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
1492 {
1493 if (card->scd2vc[frscdi] == NULL)
1494 {
1495 card->scd2vc[frscdi] = vc;
1496 break;
1497 }
1498 }
1499 if (frscdi == NS_FRSCD_NUM)
1500 {
1501 PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
1502 card->tst_free_entries += n;
1503 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1504 clear_bit(ATM_VF_ADDR,&vcc->flags);
1505 return -EBUSY;
1506 }
1507
1508 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1509
1510 scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
1511 if (scq == NULL)
1512 {
1513 PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
1514 card->scd2vc[frscdi] = NULL;
1515 card->tst_free_entries += n;
1516 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1517 clear_bit(ATM_VF_ADDR,&vcc->flags);
1518 return -ENOMEM;
1519 }
1520 vc->scq = scq;
1521 u32d[0] = (u32) virt_to_bus(scq->base);
1522 u32d[1] = (u32) 0x00000000;
1523 u32d[2] = (u32) 0xffffffff;
1524 u32d[3] = (u32) 0x00000000;
1525 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1526
1527 fill_tst(card, n, vc);
1528 }
1529 else if (vcc->qos.txtp.traffic_class == ATM_UBR)
1530 {
1531 vc->cbr_scd = 0x00000000;
1532 vc->scq = card->scq0;
1533 }
1534
1535 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1536 {
1537 vc->tx = 1;
1538 vc->tx_vcc = vcc;
1539 vc->tbd_count = 0;
1540 }
1541 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1542 {
1543 u32 status;
1544
1545 vc->rx = 1;
1546 vc->rx_vcc = vcc;
1547 vc->rx_iov = NULL;
1548
1549 /* Open the connection in hardware */
1550 if (vcc->qos.aal == ATM_AAL5)
1551 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1552 else /* vcc->qos.aal == ATM_AAL0 */
1553 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1554 #ifdef RCQ_SUPPORT
1555 status |= NS_RCTE_RAWCELLINTEN;
1556 #endif /* RCQ_SUPPORT */
1557 ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
1558 NS_RCT_ENTRY_SIZE, &status, 1);
1559 }
1560
1561 }
1562
1563 set_bit(ATM_VF_READY,&vcc->flags);
1564 return 0;
1565 }
1566
1567
1568
1569 static void ns_close(struct atm_vcc *vcc)
1570 {
1571 vc_map *vc;
1572 ns_dev *card;
1573 u32 data;
1574 int i;
1575
1576 vc = vcc->dev_data;
1577 card = vcc->dev->dev_data;
1578 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1579 (int) vcc->vpi, vcc->vci);
1580
1581 clear_bit(ATM_VF_READY,&vcc->flags);
1582
1583 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1584 {
1585 u32 addr;
1586 unsigned long flags;
1587
1588 addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1589 ns_grab_res_lock(card, flags);
1590 while(CMD_BUSY(card));
1591 writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
1592 spin_unlock_irqrestore(&card->res_lock, flags);
1593
1594 vc->rx = 0;
1595 if (vc->rx_iov != NULL)
1596 {
1597 struct sk_buff *iovb;
1598 u32 stat;
1599
1600 stat = readl(card->membase + STAT);
1601 card->sbfqc = ns_stat_sfbqc_get(stat);
1602 card->lbfqc = ns_stat_lfbqc_get(stat);
1603
1604 PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
1605 card->index);
1606 iovb = vc->rx_iov;
1607 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
1608 NS_SKB(iovb)->iovcnt);
1609 NS_SKB(iovb)->iovcnt = 0;
1610 NS_SKB(iovb)->vcc = NULL;
1611 ns_grab_int_lock(card, flags);
1612 recycle_iov_buf(card, iovb);
1613 spin_unlock_irqrestore(&card->int_lock, flags);
1614 vc->rx_iov = NULL;
1615 }
1616 }
1617
1618 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1619 {
1620 vc->tx = 0;
1621 }
1622
1623 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1624 {
1625 unsigned long flags;
1626 ns_scqe *scqep;
1627 scq_info *scq;
1628
1629 scq = vc->scq;
1630
1631 for (;;)
1632 {
1633 ns_grab_scq_lock(card, scq, flags);
1634 scqep = scq->next;
1635 if (scqep == scq->base)
1636 scqep = scq->last;
1637 else
1638 scqep--;
1639 if (scqep == scq->tail)
1640 {
1641 spin_unlock_irqrestore(&scq->lock, flags);
1642 break;
1643 }
1644 /* If the last entry is not a TSR, place one in the SCQ in order to
1645 be able to completely drain it and then close. */
1646 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
1647 {
1648 ns_scqe tsr;
1649 u32 scdi, scqi;
1650 u32 data;
1651 int index;
1652
1653 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1654 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1655 scqi = scq->next - scq->base;
1656 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1657 tsr.word_3 = 0x00000000;
1658 tsr.word_4 = 0x00000000;
1659 *scq->next = tsr;
1660 index = (int) scqi;
1661 scq->skb[index] = NULL;
1662 if (scq->next == scq->last)
1663 scq->next = scq->base;
1664 else
1665 scq->next++;
1666 data = (u32) virt_to_bus(scq->next);
1667 ns_write_sram(card, scq->scd, &data, 1);
1668 }
1669 spin_unlock_irqrestore(&scq->lock, flags);
1670 schedule();
1671 }
1672
1673 /* Free all TST entries */
1674 data = NS_TST_OPCODE_VARIABLE;
1675 for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
1676 {
1677 if (card->tste2vc[i] == vc)
1678 {
1679 ns_write_sram(card, card->tst_addr + i, &data, 1);
1680 card->tste2vc[i] = NULL;
1681 card->tst_free_entries++;
1682 }
1683 }
1684
1685 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1686 free_scq(vc->scq, vcc);
1687 }
1688
1689 /* remove all references to vcc before deleting it */
1690 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1691 {
1692 unsigned long flags;
1693 scq_info *scq = card->scq0;
1694
1695 ns_grab_scq_lock(card, scq, flags);
1696
1697 for(i = 0; i < scq->num_entries; i++) {
1698 if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1699 ATM_SKB(scq->skb[i])->vcc = NULL;
1700 atm_return(vcc, scq->skb[i]->truesize);
1701 PRINTK("nicstar: deleted pending vcc mapping\n");
1702 }
1703 }
1704
1705 spin_unlock_irqrestore(&scq->lock, flags);
1706 }
1707
1708 vcc->dev_data = NULL;
1709 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1710 clear_bit(ATM_VF_ADDR,&vcc->flags);
1711
1712 #ifdef RX_DEBUG
1713 {
1714 u32 stat, cfg;
1715 stat = readl(card->membase + STAT);
1716 cfg = readl(card->membase + CFG);
1717 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1718 printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
1719 (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
1720 readl(card->membase + TSQT));
1721 printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
1722 (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
1723 readl(card->membase + RSQT));
1724 printk("Empty free buffer queue interrupt %s \n",
1725 card->efbie ? "enabled" : "disabled");
1726 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1727 ns_stat_sfbqc_get(stat), card->sbpool.count,
1728 ns_stat_lfbqc_get(stat), card->lbpool.count);
1729 printk("hbpool.count = %d iovpool.count = %d \n",
1730 card->hbpool.count, card->iovpool.count);
1731 }
1732 #endif /* RX_DEBUG */
1733 }
1734
1735
1736
1737 static void fill_tst(ns_dev *card, int n, vc_map *vc)
1738 {
1739 u32 new_tst;
1740 unsigned long cl;
1741 int e, r;
1742 u32 data;
1743
1744 /* It would be very complicated to keep the two TSTs synchronized while
1745 assuring that writes are only made to the inactive TST. So, for now I
1746 will use only one TST. If problems occur, I will change this again */
1747
1748 new_tst = card->tst_addr;
1749
1750 /* Fill procedure */
1751
1752 for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
1753 {
1754 if (card->tste2vc[e] == NULL)
1755 break;
1756 }
1757 if (e == NS_TST_NUM_ENTRIES) {
1758 printk("nicstar%d: No free TST entries found. \n", card->index);
1759 return;
1760 }
1761
1762 r = n;
1763 cl = NS_TST_NUM_ENTRIES;
1764 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1765
1766 while (r > 0)
1767 {
1768 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
1769 {
1770 card->tste2vc[e] = vc;
1771 ns_write_sram(card, new_tst + e, &data, 1);
1772 cl -= NS_TST_NUM_ENTRIES;
1773 r--;
1774 }
1775
1776 if (++e == NS_TST_NUM_ENTRIES) {
1777 e = 0;
1778 }
1779 cl += n;
1780 }
1781
1782 /* End of fill procedure */
1783
1784 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1785 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1786 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1787 card->tst_addr = new_tst;
1788 }
1789
1790
1791
1792 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1793 {
1794 ns_dev *card;
1795 vc_map *vc;
1796 scq_info *scq;
1797 unsigned long buflen;
1798 ns_scqe scqe;
1799 u32 flags; /* TBD flags, not CPU flags */
1800
1801 card = vcc->dev->dev_data;
1802 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1803 if ((vc = (vc_map *) vcc->dev_data) == NULL)
1804 {
1805 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
1806 atomic_inc(&vcc->stats->tx_err);
1807 dev_kfree_skb_any(skb);
1808 return -EINVAL;
1809 }
1810
1811 if (!vc->tx)
1812 {
1813 printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
1814 atomic_inc(&vcc->stats->tx_err);
1815 dev_kfree_skb_any(skb);
1816 return -EINVAL;
1817 }
1818
1819 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1820 {
1821 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
1822 atomic_inc(&vcc->stats->tx_err);
1823 dev_kfree_skb_any(skb);
1824 return -EINVAL;
1825 }
1826
1827 if (skb_shinfo(skb)->nr_frags != 0)
1828 {
1829 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1830 atomic_inc(&vcc->stats->tx_err);
1831 dev_kfree_skb_any(skb);
1832 return -EINVAL;
1833 }
1834
1835 ATM_SKB(skb)->vcc = vcc;
1836
1837 if (vcc->qos.aal == ATM_AAL5)
1838 {
1839 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1840 flags = NS_TBD_AAL5;
1841 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
1842 scqe.word_3 = cpu_to_le32((u32) skb->len);
1843 scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1844 ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1845 flags |= NS_TBD_EOPDU;
1846 }
1847 else /* (vcc->qos.aal == ATM_AAL0) */
1848 {
1849 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1850 flags = NS_TBD_AAL0;
1851 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
1852 scqe.word_3 = cpu_to_le32(0x00000000);
1853 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1854 flags |= NS_TBD_EOPDU;
1855 scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1856 /* Force the VPI/VCI to be the same as in VCC struct */
1857 scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
1858 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
1859 NS_TBD_VC_MASK);
1860 }
1861
1862 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1863 {
1864 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1865 scq = ((vc_map *) vcc->dev_data)->scq;
1866 }
1867 else
1868 {
1869 scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1870 scq = card->scq0;
1871 }
1872
1873 if (push_scqe(card, vc, scq, &scqe, skb) != 0)
1874 {
1875 atomic_inc(&vcc->stats->tx_err);
1876 dev_kfree_skb_any(skb);
1877 return -EIO;
1878 }
1879 atomic_inc(&vcc->stats->tx);
1880
1881 return 0;
1882 }
1883
1884
1885
1886 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
1887 struct sk_buff *skb)
1888 {
1889 unsigned long flags;
1890 ns_scqe tsr;
1891 u32 scdi, scqi;
1892 int scq_is_vbr;
1893 u32 data;
1894 int index;
1895
1896 ns_grab_scq_lock(card, scq, flags);
1897 while (scq->tail == scq->next)
1898 {
1899 if (in_interrupt()) {
1900 spin_unlock_irqrestore(&scq->lock, flags);
1901 printk("nicstar%d: Error pushing TBD.\n", card->index);
1902 return 1;
1903 }
1904
1905 scq->full = 1;
1906 spin_unlock_irqrestore(&scq->lock, flags);
1907 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1908 ns_grab_scq_lock(card, scq, flags);
1909
1910 if (scq->full) {
1911 spin_unlock_irqrestore(&scq->lock, flags);
1912 printk("nicstar%d: Timeout pushing TBD.\n", card->index);
1913 return 1;
1914 }
1915 }
1916 *scq->next = *tbd;
1917 index = (int) (scq->next - scq->base);
1918 scq->skb[index] = skb;
1919 XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
1920 card->index, (u32) skb, index);
1921 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1922 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1923 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1924 (u32) scq->next);
1925 if (scq->next == scq->last)
1926 scq->next = scq->base;
1927 else
1928 scq->next++;
1929
1930 vc->tbd_count++;
1931 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1932 {
1933 scq->tbd_count++;
1934 scq_is_vbr = 1;
1935 }
1936 else
1937 scq_is_vbr = 0;
1938
1939 if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
1940 {
1941 int has_run = 0;
1942
1943 while (scq->tail == scq->next)
1944 {
1945 if (in_interrupt()) {
1946 data = (u32) virt_to_bus(scq->next);
1947 ns_write_sram(card, scq->scd, &data, 1);
1948 spin_unlock_irqrestore(&scq->lock, flags);
1949 printk("nicstar%d: Error pushing TSR.\n", card->index);
1950 return 0;
1951 }
1952
1953 scq->full = 1;
1954 if (has_run++) break;
1955 spin_unlock_irqrestore(&scq->lock, flags);
1956 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1957 ns_grab_scq_lock(card, scq, flags);
1958 }
1959
1960 if (!scq->full)
1961 {
1962 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1963 if (scq_is_vbr)
1964 scdi = NS_TSR_SCDISVBR;
1965 else
1966 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1967 scqi = scq->next - scq->base;
1968 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1969 tsr.word_3 = 0x00000000;
1970 tsr.word_4 = 0x00000000;
1971
1972 *scq->next = tsr;
1973 index = (int) scqi;
1974 scq->skb[index] = NULL;
1975 XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1976 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
1977 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
1978 (u32) scq->next);
1979 if (scq->next == scq->last)
1980 scq->next = scq->base;
1981 else
1982 scq->next++;
1983 vc->tbd_count = 0;
1984 scq->tbd_count = 0;
1985 }
1986 else
1987 PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
1988 }
1989 data = (u32) virt_to_bus(scq->next);
1990 ns_write_sram(card, scq->scd, &data, 1);
1991
1992 spin_unlock_irqrestore(&scq->lock, flags);
1993
1994 return 0;
1995 }
1996
1997
1998
1999 static void process_tsq(ns_dev *card)
2000 {
2001 u32 scdi;
2002 scq_info *scq;
2003 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
2004 int serviced_entries; /* flag indicating at least on entry was serviced */
2005
2006 serviced_entries = 0;
2007
2008 if (card->tsq.next == card->tsq.last)
2009 one_ahead = card->tsq.base;
2010 else
2011 one_ahead = card->tsq.next + 1;
2012
2013 if (one_ahead == card->tsq.last)
2014 two_ahead = card->tsq.base;
2015 else
2016 two_ahead = one_ahead + 1;
2017
2018 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
2019 !ns_tsi_isempty(two_ahead))
2020 /* At most two empty, as stated in the 77201 errata */
2021 {
2022 serviced_entries = 1;
2023
2024 /* Skip the one or two possible empty entries */
2025 while (ns_tsi_isempty(card->tsq.next)) {
2026 if (card->tsq.next == card->tsq.last)
2027 card->tsq.next = card->tsq.base;
2028 else
2029 card->tsq.next++;
2030 }
2031
2032 if (!ns_tsi_tmrof(card->tsq.next))
2033 {
2034 scdi = ns_tsi_getscdindex(card->tsq.next);
2035 if (scdi == NS_TSI_SCDISVBR)
2036 scq = card->scq0;
2037 else
2038 {
2039 if (card->scd2vc[scdi] == NULL)
2040 {
2041 printk("nicstar%d: could not find VC from SCD index.\n",
2042 card->index);
2043 ns_tsi_init(card->tsq.next);
2044 return;
2045 }
2046 scq = card->scd2vc[scdi]->scq;
2047 }
2048 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
2049 scq->full = 0;
2050 wake_up_interruptible(&(scq->scqfull_waitq));
2051 }
2052
2053 ns_tsi_init(card->tsq.next);
2054 previous = card->tsq.next;
2055 if (card->tsq.next == card->tsq.last)
2056 card->tsq.next = card->tsq.base;
2057 else
2058 card->tsq.next++;
2059
2060 if (card->tsq.next == card->tsq.last)
2061 one_ahead = card->tsq.base;
2062 else
2063 one_ahead = card->tsq.next + 1;
2064
2065 if (one_ahead == card->tsq.last)
2066 two_ahead = card->tsq.base;
2067 else
2068 two_ahead = one_ahead + 1;
2069 }
2070
2071 if (serviced_entries) {
2072 writel((((u32) previous) - ((u32) card->tsq.base)),
2073 card->membase + TSQH);
2074 }
2075 }
2076
2077
2078
2079 static void drain_scq(ns_dev *card, scq_info *scq, int pos)
2080 {
2081 struct atm_vcc *vcc;
2082 struct sk_buff *skb;
2083 int i;
2084 unsigned long flags;
2085
2086 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
2087 card->index, (u32) scq, pos);
2088 if (pos >= scq->num_entries)
2089 {
2090 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
2091 return;
2092 }
2093
2094 ns_grab_scq_lock(card, scq, flags);
2095 i = (int) (scq->tail - scq->base);
2096 if (++i == scq->num_entries)
2097 i = 0;
2098 while (i != pos)
2099 {
2100 skb = scq->skb[i];
2101 XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
2102 card->index, (u32) skb, i);
2103 if (skb != NULL)
2104 {
2105 vcc = ATM_SKB(skb)->vcc;
2106 if (vcc && vcc->pop != NULL) {
2107 vcc->pop(vcc, skb);
2108 } else {
2109 dev_kfree_skb_irq(skb);
2110 }
2111 scq->skb[i] = NULL;
2112 }
2113 if (++i == scq->num_entries)
2114 i = 0;
2115 }
2116 scq->tail = scq->base + pos;
2117 spin_unlock_irqrestore(&scq->lock, flags);
2118 }
2119
2120
2121
2122 static void process_rsq(ns_dev *card)
2123 {
2124 ns_rsqe *previous;
2125
2126 if (!ns_rsqe_valid(card->rsq.next))
2127 return;
2128 do {
2129 dequeue_rx(card, card->rsq.next);
2130 ns_rsqe_init(card->rsq.next);
2131 previous = card->rsq.next;
2132 if (card->rsq.next == card->rsq.last)
2133 card->rsq.next = card->rsq.base;
2134 else
2135 card->rsq.next++;
2136 } while (ns_rsqe_valid(card->rsq.next));
2137 writel((((u32) previous) - ((u32) card->rsq.base)),
2138 card->membase + RSQH);
2139 }
2140
2141
2142
2143 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
2144 {
2145 u32 vpi, vci;
2146 vc_map *vc;
2147 struct sk_buff *iovb;
2148 struct iovec *iov;
2149 struct atm_vcc *vcc;
2150 struct sk_buff *skb;
2151 unsigned short aal5_len;
2152 int len;
2153 u32 stat;
2154
2155 stat = readl(card->membase + STAT);
2156 card->sbfqc = ns_stat_sfbqc_get(stat);
2157 card->lbfqc = ns_stat_lfbqc_get(stat);
2158
2159 skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
2160 vpi = ns_rsqe_vpi(rsqe);
2161 vci = ns_rsqe_vci(rsqe);
2162 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
2163 {
2164 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2165 card->index, vpi, vci);
2166 recycle_rx_buf(card, skb);
2167 return;
2168 }
2169
2170 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2171 if (!vc->rx)
2172 {
2173 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2174 card->index, vpi, vci);
2175 recycle_rx_buf(card, skb);
2176 return;
2177 }
2178
2179 vcc = vc->rx_vcc;
2180
2181 if (vcc->qos.aal == ATM_AAL0)
2182 {
2183 struct sk_buff *sb;
2184 unsigned char *cell;
2185 int i;
2186
2187 cell = skb->data;
2188 for (i = ns_rsqe_cellcount(rsqe); i; i--)
2189 {
2190 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
2191 {
2192 printk("nicstar%d: Can't allocate buffers for aal0.\n",
2193 card->index);
2194 atomic_add(i,&vcc->stats->rx_drop);
2195 break;
2196 }
2197 if (!atm_charge(vcc, sb->truesize))
2198 {
2199 RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
2200 card->index);
2201 atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
2202 dev_kfree_skb_any(sb);
2203 break;
2204 }
2205 /* Rebuild the header */
2206 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2207 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2208 if (i == 1 && ns_rsqe_eopdu(rsqe))
2209 *((u32 *) sb->data) |= 0x00000002;
2210 skb_put(sb, NS_AAL0_HEADER);
2211 memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
2212 skb_put(sb, ATM_CELL_PAYLOAD);
2213 ATM_SKB(sb)->vcc = vcc;
2214 __net_timestamp(sb);
2215 vcc->push(vcc, sb);
2216 atomic_inc(&vcc->stats->rx);
2217 cell += ATM_CELL_PAYLOAD;
2218 }
2219
2220 recycle_rx_buf(card, skb);
2221 return;
2222 }
2223
2224 /* To reach this point, the AAL layer can only be AAL5 */
2225
2226 if ((iovb = vc->rx_iov) == NULL)
2227 {
2228 iovb = skb_dequeue(&(card->iovpool.queue));
2229 if (iovb == NULL) /* No buffers in the queue */
2230 {
2231 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2232 if (iovb == NULL)
2233 {
2234 printk("nicstar%d: Out of iovec buffers.\n", card->index);
2235 atomic_inc(&vcc->stats->rx_drop);
2236 recycle_rx_buf(card, skb);
2237 return;
2238 }
2239 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2240 }
2241 else
2242 if (--card->iovpool.count < card->iovnr.min)
2243 {
2244 struct sk_buff *new_iovb;
2245 if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
2246 {
2247 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2248 skb_queue_tail(&card->iovpool.queue, new_iovb);
2249 card->iovpool.count++;
2250 }
2251 }
2252 vc->rx_iov = iovb;
2253 NS_SKB(iovb)->iovcnt = 0;
2254 iovb->len = 0;
2255 iovb->tail = iovb->data = iovb->head;
2256 NS_SKB(iovb)->vcc = vcc;
2257 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2258 buffer is stored as iovec base, NOT a pointer to the
2259 small or large buffer itself. */
2260 }
2261 else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
2262 {
2263 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2264 atomic_inc(&vcc->stats->rx_err);
2265 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
2266 NS_SKB(iovb)->iovcnt = 0;
2267 iovb->len = 0;
2268 iovb->tail = iovb->data = iovb->head;
2269 NS_SKB(iovb)->vcc = vcc;
2270 }
2271 iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
2272 iov->iov_base = (void *) skb;
2273 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2274 iovb->len += iov->iov_len;
2275
2276 if (NS_SKB(iovb)->iovcnt == 1)
2277 {
2278 if (NS_SKB_CB(skb)->buf_type != BUF_SM)
2279 {
2280 printk("nicstar%d: Expected a small buffer, and this is not one.\n",
2281 card->index);
2282 which_list(card, skb);
2283 atomic_inc(&vcc->stats->rx_err);
2284 recycle_rx_buf(card, skb);
2285 vc->rx_iov = NULL;
2286 recycle_iov_buf(card, iovb);
2287 return;
2288 }
2289 }
2290 else /* NS_SKB(iovb)->iovcnt >= 2 */
2291 {
2292 if (NS_SKB_CB(skb)->buf_type != BUF_LG)
2293 {
2294 printk("nicstar%d: Expected a large buffer, and this is not one.\n",
2295 card->index);
2296 which_list(card, skb);
2297 atomic_inc(&vcc->stats->rx_err);
2298 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2299 NS_SKB(iovb)->iovcnt);
2300 vc->rx_iov = NULL;
2301 recycle_iov_buf(card, iovb);
2302 return;
2303 }
2304 }
2305
2306 if (ns_rsqe_eopdu(rsqe))
2307 {
2308 /* This works correctly regardless of the endianness of the host */
2309 unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
2310 iov->iov_len - 6);
2311 aal5_len = L1L2[0] << 8 | L1L2[1];
2312 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2313 if (ns_rsqe_crcerr(rsqe) ||
2314 len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2315 {
2316 printk("nicstar%d: AAL5 CRC error", card->index);
2317 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2318 printk(" - PDU size mismatch.\n");
2319 else
2320 printk(".\n");
2321 atomic_inc(&vcc->stats->rx_err);
2322 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2323 NS_SKB(iovb)->iovcnt);
2324 vc->rx_iov = NULL;
2325 recycle_iov_buf(card, iovb);
2326 return;
2327 }
2328
2329 /* By this point we (hopefully) have a complete SDU without errors. */
2330
2331 if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
2332 {
2333 /* skb points to a small buffer */
2334 if (!atm_charge(vcc, skb->truesize))
2335 {
2336 push_rxbufs(card, skb);
2337 atomic_inc(&vcc->stats->rx_drop);
2338 }
2339 else
2340 {
2341 skb_put(skb, len);
2342 dequeue_sm_buf(card, skb);
2343 #ifdef NS_USE_DESTRUCTORS
2344 skb->destructor = ns_sb_destructor;
2345 #endif /* NS_USE_DESTRUCTORS */
2346 ATM_SKB(skb)->vcc = vcc;
2347 __net_timestamp(skb);
2348 vcc->push(vcc, skb);
2349 atomic_inc(&vcc->stats->rx);
2350 }
2351 }
2352 else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
2353 {
2354 struct sk_buff *sb;
2355
2356 sb = (struct sk_buff *) (iov - 1)->iov_base;
2357 /* skb points to a large buffer */
2358
2359 if (len <= NS_SMBUFSIZE)
2360 {
2361 if (!atm_charge(vcc, sb->truesize))
2362 {
2363 push_rxbufs(card, sb);
2364 atomic_inc(&vcc->stats->rx_drop);
2365 }
2366 else
2367 {
2368 skb_put(sb, len);
2369 dequeue_sm_buf(card, sb);
2370 #ifdef NS_USE_DESTRUCTORS
2371 sb->destructor = ns_sb_destructor;
2372 #endif /* NS_USE_DESTRUCTORS */
2373 ATM_SKB(sb)->vcc = vcc;
2374 __net_timestamp(sb);
2375 vcc->push(vcc, sb);
2376 atomic_inc(&vcc->stats->rx);
2377 }
2378
2379 push_rxbufs(card, skb);
2380
2381 }
2382 else /* len > NS_SMBUFSIZE, the usual case */
2383 {
2384 if (!atm_charge(vcc, skb->truesize))
2385 {
2386 push_rxbufs(card, skb);
2387 atomic_inc(&vcc->stats->rx_drop);
2388 }
2389 else
2390 {
2391 dequeue_lg_buf(card, skb);
2392 #ifdef NS_USE_DESTRUCTORS
2393 skb->destructor = ns_lb_destructor;
2394 #endif /* NS_USE_DESTRUCTORS */
2395 skb_push(skb, NS_SMBUFSIZE);
2396 memcpy(skb->data, sb->data, NS_SMBUFSIZE);
2397 skb_put(skb, len - NS_SMBUFSIZE);
2398 ATM_SKB(skb)->vcc = vcc;
2399 __net_timestamp(skb);
2400 vcc->push(vcc, skb);
2401 atomic_inc(&vcc->stats->rx);
2402 }
2403
2404 push_rxbufs(card, sb);
2405
2406 }
2407
2408 }
2409 else /* Must push a huge buffer */
2410 {
2411 struct sk_buff *hb, *sb, *lb;
2412 int remaining, tocopy;
2413 int j;
2414
2415 hb = skb_dequeue(&(card->hbpool.queue));
2416 if (hb == NULL) /* No buffers in the queue */
2417 {
2418
2419 hb = dev_alloc_skb(NS_HBUFSIZE);
2420 if (hb == NULL)
2421 {
2422 printk("nicstar%d: Out of huge buffers.\n", card->index);
2423 atomic_inc(&vcc->stats->rx_drop);
2424 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2425 NS_SKB(iovb)->iovcnt);
2426 vc->rx_iov = NULL;
2427 recycle_iov_buf(card, iovb);
2428 return;
2429 }
2430 else if (card->hbpool.count < card->hbnr.min)
2431 {
2432 struct sk_buff *new_hb;
2433 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2434 {
2435 skb_queue_tail(&card->hbpool.queue, new_hb);
2436 card->hbpool.count++;
2437 }
2438 }
2439 NS_SKB_CB(hb)->buf_type = BUF_NONE;
2440 }
2441 else
2442 if (--card->hbpool.count < card->hbnr.min)
2443 {
2444 struct sk_buff *new_hb;
2445 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2446 {
2447 NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
2448 skb_queue_tail(&card->hbpool.queue, new_hb);
2449 card->hbpool.count++;
2450 }
2451 if (card->hbpool.count < card->hbnr.min)
2452 {
2453 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2454 {
2455 NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
2456 skb_queue_tail(&card->hbpool.queue, new_hb);
2457 card->hbpool.count++;
2458 }
2459 }
2460 }
2461
2462 iov = (struct iovec *) iovb->data;
2463
2464 if (!atm_charge(vcc, hb->truesize))
2465 {
2466 recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
2467 if (card->hbpool.count < card->hbnr.max)
2468 {
2469 skb_queue_tail(&card->hbpool.queue, hb);
2470 card->hbpool.count++;
2471 }
2472 else
2473 dev_kfree_skb_any(hb);
2474 atomic_inc(&vcc->stats->rx_drop);
2475 }
2476 else
2477 {
2478 /* Copy the small buffer to the huge buffer */
2479 sb = (struct sk_buff *) iov->iov_base;
2480 memcpy(hb->data, sb->data, iov->iov_len);
2481 skb_put(hb, iov->iov_len);
2482 remaining = len - iov->iov_len;
2483 iov++;
2484 /* Free the small buffer */
2485 push_rxbufs(card, sb);
2486
2487 /* Copy all large buffers to the huge buffer and free them */
2488 for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
2489 {
2490 lb = (struct sk_buff *) iov->iov_base;
2491 tocopy = min_t(int, remaining, iov->iov_len);
2492 memcpy(hb->tail, lb->data, tocopy);
2493 skb_put(hb, tocopy);
2494 iov++;
2495 remaining -= tocopy;
2496 push_rxbufs(card, lb);
2497 }
2498 #ifdef EXTRA_DEBUG
2499 if (remaining != 0 || hb->len != len)
2500 printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
2501 #endif /* EXTRA_DEBUG */
2502 ATM_SKB(hb)->vcc = vcc;
2503 #ifdef NS_USE_DESTRUCTORS
2504 hb->destructor = ns_hb_destructor;
2505 #endif /* NS_USE_DESTRUCTORS */
2506 __net_timestamp(hb);
2507 vcc->push(vcc, hb);
2508 atomic_inc(&vcc->stats->rx);
2509 }
2510 }
2511
2512 vc->rx_iov = NULL;
2513 recycle_iov_buf(card, iovb);
2514 }
2515
2516 }
2517
2518
2519
2520 #ifdef NS_USE_DESTRUCTORS
2521
2522 static void ns_sb_destructor(struct sk_buff *sb)
2523 {
2524 ns_dev *card;
2525 u32 stat;
2526
2527 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2528 stat = readl(card->membase + STAT);
2529 card->sbfqc = ns_stat_sfbqc_get(stat);
2530 card->lbfqc = ns_stat_lfbqc_get(stat);
2531
2532 do
2533 {
2534 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2535 if (sb == NULL)
2536 break;
2537 NS_SKB_CB(sb)->buf_type = BUF_SM;
2538 skb_queue_tail(&card->sbpool.queue, sb);
2539 skb_reserve(sb, NS_AAL0_HEADER);
2540 push_rxbufs(card, sb);
2541 } while (card->sbfqc < card->sbnr.min);
2542 }
2543
2544
2545
2546 static void ns_lb_destructor(struct sk_buff *lb)
2547 {
2548 ns_dev *card;
2549 u32 stat;
2550
2551 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2552 stat = readl(card->membase + STAT);
2553 card->sbfqc = ns_stat_sfbqc_get(stat);
2554 card->lbfqc = ns_stat_lfbqc_get(stat);
2555
2556 do
2557 {
2558 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2559 if (lb == NULL)
2560 break;
2561 NS_SKB_CB(lb)->buf_type = BUF_LG;
2562 skb_queue_tail(&card->lbpool.queue, lb);
2563 skb_reserve(lb, NS_SMBUFSIZE);
2564 push_rxbufs(card, lb);
2565 } while (card->lbfqc < card->lbnr.min);
2566 }
2567
2568
2569
2570 static void ns_hb_destructor(struct sk_buff *hb)
2571 {
2572 ns_dev *card;
2573
2574 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2575
2576 while (card->hbpool.count < card->hbnr.init)
2577 {
2578 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2579 if (hb == NULL)
2580 break;
2581 NS_SKB_CB(hb)->buf_type = BUF_NONE;
2582 skb_queue_tail(&card->hbpool.queue, hb);
2583 card->hbpool.count++;
2584 }
2585 }
2586
2587 #endif /* NS_USE_DESTRUCTORS */
2588
2589
2590 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
2591 {
2592 struct ns_skb_cb *cb = NS_SKB_CB(skb);
2593
2594 if (unlikely(cb->buf_type == BUF_NONE)) {
2595 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2596 dev_kfree_skb_any(skb);
2597 } else
2598 push_rxbufs(card, skb);
2599 }
2600
2601
2602 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
2603 {
2604 while (count-- > 0)
2605 recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
2606 }
2607
2608
2609 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
2610 {
2611 if (card->iovpool.count < card->iovnr.max)
2612 {
2613 skb_queue_tail(&card->iovpool.queue, iovb);
2614 card->iovpool.count++;
2615 }
2616 else
2617 dev_kfree_skb_any(iovb);
2618 }
2619
2620
2621
2622 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
2623 {
2624 skb_unlink(sb, &card->sbpool.queue);
2625 #ifdef NS_USE_DESTRUCTORS
2626 if (card->sbfqc < card->sbnr.min)
2627 #else
2628 if (card->sbfqc < card->sbnr.init)
2629 {
2630 struct sk_buff *new_sb;
2631 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2632 {
2633 NS_SKB_CB(new_sb)->buf_type = BUF_SM;
2634 skb_queue_tail(&card->sbpool.queue, new_sb);
2635 skb_reserve(new_sb, NS_AAL0_HEADER);
2636 push_rxbufs(card, new_sb);
2637 }
2638 }
2639 if (card->sbfqc < card->sbnr.init)
2640 #endif /* NS_USE_DESTRUCTORS */
2641 {
2642 struct sk_buff *new_sb;
2643 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2644 {
2645 NS_SKB_CB(new_sb)->buf_type = BUF_SM;
2646 skb_queue_tail(&card->sbpool.queue, new_sb);
2647 skb_reserve(new_sb, NS_AAL0_HEADER);
2648 push_rxbufs(card, new_sb);
2649 }
2650 }
2651 }
2652
2653
2654
2655 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
2656 {
2657 skb_unlink(lb, &card->lbpool.queue);
2658 #ifdef NS_USE_DESTRUCTORS
2659 if (card->lbfqc < card->lbnr.min)
2660 #else
2661 if (card->lbfqc < card->lbnr.init)
2662 {
2663 struct sk_buff *new_lb;
2664 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2665 {
2666 NS_SKB_CB(new_lb)->buf_type = BUF_LG;
2667 skb_queue_tail(&card->lbpool.queue, new_lb);
2668 skb_reserve(new_lb, NS_SMBUFSIZE);
2669 push_rxbufs(card, new_lb);
2670 }
2671 }
2672 if (card->lbfqc < card->lbnr.init)
2673 #endif /* NS_USE_DESTRUCTORS */
2674 {
2675 struct sk_buff *new_lb;
2676 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2677 {
2678 NS_SKB_CB(new_lb)->buf_type = BUF_LG;
2679 skb_queue_tail(&card->lbpool.queue, new_lb);
2680 skb_reserve(new_lb, NS_SMBUFSIZE);
2681 push_rxbufs(card, new_lb);
2682 }
2683 }
2684 }
2685
2686
2687
2688 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
2689 {
2690 u32 stat;
2691 ns_dev *card;
2692 int left;
2693
2694 left = (int) *pos;
2695 card = (ns_dev *) dev->dev_data;
2696 stat = readl(card->membase + STAT);
2697 if (!left--)
2698 return sprintf(page, "Pool count min init max \n");
2699 if (!left--)
2700 return sprintf(page, "Small %5d %5d %5d %5d \n",
2701 ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
2702 card->sbnr.max);
2703 if (!left--)
2704 return sprintf(page, "Large %5d %5d %5d %5d \n",
2705 ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
2706 card->lbnr.max);
2707 if (!left--)
2708 return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
2709 card->hbnr.min, card->hbnr.init, card->hbnr.max);
2710 if (!left--)
2711 return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
2712 card->iovnr.min, card->iovnr.init, card->iovnr.max);
2713 if (!left--)
2714 {
2715 int retval;
2716 retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2717 card->intcnt = 0;
2718 return retval;
2719 }
2720 #if 0
2721 /* Dump 25.6 Mbps PHY registers */
2722 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2723 here just in case it's needed for debugging. */
2724 if (card->max_pcr == ATM_25_PCR && !left--)
2725 {
2726 u32 phy_regs[4];
2727 u32 i;
2728
2729 for (i = 0; i < 4; i++)
2730 {
2731 while (CMD_BUSY(card));
2732 writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
2733 while (CMD_BUSY(card));
2734 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2735 }
2736
2737 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2738 phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
2739 }
2740 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2741 #if 0
2742 /* Dump TST */
2743 if (left-- < NS_TST_NUM_ENTRIES)
2744 {
2745 if (card->tste2vc[left + 1] == NULL)
2746 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2747 else
2748 return sprintf(page, "%5d - %d %d \n", left + 1,
2749 card->tste2vc[left + 1]->tx_vcc->vpi,
2750 card->tste2vc[left + 1]->tx_vcc->vci);
2751 }
2752 #endif /* 0 */
2753 return 0;
2754 }
2755
2756
2757
2758 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
2759 {
2760 ns_dev *card;
2761 pool_levels pl;
2762 int btype;
2763 unsigned long flags;
2764
2765 card = dev->dev_data;
2766 switch (cmd)
2767 {
2768 case NS_GETPSTAT:
2769 if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
2770 return -EFAULT;
2771 switch (pl.buftype)
2772 {
2773 case NS_BUFTYPE_SMALL:
2774 pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
2775 pl.level.min = card->sbnr.min;
2776 pl.level.init = card->sbnr.init;
2777 pl.level.max = card->sbnr.max;
2778 break;
2779
2780 case NS_BUFTYPE_LARGE:
2781 pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
2782 pl.level.min = card->lbnr.min;
2783 pl.level.init = card->lbnr.init;
2784 pl.level.max = card->lbnr.max;
2785 break;
2786
2787 case NS_BUFTYPE_HUGE:
2788 pl.count = card->hbpool.count;
2789 pl.level.min = card->hbnr.min;
2790 pl.level.init = card->hbnr.init;
2791 pl.level.max = card->hbnr.max;
2792 break;
2793
2794 case NS_BUFTYPE_IOVEC:
2795 pl.count = card->iovpool.count;
2796 pl.level.min = card->iovnr.min;
2797 pl.level.init = card->iovnr.init;
2798 pl.level.max = card->iovnr.max;
2799 break;
2800
2801 default:
2802 return -ENOIOCTLCMD;
2803
2804 }
2805 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2806 return (sizeof(pl));
2807 else
2808 return -EFAULT;
2809
2810 case NS_SETBUFLEV:
2811 if (!capable(CAP_NET_ADMIN))
2812 return -EPERM;
2813 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2814 return -EFAULT;
2815 if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
2816 return -EINVAL;
2817 if (pl.level.min == 0)
2818 return -EINVAL;
2819 switch (pl.buftype)
2820 {
2821 case NS_BUFTYPE_SMALL:
2822 if (pl.level.max > TOP_SB)
2823 return -EINVAL;
2824 card->sbnr.min = pl.level.min;
2825 card->sbnr.init = pl.level.init;
2826 card->sbnr.max = pl.level.max;
2827 break;
2828
2829 case NS_BUFTYPE_LARGE:
2830 if (pl.level.max > TOP_LB)
2831 return -EINVAL;
2832 card->lbnr.min = pl.level.min;
2833 card->lbnr.init = pl.level.init;
2834 card->lbnr.max = pl.level.max;
2835 break;
2836
2837 case NS_BUFTYPE_HUGE:
2838 if (pl.level.max > TOP_HB)
2839 return -EINVAL;
2840 card->hbnr.min = pl.level.min;
2841 card->hbnr.init = pl.level.init;
2842 card->hbnr.max = pl.level.max;
2843 break;
2844
2845 case NS_BUFTYPE_IOVEC:
2846 if (pl.level.max > TOP_IOVB)
2847 return -EINVAL;
2848 card->iovnr.min = pl.level.min;
2849 card->iovnr.init = pl.level.init;
2850 card->iovnr.max = pl.level.max;
2851 break;
2852
2853 default:
2854 return -EINVAL;
2855
2856 }
2857 return 0;
2858
2859 case NS_ADJBUFLEV:
2860 if (!capable(CAP_NET_ADMIN))
2861 return -EPERM;
2862 btype = (int) arg; /* an int is the same size as a pointer */
2863 switch (btype)
2864 {
2865 case NS_BUFTYPE_SMALL:
2866 while (card->sbfqc < card->sbnr.init)
2867 {
2868 struct sk_buff *sb;
2869
2870 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2871 if (sb == NULL)
2872 return -ENOMEM;
2873 NS_SKB_CB(sb)->buf_type = BUF_SM;
2874 skb_queue_tail(&card->sbpool.queue, sb);
2875 skb_reserve(sb, NS_AAL0_HEADER);
2876 push_rxbufs(card, sb);
2877 }
2878 break;
2879
2880 case NS_BUFTYPE_LARGE:
2881 while (card->lbfqc < card->lbnr.init)
2882 {
2883 struct sk_buff *lb;
2884
2885 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2886 if (lb == NULL)
2887 return -ENOMEM;
2888 NS_SKB_CB(lb)->buf_type = BUF_LG;
2889 skb_queue_tail(&card->lbpool.queue, lb);
2890 skb_reserve(lb, NS_SMBUFSIZE);
2891 push_rxbufs(card, lb);
2892 }
2893 break;
2894
2895 case NS_BUFTYPE_HUGE:
2896 while (card->hbpool.count > card->hbnr.init)
2897 {
2898 struct sk_buff *hb;
2899
2900 ns_grab_int_lock(card, flags);
2901 hb = skb_dequeue(&card->hbpool.queue);
2902 card->hbpool.count--;
2903 spin_unlock_irqrestore(&card->int_lock, flags);
2904 if (hb == NULL)
2905 printk("nicstar%d: huge buffer count inconsistent.\n",
2906 card->index);
2907 else
2908 dev_kfree_skb_any(hb);
2909
2910 }
2911 while (card->hbpool.count < card->hbnr.init)
2912 {
2913 struct sk_buff *hb;
2914
2915 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2916 if (hb == NULL)
2917 return -ENOMEM;
2918 NS_SKB_CB(hb)->buf_type = BUF_NONE;
2919 ns_grab_int_lock(card, flags);
2920 skb_queue_tail(&card->hbpool.queue, hb);
2921 card->hbpool.count++;
2922 spin_unlock_irqrestore(&card->int_lock, flags);
2923 }
2924 break;
2925
2926 case NS_BUFTYPE_IOVEC:
2927 while (card->iovpool.count > card->iovnr.init)
2928 {
2929 struct sk_buff *iovb;
2930
2931 ns_grab_int_lock(card, flags);
2932 iovb = skb_dequeue(&card->iovpool.queue);
2933 card->iovpool.count--;
2934 spin_unlock_irqrestore(&card->int_lock, flags);
2935 if (iovb == NULL)
2936 printk("nicstar%d: iovec buffer count inconsistent.\n",
2937 card->index);
2938 else
2939 dev_kfree_skb_any(iovb);
2940
2941 }
2942 while (card->iovpool.count < card->iovnr.init)
2943 {
2944 struct sk_buff *iovb;
2945
2946 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2947 if (iovb == NULL)
2948 return -ENOMEM;
2949 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2950 ns_grab_int_lock(card, flags);
2951 skb_queue_tail(&card->iovpool.queue, iovb);
2952 card->iovpool.count++;
2953 spin_unlock_irqrestore(&card->int_lock, flags);
2954 }
2955 break;
2956
2957 default:
2958 return -EINVAL;
2959
2960 }
2961 return 0;
2962
2963 default:
2964 if (dev->phy && dev->phy->ioctl) {
2965 return dev->phy->ioctl(dev, cmd, arg);
2966 }
2967 else {
2968 printk("nicstar%d: %s == NULL \n", card->index,
2969 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2970 return -ENOIOCTLCMD;
2971 }
2972 }
2973 }
2974
2975
2976 static void which_list(ns_dev *card, struct sk_buff *skb)
2977 {
2978 printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
2979 }
2980
2981
2982 static void ns_poll(unsigned long arg)
2983 {
2984 int i;
2985 ns_dev *card;
2986 unsigned long flags;
2987 u32 stat_r, stat_w;
2988
2989 PRINTK("nicstar: Entering ns_poll().\n");
2990 for (i = 0; i < num_cards; i++)
2991 {
2992 card = cards[i];
2993 if (spin_is_locked(&card->int_lock)) {
2994 /* Probably it isn't worth spinning */
2995 continue;
2996 }
2997 ns_grab_int_lock(card, flags);
2998
2999 stat_w = 0;
3000 stat_r = readl(card->membase + STAT);
3001 if (stat_r & NS_STAT_TSIF)
3002 stat_w |= NS_STAT_TSIF;
3003 if (stat_r & NS_STAT_EOPDU)
3004 stat_w |= NS_STAT_EOPDU;
3005
3006 process_tsq(card);
3007 process_rsq(card);
3008
3009 writel(stat_w, card->membase + STAT);
3010 spin_unlock_irqrestore(&card->int_lock, flags);
3011 }
3012 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
3013 PRINTK("nicstar: Leaving ns_poll().\n");
3014 }
3015
3016
3017
3018 static int ns_parse_mac(char *mac, unsigned char *esi)
3019 {
3020 int i, j;
3021 short byte1, byte0;
3022
3023 if (mac == NULL || esi == NULL)
3024 return -1;
3025 j = 0;
3026 for (i = 0; i < 6; i++)
3027 {
3028 if ((byte1 = ns_h2i(mac[j++])) < 0)
3029 return -1;
3030 if ((byte0 = ns_h2i(mac[j++])) < 0)
3031 return -1;
3032 esi[i] = (unsigned char) (byte1 * 16 + byte0);
3033 if (i < 5)
3034 {
3035 if (mac[j++] != ':')
3036 return -1;
3037 }
3038 }
3039 return 0;
3040 }
3041
3042
3043
3044 static short ns_h2i(char c)
3045 {
3046 if (c >= '0' && c <= '9')
3047 return (short) (c - '0');
3048 if (c >= 'A' && c <= 'F')
3049 return (short) (c - 'A' + 10);
3050 if (c >= 'a' && c <= 'f')
3051 return (short) (c - 'a' + 10);
3052 return -1;
3053 }
3054
3055
3056
3057 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
3058 unsigned long addr)
3059 {
3060 ns_dev *card;
3061 unsigned long flags;
3062
3063 card = dev->dev_data;
3064 ns_grab_res_lock(card, flags);
3065 while(CMD_BUSY(card));
3066 writel((unsigned long) value, card->membase + DR0);
3067 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
3068 card->membase + CMD);
3069 spin_unlock_irqrestore(&card->res_lock, flags);
3070 }
3071
3072
3073
3074 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
3075 {
3076 ns_dev *card;
3077 unsigned long flags;
3078 unsigned long data;
3079
3080 card = dev->dev_data;
3081 ns_grab_res_lock(card, flags);
3082 while(CMD_BUSY(card));
3083 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
3084 card->membase + CMD);
3085 while(CMD_BUSY(card));
3086 data = readl(card->membase + DR0) & 0x000000FF;
3087 spin_unlock_irqrestore(&card->res_lock, flags);
3088 return (unsigned char) data;
3089 }
3090
3091
3092
3093 module_init(nicstar_init);
3094 module_exit(nicstar_cleanup);
kernel source for telekom puls (alcatel/mediatek)