Merge branch 'hwpoison' of git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / acpi / processor_idle.c
1 /*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/acpi.h>
39 #include <linux/dmi.h>
40 #include <linux/moduleparam.h>
41 #include <linux/sched.h> /* need_resched() */
42 #include <linux/pm_qos_params.h>
43 #include <linux/clockchips.h>
44 #include <linux/cpuidle.h>
45 #include <linux/irqflags.h>
46
47 /*
48 * Include the apic definitions for x86 to have the APIC timer related defines
49 * available also for UP (on SMP it gets magically included via linux/smp.h).
50 * asm/acpi.h is not an option, as it would require more include magic. Also
51 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
52 */
53 #ifdef CONFIG_X86
54 #include <asm/apic.h>
55 #endif
56
57 #include <asm/io.h>
58 #include <asm/uaccess.h>
59
60 #include <acpi/acpi_bus.h>
61 #include <acpi/processor.h>
62 #include <asm/processor.h>
63
64 #define PREFIX "ACPI: "
65
66 #define ACPI_PROCESSOR_CLASS "processor"
67 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
68 ACPI_MODULE_NAME("processor_idle");
69 #define ACPI_PROCESSOR_FILE_POWER "power"
70 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
71 #define C2_OVERHEAD 1 /* 1us */
72 #define C3_OVERHEAD 1 /* 1us */
73 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
74
75 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
76 module_param(max_cstate, uint, 0000);
77 static unsigned int nocst __read_mostly;
78 module_param(nocst, uint, 0000);
79 static int bm_check_disable __read_mostly;
80 module_param(bm_check_disable, uint, 0000);
81
82 static unsigned int latency_factor __read_mostly = 2;
83 module_param(latency_factor, uint, 0644);
84
85 #ifdef CONFIG_ACPI_PROCFS
86 static u64 us_to_pm_timer_ticks(s64 t)
87 {
88 return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
89 }
90 #endif
91
92 /*
93 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
94 * For now disable this. Probably a bug somewhere else.
95 *
96 * To skip this limit, boot/load with a large max_cstate limit.
97 */
98 static int set_max_cstate(const struct dmi_system_id *id)
99 {
100 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
101 return 0;
102
103 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
104 " Override with \"processor.max_cstate=%d\"\n", id->ident,
105 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
106
107 max_cstate = (long)id->driver_data;
108
109 return 0;
110 }
111
112 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
113 callers to only run once -AK */
114 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
115 { set_max_cstate, "Clevo 5600D", {
116 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
117 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
118 (void *)2},
119 { set_max_cstate, "Pavilion zv5000", {
120 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
121 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
122 (void *)1},
123 { set_max_cstate, "Asus L8400B", {
124 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
125 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
126 (void *)1},
127 {},
128 };
129
130
131 /*
132 * Callers should disable interrupts before the call and enable
133 * interrupts after return.
134 */
135 static void acpi_safe_halt(void)
136 {
137 current_thread_info()->status &= ~TS_POLLING;
138 /*
139 * TS_POLLING-cleared state must be visible before we
140 * test NEED_RESCHED:
141 */
142 smp_mb();
143 if (!need_resched()) {
144 safe_halt();
145 local_irq_disable();
146 }
147 current_thread_info()->status |= TS_POLLING;
148 }
149
150 #ifdef ARCH_APICTIMER_STOPS_ON_C3
151
152 /*
153 * Some BIOS implementations switch to C3 in the published C2 state.
154 * This seems to be a common problem on AMD boxen, but other vendors
155 * are affected too. We pick the most conservative approach: we assume
156 * that the local APIC stops in both C2 and C3.
157 */
158 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
159 struct acpi_processor_cx *cx)
160 {
161 struct acpi_processor_power *pwr = &pr->power;
162 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
163
164 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
165 return;
166
167 if (c1e_detected)
168 type = ACPI_STATE_C1;
169
170 /*
171 * Check, if one of the previous states already marked the lapic
172 * unstable
173 */
174 if (pwr->timer_broadcast_on_state < state)
175 return;
176
177 if (cx->type >= type)
178 pr->power.timer_broadcast_on_state = state;
179 }
180
181 static void __lapic_timer_propagate_broadcast(void *arg)
182 {
183 struct acpi_processor *pr = (struct acpi_processor *) arg;
184 unsigned long reason;
185
186 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
187 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
188
189 clockevents_notify(reason, &pr->id);
190 }
191
192 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
193 {
194 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
195 (void *)pr, 1);
196 }
197
198 /* Power(C) State timer broadcast control */
199 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
200 struct acpi_processor_cx *cx,
201 int broadcast)
202 {
203 int state = cx - pr->power.states;
204
205 if (state >= pr->power.timer_broadcast_on_state) {
206 unsigned long reason;
207
208 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
209 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
210 clockevents_notify(reason, &pr->id);
211 }
212 }
213
214 #else
215
216 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
217 struct acpi_processor_cx *cstate) { }
218 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
219 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
220 struct acpi_processor_cx *cx,
221 int broadcast)
222 {
223 }
224
225 #endif
226
227 /*
228 * Suspend / resume control
229 */
230 static int acpi_idle_suspend;
231 static u32 saved_bm_rld;
232
233 static void acpi_idle_bm_rld_save(void)
234 {
235 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
236 }
237 static void acpi_idle_bm_rld_restore(void)
238 {
239 u32 resumed_bm_rld;
240
241 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
242
243 if (resumed_bm_rld != saved_bm_rld)
244 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
245 }
246
247 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
248 {
249 if (acpi_idle_suspend == 1)
250 return 0;
251
252 acpi_idle_bm_rld_save();
253 acpi_idle_suspend = 1;
254 return 0;
255 }
256
257 int acpi_processor_resume(struct acpi_device * device)
258 {
259 if (acpi_idle_suspend == 0)
260 return 0;
261
262 acpi_idle_bm_rld_restore();
263 acpi_idle_suspend = 0;
264 return 0;
265 }
266
267 #if defined(CONFIG_X86)
268 static void tsc_check_state(int state)
269 {
270 switch (boot_cpu_data.x86_vendor) {
271 case X86_VENDOR_AMD:
272 case X86_VENDOR_INTEL:
273 /*
274 * AMD Fam10h TSC will tick in all
275 * C/P/S0/S1 states when this bit is set.
276 */
277 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
278 return;
279
280 /*FALL THROUGH*/
281 default:
282 /* TSC could halt in idle, so notify users */
283 if (state > ACPI_STATE_C1)
284 mark_tsc_unstable("TSC halts in idle");
285 }
286 }
287 #else
288 static void tsc_check_state(int state) { return; }
289 #endif
290
291 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
292 {
293
294 if (!pr)
295 return -EINVAL;
296
297 if (!pr->pblk)
298 return -ENODEV;
299
300 /* if info is obtained from pblk/fadt, type equals state */
301 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
302 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
303
304 #ifndef CONFIG_HOTPLUG_CPU
305 /*
306 * Check for P_LVL2_UP flag before entering C2 and above on
307 * an SMP system.
308 */
309 if ((num_online_cpus() > 1) &&
310 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
311 return -ENODEV;
312 #endif
313
314 /* determine C2 and C3 address from pblk */
315 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
316 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
317
318 /* determine latencies from FADT */
319 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
320 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
321
322 /*
323 * FADT specified C2 latency must be less than or equal to
324 * 100 microseconds.
325 */
326 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
327 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
328 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
329 /* invalidate C2 */
330 pr->power.states[ACPI_STATE_C2].address = 0;
331 }
332
333 /*
334 * FADT supplied C3 latency must be less than or equal to
335 * 1000 microseconds.
336 */
337 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
338 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
339 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
340 /* invalidate C3 */
341 pr->power.states[ACPI_STATE_C3].address = 0;
342 }
343
344 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
345 "lvl2[0x%08x] lvl3[0x%08x]\n",
346 pr->power.states[ACPI_STATE_C2].address,
347 pr->power.states[ACPI_STATE_C3].address));
348
349 return 0;
350 }
351
352 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
353 {
354 if (!pr->power.states[ACPI_STATE_C1].valid) {
355 /* set the first C-State to C1 */
356 /* all processors need to support C1 */
357 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
358 pr->power.states[ACPI_STATE_C1].valid = 1;
359 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
360 }
361 /* the C0 state only exists as a filler in our array */
362 pr->power.states[ACPI_STATE_C0].valid = 1;
363 return 0;
364 }
365
366 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
367 {
368 acpi_status status = 0;
369 u64 count;
370 int current_count;
371 int i;
372 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
373 union acpi_object *cst;
374
375
376 if (nocst)
377 return -ENODEV;
378
379 current_count = 0;
380
381 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
382 if (ACPI_FAILURE(status)) {
383 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
384 return -ENODEV;
385 }
386
387 cst = buffer.pointer;
388
389 /* There must be at least 2 elements */
390 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
391 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
392 status = -EFAULT;
393 goto end;
394 }
395
396 count = cst->package.elements[0].integer.value;
397
398 /* Validate number of power states. */
399 if (count < 1 || count != cst->package.count - 1) {
400 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
401 status = -EFAULT;
402 goto end;
403 }
404
405 /* Tell driver that at least _CST is supported. */
406 pr->flags.has_cst = 1;
407
408 for (i = 1; i <= count; i++) {
409 union acpi_object *element;
410 union acpi_object *obj;
411 struct acpi_power_register *reg;
412 struct acpi_processor_cx cx;
413
414 memset(&cx, 0, sizeof(cx));
415
416 element = &(cst->package.elements[i]);
417 if (element->type != ACPI_TYPE_PACKAGE)
418 continue;
419
420 if (element->package.count != 4)
421 continue;
422
423 obj = &(element->package.elements[0]);
424
425 if (obj->type != ACPI_TYPE_BUFFER)
426 continue;
427
428 reg = (struct acpi_power_register *)obj->buffer.pointer;
429
430 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
431 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
432 continue;
433
434 /* There should be an easy way to extract an integer... */
435 obj = &(element->package.elements[1]);
436 if (obj->type != ACPI_TYPE_INTEGER)
437 continue;
438
439 cx.type = obj->integer.value;
440 /*
441 * Some buggy BIOSes won't list C1 in _CST -
442 * Let acpi_processor_get_power_info_default() handle them later
443 */
444 if (i == 1 && cx.type != ACPI_STATE_C1)
445 current_count++;
446
447 cx.address = reg->address;
448 cx.index = current_count + 1;
449
450 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
451 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
452 if (acpi_processor_ffh_cstate_probe
453 (pr->id, &cx, reg) == 0) {
454 cx.entry_method = ACPI_CSTATE_FFH;
455 } else if (cx.type == ACPI_STATE_C1) {
456 /*
457 * C1 is a special case where FIXED_HARDWARE
458 * can be handled in non-MWAIT way as well.
459 * In that case, save this _CST entry info.
460 * Otherwise, ignore this info and continue.
461 */
462 cx.entry_method = ACPI_CSTATE_HALT;
463 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
464 } else {
465 continue;
466 }
467 if (cx.type == ACPI_STATE_C1 &&
468 (idle_halt || idle_nomwait)) {
469 /*
470 * In most cases the C1 space_id obtained from
471 * _CST object is FIXED_HARDWARE access mode.
472 * But when the option of idle=halt is added,
473 * the entry_method type should be changed from
474 * CSTATE_FFH to CSTATE_HALT.
475 * When the option of idle=nomwait is added,
476 * the C1 entry_method type should be
477 * CSTATE_HALT.
478 */
479 cx.entry_method = ACPI_CSTATE_HALT;
480 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
481 }
482 } else {
483 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
484 cx.address);
485 }
486
487 if (cx.type == ACPI_STATE_C1) {
488 cx.valid = 1;
489 }
490
491 obj = &(element->package.elements[2]);
492 if (obj->type != ACPI_TYPE_INTEGER)
493 continue;
494
495 cx.latency = obj->integer.value;
496
497 obj = &(element->package.elements[3]);
498 if (obj->type != ACPI_TYPE_INTEGER)
499 continue;
500
501 cx.power = obj->integer.value;
502
503 current_count++;
504 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
505
506 /*
507 * We support total ACPI_PROCESSOR_MAX_POWER - 1
508 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
509 */
510 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
511 printk(KERN_WARNING
512 "Limiting number of power states to max (%d)\n",
513 ACPI_PROCESSOR_MAX_POWER);
514 printk(KERN_WARNING
515 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
516 break;
517 }
518 }
519
520 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
521 current_count));
522
523 /* Validate number of power states discovered */
524 if (current_count < 2)
525 status = -EFAULT;
526
527 end:
528 kfree(buffer.pointer);
529
530 return status;
531 }
532
533 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
534 struct acpi_processor_cx *cx)
535 {
536 static int bm_check_flag = -1;
537 static int bm_control_flag = -1;
538
539
540 if (!cx->address)
541 return;
542
543 /*
544 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
545 * DMA transfers are used by any ISA device to avoid livelock.
546 * Note that we could disable Type-F DMA (as recommended by
547 * the erratum), but this is known to disrupt certain ISA
548 * devices thus we take the conservative approach.
549 */
550 else if (errata.piix4.fdma) {
551 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
552 "C3 not supported on PIIX4 with Type-F DMA\n"));
553 return;
554 }
555
556 /* All the logic here assumes flags.bm_check is same across all CPUs */
557 if (bm_check_flag == -1) {
558 /* Determine whether bm_check is needed based on CPU */
559 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
560 bm_check_flag = pr->flags.bm_check;
561 bm_control_flag = pr->flags.bm_control;
562 } else {
563 pr->flags.bm_check = bm_check_flag;
564 pr->flags.bm_control = bm_control_flag;
565 }
566
567 if (pr->flags.bm_check) {
568 if (!pr->flags.bm_control) {
569 if (pr->flags.has_cst != 1) {
570 /* bus mastering control is necessary */
571 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
572 "C3 support requires BM control\n"));
573 return;
574 } else {
575 /* Here we enter C3 without bus mastering */
576 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
577 "C3 support without BM control\n"));
578 }
579 }
580 } else {
581 /*
582 * WBINVD should be set in fadt, for C3 state to be
583 * supported on when bm_check is not required.
584 */
585 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
586 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
587 "Cache invalidation should work properly"
588 " for C3 to be enabled on SMP systems\n"));
589 return;
590 }
591 }
592
593 /*
594 * Otherwise we've met all of our C3 requirements.
595 * Normalize the C3 latency to expidite policy. Enable
596 * checking of bus mastering status (bm_check) so we can
597 * use this in our C3 policy
598 */
599 cx->valid = 1;
600
601 cx->latency_ticks = cx->latency;
602 /*
603 * On older chipsets, BM_RLD needs to be set
604 * in order for Bus Master activity to wake the
605 * system from C3. Newer chipsets handle DMA
606 * during C3 automatically and BM_RLD is a NOP.
607 * In either case, the proper way to
608 * handle BM_RLD is to set it and leave it set.
609 */
610 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
611
612 return;
613 }
614
615 static int acpi_processor_power_verify(struct acpi_processor *pr)
616 {
617 unsigned int i;
618 unsigned int working = 0;
619
620 pr->power.timer_broadcast_on_state = INT_MAX;
621
622 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
623 struct acpi_processor_cx *cx = &pr->power.states[i];
624
625 switch (cx->type) {
626 case ACPI_STATE_C1:
627 cx->valid = 1;
628 break;
629
630 case ACPI_STATE_C2:
631 if (!cx->address)
632 break;
633 cx->valid = 1;
634 cx->latency_ticks = cx->latency; /* Normalize latency */
635 break;
636
637 case ACPI_STATE_C3:
638 acpi_processor_power_verify_c3(pr, cx);
639 break;
640 }
641 if (!cx->valid)
642 continue;
643
644 lapic_timer_check_state(i, pr, cx);
645 tsc_check_state(cx->type);
646 working++;
647 }
648
649 lapic_timer_propagate_broadcast(pr);
650
651 return (working);
652 }
653
654 static int acpi_processor_get_power_info(struct acpi_processor *pr)
655 {
656 unsigned int i;
657 int result;
658
659
660 /* NOTE: the idle thread may not be running while calling
661 * this function */
662
663 /* Zero initialize all the C-states info. */
664 memset(pr->power.states, 0, sizeof(pr->power.states));
665
666 result = acpi_processor_get_power_info_cst(pr);
667 if (result == -ENODEV)
668 result = acpi_processor_get_power_info_fadt(pr);
669
670 if (result)
671 return result;
672
673 acpi_processor_get_power_info_default(pr);
674
675 pr->power.count = acpi_processor_power_verify(pr);
676
677 /*
678 * if one state of type C2 or C3 is available, mark this
679 * CPU as being "idle manageable"
680 */
681 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
682 if (pr->power.states[i].valid) {
683 pr->power.count = i;
684 if (pr->power.states[i].type >= ACPI_STATE_C2)
685 pr->flags.power = 1;
686 }
687 }
688
689 return 0;
690 }
691
692 #ifdef CONFIG_ACPI_PROCFS
693 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
694 {
695 struct acpi_processor *pr = seq->private;
696 unsigned int i;
697
698
699 if (!pr)
700 goto end;
701
702 seq_printf(seq, "active state: C%zd\n"
703 "max_cstate: C%d\n"
704 "maximum allowed latency: %d usec\n",
705 pr->power.state ? pr->power.state - pr->power.states : 0,
706 max_cstate, pm_qos_request(PM_QOS_CPU_DMA_LATENCY));
707
708 seq_puts(seq, "states:\n");
709
710 for (i = 1; i <= pr->power.count; i++) {
711 seq_printf(seq, " %cC%d: ",
712 (&pr->power.states[i] ==
713 pr->power.state ? '*' : ' '), i);
714
715 if (!pr->power.states[i].valid) {
716 seq_puts(seq, "<not supported>\n");
717 continue;
718 }
719
720 switch (pr->power.states[i].type) {
721 case ACPI_STATE_C1:
722 seq_printf(seq, "type[C1] ");
723 break;
724 case ACPI_STATE_C2:
725 seq_printf(seq, "type[C2] ");
726 break;
727 case ACPI_STATE_C3:
728 seq_printf(seq, "type[C3] ");
729 break;
730 default:
731 seq_printf(seq, "type[--] ");
732 break;
733 }
734
735 seq_puts(seq, "promotion[--] ");
736
737 seq_puts(seq, "demotion[--] ");
738
739 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020Lu]\n",
740 pr->power.states[i].latency,
741 pr->power.states[i].usage,
742 us_to_pm_timer_ticks(pr->power.states[i].time));
743 }
744
745 end:
746 return 0;
747 }
748
749 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
750 {
751 return single_open(file, acpi_processor_power_seq_show,
752 PDE(inode)->data);
753 }
754
755 static const struct file_operations acpi_processor_power_fops = {
756 .owner = THIS_MODULE,
757 .open = acpi_processor_power_open_fs,
758 .read = seq_read,
759 .llseek = seq_lseek,
760 .release = single_release,
761 };
762 #endif
763
764 /**
765 * acpi_idle_bm_check - checks if bus master activity was detected
766 */
767 static int acpi_idle_bm_check(void)
768 {
769 u32 bm_status = 0;
770
771 if (bm_check_disable)
772 return 0;
773
774 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
775 if (bm_status)
776 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
777 /*
778 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
779 * the true state of bus mastering activity; forcing us to
780 * manually check the BMIDEA bit of each IDE channel.
781 */
782 else if (errata.piix4.bmisx) {
783 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
784 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
785 bm_status = 1;
786 }
787 return bm_status;
788 }
789
790 /**
791 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
792 * @cx: cstate data
793 *
794 * Caller disables interrupt before call and enables interrupt after return.
795 */
796 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
797 {
798 /* Don't trace irqs off for idle */
799 stop_critical_timings();
800 if (cx->entry_method == ACPI_CSTATE_FFH) {
801 /* Call into architectural FFH based C-state */
802 acpi_processor_ffh_cstate_enter(cx);
803 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
804 acpi_safe_halt();
805 } else {
806 int unused;
807 /* IO port based C-state */
808 inb(cx->address);
809 /* Dummy wait op - must do something useless after P_LVL2 read
810 because chipsets cannot guarantee that STPCLK# signal
811 gets asserted in time to freeze execution properly. */
812 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
813 }
814 start_critical_timings();
815 }
816
817 /**
818 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
819 * @dev: the target CPU
820 * @state: the state data
821 *
822 * This is equivalent to the HALT instruction.
823 */
824 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
825 struct cpuidle_state *state)
826 {
827 ktime_t kt1, kt2;
828 s64 idle_time;
829 struct acpi_processor *pr;
830 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
831
832 pr = __get_cpu_var(processors);
833
834 if (unlikely(!pr))
835 return 0;
836
837 local_irq_disable();
838
839 /* Do not access any ACPI IO ports in suspend path */
840 if (acpi_idle_suspend) {
841 local_irq_enable();
842 cpu_relax();
843 return 0;
844 }
845
846 lapic_timer_state_broadcast(pr, cx, 1);
847 kt1 = ktime_get_real();
848 acpi_idle_do_entry(cx);
849 kt2 = ktime_get_real();
850 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
851
852 local_irq_enable();
853 cx->usage++;
854 lapic_timer_state_broadcast(pr, cx, 0);
855
856 return idle_time;
857 }
858
859 /**
860 * acpi_idle_enter_simple - enters an ACPI state without BM handling
861 * @dev: the target CPU
862 * @state: the state data
863 */
864 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
865 struct cpuidle_state *state)
866 {
867 struct acpi_processor *pr;
868 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
869 ktime_t kt1, kt2;
870 s64 idle_time_ns;
871 s64 idle_time;
872
873 pr = __get_cpu_var(processors);
874
875 if (unlikely(!pr))
876 return 0;
877
878 if (acpi_idle_suspend)
879 return(acpi_idle_enter_c1(dev, state));
880
881 local_irq_disable();
882
883 if (cx->entry_method != ACPI_CSTATE_FFH) {
884 current_thread_info()->status &= ~TS_POLLING;
885 /*
886 * TS_POLLING-cleared state must be visible before we test
887 * NEED_RESCHED:
888 */
889 smp_mb();
890
891 if (unlikely(need_resched())) {
892 current_thread_info()->status |= TS_POLLING;
893 local_irq_enable();
894 return 0;
895 }
896 }
897
898 /*
899 * Must be done before busmaster disable as we might need to
900 * access HPET !
901 */
902 lapic_timer_state_broadcast(pr, cx, 1);
903
904 if (cx->type == ACPI_STATE_C3)
905 ACPI_FLUSH_CPU_CACHE();
906
907 kt1 = ktime_get_real();
908 /* Tell the scheduler that we are going deep-idle: */
909 sched_clock_idle_sleep_event();
910 acpi_idle_do_entry(cx);
911 kt2 = ktime_get_real();
912 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
913 idle_time = idle_time_ns;
914 do_div(idle_time, NSEC_PER_USEC);
915
916 /* Tell the scheduler how much we idled: */
917 sched_clock_idle_wakeup_event(idle_time_ns);
918
919 local_irq_enable();
920 if (cx->entry_method != ACPI_CSTATE_FFH)
921 current_thread_info()->status |= TS_POLLING;
922
923 cx->usage++;
924
925 lapic_timer_state_broadcast(pr, cx, 0);
926 cx->time += idle_time;
927 return idle_time;
928 }
929
930 static int c3_cpu_count;
931 static DEFINE_SPINLOCK(c3_lock);
932
933 /**
934 * acpi_idle_enter_bm - enters C3 with proper BM handling
935 * @dev: the target CPU
936 * @state: the state data
937 *
938 * If BM is detected, the deepest non-C3 idle state is entered instead.
939 */
940 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
941 struct cpuidle_state *state)
942 {
943 struct acpi_processor *pr;
944 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
945 ktime_t kt1, kt2;
946 s64 idle_time_ns;
947 s64 idle_time;
948
949
950 pr = __get_cpu_var(processors);
951
952 if (unlikely(!pr))
953 return 0;
954
955 if (acpi_idle_suspend)
956 return(acpi_idle_enter_c1(dev, state));
957
958 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
959 if (dev->safe_state) {
960 dev->last_state = dev->safe_state;
961 return dev->safe_state->enter(dev, dev->safe_state);
962 } else {
963 local_irq_disable();
964 acpi_safe_halt();
965 local_irq_enable();
966 return 0;
967 }
968 }
969
970 local_irq_disable();
971
972 if (cx->entry_method != ACPI_CSTATE_FFH) {
973 current_thread_info()->status &= ~TS_POLLING;
974 /*
975 * TS_POLLING-cleared state must be visible before we test
976 * NEED_RESCHED:
977 */
978 smp_mb();
979
980 if (unlikely(need_resched())) {
981 current_thread_info()->status |= TS_POLLING;
982 local_irq_enable();
983 return 0;
984 }
985 }
986
987 acpi_unlazy_tlb(smp_processor_id());
988
989 /* Tell the scheduler that we are going deep-idle: */
990 sched_clock_idle_sleep_event();
991 /*
992 * Must be done before busmaster disable as we might need to
993 * access HPET !
994 */
995 lapic_timer_state_broadcast(pr, cx, 1);
996
997 kt1 = ktime_get_real();
998 /*
999 * disable bus master
1000 * bm_check implies we need ARB_DIS
1001 * !bm_check implies we need cache flush
1002 * bm_control implies whether we can do ARB_DIS
1003 *
1004 * That leaves a case where bm_check is set and bm_control is
1005 * not set. In that case we cannot do much, we enter C3
1006 * without doing anything.
1007 */
1008 if (pr->flags.bm_check && pr->flags.bm_control) {
1009 spin_lock(&c3_lock);
1010 c3_cpu_count++;
1011 /* Disable bus master arbitration when all CPUs are in C3 */
1012 if (c3_cpu_count == num_online_cpus())
1013 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
1014 spin_unlock(&c3_lock);
1015 } else if (!pr->flags.bm_check) {
1016 ACPI_FLUSH_CPU_CACHE();
1017 }
1018
1019 acpi_idle_do_entry(cx);
1020
1021 /* Re-enable bus master arbitration */
1022 if (pr->flags.bm_check && pr->flags.bm_control) {
1023 spin_lock(&c3_lock);
1024 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
1025 c3_cpu_count--;
1026 spin_unlock(&c3_lock);
1027 }
1028 kt2 = ktime_get_real();
1029 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
1030 idle_time = idle_time_ns;
1031 do_div(idle_time, NSEC_PER_USEC);
1032
1033 /* Tell the scheduler how much we idled: */
1034 sched_clock_idle_wakeup_event(idle_time_ns);
1035
1036 local_irq_enable();
1037 if (cx->entry_method != ACPI_CSTATE_FFH)
1038 current_thread_info()->status |= TS_POLLING;
1039
1040 cx->usage++;
1041
1042 lapic_timer_state_broadcast(pr, cx, 0);
1043 cx->time += idle_time;
1044 return idle_time;
1045 }
1046
1047 struct cpuidle_driver acpi_idle_driver = {
1048 .name = "acpi_idle",
1049 .owner = THIS_MODULE,
1050 };
1051
1052 /**
1053 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1054 * @pr: the ACPI processor
1055 */
1056 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1057 {
1058 int i, count = CPUIDLE_DRIVER_STATE_START;
1059 struct acpi_processor_cx *cx;
1060 struct cpuidle_state *state;
1061 struct cpuidle_device *dev = &pr->power.dev;
1062
1063 if (!pr->flags.power_setup_done)
1064 return -EINVAL;
1065
1066 if (pr->flags.power == 0) {
1067 return -EINVAL;
1068 }
1069
1070 dev->cpu = pr->id;
1071 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1072 dev->states[i].name[0] = '\0';
1073 dev->states[i].desc[0] = '\0';
1074 }
1075
1076 if (max_cstate == 0)
1077 max_cstate = 1;
1078
1079 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1080 cx = &pr->power.states[i];
1081 state = &dev->states[count];
1082
1083 if (!cx->valid)
1084 continue;
1085
1086 #ifdef CONFIG_HOTPLUG_CPU
1087 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1088 !pr->flags.has_cst &&
1089 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1090 continue;
1091 #endif
1092 cpuidle_set_statedata(state, cx);
1093
1094 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1095 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1096 state->exit_latency = cx->latency;
1097 state->target_residency = cx->latency * latency_factor;
1098 state->power_usage = cx->power;
1099
1100 state->flags = 0;
1101 switch (cx->type) {
1102 case ACPI_STATE_C1:
1103 state->flags |= CPUIDLE_FLAG_SHALLOW;
1104 if (cx->entry_method == ACPI_CSTATE_FFH)
1105 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1106
1107 state->enter = acpi_idle_enter_c1;
1108 dev->safe_state = state;
1109 break;
1110
1111 case ACPI_STATE_C2:
1112 state->flags |= CPUIDLE_FLAG_BALANCED;
1113 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1114 state->enter = acpi_idle_enter_simple;
1115 dev->safe_state = state;
1116 break;
1117
1118 case ACPI_STATE_C3:
1119 state->flags |= CPUIDLE_FLAG_DEEP;
1120 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1121 state->flags |= CPUIDLE_FLAG_CHECK_BM;
1122 state->enter = pr->flags.bm_check ?
1123 acpi_idle_enter_bm :
1124 acpi_idle_enter_simple;
1125 break;
1126 }
1127
1128 count++;
1129 if (count == CPUIDLE_STATE_MAX)
1130 break;
1131 }
1132
1133 dev->state_count = count;
1134
1135 if (!count)
1136 return -EINVAL;
1137
1138 return 0;
1139 }
1140
1141 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1142 {
1143 int ret = 0;
1144
1145 if (boot_option_idle_override)
1146 return 0;
1147
1148 if (!pr)
1149 return -EINVAL;
1150
1151 if (nocst) {
1152 return -ENODEV;
1153 }
1154
1155 if (!pr->flags.power_setup_done)
1156 return -ENODEV;
1157
1158 cpuidle_pause_and_lock();
1159 cpuidle_disable_device(&pr->power.dev);
1160 acpi_processor_get_power_info(pr);
1161 if (pr->flags.power) {
1162 acpi_processor_setup_cpuidle(pr);
1163 ret = cpuidle_enable_device(&pr->power.dev);
1164 }
1165 cpuidle_resume_and_unlock();
1166
1167 return ret;
1168 }
1169
1170 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1171 struct acpi_device *device)
1172 {
1173 acpi_status status = 0;
1174 static int first_run;
1175 #ifdef CONFIG_ACPI_PROCFS
1176 struct proc_dir_entry *entry = NULL;
1177 #endif
1178
1179 if (boot_option_idle_override)
1180 return 0;
1181
1182 if (!first_run) {
1183 if (idle_halt) {
1184 /*
1185 * When the boot option of "idle=halt" is added, halt
1186 * is used for CPU IDLE.
1187 * In such case C2/C3 is meaningless. So the max_cstate
1188 * is set to one.
1189 */
1190 max_cstate = 1;
1191 }
1192 dmi_check_system(processor_power_dmi_table);
1193 max_cstate = acpi_processor_cstate_check(max_cstate);
1194 if (max_cstate < ACPI_C_STATES_MAX)
1195 printk(KERN_NOTICE
1196 "ACPI: processor limited to max C-state %d\n",
1197 max_cstate);
1198 first_run++;
1199 }
1200
1201 if (!pr)
1202 return -EINVAL;
1203
1204 if (acpi_gbl_FADT.cst_control && !nocst) {
1205 status =
1206 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1207 if (ACPI_FAILURE(status)) {
1208 ACPI_EXCEPTION((AE_INFO, status,
1209 "Notifying BIOS of _CST ability failed"));
1210 }
1211 }
1212
1213 acpi_processor_get_power_info(pr);
1214 pr->flags.power_setup_done = 1;
1215
1216 /*
1217 * Install the idle handler if processor power management is supported.
1218 * Note that we use previously set idle handler will be used on
1219 * platforms that only support C1.
1220 */
1221 if (pr->flags.power) {
1222 acpi_processor_setup_cpuidle(pr);
1223 if (cpuidle_register_device(&pr->power.dev))
1224 return -EIO;
1225 }
1226 #ifdef CONFIG_ACPI_PROCFS
1227 /* 'power' [R] */
1228 entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1229 S_IRUGO, acpi_device_dir(device),
1230 &acpi_processor_power_fops,
1231 acpi_driver_data(device));
1232 if (!entry)
1233 return -EIO;
1234 #endif
1235 return 0;
1236 }
1237
1238 int acpi_processor_power_exit(struct acpi_processor *pr,
1239 struct acpi_device *device)
1240 {
1241 if (boot_option_idle_override)
1242 return 0;
1243
1244 cpuidle_unregister_device(&pr->power.dev);
1245 pr->flags.power_setup_done = 0;
1246
1247 #ifdef CONFIG_ACPI_PROCFS
1248 if (acpi_device_dir(device))
1249 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1250 acpi_device_dir(device));
1251 #endif
1252
1253 return 0;
1254 }