Merge branch 'stable/bug.fixes' of git://git.kernel.org/pub/scm/linux/kernel/git...
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / arch / x86 / xen / enlighten.c
1 /*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14 #include <linux/cpu.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/smp.h>
18 #include <linux/preempt.h>
19 #include <linux/hardirq.h>
20 #include <linux/percpu.h>
21 #include <linux/delay.h>
22 #include <linux/start_kernel.h>
23 #include <linux/sched.h>
24 #include <linux/kprobes.h>
25 #include <linux/bootmem.h>
26 #include <linux/module.h>
27 #include <linux/mm.h>
28 #include <linux/page-flags.h>
29 #include <linux/highmem.h>
30 #include <linux/console.h>
31 #include <linux/pci.h>
32 #include <linux/gfp.h>
33 #include <linux/memblock.h>
34
35 #include <xen/xen.h>
36 #include <xen/interface/xen.h>
37 #include <xen/interface/version.h>
38 #include <xen/interface/physdev.h>
39 #include <xen/interface/vcpu.h>
40 #include <xen/interface/memory.h>
41 #include <xen/features.h>
42 #include <xen/page.h>
43 #include <xen/hvm.h>
44 #include <xen/hvc-console.h>
45
46 #include <asm/paravirt.h>
47 #include <asm/apic.h>
48 #include <asm/page.h>
49 #include <asm/xen/pci.h>
50 #include <asm/xen/hypercall.h>
51 #include <asm/xen/hypervisor.h>
52 #include <asm/fixmap.h>
53 #include <asm/processor.h>
54 #include <asm/proto.h>
55 #include <asm/msr-index.h>
56 #include <asm/traps.h>
57 #include <asm/setup.h>
58 #include <asm/desc.h>
59 #include <asm/pgalloc.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
62 #include <asm/reboot.h>
63 #include <asm/stackprotector.h>
64 #include <asm/hypervisor.h>
65
66 #include "xen-ops.h"
67 #include "mmu.h"
68 #include "multicalls.h"
69
70 EXPORT_SYMBOL_GPL(hypercall_page);
71
72 DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
73 DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
74
75 enum xen_domain_type xen_domain_type = XEN_NATIVE;
76 EXPORT_SYMBOL_GPL(xen_domain_type);
77
78 unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
79 EXPORT_SYMBOL(machine_to_phys_mapping);
80 unsigned long machine_to_phys_nr;
81 EXPORT_SYMBOL(machine_to_phys_nr);
82
83 struct start_info *xen_start_info;
84 EXPORT_SYMBOL_GPL(xen_start_info);
85
86 struct shared_info xen_dummy_shared_info;
87
88 void *xen_initial_gdt;
89
90 RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
91 __read_mostly int xen_have_vector_callback;
92 EXPORT_SYMBOL_GPL(xen_have_vector_callback);
93
94 /*
95 * Point at some empty memory to start with. We map the real shared_info
96 * page as soon as fixmap is up and running.
97 */
98 struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
99
100 /*
101 * Flag to determine whether vcpu info placement is available on all
102 * VCPUs. We assume it is to start with, and then set it to zero on
103 * the first failure. This is because it can succeed on some VCPUs
104 * and not others, since it can involve hypervisor memory allocation,
105 * or because the guest failed to guarantee all the appropriate
106 * constraints on all VCPUs (ie buffer can't cross a page boundary).
107 *
108 * Note that any particular CPU may be using a placed vcpu structure,
109 * but we can only optimise if the all are.
110 *
111 * 0: not available, 1: available
112 */
113 static int have_vcpu_info_placement = 1;
114
115 static void clamp_max_cpus(void)
116 {
117 #ifdef CONFIG_SMP
118 if (setup_max_cpus > MAX_VIRT_CPUS)
119 setup_max_cpus = MAX_VIRT_CPUS;
120 #endif
121 }
122
123 static void xen_vcpu_setup(int cpu)
124 {
125 struct vcpu_register_vcpu_info info;
126 int err;
127 struct vcpu_info *vcpup;
128
129 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
130
131 if (cpu < MAX_VIRT_CPUS)
132 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
133
134 if (!have_vcpu_info_placement) {
135 if (cpu >= MAX_VIRT_CPUS)
136 clamp_max_cpus();
137 return;
138 }
139
140 vcpup = &per_cpu(xen_vcpu_info, cpu);
141 info.mfn = arbitrary_virt_to_mfn(vcpup);
142 info.offset = offset_in_page(vcpup);
143
144 /* Check to see if the hypervisor will put the vcpu_info
145 structure where we want it, which allows direct access via
146 a percpu-variable. */
147 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
148
149 if (err) {
150 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
151 have_vcpu_info_placement = 0;
152 clamp_max_cpus();
153 } else {
154 /* This cpu is using the registered vcpu info, even if
155 later ones fail to. */
156 per_cpu(xen_vcpu, cpu) = vcpup;
157 }
158 }
159
160 /*
161 * On restore, set the vcpu placement up again.
162 * If it fails, then we're in a bad state, since
163 * we can't back out from using it...
164 */
165 void xen_vcpu_restore(void)
166 {
167 int cpu;
168
169 for_each_online_cpu(cpu) {
170 bool other_cpu = (cpu != smp_processor_id());
171
172 if (other_cpu &&
173 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
174 BUG();
175
176 xen_setup_runstate_info(cpu);
177
178 if (have_vcpu_info_placement)
179 xen_vcpu_setup(cpu);
180
181 if (other_cpu &&
182 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
183 BUG();
184 }
185 }
186
187 static void __init xen_banner(void)
188 {
189 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
190 struct xen_extraversion extra;
191 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
192
193 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
194 pv_info.name);
195 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
196 version >> 16, version & 0xffff, extra.extraversion,
197 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
198 }
199
200 static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
201 static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
202
203 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
204 unsigned int *cx, unsigned int *dx)
205 {
206 unsigned maskebx = ~0;
207 unsigned maskecx = ~0;
208 unsigned maskedx = ~0;
209
210 /*
211 * Mask out inconvenient features, to try and disable as many
212 * unsupported kernel subsystems as possible.
213 */
214 switch (*ax) {
215 case 1:
216 maskecx = cpuid_leaf1_ecx_mask;
217 maskedx = cpuid_leaf1_edx_mask;
218 break;
219
220 case 0xb:
221 /* Suppress extended topology stuff */
222 maskebx = 0;
223 break;
224 }
225
226 asm(XEN_EMULATE_PREFIX "cpuid"
227 : "=a" (*ax),
228 "=b" (*bx),
229 "=c" (*cx),
230 "=d" (*dx)
231 : "0" (*ax), "2" (*cx));
232
233 *bx &= maskebx;
234 *cx &= maskecx;
235 *dx &= maskedx;
236 }
237
238 static void __init xen_init_cpuid_mask(void)
239 {
240 unsigned int ax, bx, cx, dx;
241 unsigned int xsave_mask;
242
243 cpuid_leaf1_edx_mask =
244 ~((1 << X86_FEATURE_MCE) | /* disable MCE */
245 (1 << X86_FEATURE_MCA) | /* disable MCA */
246 (1 << X86_FEATURE_MTRR) | /* disable MTRR */
247 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
248
249 if (!xen_initial_domain())
250 cpuid_leaf1_edx_mask &=
251 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
252 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
253 ax = 1;
254 xen_cpuid(&ax, &bx, &cx, &dx);
255
256 xsave_mask =
257 (1 << (X86_FEATURE_XSAVE % 32)) |
258 (1 << (X86_FEATURE_OSXSAVE % 32));
259
260 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
261 if ((cx & xsave_mask) != xsave_mask)
262 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
263 }
264
265 static void xen_set_debugreg(int reg, unsigned long val)
266 {
267 HYPERVISOR_set_debugreg(reg, val);
268 }
269
270 static unsigned long xen_get_debugreg(int reg)
271 {
272 return HYPERVISOR_get_debugreg(reg);
273 }
274
275 static void xen_end_context_switch(struct task_struct *next)
276 {
277 xen_mc_flush();
278 paravirt_end_context_switch(next);
279 }
280
281 static unsigned long xen_store_tr(void)
282 {
283 return 0;
284 }
285
286 /*
287 * Set the page permissions for a particular virtual address. If the
288 * address is a vmalloc mapping (or other non-linear mapping), then
289 * find the linear mapping of the page and also set its protections to
290 * match.
291 */
292 static void set_aliased_prot(void *v, pgprot_t prot)
293 {
294 int level;
295 pte_t *ptep;
296 pte_t pte;
297 unsigned long pfn;
298 struct page *page;
299
300 ptep = lookup_address((unsigned long)v, &level);
301 BUG_ON(ptep == NULL);
302
303 pfn = pte_pfn(*ptep);
304 page = pfn_to_page(pfn);
305
306 pte = pfn_pte(pfn, prot);
307
308 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
309 BUG();
310
311 if (!PageHighMem(page)) {
312 void *av = __va(PFN_PHYS(pfn));
313
314 if (av != v)
315 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
316 BUG();
317 } else
318 kmap_flush_unused();
319 }
320
321 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
322 {
323 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
324 int i;
325
326 for(i = 0; i < entries; i += entries_per_page)
327 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
328 }
329
330 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
331 {
332 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
333 int i;
334
335 for(i = 0; i < entries; i += entries_per_page)
336 set_aliased_prot(ldt + i, PAGE_KERNEL);
337 }
338
339 static void xen_set_ldt(const void *addr, unsigned entries)
340 {
341 struct mmuext_op *op;
342 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
343
344 trace_xen_cpu_set_ldt(addr, entries);
345
346 op = mcs.args;
347 op->cmd = MMUEXT_SET_LDT;
348 op->arg1.linear_addr = (unsigned long)addr;
349 op->arg2.nr_ents = entries;
350
351 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
352
353 xen_mc_issue(PARAVIRT_LAZY_CPU);
354 }
355
356 static void xen_load_gdt(const struct desc_ptr *dtr)
357 {
358 unsigned long va = dtr->address;
359 unsigned int size = dtr->size + 1;
360 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
361 unsigned long frames[pages];
362 int f;
363
364 /*
365 * A GDT can be up to 64k in size, which corresponds to 8192
366 * 8-byte entries, or 16 4k pages..
367 */
368
369 BUG_ON(size > 65536);
370 BUG_ON(va & ~PAGE_MASK);
371
372 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
373 int level;
374 pte_t *ptep;
375 unsigned long pfn, mfn;
376 void *virt;
377
378 /*
379 * The GDT is per-cpu and is in the percpu data area.
380 * That can be virtually mapped, so we need to do a
381 * page-walk to get the underlying MFN for the
382 * hypercall. The page can also be in the kernel's
383 * linear range, so we need to RO that mapping too.
384 */
385 ptep = lookup_address(va, &level);
386 BUG_ON(ptep == NULL);
387
388 pfn = pte_pfn(*ptep);
389 mfn = pfn_to_mfn(pfn);
390 virt = __va(PFN_PHYS(pfn));
391
392 frames[f] = mfn;
393
394 make_lowmem_page_readonly((void *)va);
395 make_lowmem_page_readonly(virt);
396 }
397
398 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
399 BUG();
400 }
401
402 /*
403 * load_gdt for early boot, when the gdt is only mapped once
404 */
405 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
406 {
407 unsigned long va = dtr->address;
408 unsigned int size = dtr->size + 1;
409 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
410 unsigned long frames[pages];
411 int f;
412
413 /*
414 * A GDT can be up to 64k in size, which corresponds to 8192
415 * 8-byte entries, or 16 4k pages..
416 */
417
418 BUG_ON(size > 65536);
419 BUG_ON(va & ~PAGE_MASK);
420
421 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
422 pte_t pte;
423 unsigned long pfn, mfn;
424
425 pfn = virt_to_pfn(va);
426 mfn = pfn_to_mfn(pfn);
427
428 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
429
430 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
431 BUG();
432
433 frames[f] = mfn;
434 }
435
436 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
437 BUG();
438 }
439
440 static void load_TLS_descriptor(struct thread_struct *t,
441 unsigned int cpu, unsigned int i)
442 {
443 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
444 xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
445 struct multicall_space mc = __xen_mc_entry(0);
446
447 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
448 }
449
450 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
451 {
452 /*
453 * XXX sleazy hack: If we're being called in a lazy-cpu zone
454 * and lazy gs handling is enabled, it means we're in a
455 * context switch, and %gs has just been saved. This means we
456 * can zero it out to prevent faults on exit from the
457 * hypervisor if the next process has no %gs. Either way, it
458 * has been saved, and the new value will get loaded properly.
459 * This will go away as soon as Xen has been modified to not
460 * save/restore %gs for normal hypercalls.
461 *
462 * On x86_64, this hack is not used for %gs, because gs points
463 * to KERNEL_GS_BASE (and uses it for PDA references), so we
464 * must not zero %gs on x86_64
465 *
466 * For x86_64, we need to zero %fs, otherwise we may get an
467 * exception between the new %fs descriptor being loaded and
468 * %fs being effectively cleared at __switch_to().
469 */
470 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
471 #ifdef CONFIG_X86_32
472 lazy_load_gs(0);
473 #else
474 loadsegment(fs, 0);
475 #endif
476 }
477
478 xen_mc_batch();
479
480 load_TLS_descriptor(t, cpu, 0);
481 load_TLS_descriptor(t, cpu, 1);
482 load_TLS_descriptor(t, cpu, 2);
483
484 xen_mc_issue(PARAVIRT_LAZY_CPU);
485 }
486
487 #ifdef CONFIG_X86_64
488 static void xen_load_gs_index(unsigned int idx)
489 {
490 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
491 BUG();
492 }
493 #endif
494
495 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
496 const void *ptr)
497 {
498 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
499 u64 entry = *(u64 *)ptr;
500
501 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
502
503 preempt_disable();
504
505 xen_mc_flush();
506 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
507 BUG();
508
509 preempt_enable();
510 }
511
512 static int cvt_gate_to_trap(int vector, const gate_desc *val,
513 struct trap_info *info)
514 {
515 unsigned long addr;
516
517 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
518 return 0;
519
520 info->vector = vector;
521
522 addr = gate_offset(*val);
523 #ifdef CONFIG_X86_64
524 /*
525 * Look for known traps using IST, and substitute them
526 * appropriately. The debugger ones are the only ones we care
527 * about. Xen will handle faults like double_fault and
528 * machine_check, so we should never see them. Warn if
529 * there's an unexpected IST-using fault handler.
530 */
531 if (addr == (unsigned long)debug)
532 addr = (unsigned long)xen_debug;
533 else if (addr == (unsigned long)int3)
534 addr = (unsigned long)xen_int3;
535 else if (addr == (unsigned long)stack_segment)
536 addr = (unsigned long)xen_stack_segment;
537 else if (addr == (unsigned long)double_fault ||
538 addr == (unsigned long)nmi) {
539 /* Don't need to handle these */
540 return 0;
541 #ifdef CONFIG_X86_MCE
542 } else if (addr == (unsigned long)machine_check) {
543 return 0;
544 #endif
545 } else {
546 /* Some other trap using IST? */
547 if (WARN_ON(val->ist != 0))
548 return 0;
549 }
550 #endif /* CONFIG_X86_64 */
551 info->address = addr;
552
553 info->cs = gate_segment(*val);
554 info->flags = val->dpl;
555 /* interrupt gates clear IF */
556 if (val->type == GATE_INTERRUPT)
557 info->flags |= 1 << 2;
558
559 return 1;
560 }
561
562 /* Locations of each CPU's IDT */
563 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
564
565 /* Set an IDT entry. If the entry is part of the current IDT, then
566 also update Xen. */
567 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
568 {
569 unsigned long p = (unsigned long)&dt[entrynum];
570 unsigned long start, end;
571
572 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
573
574 preempt_disable();
575
576 start = __this_cpu_read(idt_desc.address);
577 end = start + __this_cpu_read(idt_desc.size) + 1;
578
579 xen_mc_flush();
580
581 native_write_idt_entry(dt, entrynum, g);
582
583 if (p >= start && (p + 8) <= end) {
584 struct trap_info info[2];
585
586 info[1].address = 0;
587
588 if (cvt_gate_to_trap(entrynum, g, &info[0]))
589 if (HYPERVISOR_set_trap_table(info))
590 BUG();
591 }
592
593 preempt_enable();
594 }
595
596 static void xen_convert_trap_info(const struct desc_ptr *desc,
597 struct trap_info *traps)
598 {
599 unsigned in, out, count;
600
601 count = (desc->size+1) / sizeof(gate_desc);
602 BUG_ON(count > 256);
603
604 for (in = out = 0; in < count; in++) {
605 gate_desc *entry = (gate_desc*)(desc->address) + in;
606
607 if (cvt_gate_to_trap(in, entry, &traps[out]))
608 out++;
609 }
610 traps[out].address = 0;
611 }
612
613 void xen_copy_trap_info(struct trap_info *traps)
614 {
615 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
616
617 xen_convert_trap_info(desc, traps);
618 }
619
620 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
621 hold a spinlock to protect the static traps[] array (static because
622 it avoids allocation, and saves stack space). */
623 static void xen_load_idt(const struct desc_ptr *desc)
624 {
625 static DEFINE_SPINLOCK(lock);
626 static struct trap_info traps[257];
627
628 trace_xen_cpu_load_idt(desc);
629
630 spin_lock(&lock);
631
632 __get_cpu_var(idt_desc) = *desc;
633
634 xen_convert_trap_info(desc, traps);
635
636 xen_mc_flush();
637 if (HYPERVISOR_set_trap_table(traps))
638 BUG();
639
640 spin_unlock(&lock);
641 }
642
643 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
644 they're handled differently. */
645 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
646 const void *desc, int type)
647 {
648 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
649
650 preempt_disable();
651
652 switch (type) {
653 case DESC_LDT:
654 case DESC_TSS:
655 /* ignore */
656 break;
657
658 default: {
659 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
660
661 xen_mc_flush();
662 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
663 BUG();
664 }
665
666 }
667
668 preempt_enable();
669 }
670
671 /*
672 * Version of write_gdt_entry for use at early boot-time needed to
673 * update an entry as simply as possible.
674 */
675 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
676 const void *desc, int type)
677 {
678 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
679
680 switch (type) {
681 case DESC_LDT:
682 case DESC_TSS:
683 /* ignore */
684 break;
685
686 default: {
687 xmaddr_t maddr = virt_to_machine(&dt[entry]);
688
689 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
690 dt[entry] = *(struct desc_struct *)desc;
691 }
692
693 }
694 }
695
696 static void xen_load_sp0(struct tss_struct *tss,
697 struct thread_struct *thread)
698 {
699 struct multicall_space mcs;
700
701 mcs = xen_mc_entry(0);
702 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
703 xen_mc_issue(PARAVIRT_LAZY_CPU);
704 }
705
706 static void xen_set_iopl_mask(unsigned mask)
707 {
708 struct physdev_set_iopl set_iopl;
709
710 /* Force the change at ring 0. */
711 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
712 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
713 }
714
715 static void xen_io_delay(void)
716 {
717 }
718
719 #ifdef CONFIG_X86_LOCAL_APIC
720 static u32 xen_apic_read(u32 reg)
721 {
722 return 0;
723 }
724
725 static void xen_apic_write(u32 reg, u32 val)
726 {
727 /* Warn to see if there's any stray references */
728 WARN_ON(1);
729 }
730
731 static u64 xen_apic_icr_read(void)
732 {
733 return 0;
734 }
735
736 static void xen_apic_icr_write(u32 low, u32 id)
737 {
738 /* Warn to see if there's any stray references */
739 WARN_ON(1);
740 }
741
742 static void xen_apic_wait_icr_idle(void)
743 {
744 return;
745 }
746
747 static u32 xen_safe_apic_wait_icr_idle(void)
748 {
749 return 0;
750 }
751
752 static void set_xen_basic_apic_ops(void)
753 {
754 apic->read = xen_apic_read;
755 apic->write = xen_apic_write;
756 apic->icr_read = xen_apic_icr_read;
757 apic->icr_write = xen_apic_icr_write;
758 apic->wait_icr_idle = xen_apic_wait_icr_idle;
759 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
760 }
761
762 #endif
763
764 static void xen_clts(void)
765 {
766 struct multicall_space mcs;
767
768 mcs = xen_mc_entry(0);
769
770 MULTI_fpu_taskswitch(mcs.mc, 0);
771
772 xen_mc_issue(PARAVIRT_LAZY_CPU);
773 }
774
775 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
776
777 static unsigned long xen_read_cr0(void)
778 {
779 unsigned long cr0 = percpu_read(xen_cr0_value);
780
781 if (unlikely(cr0 == 0)) {
782 cr0 = native_read_cr0();
783 percpu_write(xen_cr0_value, cr0);
784 }
785
786 return cr0;
787 }
788
789 static void xen_write_cr0(unsigned long cr0)
790 {
791 struct multicall_space mcs;
792
793 percpu_write(xen_cr0_value, cr0);
794
795 /* Only pay attention to cr0.TS; everything else is
796 ignored. */
797 mcs = xen_mc_entry(0);
798
799 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
800
801 xen_mc_issue(PARAVIRT_LAZY_CPU);
802 }
803
804 static void xen_write_cr4(unsigned long cr4)
805 {
806 cr4 &= ~X86_CR4_PGE;
807 cr4 &= ~X86_CR4_PSE;
808
809 native_write_cr4(cr4);
810 }
811
812 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
813 {
814 int ret;
815
816 ret = 0;
817
818 switch (msr) {
819 #ifdef CONFIG_X86_64
820 unsigned which;
821 u64 base;
822
823 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
824 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
825 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
826
827 set:
828 base = ((u64)high << 32) | low;
829 if (HYPERVISOR_set_segment_base(which, base) != 0)
830 ret = -EIO;
831 break;
832 #endif
833
834 case MSR_STAR:
835 case MSR_CSTAR:
836 case MSR_LSTAR:
837 case MSR_SYSCALL_MASK:
838 case MSR_IA32_SYSENTER_CS:
839 case MSR_IA32_SYSENTER_ESP:
840 case MSR_IA32_SYSENTER_EIP:
841 /* Fast syscall setup is all done in hypercalls, so
842 these are all ignored. Stub them out here to stop
843 Xen console noise. */
844 break;
845
846 case MSR_IA32_CR_PAT:
847 if (smp_processor_id() == 0)
848 xen_set_pat(((u64)high << 32) | low);
849 break;
850
851 default:
852 ret = native_write_msr_safe(msr, low, high);
853 }
854
855 return ret;
856 }
857
858 void xen_setup_shared_info(void)
859 {
860 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
861 set_fixmap(FIX_PARAVIRT_BOOTMAP,
862 xen_start_info->shared_info);
863
864 HYPERVISOR_shared_info =
865 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
866 } else
867 HYPERVISOR_shared_info =
868 (struct shared_info *)__va(xen_start_info->shared_info);
869
870 #ifndef CONFIG_SMP
871 /* In UP this is as good a place as any to set up shared info */
872 xen_setup_vcpu_info_placement();
873 #endif
874
875 xen_setup_mfn_list_list();
876 }
877
878 /* This is called once we have the cpu_possible_map */
879 void xen_setup_vcpu_info_placement(void)
880 {
881 int cpu;
882
883 for_each_possible_cpu(cpu)
884 xen_vcpu_setup(cpu);
885
886 /* xen_vcpu_setup managed to place the vcpu_info within the
887 percpu area for all cpus, so make use of it */
888 if (have_vcpu_info_placement) {
889 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
890 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
891 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
892 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
893 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
894 }
895 }
896
897 static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
898 unsigned long addr, unsigned len)
899 {
900 char *start, *end, *reloc;
901 unsigned ret;
902
903 start = end = reloc = NULL;
904
905 #define SITE(op, x) \
906 case PARAVIRT_PATCH(op.x): \
907 if (have_vcpu_info_placement) { \
908 start = (char *)xen_##x##_direct; \
909 end = xen_##x##_direct_end; \
910 reloc = xen_##x##_direct_reloc; \
911 } \
912 goto patch_site
913
914 switch (type) {
915 SITE(pv_irq_ops, irq_enable);
916 SITE(pv_irq_ops, irq_disable);
917 SITE(pv_irq_ops, save_fl);
918 SITE(pv_irq_ops, restore_fl);
919 #undef SITE
920
921 patch_site:
922 if (start == NULL || (end-start) > len)
923 goto default_patch;
924
925 ret = paravirt_patch_insns(insnbuf, len, start, end);
926
927 /* Note: because reloc is assigned from something that
928 appears to be an array, gcc assumes it's non-null,
929 but doesn't know its relationship with start and
930 end. */
931 if (reloc > start && reloc < end) {
932 int reloc_off = reloc - start;
933 long *relocp = (long *)(insnbuf + reloc_off);
934 long delta = start - (char *)addr;
935
936 *relocp += delta;
937 }
938 break;
939
940 default_patch:
941 default:
942 ret = paravirt_patch_default(type, clobbers, insnbuf,
943 addr, len);
944 break;
945 }
946
947 return ret;
948 }
949
950 static const struct pv_info xen_info __initconst = {
951 .paravirt_enabled = 1,
952 .shared_kernel_pmd = 0,
953
954 #ifdef CONFIG_X86_64
955 .extra_user_64bit_cs = FLAT_USER_CS64,
956 #endif
957
958 .name = "Xen",
959 };
960
961 static const struct pv_init_ops xen_init_ops __initconst = {
962 .patch = xen_patch,
963 };
964
965 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
966 .cpuid = xen_cpuid,
967
968 .set_debugreg = xen_set_debugreg,
969 .get_debugreg = xen_get_debugreg,
970
971 .clts = xen_clts,
972
973 .read_cr0 = xen_read_cr0,
974 .write_cr0 = xen_write_cr0,
975
976 .read_cr4 = native_read_cr4,
977 .read_cr4_safe = native_read_cr4_safe,
978 .write_cr4 = xen_write_cr4,
979
980 .wbinvd = native_wbinvd,
981
982 .read_msr = native_read_msr_safe,
983 .write_msr = xen_write_msr_safe,
984 .read_tsc = native_read_tsc,
985 .read_pmc = native_read_pmc,
986
987 .iret = xen_iret,
988 .irq_enable_sysexit = xen_sysexit,
989 #ifdef CONFIG_X86_64
990 .usergs_sysret32 = xen_sysret32,
991 .usergs_sysret64 = xen_sysret64,
992 #endif
993
994 .load_tr_desc = paravirt_nop,
995 .set_ldt = xen_set_ldt,
996 .load_gdt = xen_load_gdt,
997 .load_idt = xen_load_idt,
998 .load_tls = xen_load_tls,
999 #ifdef CONFIG_X86_64
1000 .load_gs_index = xen_load_gs_index,
1001 #endif
1002
1003 .alloc_ldt = xen_alloc_ldt,
1004 .free_ldt = xen_free_ldt,
1005
1006 .store_gdt = native_store_gdt,
1007 .store_idt = native_store_idt,
1008 .store_tr = xen_store_tr,
1009
1010 .write_ldt_entry = xen_write_ldt_entry,
1011 .write_gdt_entry = xen_write_gdt_entry,
1012 .write_idt_entry = xen_write_idt_entry,
1013 .load_sp0 = xen_load_sp0,
1014
1015 .set_iopl_mask = xen_set_iopl_mask,
1016 .io_delay = xen_io_delay,
1017
1018 /* Xen takes care of %gs when switching to usermode for us */
1019 .swapgs = paravirt_nop,
1020
1021 .start_context_switch = paravirt_start_context_switch,
1022 .end_context_switch = xen_end_context_switch,
1023 };
1024
1025 static const struct pv_apic_ops xen_apic_ops __initconst = {
1026 #ifdef CONFIG_X86_LOCAL_APIC
1027 .startup_ipi_hook = paravirt_nop,
1028 #endif
1029 };
1030
1031 static void xen_reboot(int reason)
1032 {
1033 struct sched_shutdown r = { .reason = reason };
1034
1035 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
1036 BUG();
1037 }
1038
1039 static void xen_restart(char *msg)
1040 {
1041 xen_reboot(SHUTDOWN_reboot);
1042 }
1043
1044 static void xen_emergency_restart(void)
1045 {
1046 xen_reboot(SHUTDOWN_reboot);
1047 }
1048
1049 static void xen_machine_halt(void)
1050 {
1051 xen_reboot(SHUTDOWN_poweroff);
1052 }
1053
1054 static void xen_machine_power_off(void)
1055 {
1056 if (pm_power_off)
1057 pm_power_off();
1058 xen_reboot(SHUTDOWN_poweroff);
1059 }
1060
1061 static void xen_crash_shutdown(struct pt_regs *regs)
1062 {
1063 xen_reboot(SHUTDOWN_crash);
1064 }
1065
1066 static int
1067 xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1068 {
1069 xen_reboot(SHUTDOWN_crash);
1070 return NOTIFY_DONE;
1071 }
1072
1073 static struct notifier_block xen_panic_block = {
1074 .notifier_call= xen_panic_event,
1075 };
1076
1077 int xen_panic_handler_init(void)
1078 {
1079 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1080 return 0;
1081 }
1082
1083 static const struct machine_ops xen_machine_ops __initconst = {
1084 .restart = xen_restart,
1085 .halt = xen_machine_halt,
1086 .power_off = xen_machine_power_off,
1087 .shutdown = xen_machine_halt,
1088 .crash_shutdown = xen_crash_shutdown,
1089 .emergency_restart = xen_emergency_restart,
1090 };
1091
1092 /*
1093 * Set up the GDT and segment registers for -fstack-protector. Until
1094 * we do this, we have to be careful not to call any stack-protected
1095 * function, which is most of the kernel.
1096 */
1097 static void __init xen_setup_stackprotector(void)
1098 {
1099 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1100 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1101
1102 setup_stack_canary_segment(0);
1103 switch_to_new_gdt(0);
1104
1105 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1106 pv_cpu_ops.load_gdt = xen_load_gdt;
1107 }
1108
1109 /* First C function to be called on Xen boot */
1110 asmlinkage void __init xen_start_kernel(void)
1111 {
1112 struct physdev_set_iopl set_iopl;
1113 int rc;
1114 pgd_t *pgd;
1115
1116 if (!xen_start_info)
1117 return;
1118
1119 xen_domain_type = XEN_PV_DOMAIN;
1120
1121 xen_setup_machphys_mapping();
1122
1123 /* Install Xen paravirt ops */
1124 pv_info = xen_info;
1125 pv_init_ops = xen_init_ops;
1126 pv_cpu_ops = xen_cpu_ops;
1127 pv_apic_ops = xen_apic_ops;
1128
1129 x86_init.resources.memory_setup = xen_memory_setup;
1130 x86_init.oem.arch_setup = xen_arch_setup;
1131 x86_init.oem.banner = xen_banner;
1132
1133 xen_init_time_ops();
1134
1135 /*
1136 * Set up some pagetable state before starting to set any ptes.
1137 */
1138
1139 xen_init_mmu_ops();
1140
1141 /* Prevent unwanted bits from being set in PTEs. */
1142 __supported_pte_mask &= ~_PAGE_GLOBAL;
1143 if (!xen_initial_domain())
1144 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1145
1146 __supported_pte_mask |= _PAGE_IOMAP;
1147
1148 /*
1149 * Prevent page tables from being allocated in highmem, even
1150 * if CONFIG_HIGHPTE is enabled.
1151 */
1152 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1153
1154 /* Work out if we support NX */
1155 x86_configure_nx();
1156
1157 xen_setup_features();
1158
1159 /* Get mfn list */
1160 if (!xen_feature(XENFEAT_auto_translated_physmap))
1161 xen_build_dynamic_phys_to_machine();
1162
1163 /*
1164 * Set up kernel GDT and segment registers, mainly so that
1165 * -fstack-protector code can be executed.
1166 */
1167 xen_setup_stackprotector();
1168
1169 xen_init_irq_ops();
1170 xen_init_cpuid_mask();
1171
1172 #ifdef CONFIG_X86_LOCAL_APIC
1173 /*
1174 * set up the basic apic ops.
1175 */
1176 set_xen_basic_apic_ops();
1177 #endif
1178
1179 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1180 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1181 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1182 }
1183
1184 machine_ops = xen_machine_ops;
1185
1186 /*
1187 * The only reliable way to retain the initial address of the
1188 * percpu gdt_page is to remember it here, so we can go and
1189 * mark it RW later, when the initial percpu area is freed.
1190 */
1191 xen_initial_gdt = &per_cpu(gdt_page, 0);
1192
1193 xen_smp_init();
1194
1195 #ifdef CONFIG_ACPI_NUMA
1196 /*
1197 * The pages we from Xen are not related to machine pages, so
1198 * any NUMA information the kernel tries to get from ACPI will
1199 * be meaningless. Prevent it from trying.
1200 */
1201 acpi_numa = -1;
1202 #endif
1203
1204 pgd = (pgd_t *)xen_start_info->pt_base;
1205
1206 if (!xen_initial_domain())
1207 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1208
1209 __supported_pte_mask |= _PAGE_IOMAP;
1210 /* Don't do the full vcpu_info placement stuff until we have a
1211 possible map and a non-dummy shared_info. */
1212 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1213
1214 local_irq_disable();
1215 early_boot_irqs_disabled = true;
1216
1217 memblock_init();
1218
1219 xen_raw_console_write("mapping kernel into physical memory\n");
1220 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
1221 xen_ident_map_ISA();
1222
1223 /* Allocate and initialize top and mid mfn levels for p2m structure */
1224 xen_build_mfn_list_list();
1225
1226 /* keep using Xen gdt for now; no urgent need to change it */
1227
1228 #ifdef CONFIG_X86_32
1229 pv_info.kernel_rpl = 1;
1230 if (xen_feature(XENFEAT_supervisor_mode_kernel))
1231 pv_info.kernel_rpl = 0;
1232 #else
1233 pv_info.kernel_rpl = 0;
1234 #endif
1235 /* set the limit of our address space */
1236 xen_reserve_top();
1237
1238 /* We used to do this in xen_arch_setup, but that is too late on AMD
1239 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1240 * which pokes 0xcf8 port.
1241 */
1242 set_iopl.iopl = 1;
1243 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1244 if (rc != 0)
1245 xen_raw_printk("physdev_op failed %d\n", rc);
1246
1247 #ifdef CONFIG_X86_32
1248 /* set up basic CPUID stuff */
1249 cpu_detect(&new_cpu_data);
1250 new_cpu_data.hard_math = 1;
1251 new_cpu_data.wp_works_ok = 1;
1252 new_cpu_data.x86_capability[0] = cpuid_edx(1);
1253 #endif
1254
1255 /* Poke various useful things into boot_params */
1256 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1257 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1258 ? __pa(xen_start_info->mod_start) : 0;
1259 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1260 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1261
1262 if (!xen_initial_domain()) {
1263 add_preferred_console("xenboot", 0, NULL);
1264 add_preferred_console("tty", 0, NULL);
1265 add_preferred_console("hvc", 0, NULL);
1266 if (pci_xen)
1267 x86_init.pci.arch_init = pci_xen_init;
1268 } else {
1269 const struct dom0_vga_console_info *info =
1270 (void *)((char *)xen_start_info +
1271 xen_start_info->console.dom0.info_off);
1272
1273 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1274 xen_start_info->console.domU.mfn = 0;
1275 xen_start_info->console.domU.evtchn = 0;
1276
1277 /* Make sure ACS will be enabled */
1278 pci_request_acs();
1279 }
1280
1281
1282 xen_raw_console_write("about to get started...\n");
1283
1284 xen_setup_runstate_info(0);
1285
1286 /* Start the world */
1287 #ifdef CONFIG_X86_32
1288 i386_start_kernel();
1289 #else
1290 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1291 #endif
1292 }
1293
1294 static int init_hvm_pv_info(int *major, int *minor)
1295 {
1296 uint32_t eax, ebx, ecx, edx, pages, msr, base;
1297 u64 pfn;
1298
1299 base = xen_cpuid_base();
1300 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1301
1302 *major = eax >> 16;
1303 *minor = eax & 0xffff;
1304 printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor);
1305
1306 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1307
1308 pfn = __pa(hypercall_page);
1309 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1310
1311 xen_setup_features();
1312
1313 pv_info.name = "Xen HVM";
1314
1315 xen_domain_type = XEN_HVM_DOMAIN;
1316
1317 return 0;
1318 }
1319
1320 void __ref xen_hvm_init_shared_info(void)
1321 {
1322 int cpu;
1323 struct xen_add_to_physmap xatp;
1324 static struct shared_info *shared_info_page = 0;
1325
1326 if (!shared_info_page)
1327 shared_info_page = (struct shared_info *)
1328 extend_brk(PAGE_SIZE, PAGE_SIZE);
1329 xatp.domid = DOMID_SELF;
1330 xatp.idx = 0;
1331 xatp.space = XENMAPSPACE_shared_info;
1332 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1333 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1334 BUG();
1335
1336 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1337
1338 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1339 * page, we use it in the event channel upcall and in some pvclock
1340 * related functions. We don't need the vcpu_info placement
1341 * optimizations because we don't use any pv_mmu or pv_irq op on
1342 * HVM.
1343 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1344 * online but xen_hvm_init_shared_info is run at resume time too and
1345 * in that case multiple vcpus might be online. */
1346 for_each_online_cpu(cpu) {
1347 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1348 }
1349 }
1350
1351 #ifdef CONFIG_XEN_PVHVM
1352 static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1353 unsigned long action, void *hcpu)
1354 {
1355 int cpu = (long)hcpu;
1356 switch (action) {
1357 case CPU_UP_PREPARE:
1358 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1359 if (xen_have_vector_callback)
1360 xen_init_lock_cpu(cpu);
1361 break;
1362 default:
1363 break;
1364 }
1365 return NOTIFY_OK;
1366 }
1367
1368 static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
1369 .notifier_call = xen_hvm_cpu_notify,
1370 };
1371
1372 static void __init xen_hvm_guest_init(void)
1373 {
1374 int r;
1375 int major, minor;
1376
1377 r = init_hvm_pv_info(&major, &minor);
1378 if (r < 0)
1379 return;
1380
1381 xen_hvm_init_shared_info();
1382
1383 if (xen_feature(XENFEAT_hvm_callback_vector))
1384 xen_have_vector_callback = 1;
1385 xen_hvm_smp_init();
1386 register_cpu_notifier(&xen_hvm_cpu_notifier);
1387 xen_unplug_emulated_devices();
1388 have_vcpu_info_placement = 0;
1389 x86_init.irqs.intr_init = xen_init_IRQ;
1390 xen_hvm_init_time_ops();
1391 xen_hvm_init_mmu_ops();
1392 }
1393
1394 static bool __init xen_hvm_platform(void)
1395 {
1396 if (xen_pv_domain())
1397 return false;
1398
1399 if (!xen_cpuid_base())
1400 return false;
1401
1402 return true;
1403 }
1404
1405 bool xen_hvm_need_lapic(void)
1406 {
1407 if (xen_pv_domain())
1408 return false;
1409 if (!xen_hvm_domain())
1410 return false;
1411 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1412 return false;
1413 return true;
1414 }
1415 EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1416
1417 const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
1418 .name = "Xen HVM",
1419 .detect = xen_hvm_platform,
1420 .init_platform = xen_hvm_guest_init,
1421 };
1422 EXPORT_SYMBOL(x86_hyper_xen_hvm);
1423 #endif