arch/x86/realmode/rm/trampoline_64.S

   1 /*
   2  *
   3  *      Trampoline.S    Derived from Setup.S by Linus Torvalds
   4  *
   5  *      4 Jan 1997 Michael Chastain: changed to gnu as.
   6  *      15 Sept 2005 Eric Biederman: 64bit PIC support
   7  *
   8  *      Entry: CS:IP point to the start of our code, we are
   9  *      in real mode with no stack, but the rest of the
  10  *      trampoline page to make our stack and everything else
  11  *      is a mystery.
  12  *
  13  *      On entry to trampoline_data, the processor is in real mode
  14  *      with 16-bit addressing and 16-bit data.  CS has some value
  15  *      and IP is zero.  Thus, data addresses need to be absolute
  16  *      (no relocation) and are taken with regard to r_base.
  17  *
  18  *      With the addition of trampoline_level4_pgt this code can
  19  *      now enter a 64bit kernel that lives at arbitrary 64bit
  20  *      physical addresses.
  21  *
  22  *      If you work on this file, check the object module with objdump
  23  *      --full-contents --reloc to make sure there are no relocation
  24  *      entries.
  25  */
  26
  27 #include <linux/linkage.h>
  28 #include <linux/init.h>
  29 #include <asm/pgtable_types.h>
  30 #include <asm/page_types.h>
  31 #include <asm/msr.h>
  32 #include <asm/segment.h>
  33 #include <asm/processor-flags.h>
  34
  35         .text
  36         .balign PAGE_SIZE
  37         .code16
  38
  39 ENTRY(trampoline_data)
  40         cli                     # We should be safe anyway
  41         wbinvd
  42
  43         .byte   0xea            # ljmpw
  44         .word   1f              # Offset
  45         .word   real_mode_seg   # Segment
  46 1:
  47         mov     %cs, %ax        # Code and data in the same place
  48         mov     %ax, %ds
  49         mov     %ax, %es
  50         mov     %ax, %ss
  51
  52         movl    $0xA5A5A5A5, trampoline_status
  53         # write marker for master knows we're running
  54
  55         # Setup stack
  56         movw    $trampoline_stack_end, %sp
  57
  58         call    verify_cpu              # Verify the cpu supports long mode
  59         testl   %eax, %eax              # Check for return code
  60         jnz     no_longmode
  61
  62         /*
  63          * GDT tables in non default location kernel can be beyond 16MB and
  64          * lgdt will not be able to load the address as in real mode default
  65          * operand size is 16bit. Use lgdtl instead to force operand size
  66          * to 32 bit.
  67          */
  68
  69         lidtl   tidt    # load idt with 0, 0
  70         lgdtl   tgdt    # load gdt with whatever is appropriate
  71
  72         mov     $X86_CR0_PE, %ax        # protected mode (PE) bit
  73         lmsw    %ax                     # into protected mode
  74
  75         # flush prefetch and jump to startup_32
  76         ljmpl   $__KERNEL32_CS, $pa_startup_32
  77
  78 no_longmode:
  79         hlt
  80         jmp no_longmode
  81 #include "../kernel/verify_cpu.S"
  82
  83         .section ".text32","ax"
  84         .code32
  85         .balign 4
  86 ENTRY(startup_32)
  87         movl    $__KERNEL_DS, %eax      # Initialize the %ds segment register
  88         movl    %eax, %ds
  89
  90         movl    $X86_CR4_PAE, %eax
  91         movl    %eax, %cr4              # Enable PAE mode
  92
  93         movl    pa_startup_64_smp, %esi
  94         movl    pa_startup_64_smp_high, %edi
  95
  96                                         # Setup trampoline 4 level pagetables
  97         leal    pa_trampoline_level4_pgt, %eax
  98         movl    %eax, %cr3
  99
 100         movl    $MSR_EFER, %ecx
 101         movl    $(1 << _EFER_LME), %eax # Enable Long Mode
 102         xorl    %edx, %edx
 103         wrmsr
 104
 105         # Enable paging and in turn activate Long Mode
 106         # Enable protected mode
 107         movl    $(X86_CR0_PG | X86_CR0_PE), %eax
 108         movl    %eax, %cr0
 109
 110         /*
 111          * At this point we're in long mode but in 32bit compatibility mode
 112          * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
 113          * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
 114          * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
 115          */
 116         ljmpl   $__KERNEL_CS, $pa_startup_64
 117
 118         .section ".text64","ax"
 119         .code64
 120         .balign 4
 121 ENTRY(startup_64)
 122         # Now jump into the kernel using virtual addresses
 123         movl    %edi, %eax
 124         shlq    $32, %rax
 125         addl    %esi, %eax
 126         jmp     *%rax
 127
 128         .section ".rodata","a"
 129         .balign 16
 130 tidt:
 131         .word   0                       # idt limit = 0
 132         .word   0, 0                    # idt base = 0L
 133
 134         # Duplicate the global descriptor table
 135         # so the kernel can live anywhere
 136         .balign 4
 137         .globl tgdt
 138 tgdt:
 139         .short  tgdt_end - tgdt         # gdt limit
 140         .long   pa_tgdt
 141         .short  0
 142         .quad   0x00cf9b000000ffff      # __KERNEL32_CS
 143         .quad   0x00af9b000000ffff      # __KERNEL_CS
 144         .quad   0x00cf93000000ffff      # __KERNEL_DS
 145 tgdt_end:
 146
 147         .data
 148         .balign 4
 149 GLOBAL(trampoline_status)
 150         .long   0
 151
 152 trampoline_stack:
 153         .org 0x1000
 154 trampoline_stack_end:
 155
 156         .globl  level3_ident_pgt
 157         .globl  level3_kernel_pgt
 158 GLOBAL(trampoline_level4_pgt)
 159         level3_ident_pgt:       .quad   0
 160         .fill 510,8,0
 161         level3_kernel_pgt:      .quad   0
 162
 163         .globl  startup_64_smp
 164         .globl  startup_64_smp_high
 165 startup_64_smp:         .long 0
 166 startup_64_smp_high:    .long 0