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Merge branch 'bpf-new-branches'
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / arch / x86 / net / bpf_jit_comp.c
1 /* bpf_jit_comp.c : BPF JIT compiler
2 *
3 * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
4 * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
9 * of the License.
10 */
11 #include <linux/netdevice.h>
12 #include <linux/filter.h>
13 #include <linux/if_vlan.h>
14 #include <asm/cacheflush.h>
15 #include <asm/set_memory.h>
16 #include <linux/bpf.h>
17
18 int bpf_jit_enable __read_mostly;
19
20 /*
21 * assembly code in arch/x86/net/bpf_jit.S
22 */
23 extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
24 extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
25 extern u8 sk_load_byte_positive_offset[];
26 extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
27 extern u8 sk_load_byte_negative_offset[];
28
29 static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
30 {
31 if (len == 1)
32 *ptr = bytes;
33 else if (len == 2)
34 *(u16 *)ptr = bytes;
35 else {
36 *(u32 *)ptr = bytes;
37 barrier();
38 }
39 return ptr + len;
40 }
41
42 #define EMIT(bytes, len) \
43 do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
44
45 #define EMIT1(b1) EMIT(b1, 1)
46 #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
47 #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
48 #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
49 #define EMIT1_off32(b1, off) \
50 do {EMIT1(b1); EMIT(off, 4); } while (0)
51 #define EMIT2_off32(b1, b2, off) \
52 do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
53 #define EMIT3_off32(b1, b2, b3, off) \
54 do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
55 #define EMIT4_off32(b1, b2, b3, b4, off) \
56 do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
57
58 static bool is_imm8(int value)
59 {
60 return value <= 127 && value >= -128;
61 }
62
63 static bool is_simm32(s64 value)
64 {
65 return value == (s64) (s32) value;
66 }
67
68 /* mov dst, src */
69 #define EMIT_mov(DST, SRC) \
70 do {if (DST != SRC) \
71 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
72 } while (0)
73
74 static int bpf_size_to_x86_bytes(int bpf_size)
75 {
76 if (bpf_size == BPF_W)
77 return 4;
78 else if (bpf_size == BPF_H)
79 return 2;
80 else if (bpf_size == BPF_B)
81 return 1;
82 else if (bpf_size == BPF_DW)
83 return 4; /* imm32 */
84 else
85 return 0;
86 }
87
88 /* list of x86 cond jumps opcodes (. + s8)
89 * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
90 */
91 #define X86_JB 0x72
92 #define X86_JAE 0x73
93 #define X86_JE 0x74
94 #define X86_JNE 0x75
95 #define X86_JBE 0x76
96 #define X86_JA 0x77
97 #define X86_JL 0x7C
98 #define X86_JGE 0x7D
99 #define X86_JLE 0x7E
100 #define X86_JG 0x7F
101
102 static void bpf_flush_icache(void *start, void *end)
103 {
104 mm_segment_t old_fs = get_fs();
105
106 set_fs(KERNEL_DS);
107 smp_wmb();
108 flush_icache_range((unsigned long)start, (unsigned long)end);
109 set_fs(old_fs);
110 }
111
112 #define CHOOSE_LOAD_FUNC(K, func) \
113 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
114
115 /* pick a register outside of BPF range for JIT internal work */
116 #define AUX_REG (MAX_BPF_JIT_REG + 1)
117
118 /* The following table maps BPF registers to x64 registers.
119 *
120 * x64 register r12 is unused, since if used as base address
121 * register in load/store instructions, it always needs an
122 * extra byte of encoding and is callee saved.
123 *
124 * r9 caches skb->len - skb->data_len
125 * r10 caches skb->data, and used for blinding (if enabled)
126 */
127 static const int reg2hex[] = {
128 [BPF_REG_0] = 0, /* rax */
129 [BPF_REG_1] = 7, /* rdi */
130 [BPF_REG_2] = 6, /* rsi */
131 [BPF_REG_3] = 2, /* rdx */
132 [BPF_REG_4] = 1, /* rcx */
133 [BPF_REG_5] = 0, /* r8 */
134 [BPF_REG_6] = 3, /* rbx callee saved */
135 [BPF_REG_7] = 5, /* r13 callee saved */
136 [BPF_REG_8] = 6, /* r14 callee saved */
137 [BPF_REG_9] = 7, /* r15 callee saved */
138 [BPF_REG_FP] = 5, /* rbp readonly */
139 [BPF_REG_AX] = 2, /* r10 temp register */
140 [AUX_REG] = 3, /* r11 temp register */
141 };
142
143 /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
144 * which need extra byte of encoding.
145 * rax,rcx,...,rbp have simpler encoding
146 */
147 static bool is_ereg(u32 reg)
148 {
149 return (1 << reg) & (BIT(BPF_REG_5) |
150 BIT(AUX_REG) |
151 BIT(BPF_REG_7) |
152 BIT(BPF_REG_8) |
153 BIT(BPF_REG_9) |
154 BIT(BPF_REG_AX));
155 }
156
157 /* add modifiers if 'reg' maps to x64 registers r8..r15 */
158 static u8 add_1mod(u8 byte, u32 reg)
159 {
160 if (is_ereg(reg))
161 byte |= 1;
162 return byte;
163 }
164
165 static u8 add_2mod(u8 byte, u32 r1, u32 r2)
166 {
167 if (is_ereg(r1))
168 byte |= 1;
169 if (is_ereg(r2))
170 byte |= 4;
171 return byte;
172 }
173
174 /* encode 'dst_reg' register into x64 opcode 'byte' */
175 static u8 add_1reg(u8 byte, u32 dst_reg)
176 {
177 return byte + reg2hex[dst_reg];
178 }
179
180 /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
181 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
182 {
183 return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
184 }
185
186 static void jit_fill_hole(void *area, unsigned int size)
187 {
188 /* fill whole space with int3 instructions */
189 memset(area, 0xcc, size);
190 }
191
192 struct jit_context {
193 int cleanup_addr; /* epilogue code offset */
194 bool seen_ld_abs;
195 bool seen_ax_reg;
196 };
197
198 /* maximum number of bytes emitted while JITing one eBPF insn */
199 #define BPF_MAX_INSN_SIZE 128
200 #define BPF_INSN_SAFETY 64
201
202 #define AUX_STACK_SPACE \
203 (32 /* space for rbx, r13, r14, r15 */ + \
204 8 /* space for skb_copy_bits() buffer */)
205
206 #define PROLOGUE_SIZE 37
207
208 /* emit x64 prologue code for BPF program and check it's size.
209 * bpf_tail_call helper will skip it while jumping into another program
210 */
211 static void emit_prologue(u8 **pprog, u32 stack_depth)
212 {
213 u8 *prog = *pprog;
214 int cnt = 0;
215
216 EMIT1(0x55); /* push rbp */
217 EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
218
219 /* sub rsp, rounded_stack_depth + AUX_STACK_SPACE */
220 EMIT3_off32(0x48, 0x81, 0xEC,
221 round_up(stack_depth, 8) + AUX_STACK_SPACE);
222
223 /* sub rbp, AUX_STACK_SPACE */
224 EMIT4(0x48, 0x83, 0xED, AUX_STACK_SPACE);
225
226 /* all classic BPF filters use R6(rbx) save it */
227
228 /* mov qword ptr [rbp+0],rbx */
229 EMIT4(0x48, 0x89, 0x5D, 0);
230
231 /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
232 * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
233 * R8(r14). R9(r15) spill could be made conditional, but there is only
234 * one 'bpf_error' return path out of helper functions inside bpf_jit.S
235 * The overhead of extra spill is negligible for any filter other
236 * than synthetic ones. Therefore not worth adding complexity.
237 */
238
239 /* mov qword ptr [rbp+8],r13 */
240 EMIT4(0x4C, 0x89, 0x6D, 8);
241 /* mov qword ptr [rbp+16],r14 */
242 EMIT4(0x4C, 0x89, 0x75, 16);
243 /* mov qword ptr [rbp+24],r15 */
244 EMIT4(0x4C, 0x89, 0x7D, 24);
245
246 /* Clear the tail call counter (tail_call_cnt): for eBPF tail calls
247 * we need to reset the counter to 0. It's done in two instructions,
248 * resetting rax register to 0 (xor on eax gets 0 extended), and
249 * moving it to the counter location.
250 */
251
252 /* xor eax, eax */
253 EMIT2(0x31, 0xc0);
254 /* mov qword ptr [rbp+32], rax */
255 EMIT4(0x48, 0x89, 0x45, 32);
256
257 BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
258 *pprog = prog;
259 }
260
261 /* generate the following code:
262 * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
263 * if (index >= array->map.max_entries)
264 * goto out;
265 * if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
266 * goto out;
267 * prog = array->ptrs[index];
268 * if (prog == NULL)
269 * goto out;
270 * goto *(prog->bpf_func + prologue_size);
271 * out:
272 */
273 static void emit_bpf_tail_call(u8 **pprog)
274 {
275 u8 *prog = *pprog;
276 int label1, label2, label3;
277 int cnt = 0;
278
279 /* rdi - pointer to ctx
280 * rsi - pointer to bpf_array
281 * rdx - index in bpf_array
282 */
283
284 /* if (index >= array->map.max_entries)
285 * goto out;
286 */
287 EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */
288 offsetof(struct bpf_array, map.max_entries));
289 EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */
290 #define OFFSET1 47 /* number of bytes to jump */
291 EMIT2(X86_JBE, OFFSET1); /* jbe out */
292 label1 = cnt;
293
294 /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
295 * goto out;
296 */
297 EMIT2_off32(0x8B, 0x85, 36); /* mov eax, dword ptr [rbp + 36] */
298 EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
299 #define OFFSET2 36
300 EMIT2(X86_JA, OFFSET2); /* ja out */
301 label2 = cnt;
302 EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
303 EMIT2_off32(0x89, 0x85, 36); /* mov dword ptr [rbp + 36], eax */
304
305 /* prog = array->ptrs[index]; */
306 EMIT4_off32(0x48, 0x8D, 0x84, 0xD6, /* lea rax, [rsi + rdx * 8 + offsetof(...)] */
307 offsetof(struct bpf_array, ptrs));
308 EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */
309
310 /* if (prog == NULL)
311 * goto out;
312 */
313 EMIT4(0x48, 0x83, 0xF8, 0x00); /* cmp rax, 0 */
314 #define OFFSET3 10
315 EMIT2(X86_JE, OFFSET3); /* je out */
316 label3 = cnt;
317
318 /* goto *(prog->bpf_func + prologue_size); */
319 EMIT4(0x48, 0x8B, 0x40, /* mov rax, qword ptr [rax + 32] */
320 offsetof(struct bpf_prog, bpf_func));
321 EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE); /* add rax, prologue_size */
322
323 /* now we're ready to jump into next BPF program
324 * rdi == ctx (1st arg)
325 * rax == prog->bpf_func + prologue_size
326 */
327 EMIT2(0xFF, 0xE0); /* jmp rax */
328
329 /* out: */
330 BUILD_BUG_ON(cnt - label1 != OFFSET1);
331 BUILD_BUG_ON(cnt - label2 != OFFSET2);
332 BUILD_BUG_ON(cnt - label3 != OFFSET3);
333 *pprog = prog;
334 }
335
336
337 static void emit_load_skb_data_hlen(u8 **pprog)
338 {
339 u8 *prog = *pprog;
340 int cnt = 0;
341
342 /* r9d = skb->len - skb->data_len (headlen)
343 * r10 = skb->data
344 */
345 /* mov %r9d, off32(%rdi) */
346 EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
347
348 /* sub %r9d, off32(%rdi) */
349 EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
350
351 /* mov %r10, off32(%rdi) */
352 EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
353 *pprog = prog;
354 }
355
356 static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
357 int oldproglen, struct jit_context *ctx)
358 {
359 struct bpf_insn *insn = bpf_prog->insnsi;
360 int insn_cnt = bpf_prog->len;
361 bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
362 bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
363 bool seen_exit = false;
364 u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
365 int i, cnt = 0;
366 int proglen = 0;
367 u8 *prog = temp;
368
369 emit_prologue(&prog, bpf_prog->aux->stack_depth);
370
371 if (seen_ld_abs)
372 emit_load_skb_data_hlen(&prog);
373
374 for (i = 0; i < insn_cnt; i++, insn++) {
375 const s32 imm32 = insn->imm;
376 u32 dst_reg = insn->dst_reg;
377 u32 src_reg = insn->src_reg;
378 u8 b1 = 0, b2 = 0, b3 = 0;
379 s64 jmp_offset;
380 u8 jmp_cond;
381 bool reload_skb_data;
382 int ilen;
383 u8 *func;
384
385 if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
386 ctx->seen_ax_reg = seen_ax_reg = true;
387
388 switch (insn->code) {
389 /* ALU */
390 case BPF_ALU | BPF_ADD | BPF_X:
391 case BPF_ALU | BPF_SUB | BPF_X:
392 case BPF_ALU | BPF_AND | BPF_X:
393 case BPF_ALU | BPF_OR | BPF_X:
394 case BPF_ALU | BPF_XOR | BPF_X:
395 case BPF_ALU64 | BPF_ADD | BPF_X:
396 case BPF_ALU64 | BPF_SUB | BPF_X:
397 case BPF_ALU64 | BPF_AND | BPF_X:
398 case BPF_ALU64 | BPF_OR | BPF_X:
399 case BPF_ALU64 | BPF_XOR | BPF_X:
400 switch (BPF_OP(insn->code)) {
401 case BPF_ADD: b2 = 0x01; break;
402 case BPF_SUB: b2 = 0x29; break;
403 case BPF_AND: b2 = 0x21; break;
404 case BPF_OR: b2 = 0x09; break;
405 case BPF_XOR: b2 = 0x31; break;
406 }
407 if (BPF_CLASS(insn->code) == BPF_ALU64)
408 EMIT1(add_2mod(0x48, dst_reg, src_reg));
409 else if (is_ereg(dst_reg) || is_ereg(src_reg))
410 EMIT1(add_2mod(0x40, dst_reg, src_reg));
411 EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
412 break;
413
414 /* mov dst, src */
415 case BPF_ALU64 | BPF_MOV | BPF_X:
416 EMIT_mov(dst_reg, src_reg);
417 break;
418
419 /* mov32 dst, src */
420 case BPF_ALU | BPF_MOV | BPF_X:
421 if (is_ereg(dst_reg) || is_ereg(src_reg))
422 EMIT1(add_2mod(0x40, dst_reg, src_reg));
423 EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
424 break;
425
426 /* neg dst */
427 case BPF_ALU | BPF_NEG:
428 case BPF_ALU64 | BPF_NEG:
429 if (BPF_CLASS(insn->code) == BPF_ALU64)
430 EMIT1(add_1mod(0x48, dst_reg));
431 else if (is_ereg(dst_reg))
432 EMIT1(add_1mod(0x40, dst_reg));
433 EMIT2(0xF7, add_1reg(0xD8, dst_reg));
434 break;
435
436 case BPF_ALU | BPF_ADD | BPF_K:
437 case BPF_ALU | BPF_SUB | BPF_K:
438 case BPF_ALU | BPF_AND | BPF_K:
439 case BPF_ALU | BPF_OR | BPF_K:
440 case BPF_ALU | BPF_XOR | BPF_K:
441 case BPF_ALU64 | BPF_ADD | BPF_K:
442 case BPF_ALU64 | BPF_SUB | BPF_K:
443 case BPF_ALU64 | BPF_AND | BPF_K:
444 case BPF_ALU64 | BPF_OR | BPF_K:
445 case BPF_ALU64 | BPF_XOR | BPF_K:
446 if (BPF_CLASS(insn->code) == BPF_ALU64)
447 EMIT1(add_1mod(0x48, dst_reg));
448 else if (is_ereg(dst_reg))
449 EMIT1(add_1mod(0x40, dst_reg));
450
451 switch (BPF_OP(insn->code)) {
452 case BPF_ADD: b3 = 0xC0; break;
453 case BPF_SUB: b3 = 0xE8; break;
454 case BPF_AND: b3 = 0xE0; break;
455 case BPF_OR: b3 = 0xC8; break;
456 case BPF_XOR: b3 = 0xF0; break;
457 }
458
459 if (is_imm8(imm32))
460 EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
461 else
462 EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
463 break;
464
465 case BPF_ALU64 | BPF_MOV | BPF_K:
466 /* optimization: if imm32 is positive,
467 * use 'mov eax, imm32' (which zero-extends imm32)
468 * to save 2 bytes
469 */
470 if (imm32 < 0) {
471 /* 'mov rax, imm32' sign extends imm32 */
472 b1 = add_1mod(0x48, dst_reg);
473 b2 = 0xC7;
474 b3 = 0xC0;
475 EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
476 break;
477 }
478
479 case BPF_ALU | BPF_MOV | BPF_K:
480 /* optimization: if imm32 is zero, use 'xor <dst>,<dst>'
481 * to save 3 bytes.
482 */
483 if (imm32 == 0) {
484 if (is_ereg(dst_reg))
485 EMIT1(add_2mod(0x40, dst_reg, dst_reg));
486 b2 = 0x31; /* xor */
487 b3 = 0xC0;
488 EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
489 break;
490 }
491
492 /* mov %eax, imm32 */
493 if (is_ereg(dst_reg))
494 EMIT1(add_1mod(0x40, dst_reg));
495 EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
496 break;
497
498 case BPF_LD | BPF_IMM | BPF_DW:
499 /* optimization: if imm64 is zero, use 'xor <dst>,<dst>'
500 * to save 7 bytes.
501 */
502 if (insn[0].imm == 0 && insn[1].imm == 0) {
503 b1 = add_2mod(0x48, dst_reg, dst_reg);
504 b2 = 0x31; /* xor */
505 b3 = 0xC0;
506 EMIT3(b1, b2, add_2reg(b3, dst_reg, dst_reg));
507
508 insn++;
509 i++;
510 break;
511 }
512
513 /* movabsq %rax, imm64 */
514 EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
515 EMIT(insn[0].imm, 4);
516 EMIT(insn[1].imm, 4);
517
518 insn++;
519 i++;
520 break;
521
522 /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
523 case BPF_ALU | BPF_MOD | BPF_X:
524 case BPF_ALU | BPF_DIV | BPF_X:
525 case BPF_ALU | BPF_MOD | BPF_K:
526 case BPF_ALU | BPF_DIV | BPF_K:
527 case BPF_ALU64 | BPF_MOD | BPF_X:
528 case BPF_ALU64 | BPF_DIV | BPF_X:
529 case BPF_ALU64 | BPF_MOD | BPF_K:
530 case BPF_ALU64 | BPF_DIV | BPF_K:
531 EMIT1(0x50); /* push rax */
532 EMIT1(0x52); /* push rdx */
533
534 if (BPF_SRC(insn->code) == BPF_X)
535 /* mov r11, src_reg */
536 EMIT_mov(AUX_REG, src_reg);
537 else
538 /* mov r11, imm32 */
539 EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
540
541 /* mov rax, dst_reg */
542 EMIT_mov(BPF_REG_0, dst_reg);
543
544 /* xor edx, edx
545 * equivalent to 'xor rdx, rdx', but one byte less
546 */
547 EMIT2(0x31, 0xd2);
548
549 if (BPF_SRC(insn->code) == BPF_X) {
550 /* if (src_reg == 0) return 0 */
551
552 /* cmp r11, 0 */
553 EMIT4(0x49, 0x83, 0xFB, 0x00);
554
555 /* jne .+9 (skip over pop, pop, xor and jmp) */
556 EMIT2(X86_JNE, 1 + 1 + 2 + 5);
557 EMIT1(0x5A); /* pop rdx */
558 EMIT1(0x58); /* pop rax */
559 EMIT2(0x31, 0xc0); /* xor eax, eax */
560
561 /* jmp cleanup_addr
562 * addrs[i] - 11, because there are 11 bytes
563 * after this insn: div, mov, pop, pop, mov
564 */
565 jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
566 EMIT1_off32(0xE9, jmp_offset);
567 }
568
569 if (BPF_CLASS(insn->code) == BPF_ALU64)
570 /* div r11 */
571 EMIT3(0x49, 0xF7, 0xF3);
572 else
573 /* div r11d */
574 EMIT3(0x41, 0xF7, 0xF3);
575
576 if (BPF_OP(insn->code) == BPF_MOD)
577 /* mov r11, rdx */
578 EMIT3(0x49, 0x89, 0xD3);
579 else
580 /* mov r11, rax */
581 EMIT3(0x49, 0x89, 0xC3);
582
583 EMIT1(0x5A); /* pop rdx */
584 EMIT1(0x58); /* pop rax */
585
586 /* mov dst_reg, r11 */
587 EMIT_mov(dst_reg, AUX_REG);
588 break;
589
590 case BPF_ALU | BPF_MUL | BPF_K:
591 case BPF_ALU | BPF_MUL | BPF_X:
592 case BPF_ALU64 | BPF_MUL | BPF_K:
593 case BPF_ALU64 | BPF_MUL | BPF_X:
594 EMIT1(0x50); /* push rax */
595 EMIT1(0x52); /* push rdx */
596
597 /* mov r11, dst_reg */
598 EMIT_mov(AUX_REG, dst_reg);
599
600 if (BPF_SRC(insn->code) == BPF_X)
601 /* mov rax, src_reg */
602 EMIT_mov(BPF_REG_0, src_reg);
603 else
604 /* mov rax, imm32 */
605 EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
606
607 if (BPF_CLASS(insn->code) == BPF_ALU64)
608 EMIT1(add_1mod(0x48, AUX_REG));
609 else if (is_ereg(AUX_REG))
610 EMIT1(add_1mod(0x40, AUX_REG));
611 /* mul(q) r11 */
612 EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
613
614 /* mov r11, rax */
615 EMIT_mov(AUX_REG, BPF_REG_0);
616
617 EMIT1(0x5A); /* pop rdx */
618 EMIT1(0x58); /* pop rax */
619
620 /* mov dst_reg, r11 */
621 EMIT_mov(dst_reg, AUX_REG);
622 break;
623
624 /* shifts */
625 case BPF_ALU | BPF_LSH | BPF_K:
626 case BPF_ALU | BPF_RSH | BPF_K:
627 case BPF_ALU | BPF_ARSH | BPF_K:
628 case BPF_ALU64 | BPF_LSH | BPF_K:
629 case BPF_ALU64 | BPF_RSH | BPF_K:
630 case BPF_ALU64 | BPF_ARSH | BPF_K:
631 if (BPF_CLASS(insn->code) == BPF_ALU64)
632 EMIT1(add_1mod(0x48, dst_reg));
633 else if (is_ereg(dst_reg))
634 EMIT1(add_1mod(0x40, dst_reg));
635
636 switch (BPF_OP(insn->code)) {
637 case BPF_LSH: b3 = 0xE0; break;
638 case BPF_RSH: b3 = 0xE8; break;
639 case BPF_ARSH: b3 = 0xF8; break;
640 }
641 EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
642 break;
643
644 case BPF_ALU | BPF_LSH | BPF_X:
645 case BPF_ALU | BPF_RSH | BPF_X:
646 case BPF_ALU | BPF_ARSH | BPF_X:
647 case BPF_ALU64 | BPF_LSH | BPF_X:
648 case BPF_ALU64 | BPF_RSH | BPF_X:
649 case BPF_ALU64 | BPF_ARSH | BPF_X:
650
651 /* check for bad case when dst_reg == rcx */
652 if (dst_reg == BPF_REG_4) {
653 /* mov r11, dst_reg */
654 EMIT_mov(AUX_REG, dst_reg);
655 dst_reg = AUX_REG;
656 }
657
658 if (src_reg != BPF_REG_4) { /* common case */
659 EMIT1(0x51); /* push rcx */
660
661 /* mov rcx, src_reg */
662 EMIT_mov(BPF_REG_4, src_reg);
663 }
664
665 /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
666 if (BPF_CLASS(insn->code) == BPF_ALU64)
667 EMIT1(add_1mod(0x48, dst_reg));
668 else if (is_ereg(dst_reg))
669 EMIT1(add_1mod(0x40, dst_reg));
670
671 switch (BPF_OP(insn->code)) {
672 case BPF_LSH: b3 = 0xE0; break;
673 case BPF_RSH: b3 = 0xE8; break;
674 case BPF_ARSH: b3 = 0xF8; break;
675 }
676 EMIT2(0xD3, add_1reg(b3, dst_reg));
677
678 if (src_reg != BPF_REG_4)
679 EMIT1(0x59); /* pop rcx */
680
681 if (insn->dst_reg == BPF_REG_4)
682 /* mov dst_reg, r11 */
683 EMIT_mov(insn->dst_reg, AUX_REG);
684 break;
685
686 case BPF_ALU | BPF_END | BPF_FROM_BE:
687 switch (imm32) {
688 case 16:
689 /* emit 'ror %ax, 8' to swap lower 2 bytes */
690 EMIT1(0x66);
691 if (is_ereg(dst_reg))
692 EMIT1(0x41);
693 EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
694
695 /* emit 'movzwl eax, ax' */
696 if (is_ereg(dst_reg))
697 EMIT3(0x45, 0x0F, 0xB7);
698 else
699 EMIT2(0x0F, 0xB7);
700 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
701 break;
702 case 32:
703 /* emit 'bswap eax' to swap lower 4 bytes */
704 if (is_ereg(dst_reg))
705 EMIT2(0x41, 0x0F);
706 else
707 EMIT1(0x0F);
708 EMIT1(add_1reg(0xC8, dst_reg));
709 break;
710 case 64:
711 /* emit 'bswap rax' to swap 8 bytes */
712 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
713 add_1reg(0xC8, dst_reg));
714 break;
715 }
716 break;
717
718 case BPF_ALU | BPF_END | BPF_FROM_LE:
719 switch (imm32) {
720 case 16:
721 /* emit 'movzwl eax, ax' to zero extend 16-bit
722 * into 64 bit
723 */
724 if (is_ereg(dst_reg))
725 EMIT3(0x45, 0x0F, 0xB7);
726 else
727 EMIT2(0x0F, 0xB7);
728 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
729 break;
730 case 32:
731 /* emit 'mov eax, eax' to clear upper 32-bits */
732 if (is_ereg(dst_reg))
733 EMIT1(0x45);
734 EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
735 break;
736 case 64:
737 /* nop */
738 break;
739 }
740 break;
741
742 /* ST: *(u8*)(dst_reg + off) = imm */
743 case BPF_ST | BPF_MEM | BPF_B:
744 if (is_ereg(dst_reg))
745 EMIT2(0x41, 0xC6);
746 else
747 EMIT1(0xC6);
748 goto st;
749 case BPF_ST | BPF_MEM | BPF_H:
750 if (is_ereg(dst_reg))
751 EMIT3(0x66, 0x41, 0xC7);
752 else
753 EMIT2(0x66, 0xC7);
754 goto st;
755 case BPF_ST | BPF_MEM | BPF_W:
756 if (is_ereg(dst_reg))
757 EMIT2(0x41, 0xC7);
758 else
759 EMIT1(0xC7);
760 goto st;
761 case BPF_ST | BPF_MEM | BPF_DW:
762 EMIT2(add_1mod(0x48, dst_reg), 0xC7);
763
764 st: if (is_imm8(insn->off))
765 EMIT2(add_1reg(0x40, dst_reg), insn->off);
766 else
767 EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
768
769 EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
770 break;
771
772 /* STX: *(u8*)(dst_reg + off) = src_reg */
773 case BPF_STX | BPF_MEM | BPF_B:
774 /* emit 'mov byte ptr [rax + off], al' */
775 if (is_ereg(dst_reg) || is_ereg(src_reg) ||
776 /* have to add extra byte for x86 SIL, DIL regs */
777 src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
778 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
779 else
780 EMIT1(0x88);
781 goto stx;
782 case BPF_STX | BPF_MEM | BPF_H:
783 if (is_ereg(dst_reg) || is_ereg(src_reg))
784 EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
785 else
786 EMIT2(0x66, 0x89);
787 goto stx;
788 case BPF_STX | BPF_MEM | BPF_W:
789 if (is_ereg(dst_reg) || is_ereg(src_reg))
790 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
791 else
792 EMIT1(0x89);
793 goto stx;
794 case BPF_STX | BPF_MEM | BPF_DW:
795 EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
796 stx: if (is_imm8(insn->off))
797 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
798 else
799 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
800 insn->off);
801 break;
802
803 /* LDX: dst_reg = *(u8*)(src_reg + off) */
804 case BPF_LDX | BPF_MEM | BPF_B:
805 /* emit 'movzx rax, byte ptr [rax + off]' */
806 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
807 goto ldx;
808 case BPF_LDX | BPF_MEM | BPF_H:
809 /* emit 'movzx rax, word ptr [rax + off]' */
810 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
811 goto ldx;
812 case BPF_LDX | BPF_MEM | BPF_W:
813 /* emit 'mov eax, dword ptr [rax+0x14]' */
814 if (is_ereg(dst_reg) || is_ereg(src_reg))
815 EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
816 else
817 EMIT1(0x8B);
818 goto ldx;
819 case BPF_LDX | BPF_MEM | BPF_DW:
820 /* emit 'mov rax, qword ptr [rax+0x14]' */
821 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
822 ldx: /* if insn->off == 0 we can save one extra byte, but
823 * special case of x86 r13 which always needs an offset
824 * is not worth the hassle
825 */
826 if (is_imm8(insn->off))
827 EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
828 else
829 EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
830 insn->off);
831 break;
832
833 /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
834 case BPF_STX | BPF_XADD | BPF_W:
835 /* emit 'lock add dword ptr [rax + off], eax' */
836 if (is_ereg(dst_reg) || is_ereg(src_reg))
837 EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
838 else
839 EMIT2(0xF0, 0x01);
840 goto xadd;
841 case BPF_STX | BPF_XADD | BPF_DW:
842 EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
843 xadd: if (is_imm8(insn->off))
844 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
845 else
846 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
847 insn->off);
848 break;
849
850 /* call */
851 case BPF_JMP | BPF_CALL:
852 func = (u8 *) __bpf_call_base + imm32;
853 jmp_offset = func - (image + addrs[i]);
854 if (seen_ld_abs) {
855 reload_skb_data = bpf_helper_changes_pkt_data(func);
856 if (reload_skb_data) {
857 EMIT1(0x57); /* push %rdi */
858 jmp_offset += 22; /* pop, mov, sub, mov */
859 } else {
860 EMIT2(0x41, 0x52); /* push %r10 */
861 EMIT2(0x41, 0x51); /* push %r9 */
862 /* need to adjust jmp offset, since
863 * pop %r9, pop %r10 take 4 bytes after call insn
864 */
865 jmp_offset += 4;
866 }
867 }
868 if (!imm32 || !is_simm32(jmp_offset)) {
869 pr_err("unsupported bpf func %d addr %p image %p\n",
870 imm32, func, image);
871 return -EINVAL;
872 }
873 EMIT1_off32(0xE8, jmp_offset);
874 if (seen_ld_abs) {
875 if (reload_skb_data) {
876 EMIT1(0x5F); /* pop %rdi */
877 emit_load_skb_data_hlen(&prog);
878 } else {
879 EMIT2(0x41, 0x59); /* pop %r9 */
880 EMIT2(0x41, 0x5A); /* pop %r10 */
881 }
882 }
883 break;
884
885 case BPF_JMP | BPF_TAIL_CALL:
886 emit_bpf_tail_call(&prog);
887 break;
888
889 /* cond jump */
890 case BPF_JMP | BPF_JEQ | BPF_X:
891 case BPF_JMP | BPF_JNE | BPF_X:
892 case BPF_JMP | BPF_JGT | BPF_X:
893 case BPF_JMP | BPF_JLT | BPF_X:
894 case BPF_JMP | BPF_JGE | BPF_X:
895 case BPF_JMP | BPF_JLE | BPF_X:
896 case BPF_JMP | BPF_JSGT | BPF_X:
897 case BPF_JMP | BPF_JSLT | BPF_X:
898 case BPF_JMP | BPF_JSGE | BPF_X:
899 case BPF_JMP | BPF_JSLE | BPF_X:
900 /* cmp dst_reg, src_reg */
901 EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
902 add_2reg(0xC0, dst_reg, src_reg));
903 goto emit_cond_jmp;
904
905 case BPF_JMP | BPF_JSET | BPF_X:
906 /* test dst_reg, src_reg */
907 EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
908 add_2reg(0xC0, dst_reg, src_reg));
909 goto emit_cond_jmp;
910
911 case BPF_JMP | BPF_JSET | BPF_K:
912 /* test dst_reg, imm32 */
913 EMIT1(add_1mod(0x48, dst_reg));
914 EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
915 goto emit_cond_jmp;
916
917 case BPF_JMP | BPF_JEQ | BPF_K:
918 case BPF_JMP | BPF_JNE | BPF_K:
919 case BPF_JMP | BPF_JGT | BPF_K:
920 case BPF_JMP | BPF_JLT | BPF_K:
921 case BPF_JMP | BPF_JGE | BPF_K:
922 case BPF_JMP | BPF_JLE | BPF_K:
923 case BPF_JMP | BPF_JSGT | BPF_K:
924 case BPF_JMP | BPF_JSLT | BPF_K:
925 case BPF_JMP | BPF_JSGE | BPF_K:
926 case BPF_JMP | BPF_JSLE | BPF_K:
927 /* cmp dst_reg, imm8/32 */
928 EMIT1(add_1mod(0x48, dst_reg));
929
930 if (is_imm8(imm32))
931 EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
932 else
933 EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
934
935 emit_cond_jmp: /* convert BPF opcode to x86 */
936 switch (BPF_OP(insn->code)) {
937 case BPF_JEQ:
938 jmp_cond = X86_JE;
939 break;
940 case BPF_JSET:
941 case BPF_JNE:
942 jmp_cond = X86_JNE;
943 break;
944 case BPF_JGT:
945 /* GT is unsigned '>', JA in x86 */
946 jmp_cond = X86_JA;
947 break;
948 case BPF_JLT:
949 /* LT is unsigned '<', JB in x86 */
950 jmp_cond = X86_JB;
951 break;
952 case BPF_JGE:
953 /* GE is unsigned '>=', JAE in x86 */
954 jmp_cond = X86_JAE;
955 break;
956 case BPF_JLE:
957 /* LE is unsigned '<=', JBE in x86 */
958 jmp_cond = X86_JBE;
959 break;
960 case BPF_JSGT:
961 /* signed '>', GT in x86 */
962 jmp_cond = X86_JG;
963 break;
964 case BPF_JSLT:
965 /* signed '<', LT in x86 */
966 jmp_cond = X86_JL;
967 break;
968 case BPF_JSGE:
969 /* signed '>=', GE in x86 */
970 jmp_cond = X86_JGE;
971 break;
972 case BPF_JSLE:
973 /* signed '<=', LE in x86 */
974 jmp_cond = X86_JLE;
975 break;
976 default: /* to silence gcc warning */
977 return -EFAULT;
978 }
979 jmp_offset = addrs[i + insn->off] - addrs[i];
980 if (is_imm8(jmp_offset)) {
981 EMIT2(jmp_cond, jmp_offset);
982 } else if (is_simm32(jmp_offset)) {
983 EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
984 } else {
985 pr_err("cond_jmp gen bug %llx\n", jmp_offset);
986 return -EFAULT;
987 }
988
989 break;
990
991 case BPF_JMP | BPF_JA:
992 jmp_offset = addrs[i + insn->off] - addrs[i];
993 if (!jmp_offset)
994 /* optimize out nop jumps */
995 break;
996 emit_jmp:
997 if (is_imm8(jmp_offset)) {
998 EMIT2(0xEB, jmp_offset);
999 } else if (is_simm32(jmp_offset)) {
1000 EMIT1_off32(0xE9, jmp_offset);
1001 } else {
1002 pr_err("jmp gen bug %llx\n", jmp_offset);
1003 return -EFAULT;
1004 }
1005 break;
1006
1007 case BPF_LD | BPF_IND | BPF_W:
1008 func = sk_load_word;
1009 goto common_load;
1010 case BPF_LD | BPF_ABS | BPF_W:
1011 func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
1012 common_load:
1013 ctx->seen_ld_abs = seen_ld_abs = true;
1014 jmp_offset = func - (image + addrs[i]);
1015 if (!func || !is_simm32(jmp_offset)) {
1016 pr_err("unsupported bpf func %d addr %p image %p\n",
1017 imm32, func, image);
1018 return -EINVAL;
1019 }
1020 if (BPF_MODE(insn->code) == BPF_ABS) {
1021 /* mov %esi, imm32 */
1022 EMIT1_off32(0xBE, imm32);
1023 } else {
1024 /* mov %rsi, src_reg */
1025 EMIT_mov(BPF_REG_2, src_reg);
1026 if (imm32) {
1027 if (is_imm8(imm32))
1028 /* add %esi, imm8 */
1029 EMIT3(0x83, 0xC6, imm32);
1030 else
1031 /* add %esi, imm32 */
1032 EMIT2_off32(0x81, 0xC6, imm32);
1033 }
1034 }
1035 /* skb pointer is in R6 (%rbx), it will be copied into
1036 * %rdi if skb_copy_bits() call is necessary.
1037 * sk_load_* helpers also use %r10 and %r9d.
1038 * See bpf_jit.S
1039 */
1040 if (seen_ax_reg)
1041 /* r10 = skb->data, mov %r10, off32(%rbx) */
1042 EMIT3_off32(0x4c, 0x8b, 0x93,
1043 offsetof(struct sk_buff, data));
1044 EMIT1_off32(0xE8, jmp_offset); /* call */
1045 break;
1046
1047 case BPF_LD | BPF_IND | BPF_H:
1048 func = sk_load_half;
1049 goto common_load;
1050 case BPF_LD | BPF_ABS | BPF_H:
1051 func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
1052 goto common_load;
1053 case BPF_LD | BPF_IND | BPF_B:
1054 func = sk_load_byte;
1055 goto common_load;
1056 case BPF_LD | BPF_ABS | BPF_B:
1057 func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
1058 goto common_load;
1059
1060 case BPF_JMP | BPF_EXIT:
1061 if (seen_exit) {
1062 jmp_offset = ctx->cleanup_addr - addrs[i];
1063 goto emit_jmp;
1064 }
1065 seen_exit = true;
1066 /* update cleanup_addr */
1067 ctx->cleanup_addr = proglen;
1068 /* mov rbx, qword ptr [rbp+0] */
1069 EMIT4(0x48, 0x8B, 0x5D, 0);
1070 /* mov r13, qword ptr [rbp+8] */
1071 EMIT4(0x4C, 0x8B, 0x6D, 8);
1072 /* mov r14, qword ptr [rbp+16] */
1073 EMIT4(0x4C, 0x8B, 0x75, 16);
1074 /* mov r15, qword ptr [rbp+24] */
1075 EMIT4(0x4C, 0x8B, 0x7D, 24);
1076
1077 /* add rbp, AUX_STACK_SPACE */
1078 EMIT4(0x48, 0x83, 0xC5, AUX_STACK_SPACE);
1079 EMIT1(0xC9); /* leave */
1080 EMIT1(0xC3); /* ret */
1081 break;
1082
1083 default:
1084 /* By design x64 JIT should support all BPF instructions
1085 * This error will be seen if new instruction was added
1086 * to interpreter, but not to JIT
1087 * or if there is junk in bpf_prog
1088 */
1089 pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
1090 return -EINVAL;
1091 }
1092
1093 ilen = prog - temp;
1094 if (ilen > BPF_MAX_INSN_SIZE) {
1095 pr_err("bpf_jit: fatal insn size error\n");
1096 return -EFAULT;
1097 }
1098
1099 if (image) {
1100 if (unlikely(proglen + ilen > oldproglen)) {
1101 pr_err("bpf_jit: fatal error\n");
1102 return -EFAULT;
1103 }
1104 memcpy(image + proglen, temp, ilen);
1105 }
1106 proglen += ilen;
1107 addrs[i] = proglen;
1108 prog = temp;
1109 }
1110 return proglen;
1111 }
1112
1113 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
1114 {
1115 struct bpf_binary_header *header = NULL;
1116 struct bpf_prog *tmp, *orig_prog = prog;
1117 int proglen, oldproglen = 0;
1118 struct jit_context ctx = {};
1119 bool tmp_blinded = false;
1120 u8 *image = NULL;
1121 int *addrs;
1122 int pass;
1123 int i;
1124
1125 if (!bpf_jit_enable)
1126 return orig_prog;
1127
1128 tmp = bpf_jit_blind_constants(prog);
1129 /* If blinding was requested and we failed during blinding,
1130 * we must fall back to the interpreter.
1131 */
1132 if (IS_ERR(tmp))
1133 return orig_prog;
1134 if (tmp != prog) {
1135 tmp_blinded = true;
1136 prog = tmp;
1137 }
1138
1139 addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
1140 if (!addrs) {
1141 prog = orig_prog;
1142 goto out;
1143 }
1144
1145 /* Before first pass, make a rough estimation of addrs[]
1146 * each bpf instruction is translated to less than 64 bytes
1147 */
1148 for (proglen = 0, i = 0; i < prog->len; i++) {
1149 proglen += 64;
1150 addrs[i] = proglen;
1151 }
1152 ctx.cleanup_addr = proglen;
1153
1154 /* JITed image shrinks with every pass and the loop iterates
1155 * until the image stops shrinking. Very large bpf programs
1156 * may converge on the last pass. In such case do one more
1157 * pass to emit the final image
1158 */
1159 for (pass = 0; pass < 10 || image; pass++) {
1160 proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
1161 if (proglen <= 0) {
1162 image = NULL;
1163 if (header)
1164 bpf_jit_binary_free(header);
1165 prog = orig_prog;
1166 goto out_addrs;
1167 }
1168 if (image) {
1169 if (proglen != oldproglen) {
1170 pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
1171 proglen, oldproglen);
1172 prog = orig_prog;
1173 goto out_addrs;
1174 }
1175 break;
1176 }
1177 if (proglen == oldproglen) {
1178 header = bpf_jit_binary_alloc(proglen, &image,
1179 1, jit_fill_hole);
1180 if (!header) {
1181 prog = orig_prog;
1182 goto out_addrs;
1183 }
1184 }
1185 oldproglen = proglen;
1186 }
1187
1188 if (bpf_jit_enable > 1)
1189 bpf_jit_dump(prog->len, proglen, pass + 1, image);
1190
1191 if (image) {
1192 bpf_flush_icache(header, image + proglen);
1193 bpf_jit_binary_lock_ro(header);
1194 prog->bpf_func = (void *)image;
1195 prog->jited = 1;
1196 prog->jited_len = proglen;
1197 } else {
1198 prog = orig_prog;
1199 }
1200
1201 out_addrs:
1202 kfree(addrs);
1203 out:
1204 if (tmp_blinded)
1205 bpf_jit_prog_release_other(prog, prog == orig_prog ?
1206 tmp : orig_prog);
1207 return prog;
1208 }