drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / mm / tlb.c
1 #include <linux/init.h>
2
3 #include <linux/mm.h>
4 #include <linux/spinlock.h>
5 #include <linux/smp.h>
6 #include <linux/interrupt.h>
7 #include <linux/module.h>
8 #include <linux/cpu.h>
9
10 #include <asm/tlbflush.h>
11 #include <asm/mmu_context.h>
12 #include <asm/cache.h>
13 #include <asm/apic.h>
14 #include <asm/uv/uv.h>
15 #include <linux/debugfs.h>
16
17 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate)
18 = { &init_mm, 0, };
19
20 /*
21 * Smarter SMP flushing macros.
22 * c/o Linus Torvalds.
23 *
24 * These mean you can really definitely utterly forget about
25 * writing to user space from interrupts. (Its not allowed anyway).
26 *
27 * Optimizations Manfred Spraul <manfred@colorfullife.com>
28 *
29 * More scalable flush, from Andi Kleen
30 *
31 * Implement flush IPI by CALL_FUNCTION_VECTOR, Alex Shi
32 */
33
34 struct flush_tlb_info {
35 struct mm_struct *flush_mm;
36 unsigned long flush_start;
37 unsigned long flush_end;
38 };
39
40 /*
41 * We cannot call mmdrop() because we are in interrupt context,
42 * instead update mm->cpu_vm_mask.
43 */
44 void leave_mm(int cpu)
45 {
46 struct mm_struct *active_mm = this_cpu_read(cpu_tlbstate.active_mm);
47 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
48 BUG();
49 if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {
50 cpumask_clear_cpu(cpu, mm_cpumask(active_mm));
51 load_cr3(swapper_pg_dir);
52 }
53 }
54 EXPORT_SYMBOL_GPL(leave_mm);
55
56 /*
57 * The flush IPI assumes that a thread switch happens in this order:
58 * [cpu0: the cpu that switches]
59 * 1) switch_mm() either 1a) or 1b)
60 * 1a) thread switch to a different mm
61 * 1a1) set cpu_tlbstate to TLBSTATE_OK
62 * Now the tlb flush NMI handler flush_tlb_func won't call leave_mm
63 * if cpu0 was in lazy tlb mode.
64 * 1a2) update cpu active_mm
65 * Now cpu0 accepts tlb flushes for the new mm.
66 * 1a3) cpu_set(cpu, new_mm->cpu_vm_mask);
67 * Now the other cpus will send tlb flush ipis.
68 * 1a4) change cr3.
69 * 1a5) cpu_clear(cpu, old_mm->cpu_vm_mask);
70 * Stop ipi delivery for the old mm. This is not synchronized with
71 * the other cpus, but flush_tlb_func ignore flush ipis for the wrong
72 * mm, and in the worst case we perform a superfluous tlb flush.
73 * 1b) thread switch without mm change
74 * cpu active_mm is correct, cpu0 already handles flush ipis.
75 * 1b1) set cpu_tlbstate to TLBSTATE_OK
76 * 1b2) test_and_set the cpu bit in cpu_vm_mask.
77 * Atomically set the bit [other cpus will start sending flush ipis],
78 * and test the bit.
79 * 1b3) if the bit was 0: leave_mm was called, flush the tlb.
80 * 2) switch %%esp, ie current
81 *
82 * The interrupt must handle 2 special cases:
83 * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm.
84 * - the cpu performs speculative tlb reads, i.e. even if the cpu only
85 * runs in kernel space, the cpu could load tlb entries for user space
86 * pages.
87 *
88 * The good news is that cpu_tlbstate is local to each cpu, no
89 * write/read ordering problems.
90 */
91
92 /*
93 * TLB flush funcation:
94 * 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
95 * 2) Leave the mm if we are in the lazy tlb mode.
96 */
97 static void flush_tlb_func(void *info)
98 {
99 struct flush_tlb_info *f = info;
100
101 inc_irq_stat(irq_tlb_count);
102
103 if (f->flush_mm != this_cpu_read(cpu_tlbstate.active_mm))
104 return;
105
106 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {
107 if (f->flush_end == TLB_FLUSH_ALL)
108 local_flush_tlb();
109 else if (!f->flush_end)
110 __flush_tlb_single(f->flush_start);
111 else {
112 unsigned long addr;
113 addr = f->flush_start;
114 while (addr < f->flush_end) {
115 __flush_tlb_single(addr);
116 addr += PAGE_SIZE;
117 }
118 }
119 } else
120 leave_mm(smp_processor_id());
121
122 }
123
124 void native_flush_tlb_others(const struct cpumask *cpumask,
125 struct mm_struct *mm, unsigned long start,
126 unsigned long end)
127 {
128 struct flush_tlb_info info;
129 info.flush_mm = mm;
130 info.flush_start = start;
131 info.flush_end = end;
132
133 if (is_uv_system()) {
134 unsigned int cpu;
135
136 cpu = smp_processor_id();
137 cpumask = uv_flush_tlb_others(cpumask, mm, start, end, cpu);
138 if (cpumask)
139 smp_call_function_many(cpumask, flush_tlb_func,
140 &info, 1);
141 return;
142 }
143 smp_call_function_many(cpumask, flush_tlb_func, &info, 1);
144 }
145
146 void flush_tlb_current_task(void)
147 {
148 struct mm_struct *mm = current->mm;
149
150 preempt_disable();
151
152 /* This is an implicit full barrier that synchronizes with switch_mm. */
153 local_flush_tlb();
154
155 if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
156 flush_tlb_others(mm_cpumask(mm), mm, 0UL, TLB_FLUSH_ALL);
157 preempt_enable();
158 }
159
160 /*
161 * It can find out the THP large page, or
162 * HUGETLB page in tlb_flush when THP disabled
163 */
164 static inline unsigned long has_large_page(struct mm_struct *mm,
165 unsigned long start, unsigned long end)
166 {
167 pgd_t *pgd;
168 pud_t *pud;
169 pmd_t *pmd;
170 unsigned long addr = ALIGN(start, HPAGE_SIZE);
171 for (; addr < end; addr += HPAGE_SIZE) {
172 pgd = pgd_offset(mm, addr);
173 if (likely(!pgd_none(*pgd))) {
174 pud = pud_offset(pgd, addr);
175 if (likely(!pud_none(*pud))) {
176 pmd = pmd_offset(pud, addr);
177 if (likely(!pmd_none(*pmd)))
178 if (pmd_large(*pmd))
179 return addr;
180 }
181 }
182 }
183 return 0;
184 }
185
186 void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
187 unsigned long end, unsigned long vmflag)
188 {
189 unsigned long addr;
190 unsigned act_entries, tlb_entries = 0;
191
192 preempt_disable();
193 if (current->active_mm != mm) {
194 /* Synchronize with switch_mm. */
195 smp_mb();
196
197 goto flush_all;
198 }
199
200 if (!current->mm) {
201 leave_mm(smp_processor_id());
202
203 /* Synchronize with switch_mm. */
204 smp_mb();
205
206 goto flush_all;
207 }
208
209 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1
210 || vmflag & VM_HUGETLB) {
211 local_flush_tlb();
212 goto flush_all;
213 }
214
215 /* In modern CPU, last level tlb used for both data/ins */
216 if (vmflag & VM_EXEC)
217 tlb_entries = tlb_lli_4k[ENTRIES];
218 else
219 tlb_entries = tlb_lld_4k[ENTRIES];
220 /* Assume all of TLB entries was occupied by this task */
221 act_entries = mm->total_vm > tlb_entries ? tlb_entries : mm->total_vm;
222
223 /* tlb_flushall_shift is on balance point, details in commit log */
224 if ((end - start) >> PAGE_SHIFT > act_entries >> tlb_flushall_shift)
225 local_flush_tlb();
226 else {
227 if (has_large_page(mm, start, end)) {
228 local_flush_tlb();
229 goto flush_all;
230 }
231 /* flush range by one by one 'invlpg' */
232 for (addr = start; addr < end; addr += PAGE_SIZE)
233 __flush_tlb_single(addr);
234
235 if (cpumask_any_but(mm_cpumask(mm),
236 smp_processor_id()) < nr_cpu_ids)
237 flush_tlb_others(mm_cpumask(mm), mm, start, end);
238 preempt_enable();
239 return;
240 }
241
242 flush_all:
243 if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
244 flush_tlb_others(mm_cpumask(mm), mm, 0UL, TLB_FLUSH_ALL);
245 preempt_enable();
246 }
247
248 void flush_tlb_page(struct vm_area_struct *vma, unsigned long start)
249 {
250 struct mm_struct *mm = vma->vm_mm;
251
252 preempt_disable();
253
254 if (current->active_mm == mm) {
255 if (current->mm) {
256 /*
257 * Implicit full barrier (INVLPG) that synchronizes
258 * with switch_mm.
259 */
260 __flush_tlb_one(start);
261 } else {
262 leave_mm(smp_processor_id());
263
264 /* Synchronize with switch_mm. */
265 smp_mb();
266 }
267 }
268
269 if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
270 flush_tlb_others(mm_cpumask(mm), mm, start, 0UL);
271
272 preempt_enable();
273 }
274
275 static void do_flush_tlb_all(void *info)
276 {
277 __flush_tlb_all();
278 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)
279 leave_mm(smp_processor_id());
280 }
281
282 void flush_tlb_all(void)
283 {
284 on_each_cpu(do_flush_tlb_all, NULL, 1);
285 }
286
287 static void do_kernel_range_flush(void *info)
288 {
289 struct flush_tlb_info *f = info;
290 unsigned long addr;
291
292 /* flush range by one by one 'invlpg' */
293 for (addr = f->flush_start; addr < f->flush_end; addr += PAGE_SIZE)
294 __flush_tlb_single(addr);
295 }
296
297 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
298 {
299 unsigned act_entries;
300 struct flush_tlb_info info;
301
302 /* In modern CPU, last level tlb used for both data/ins */
303 act_entries = tlb_lld_4k[ENTRIES];
304
305 /* Balance as user space task's flush, a bit conservative */
306 if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 ||
307 (end - start) >> PAGE_SHIFT > act_entries >> tlb_flushall_shift)
308
309 on_each_cpu(do_flush_tlb_all, NULL, 1);
310 else {
311 info.flush_start = start;
312 info.flush_end = end;
313 on_each_cpu(do_kernel_range_flush, &info, 1);
314 }
315 }
316
317 #ifdef CONFIG_DEBUG_TLBFLUSH
318 static ssize_t tlbflush_read_file(struct file *file, char __user *user_buf,
319 size_t count, loff_t *ppos)
320 {
321 char buf[32];
322 unsigned int len;
323
324 len = sprintf(buf, "%hd\n", tlb_flushall_shift);
325 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
326 }
327
328 static ssize_t tlbflush_write_file(struct file *file,
329 const char __user *user_buf, size_t count, loff_t *ppos)
330 {
331 char buf[32];
332 ssize_t len;
333 s8 shift;
334
335 len = min(count, sizeof(buf) - 1);
336 if (copy_from_user(buf, user_buf, len))
337 return -EFAULT;
338
339 buf[len] = '\0';
340 if (kstrtos8(buf, 0, &shift))
341 return -EINVAL;
342
343 if (shift < -1 || shift >= BITS_PER_LONG)
344 return -EINVAL;
345
346 tlb_flushall_shift = shift;
347 return count;
348 }
349
350 static const struct file_operations fops_tlbflush = {
351 .read = tlbflush_read_file,
352 .write = tlbflush_write_file,
353 .llseek = default_llseek,
354 };
355
356 static int __init create_tlb_flushall_shift(void)
357 {
358 debugfs_create_file("tlb_flushall_shift", S_IRUSR | S_IWUSR,
359 arch_debugfs_dir, NULL, &fops_tlbflush);
360 return 0;
361 }
362 late_initcall(create_tlb_flushall_shift);
363 #endif