2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <trace/events/kvm.h>
41 #undef TRACE_INCLUDE_FILE
42 #define CREATE_TRACE_POINTS
45 #include <asm/uaccess.h>
51 #define MAX_IO_MSRS 256
52 #define CR0_RESERVED_BITS \
53 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
54 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
55 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
56 #define CR4_RESERVED_BITS \
57 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
59 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
60 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
68 * - enable syscall per default because its emulated by KVM
69 * - enable LME and LMA per default on 64 bit KVM
72 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
74 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
80 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
82 struct kvm_cpuid_entry2 __user
*entries
);
84 struct kvm_x86_ops
*kvm_x86_ops
;
85 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
88 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
90 struct kvm_stats_debugfs_item debugfs_entries
[] = {
91 { "pf_fixed", VCPU_STAT(pf_fixed
) },
92 { "pf_guest", VCPU_STAT(pf_guest
) },
93 { "tlb_flush", VCPU_STAT(tlb_flush
) },
94 { "invlpg", VCPU_STAT(invlpg
) },
95 { "exits", VCPU_STAT(exits
) },
96 { "io_exits", VCPU_STAT(io_exits
) },
97 { "mmio_exits", VCPU_STAT(mmio_exits
) },
98 { "signal_exits", VCPU_STAT(signal_exits
) },
99 { "irq_window", VCPU_STAT(irq_window_exits
) },
100 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
101 { "halt_exits", VCPU_STAT(halt_exits
) },
102 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
103 { "hypercalls", VCPU_STAT(hypercalls
) },
104 { "request_irq", VCPU_STAT(request_irq_exits
) },
105 { "irq_exits", VCPU_STAT(irq_exits
) },
106 { "host_state_reload", VCPU_STAT(host_state_reload
) },
107 { "efer_reload", VCPU_STAT(efer_reload
) },
108 { "fpu_reload", VCPU_STAT(fpu_reload
) },
109 { "insn_emulation", VCPU_STAT(insn_emulation
) },
110 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
111 { "irq_injections", VCPU_STAT(irq_injections
) },
112 { "nmi_injections", VCPU_STAT(nmi_injections
) },
113 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
114 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
115 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
116 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
117 { "mmu_flooded", VM_STAT(mmu_flooded
) },
118 { "mmu_recycled", VM_STAT(mmu_recycled
) },
119 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
120 { "mmu_unsync", VM_STAT(mmu_unsync
) },
121 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
122 { "largepages", VM_STAT(lpages
) },
126 unsigned long segment_base(u16 selector
)
128 struct descriptor_table gdt
;
129 struct desc_struct
*d
;
130 unsigned long table_base
;
137 table_base
= gdt
.base
;
139 if (selector
& 4) { /* from ldt */
140 u16 ldt_selector
= kvm_read_ldt();
142 table_base
= segment_base(ldt_selector
);
144 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
145 v
= get_desc_base(d
);
147 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
148 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
152 EXPORT_SYMBOL_GPL(segment_base
);
154 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
156 if (irqchip_in_kernel(vcpu
->kvm
))
157 return vcpu
->arch
.apic_base
;
159 return vcpu
->arch
.apic_base
;
161 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
163 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
165 /* TODO: reserve bits check */
166 if (irqchip_in_kernel(vcpu
->kvm
))
167 kvm_lapic_set_base(vcpu
, data
);
169 vcpu
->arch
.apic_base
= data
;
171 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
173 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
175 WARN_ON(vcpu
->arch
.exception
.pending
);
176 vcpu
->arch
.exception
.pending
= true;
177 vcpu
->arch
.exception
.has_error_code
= false;
178 vcpu
->arch
.exception
.nr
= nr
;
180 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
182 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
185 ++vcpu
->stat
.pf_guest
;
187 if (vcpu
->arch
.exception
.pending
) {
188 switch(vcpu
->arch
.exception
.nr
) {
190 /* triple fault -> shutdown */
191 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
194 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
195 vcpu
->arch
.exception
.error_code
= 0;
198 /* replace previous exception with a new one in a hope
199 that instruction re-execution will regenerate lost
201 vcpu
->arch
.exception
.pending
= false;
205 vcpu
->arch
.cr2
= addr
;
206 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
209 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
211 vcpu
->arch
.nmi_pending
= 1;
213 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
215 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
217 WARN_ON(vcpu
->arch
.exception
.pending
);
218 vcpu
->arch
.exception
.pending
= true;
219 vcpu
->arch
.exception
.has_error_code
= true;
220 vcpu
->arch
.exception
.nr
= nr
;
221 vcpu
->arch
.exception
.error_code
= error_code
;
223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
226 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
227 * a #GP and return false.
229 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
231 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
233 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
236 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
239 * Load the pae pdptrs. Return true is they are all valid.
241 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
243 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
244 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
247 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
249 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
250 offset
* sizeof(u64
), sizeof(pdpte
));
255 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
256 if (is_present_gpte(pdpte
[i
]) &&
257 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
264 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
265 __set_bit(VCPU_EXREG_PDPTR
,
266 (unsigned long *)&vcpu
->arch
.regs_avail
);
267 __set_bit(VCPU_EXREG_PDPTR
,
268 (unsigned long *)&vcpu
->arch
.regs_dirty
);
273 EXPORT_SYMBOL_GPL(load_pdptrs
);
275 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
277 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
281 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
284 if (!test_bit(VCPU_EXREG_PDPTR
,
285 (unsigned long *)&vcpu
->arch
.regs_avail
))
288 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
291 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
297 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
299 if (cr0
& CR0_RESERVED_BITS
) {
300 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
301 cr0
, vcpu
->arch
.cr0
);
302 kvm_inject_gp(vcpu
, 0);
306 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
307 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
308 kvm_inject_gp(vcpu
, 0);
312 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
313 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
314 "and a clear PE flag\n");
315 kvm_inject_gp(vcpu
, 0);
319 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
321 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
325 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
326 "in long mode while PAE is disabled\n");
327 kvm_inject_gp(vcpu
, 0);
330 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
332 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
333 "in long mode while CS.L == 1\n");
334 kvm_inject_gp(vcpu
, 0);
340 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
341 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
343 kvm_inject_gp(vcpu
, 0);
349 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
350 vcpu
->arch
.cr0
= cr0
;
352 kvm_mmu_reset_context(vcpu
);
355 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
357 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
359 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
361 EXPORT_SYMBOL_GPL(kvm_lmsw
);
363 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
365 unsigned long old_cr4
= vcpu
->arch
.cr4
;
366 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
368 if (cr4
& CR4_RESERVED_BITS
) {
369 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
370 kvm_inject_gp(vcpu
, 0);
374 if (is_long_mode(vcpu
)) {
375 if (!(cr4
& X86_CR4_PAE
)) {
376 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
378 kvm_inject_gp(vcpu
, 0);
381 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
382 && ((cr4
^ old_cr4
) & pdptr_bits
)
383 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
384 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
385 kvm_inject_gp(vcpu
, 0);
389 if (cr4
& X86_CR4_VMXE
) {
390 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
391 kvm_inject_gp(vcpu
, 0);
394 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
395 vcpu
->arch
.cr4
= cr4
;
396 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
397 kvm_mmu_reset_context(vcpu
);
399 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
401 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
403 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
404 kvm_mmu_sync_roots(vcpu
);
405 kvm_mmu_flush_tlb(vcpu
);
409 if (is_long_mode(vcpu
)) {
410 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
411 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
412 kvm_inject_gp(vcpu
, 0);
417 if (cr3
& CR3_PAE_RESERVED_BITS
) {
419 "set_cr3: #GP, reserved bits\n");
420 kvm_inject_gp(vcpu
, 0);
423 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
424 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
426 kvm_inject_gp(vcpu
, 0);
431 * We don't check reserved bits in nonpae mode, because
432 * this isn't enforced, and VMware depends on this.
437 * Does the new cr3 value map to physical memory? (Note, we
438 * catch an invalid cr3 even in real-mode, because it would
439 * cause trouble later on when we turn on paging anyway.)
441 * A real CPU would silently accept an invalid cr3 and would
442 * attempt to use it - with largely undefined (and often hard
443 * to debug) behavior on the guest side.
445 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
446 kvm_inject_gp(vcpu
, 0);
448 vcpu
->arch
.cr3
= cr3
;
449 vcpu
->arch
.mmu
.new_cr3(vcpu
);
452 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
454 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
456 if (cr8
& CR8_RESERVED_BITS
) {
457 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
458 kvm_inject_gp(vcpu
, 0);
461 if (irqchip_in_kernel(vcpu
->kvm
))
462 kvm_lapic_set_tpr(vcpu
, cr8
);
464 vcpu
->arch
.cr8
= cr8
;
466 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
468 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
470 if (irqchip_in_kernel(vcpu
->kvm
))
471 return kvm_lapic_get_cr8(vcpu
);
473 return vcpu
->arch
.cr8
;
475 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
477 static inline u32
bit(int bitno
)
479 return 1 << (bitno
& 31);
483 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
484 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
486 * This list is modified at module load time to reflect the
487 * capabilities of the host cpu. This capabilities test skips MSRs that are
488 * kvm-specific. Those are put in the beginning of the list.
491 #define KVM_SAVE_MSRS_BEGIN 2
492 static u32 msrs_to_save
[] = {
493 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
494 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
497 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
499 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
502 static unsigned num_msrs_to_save
;
504 static u32 emulated_msrs
[] = {
505 MSR_IA32_MISC_ENABLE
,
508 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
510 if (efer
& efer_reserved_bits
) {
511 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
513 kvm_inject_gp(vcpu
, 0);
518 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
519 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
520 kvm_inject_gp(vcpu
, 0);
524 if (efer
& EFER_FFXSR
) {
525 struct kvm_cpuid_entry2
*feat
;
527 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
528 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
529 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
530 kvm_inject_gp(vcpu
, 0);
535 if (efer
& EFER_SVME
) {
536 struct kvm_cpuid_entry2
*feat
;
538 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
539 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
540 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
541 kvm_inject_gp(vcpu
, 0);
546 kvm_x86_ops
->set_efer(vcpu
, efer
);
549 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
551 vcpu
->arch
.shadow_efer
= efer
;
553 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
554 kvm_mmu_reset_context(vcpu
);
557 void kvm_enable_efer_bits(u64 mask
)
559 efer_reserved_bits
&= ~mask
;
561 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
565 * Writes msr value into into the appropriate "register".
566 * Returns 0 on success, non-0 otherwise.
567 * Assumes vcpu_load() was already called.
569 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
571 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
575 * Adapt set_msr() to msr_io()'s calling convention
577 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
579 return kvm_set_msr(vcpu
, index
, *data
);
582 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
585 struct pvclock_wall_clock wc
;
586 struct timespec now
, sys
, boot
;
593 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
596 * The guest calculates current wall clock time by adding
597 * system time (updated by kvm_write_guest_time below) to the
598 * wall clock specified here. guest system time equals host
599 * system time for us, thus we must fill in host boot time here.
601 now
= current_kernel_time();
603 boot
= ns_to_timespec(timespec_to_ns(&now
) - timespec_to_ns(&sys
));
605 wc
.sec
= boot
.tv_sec
;
606 wc
.nsec
= boot
.tv_nsec
;
607 wc
.version
= version
;
609 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
612 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
615 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
617 uint32_t quotient
, remainder
;
619 /* Don't try to replace with do_div(), this one calculates
620 * "(dividend << 32) / divisor" */
622 : "=a" (quotient
), "=d" (remainder
)
623 : "0" (0), "1" (dividend
), "r" (divisor
) );
627 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
629 uint64_t nsecs
= 1000000000LL;
634 tps64
= tsc_khz
* 1000LL;
635 while (tps64
> nsecs
*2) {
640 tps32
= (uint32_t)tps64
;
641 while (tps32
<= (uint32_t)nsecs
) {
646 hv_clock
->tsc_shift
= shift
;
647 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
649 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
650 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
651 hv_clock
->tsc_to_system_mul
);
654 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
656 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
660 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
662 unsigned long this_tsc_khz
;
664 if ((!vcpu
->time_page
))
667 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
668 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
669 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
670 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
672 put_cpu_var(cpu_tsc_khz
);
674 /* Keep irq disabled to prevent changes to the clock */
675 local_irq_save(flags
);
676 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
678 local_irq_restore(flags
);
680 /* With all the info we got, fill in the values */
682 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
683 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
686 * The interface expects us to write an even number signaling that the
687 * update is finished. Since the guest won't see the intermediate
688 * state, we just increase by 2 at the end.
690 vcpu
->hv_clock
.version
+= 2;
692 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
694 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
695 sizeof(vcpu
->hv_clock
));
697 kunmap_atomic(shared_kaddr
, KM_USER0
);
699 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
702 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
704 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
706 if (!vcpu
->time_page
)
708 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
712 static bool msr_mtrr_valid(unsigned msr
)
715 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
716 case MSR_MTRRfix64K_00000
:
717 case MSR_MTRRfix16K_80000
:
718 case MSR_MTRRfix16K_A0000
:
719 case MSR_MTRRfix4K_C0000
:
720 case MSR_MTRRfix4K_C8000
:
721 case MSR_MTRRfix4K_D0000
:
722 case MSR_MTRRfix4K_D8000
:
723 case MSR_MTRRfix4K_E0000
:
724 case MSR_MTRRfix4K_E8000
:
725 case MSR_MTRRfix4K_F0000
:
726 case MSR_MTRRfix4K_F8000
:
727 case MSR_MTRRdefType
:
728 case MSR_IA32_CR_PAT
:
736 static bool valid_pat_type(unsigned t
)
738 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
741 static bool valid_mtrr_type(unsigned t
)
743 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
746 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
750 if (!msr_mtrr_valid(msr
))
753 if (msr
== MSR_IA32_CR_PAT
) {
754 for (i
= 0; i
< 8; i
++)
755 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
758 } else if (msr
== MSR_MTRRdefType
) {
761 return valid_mtrr_type(data
& 0xff);
762 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
763 for (i
= 0; i
< 8 ; i
++)
764 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
770 return valid_mtrr_type(data
& 0xff);
773 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
775 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
777 if (!mtrr_valid(vcpu
, msr
, data
))
780 if (msr
== MSR_MTRRdefType
) {
781 vcpu
->arch
.mtrr_state
.def_type
= data
;
782 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
783 } else if (msr
== MSR_MTRRfix64K_00000
)
785 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
786 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
787 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
788 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
789 else if (msr
== MSR_IA32_CR_PAT
)
790 vcpu
->arch
.pat
= data
;
791 else { /* Variable MTRRs */
792 int idx
, is_mtrr_mask
;
795 idx
= (msr
- 0x200) / 2;
796 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
799 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
802 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
806 kvm_mmu_reset_context(vcpu
);
810 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
812 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
813 unsigned bank_num
= mcg_cap
& 0xff;
816 case MSR_IA32_MCG_STATUS
:
817 vcpu
->arch
.mcg_status
= data
;
819 case MSR_IA32_MCG_CTL
:
820 if (!(mcg_cap
& MCG_CTL_P
))
822 if (data
!= 0 && data
!= ~(u64
)0)
824 vcpu
->arch
.mcg_ctl
= data
;
827 if (msr
>= MSR_IA32_MC0_CTL
&&
828 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
829 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
830 /* only 0 or all 1s can be written to IA32_MCi_CTL */
831 if ((offset
& 0x3) == 0 &&
832 data
!= 0 && data
!= ~(u64
)0)
834 vcpu
->arch
.mce_banks
[offset
] = data
;
842 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
844 struct kvm
*kvm
= vcpu
->kvm
;
845 int lm
= is_long_mode(vcpu
);
846 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
847 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
848 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
849 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
850 u32 page_num
= data
& ~PAGE_MASK
;
851 u64 page_addr
= data
& PAGE_MASK
;
856 if (page_num
>= blob_size
)
859 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
863 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
865 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
874 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
878 set_efer(vcpu
, data
);
881 data
&= ~(u64
)0x40; /* ignore flush filter disable */
883 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
888 case MSR_FAM10H_MMIO_CONF_BASE
:
890 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
895 case MSR_AMD64_NB_CFG
:
897 case MSR_IA32_DEBUGCTLMSR
:
899 /* We support the non-activated case already */
901 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
902 /* Values other than LBR and BTF are vendor-specific,
903 thus reserved and should throw a #GP */
906 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
909 case MSR_IA32_UCODE_REV
:
910 case MSR_IA32_UCODE_WRITE
:
911 case MSR_VM_HSAVE_PA
:
912 case MSR_AMD64_PATCH_LOADER
:
914 case 0x200 ... 0x2ff:
915 return set_msr_mtrr(vcpu
, msr
, data
);
916 case MSR_IA32_APICBASE
:
917 kvm_set_apic_base(vcpu
, data
);
919 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
920 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
921 case MSR_IA32_MISC_ENABLE
:
922 vcpu
->arch
.ia32_misc_enable_msr
= data
;
924 case MSR_KVM_WALL_CLOCK
:
925 vcpu
->kvm
->arch
.wall_clock
= data
;
926 kvm_write_wall_clock(vcpu
->kvm
, data
);
928 case MSR_KVM_SYSTEM_TIME
: {
929 if (vcpu
->arch
.time_page
) {
930 kvm_release_page_dirty(vcpu
->arch
.time_page
);
931 vcpu
->arch
.time_page
= NULL
;
934 vcpu
->arch
.time
= data
;
936 /* we verify if the enable bit is set... */
940 /* ...but clean it before doing the actual write */
941 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
943 vcpu
->arch
.time_page
=
944 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
946 if (is_error_page(vcpu
->arch
.time_page
)) {
947 kvm_release_page_clean(vcpu
->arch
.time_page
);
948 vcpu
->arch
.time_page
= NULL
;
951 kvm_request_guest_time_update(vcpu
);
954 case MSR_IA32_MCG_CTL
:
955 case MSR_IA32_MCG_STATUS
:
956 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
957 return set_msr_mce(vcpu
, msr
, data
);
959 /* Performance counters are not protected by a CPUID bit,
960 * so we should check all of them in the generic path for the sake of
961 * cross vendor migration.
962 * Writing a zero into the event select MSRs disables them,
963 * which we perfectly emulate ;-). Any other value should be at least
964 * reported, some guests depend on them.
966 case MSR_P6_EVNTSEL0
:
967 case MSR_P6_EVNTSEL1
:
968 case MSR_K7_EVNTSEL0
:
969 case MSR_K7_EVNTSEL1
:
970 case MSR_K7_EVNTSEL2
:
971 case MSR_K7_EVNTSEL3
:
973 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
974 "0x%x data 0x%llx\n", msr
, data
);
976 /* at least RHEL 4 unconditionally writes to the perfctr registers,
977 * so we ignore writes to make it happy.
979 case MSR_P6_PERFCTR0
:
980 case MSR_P6_PERFCTR1
:
981 case MSR_K7_PERFCTR0
:
982 case MSR_K7_PERFCTR1
:
983 case MSR_K7_PERFCTR2
:
984 case MSR_K7_PERFCTR3
:
985 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
986 "0x%x data 0x%llx\n", msr
, data
);
989 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
990 return xen_hvm_config(vcpu
, data
);
992 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
996 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1003 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1007 * Reads an msr value (of 'msr_index') into 'pdata'.
1008 * Returns 0 on success, non-0 otherwise.
1009 * Assumes vcpu_load() was already called.
1011 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1013 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1016 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1018 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1020 if (!msr_mtrr_valid(msr
))
1023 if (msr
== MSR_MTRRdefType
)
1024 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1025 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1026 else if (msr
== MSR_MTRRfix64K_00000
)
1028 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1029 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1030 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1031 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1032 else if (msr
== MSR_IA32_CR_PAT
)
1033 *pdata
= vcpu
->arch
.pat
;
1034 else { /* Variable MTRRs */
1035 int idx
, is_mtrr_mask
;
1038 idx
= (msr
- 0x200) / 2;
1039 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1042 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1045 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1052 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1055 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1056 unsigned bank_num
= mcg_cap
& 0xff;
1059 case MSR_IA32_P5_MC_ADDR
:
1060 case MSR_IA32_P5_MC_TYPE
:
1063 case MSR_IA32_MCG_CAP
:
1064 data
= vcpu
->arch
.mcg_cap
;
1066 case MSR_IA32_MCG_CTL
:
1067 if (!(mcg_cap
& MCG_CTL_P
))
1069 data
= vcpu
->arch
.mcg_ctl
;
1071 case MSR_IA32_MCG_STATUS
:
1072 data
= vcpu
->arch
.mcg_status
;
1075 if (msr
>= MSR_IA32_MC0_CTL
&&
1076 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1077 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1078 data
= vcpu
->arch
.mce_banks
[offset
];
1087 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1092 case MSR_IA32_PLATFORM_ID
:
1093 case MSR_IA32_UCODE_REV
:
1094 case MSR_IA32_EBL_CR_POWERON
:
1095 case MSR_IA32_DEBUGCTLMSR
:
1096 case MSR_IA32_LASTBRANCHFROMIP
:
1097 case MSR_IA32_LASTBRANCHTOIP
:
1098 case MSR_IA32_LASTINTFROMIP
:
1099 case MSR_IA32_LASTINTTOIP
:
1102 case MSR_VM_HSAVE_PA
:
1103 case MSR_P6_PERFCTR0
:
1104 case MSR_P6_PERFCTR1
:
1105 case MSR_P6_EVNTSEL0
:
1106 case MSR_P6_EVNTSEL1
:
1107 case MSR_K7_EVNTSEL0
:
1108 case MSR_K7_PERFCTR0
:
1109 case MSR_K8_INT_PENDING_MSG
:
1110 case MSR_AMD64_NB_CFG
:
1111 case MSR_FAM10H_MMIO_CONF_BASE
:
1115 data
= 0x500 | KVM_NR_VAR_MTRR
;
1117 case 0x200 ... 0x2ff:
1118 return get_msr_mtrr(vcpu
, msr
, pdata
);
1119 case 0xcd: /* fsb frequency */
1122 case MSR_IA32_APICBASE
:
1123 data
= kvm_get_apic_base(vcpu
);
1125 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1126 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1128 case MSR_IA32_MISC_ENABLE
:
1129 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1131 case MSR_IA32_PERF_STATUS
:
1132 /* TSC increment by tick */
1134 /* CPU multiplier */
1135 data
|= (((uint64_t)4ULL) << 40);
1138 data
= vcpu
->arch
.shadow_efer
;
1140 case MSR_KVM_WALL_CLOCK
:
1141 data
= vcpu
->kvm
->arch
.wall_clock
;
1143 case MSR_KVM_SYSTEM_TIME
:
1144 data
= vcpu
->arch
.time
;
1146 case MSR_IA32_P5_MC_ADDR
:
1147 case MSR_IA32_P5_MC_TYPE
:
1148 case MSR_IA32_MCG_CAP
:
1149 case MSR_IA32_MCG_CTL
:
1150 case MSR_IA32_MCG_STATUS
:
1151 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1152 return get_msr_mce(vcpu
, msr
, pdata
);
1155 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1158 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1166 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1169 * Read or write a bunch of msrs. All parameters are kernel addresses.
1171 * @return number of msrs set successfully.
1173 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1174 struct kvm_msr_entry
*entries
,
1175 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1176 unsigned index
, u64
*data
))
1182 down_read(&vcpu
->kvm
->slots_lock
);
1183 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1184 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1186 up_read(&vcpu
->kvm
->slots_lock
);
1194 * Read or write a bunch of msrs. Parameters are user addresses.
1196 * @return number of msrs set successfully.
1198 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1199 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1200 unsigned index
, u64
*data
),
1203 struct kvm_msrs msrs
;
1204 struct kvm_msr_entry
*entries
;
1209 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1213 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1217 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1218 entries
= vmalloc(size
);
1223 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1226 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1231 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1242 int kvm_dev_ioctl_check_extension(long ext
)
1247 case KVM_CAP_IRQCHIP
:
1249 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1250 case KVM_CAP_SET_TSS_ADDR
:
1251 case KVM_CAP_EXT_CPUID
:
1252 case KVM_CAP_CLOCKSOURCE
:
1254 case KVM_CAP_NOP_IO_DELAY
:
1255 case KVM_CAP_MP_STATE
:
1256 case KVM_CAP_SYNC_MMU
:
1257 case KVM_CAP_REINJECT_CONTROL
:
1258 case KVM_CAP_IRQ_INJECT_STATUS
:
1259 case KVM_CAP_ASSIGN_DEV_IRQ
:
1261 case KVM_CAP_IOEVENTFD
:
1263 case KVM_CAP_PIT_STATE2
:
1264 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1265 case KVM_CAP_XEN_HVM
:
1266 case KVM_CAP_ADJUST_CLOCK
:
1269 case KVM_CAP_COALESCED_MMIO
:
1270 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1273 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1275 case KVM_CAP_NR_VCPUS
:
1278 case KVM_CAP_NR_MEMSLOTS
:
1279 r
= KVM_MEMORY_SLOTS
;
1281 case KVM_CAP_PV_MMU
: /* obsolete */
1288 r
= KVM_MAX_MCE_BANKS
;
1298 long kvm_arch_dev_ioctl(struct file
*filp
,
1299 unsigned int ioctl
, unsigned long arg
)
1301 void __user
*argp
= (void __user
*)arg
;
1305 case KVM_GET_MSR_INDEX_LIST
: {
1306 struct kvm_msr_list __user
*user_msr_list
= argp
;
1307 struct kvm_msr_list msr_list
;
1311 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1314 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1315 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1318 if (n
< msr_list
.nmsrs
)
1321 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1322 num_msrs_to_save
* sizeof(u32
)))
1324 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1326 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1331 case KVM_GET_SUPPORTED_CPUID
: {
1332 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1333 struct kvm_cpuid2 cpuid
;
1336 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1338 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1339 cpuid_arg
->entries
);
1344 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1349 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1352 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1354 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1366 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1368 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1369 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1370 unsigned long khz
= cpufreq_quick_get(cpu
);
1373 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1375 kvm_request_guest_time_update(vcpu
);
1378 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1380 kvm_x86_ops
->vcpu_put(vcpu
);
1381 kvm_put_guest_fpu(vcpu
);
1384 static int is_efer_nx(void)
1386 unsigned long long efer
= 0;
1388 rdmsrl_safe(MSR_EFER
, &efer
);
1389 return efer
& EFER_NX
;
1392 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1395 struct kvm_cpuid_entry2
*e
, *entry
;
1398 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1399 e
= &vcpu
->arch
.cpuid_entries
[i
];
1400 if (e
->function
== 0x80000001) {
1405 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1406 entry
->edx
&= ~(1 << 20);
1407 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1411 /* when an old userspace process fills a new kernel module */
1412 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1413 struct kvm_cpuid
*cpuid
,
1414 struct kvm_cpuid_entry __user
*entries
)
1417 struct kvm_cpuid_entry
*cpuid_entries
;
1420 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1423 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1427 if (copy_from_user(cpuid_entries
, entries
,
1428 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1430 for (i
= 0; i
< cpuid
->nent
; i
++) {
1431 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1432 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1433 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1434 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1435 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1436 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1437 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1438 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1439 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1440 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1442 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1443 cpuid_fix_nx_cap(vcpu
);
1445 kvm_apic_set_version(vcpu
);
1448 vfree(cpuid_entries
);
1453 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1454 struct kvm_cpuid2
*cpuid
,
1455 struct kvm_cpuid_entry2 __user
*entries
)
1460 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1463 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1464 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1466 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1467 kvm_apic_set_version(vcpu
);
1474 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1475 struct kvm_cpuid2
*cpuid
,
1476 struct kvm_cpuid_entry2 __user
*entries
)
1481 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1484 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1485 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1490 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1494 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1497 entry
->function
= function
;
1498 entry
->index
= index
;
1499 cpuid_count(entry
->function
, entry
->index
,
1500 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1504 #define F(x) bit(X86_FEATURE_##x)
1506 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1507 u32 index
, int *nent
, int maxnent
)
1509 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1510 unsigned f_gbpages
= kvm_x86_ops
->gb_page_enable() ? F(GBPAGES
) : 0;
1511 #ifdef CONFIG_X86_64
1512 unsigned f_lm
= F(LM
);
1518 const u32 kvm_supported_word0_x86_features
=
1519 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1520 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1521 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1522 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1523 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1524 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1525 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1526 0 /* HTT, TM, Reserved, PBE */;
1527 /* cpuid 0x80000001.edx */
1528 const u32 kvm_supported_word1_x86_features
=
1529 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1530 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1531 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1532 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1533 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1534 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1535 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| 0 /* RDTSCP */ |
1536 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1538 const u32 kvm_supported_word4_x86_features
=
1539 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1540 0 /* DS-CPL, VMX, SMX, EST */ |
1541 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1542 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1543 0 /* Reserved, DCA */ | F(XMM4_1
) |
1544 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1545 0 /* Reserved, XSAVE, OSXSAVE */;
1546 /* cpuid 0x80000001.ecx */
1547 const u32 kvm_supported_word6_x86_features
=
1548 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1549 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1550 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1551 0 /* SKINIT */ | 0 /* WDT */;
1553 /* all calls to cpuid_count() should be made on the same cpu */
1555 do_cpuid_1_ent(entry
, function
, index
);
1560 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1563 entry
->edx
&= kvm_supported_word0_x86_features
;
1564 entry
->ecx
&= kvm_supported_word4_x86_features
;
1565 /* we support x2apic emulation even if host does not support
1566 * it since we emulate x2apic in software */
1567 entry
->ecx
|= F(X2APIC
);
1569 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1570 * may return different values. This forces us to get_cpu() before
1571 * issuing the first command, and also to emulate this annoying behavior
1572 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1574 int t
, times
= entry
->eax
& 0xff;
1576 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1577 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1578 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1579 do_cpuid_1_ent(&entry
[t
], function
, 0);
1580 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1585 /* function 4 and 0xb have additional index. */
1589 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1590 /* read more entries until cache_type is zero */
1591 for (i
= 1; *nent
< maxnent
; ++i
) {
1592 cache_type
= entry
[i
- 1].eax
& 0x1f;
1595 do_cpuid_1_ent(&entry
[i
], function
, i
);
1597 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1605 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1606 /* read more entries until level_type is zero */
1607 for (i
= 1; *nent
< maxnent
; ++i
) {
1608 level_type
= entry
[i
- 1].ecx
& 0xff00;
1611 do_cpuid_1_ent(&entry
[i
], function
, i
);
1613 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1619 entry
->eax
= min(entry
->eax
, 0x8000001a);
1622 entry
->edx
&= kvm_supported_word1_x86_features
;
1623 entry
->ecx
&= kvm_supported_word6_x86_features
;
1631 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1632 struct kvm_cpuid_entry2 __user
*entries
)
1634 struct kvm_cpuid_entry2
*cpuid_entries
;
1635 int limit
, nent
= 0, r
= -E2BIG
;
1638 if (cpuid
->nent
< 1)
1640 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1641 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1643 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1647 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1648 limit
= cpuid_entries
[0].eax
;
1649 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1650 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1651 &nent
, cpuid
->nent
);
1653 if (nent
>= cpuid
->nent
)
1656 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1657 limit
= cpuid_entries
[nent
- 1].eax
;
1658 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1659 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1660 &nent
, cpuid
->nent
);
1662 if (nent
>= cpuid
->nent
)
1666 if (copy_to_user(entries
, cpuid_entries
,
1667 nent
* sizeof(struct kvm_cpuid_entry2
)))
1673 vfree(cpuid_entries
);
1678 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1679 struct kvm_lapic_state
*s
)
1682 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1688 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1689 struct kvm_lapic_state
*s
)
1692 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1693 kvm_apic_post_state_restore(vcpu
);
1694 update_cr8_intercept(vcpu
);
1700 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1701 struct kvm_interrupt
*irq
)
1703 if (irq
->irq
< 0 || irq
->irq
>= 256)
1705 if (irqchip_in_kernel(vcpu
->kvm
))
1709 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1716 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1719 kvm_inject_nmi(vcpu
);
1725 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1726 struct kvm_tpr_access_ctl
*tac
)
1730 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1734 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1738 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1741 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
1743 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1746 vcpu
->arch
.mcg_cap
= mcg_cap
;
1747 /* Init IA32_MCG_CTL to all 1s */
1748 if (mcg_cap
& MCG_CTL_P
)
1749 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1750 /* Init IA32_MCi_CTL to all 1s */
1751 for (bank
= 0; bank
< bank_num
; bank
++)
1752 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1757 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1758 struct kvm_x86_mce
*mce
)
1760 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1761 unsigned bank_num
= mcg_cap
& 0xff;
1762 u64
*banks
= vcpu
->arch
.mce_banks
;
1764 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1767 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1768 * reporting is disabled
1770 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1771 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1773 banks
+= 4 * mce
->bank
;
1775 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1776 * reporting is disabled for the bank
1778 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1780 if (mce
->status
& MCI_STATUS_UC
) {
1781 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1782 !(vcpu
->arch
.cr4
& X86_CR4_MCE
)) {
1783 printk(KERN_DEBUG
"kvm: set_mce: "
1784 "injects mce exception while "
1785 "previous one is in progress!\n");
1786 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1789 if (banks
[1] & MCI_STATUS_VAL
)
1790 mce
->status
|= MCI_STATUS_OVER
;
1791 banks
[2] = mce
->addr
;
1792 banks
[3] = mce
->misc
;
1793 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1794 banks
[1] = mce
->status
;
1795 kvm_queue_exception(vcpu
, MC_VECTOR
);
1796 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1797 || !(banks
[1] & MCI_STATUS_UC
)) {
1798 if (banks
[1] & MCI_STATUS_VAL
)
1799 mce
->status
|= MCI_STATUS_OVER
;
1800 banks
[2] = mce
->addr
;
1801 banks
[3] = mce
->misc
;
1802 banks
[1] = mce
->status
;
1804 banks
[1] |= MCI_STATUS_OVER
;
1808 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1809 unsigned int ioctl
, unsigned long arg
)
1811 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1812 void __user
*argp
= (void __user
*)arg
;
1814 struct kvm_lapic_state
*lapic
= NULL
;
1817 case KVM_GET_LAPIC
: {
1818 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1823 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
1827 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
1832 case KVM_SET_LAPIC
: {
1833 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1838 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
1840 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
1846 case KVM_INTERRUPT
: {
1847 struct kvm_interrupt irq
;
1850 if (copy_from_user(&irq
, argp
, sizeof irq
))
1852 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
1859 r
= kvm_vcpu_ioctl_nmi(vcpu
);
1865 case KVM_SET_CPUID
: {
1866 struct kvm_cpuid __user
*cpuid_arg
= argp
;
1867 struct kvm_cpuid cpuid
;
1870 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1872 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
1877 case KVM_SET_CPUID2
: {
1878 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1879 struct kvm_cpuid2 cpuid
;
1882 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1884 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
1885 cpuid_arg
->entries
);
1890 case KVM_GET_CPUID2
: {
1891 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1892 struct kvm_cpuid2 cpuid
;
1895 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1897 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
1898 cpuid_arg
->entries
);
1902 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1908 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
1911 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
1913 case KVM_TPR_ACCESS_REPORTING
: {
1914 struct kvm_tpr_access_ctl tac
;
1917 if (copy_from_user(&tac
, argp
, sizeof tac
))
1919 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
1923 if (copy_to_user(argp
, &tac
, sizeof tac
))
1928 case KVM_SET_VAPIC_ADDR
: {
1929 struct kvm_vapic_addr va
;
1932 if (!irqchip_in_kernel(vcpu
->kvm
))
1935 if (copy_from_user(&va
, argp
, sizeof va
))
1938 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
1941 case KVM_X86_SETUP_MCE
: {
1945 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
1947 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
1950 case KVM_X86_SET_MCE
: {
1951 struct kvm_x86_mce mce
;
1954 if (copy_from_user(&mce
, argp
, sizeof mce
))
1956 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
1967 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
1971 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
1973 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
1977 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
1980 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
1984 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
1985 u32 kvm_nr_mmu_pages
)
1987 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
1990 down_write(&kvm
->slots_lock
);
1991 spin_lock(&kvm
->mmu_lock
);
1993 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
1994 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
1996 spin_unlock(&kvm
->mmu_lock
);
1997 up_write(&kvm
->slots_lock
);
2001 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2003 return kvm
->arch
.n_alloc_mmu_pages
;
2006 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2009 struct kvm_mem_alias
*alias
;
2011 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
2012 alias
= &kvm
->arch
.aliases
[i
];
2013 if (gfn
>= alias
->base_gfn
2014 && gfn
< alias
->base_gfn
+ alias
->npages
)
2015 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2021 * Set a new alias region. Aliases map a portion of physical memory into
2022 * another portion. This is useful for memory windows, for example the PC
2025 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2026 struct kvm_memory_alias
*alias
)
2029 struct kvm_mem_alias
*p
;
2032 /* General sanity checks */
2033 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2035 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2037 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2039 if (alias
->guest_phys_addr
+ alias
->memory_size
2040 < alias
->guest_phys_addr
)
2042 if (alias
->target_phys_addr
+ alias
->memory_size
2043 < alias
->target_phys_addr
)
2046 down_write(&kvm
->slots_lock
);
2047 spin_lock(&kvm
->mmu_lock
);
2049 p
= &kvm
->arch
.aliases
[alias
->slot
];
2050 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2051 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2052 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2054 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2055 if (kvm
->arch
.aliases
[n
- 1].npages
)
2057 kvm
->arch
.naliases
= n
;
2059 spin_unlock(&kvm
->mmu_lock
);
2060 kvm_mmu_zap_all(kvm
);
2062 up_write(&kvm
->slots_lock
);
2070 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2075 switch (chip
->chip_id
) {
2076 case KVM_IRQCHIP_PIC_MASTER
:
2077 memcpy(&chip
->chip
.pic
,
2078 &pic_irqchip(kvm
)->pics
[0],
2079 sizeof(struct kvm_pic_state
));
2081 case KVM_IRQCHIP_PIC_SLAVE
:
2082 memcpy(&chip
->chip
.pic
,
2083 &pic_irqchip(kvm
)->pics
[1],
2084 sizeof(struct kvm_pic_state
));
2086 case KVM_IRQCHIP_IOAPIC
:
2087 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2096 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2101 switch (chip
->chip_id
) {
2102 case KVM_IRQCHIP_PIC_MASTER
:
2103 spin_lock(&pic_irqchip(kvm
)->lock
);
2104 memcpy(&pic_irqchip(kvm
)->pics
[0],
2106 sizeof(struct kvm_pic_state
));
2107 spin_unlock(&pic_irqchip(kvm
)->lock
);
2109 case KVM_IRQCHIP_PIC_SLAVE
:
2110 spin_lock(&pic_irqchip(kvm
)->lock
);
2111 memcpy(&pic_irqchip(kvm
)->pics
[1],
2113 sizeof(struct kvm_pic_state
));
2114 spin_unlock(&pic_irqchip(kvm
)->lock
);
2116 case KVM_IRQCHIP_IOAPIC
:
2117 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2123 kvm_pic_update_irq(pic_irqchip(kvm
));
2127 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2131 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2132 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2133 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2137 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2141 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2142 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2143 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2144 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2148 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2152 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2153 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2154 sizeof(ps
->channels
));
2155 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2156 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2160 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2162 int r
= 0, start
= 0;
2163 u32 prev_legacy
, cur_legacy
;
2164 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2165 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2166 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2167 if (!prev_legacy
&& cur_legacy
)
2169 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2170 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2171 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2172 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2173 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2177 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2178 struct kvm_reinject_control
*control
)
2180 if (!kvm
->arch
.vpit
)
2182 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2183 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2184 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2189 * Get (and clear) the dirty memory log for a memory slot.
2191 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2192 struct kvm_dirty_log
*log
)
2196 struct kvm_memory_slot
*memslot
;
2199 down_write(&kvm
->slots_lock
);
2201 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2205 /* If nothing is dirty, don't bother messing with page tables. */
2207 spin_lock(&kvm
->mmu_lock
);
2208 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2209 spin_unlock(&kvm
->mmu_lock
);
2210 memslot
= &kvm
->memslots
[log
->slot
];
2211 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2212 memset(memslot
->dirty_bitmap
, 0, n
);
2216 up_write(&kvm
->slots_lock
);
2220 long kvm_arch_vm_ioctl(struct file
*filp
,
2221 unsigned int ioctl
, unsigned long arg
)
2223 struct kvm
*kvm
= filp
->private_data
;
2224 void __user
*argp
= (void __user
*)arg
;
2227 * This union makes it completely explicit to gcc-3.x
2228 * that these two variables' stack usage should be
2229 * combined, not added together.
2232 struct kvm_pit_state ps
;
2233 struct kvm_pit_state2 ps2
;
2234 struct kvm_memory_alias alias
;
2235 struct kvm_pit_config pit_config
;
2239 case KVM_SET_TSS_ADDR
:
2240 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2244 case KVM_SET_IDENTITY_MAP_ADDR
: {
2248 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2250 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2255 case KVM_SET_MEMORY_REGION
: {
2256 struct kvm_memory_region kvm_mem
;
2257 struct kvm_userspace_memory_region kvm_userspace_mem
;
2260 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2262 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2263 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2264 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2265 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2266 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2271 case KVM_SET_NR_MMU_PAGES
:
2272 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2276 case KVM_GET_NR_MMU_PAGES
:
2277 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2279 case KVM_SET_MEMORY_ALIAS
:
2281 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2283 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2287 case KVM_CREATE_IRQCHIP
:
2289 kvm
->arch
.vpic
= kvm_create_pic(kvm
);
2290 if (kvm
->arch
.vpic
) {
2291 r
= kvm_ioapic_init(kvm
);
2293 kfree(kvm
->arch
.vpic
);
2294 kvm
->arch
.vpic
= NULL
;
2299 r
= kvm_setup_default_irq_routing(kvm
);
2301 kfree(kvm
->arch
.vpic
);
2302 kfree(kvm
->arch
.vioapic
);
2306 case KVM_CREATE_PIT
:
2307 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2309 case KVM_CREATE_PIT2
:
2311 if (copy_from_user(&u
.pit_config
, argp
,
2312 sizeof(struct kvm_pit_config
)))
2315 down_write(&kvm
->slots_lock
);
2318 goto create_pit_unlock
;
2320 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2324 up_write(&kvm
->slots_lock
);
2326 case KVM_IRQ_LINE_STATUS
:
2327 case KVM_IRQ_LINE
: {
2328 struct kvm_irq_level irq_event
;
2331 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2333 if (irqchip_in_kernel(kvm
)) {
2335 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2336 irq_event
.irq
, irq_event
.level
);
2337 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2338 irq_event
.status
= status
;
2339 if (copy_to_user(argp
, &irq_event
,
2347 case KVM_GET_IRQCHIP
: {
2348 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2349 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2355 if (copy_from_user(chip
, argp
, sizeof *chip
))
2356 goto get_irqchip_out
;
2358 if (!irqchip_in_kernel(kvm
))
2359 goto get_irqchip_out
;
2360 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2362 goto get_irqchip_out
;
2364 if (copy_to_user(argp
, chip
, sizeof *chip
))
2365 goto get_irqchip_out
;
2373 case KVM_SET_IRQCHIP
: {
2374 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2375 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2381 if (copy_from_user(chip
, argp
, sizeof *chip
))
2382 goto set_irqchip_out
;
2384 if (!irqchip_in_kernel(kvm
))
2385 goto set_irqchip_out
;
2386 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2388 goto set_irqchip_out
;
2398 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2401 if (!kvm
->arch
.vpit
)
2403 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2407 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2414 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2417 if (!kvm
->arch
.vpit
)
2419 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2425 case KVM_GET_PIT2
: {
2427 if (!kvm
->arch
.vpit
)
2429 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2433 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2438 case KVM_SET_PIT2
: {
2440 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2443 if (!kvm
->arch
.vpit
)
2445 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2451 case KVM_REINJECT_CONTROL
: {
2452 struct kvm_reinject_control control
;
2454 if (copy_from_user(&control
, argp
, sizeof(control
)))
2456 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2462 case KVM_XEN_HVM_CONFIG
: {
2464 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
2465 sizeof(struct kvm_xen_hvm_config
)))
2468 if (kvm
->arch
.xen_hvm_config
.flags
)
2473 case KVM_SET_CLOCK
: {
2474 struct timespec now
;
2475 struct kvm_clock_data user_ns
;
2480 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
2489 now_ns
= timespec_to_ns(&now
);
2490 delta
= user_ns
.clock
- now_ns
;
2491 kvm
->arch
.kvmclock_offset
= delta
;
2494 case KVM_GET_CLOCK
: {
2495 struct timespec now
;
2496 struct kvm_clock_data user_ns
;
2500 now_ns
= timespec_to_ns(&now
);
2501 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
2505 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
2518 static void kvm_init_msr_list(void)
2523 /* skip the first msrs in the list. KVM-specific */
2524 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2525 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2528 msrs_to_save
[j
] = msrs_to_save
[i
];
2531 num_msrs_to_save
= j
;
2534 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2537 if (vcpu
->arch
.apic
&&
2538 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2541 return kvm_io_bus_write(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2544 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2546 if (vcpu
->arch
.apic
&&
2547 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2550 return kvm_io_bus_read(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2553 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2554 struct kvm_vcpu
*vcpu
)
2557 int r
= X86EMUL_CONTINUE
;
2560 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2561 unsigned offset
= addr
& (PAGE_SIZE
-1);
2562 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2565 if (gpa
== UNMAPPED_GVA
) {
2566 r
= X86EMUL_PROPAGATE_FAULT
;
2569 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2571 r
= X86EMUL_UNHANDLEABLE
;
2583 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2584 struct kvm_vcpu
*vcpu
)
2587 int r
= X86EMUL_CONTINUE
;
2590 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2591 unsigned offset
= addr
& (PAGE_SIZE
-1);
2592 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2595 if (gpa
== UNMAPPED_GVA
) {
2596 r
= X86EMUL_PROPAGATE_FAULT
;
2599 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2601 r
= X86EMUL_UNHANDLEABLE
;
2614 static int emulator_read_emulated(unsigned long addr
,
2617 struct kvm_vcpu
*vcpu
)
2621 if (vcpu
->mmio_read_completed
) {
2622 memcpy(val
, vcpu
->mmio_data
, bytes
);
2623 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2624 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2625 vcpu
->mmio_read_completed
= 0;
2626 return X86EMUL_CONTINUE
;
2629 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2631 /* For APIC access vmexit */
2632 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2635 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2636 == X86EMUL_CONTINUE
)
2637 return X86EMUL_CONTINUE
;
2638 if (gpa
== UNMAPPED_GVA
)
2639 return X86EMUL_PROPAGATE_FAULT
;
2643 * Is this MMIO handled locally?
2645 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2646 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2647 return X86EMUL_CONTINUE
;
2650 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2652 vcpu
->mmio_needed
= 1;
2653 vcpu
->mmio_phys_addr
= gpa
;
2654 vcpu
->mmio_size
= bytes
;
2655 vcpu
->mmio_is_write
= 0;
2657 return X86EMUL_UNHANDLEABLE
;
2660 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2661 const void *val
, int bytes
)
2665 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2668 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2672 static int emulator_write_emulated_onepage(unsigned long addr
,
2675 struct kvm_vcpu
*vcpu
)
2679 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2681 if (gpa
== UNMAPPED_GVA
) {
2682 kvm_inject_page_fault(vcpu
, addr
, 2);
2683 return X86EMUL_PROPAGATE_FAULT
;
2686 /* For APIC access vmexit */
2687 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2690 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2691 return X86EMUL_CONTINUE
;
2694 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
2696 * Is this MMIO handled locally?
2698 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
2699 return X86EMUL_CONTINUE
;
2701 vcpu
->mmio_needed
= 1;
2702 vcpu
->mmio_phys_addr
= gpa
;
2703 vcpu
->mmio_size
= bytes
;
2704 vcpu
->mmio_is_write
= 1;
2705 memcpy(vcpu
->mmio_data
, val
, bytes
);
2707 return X86EMUL_CONTINUE
;
2710 int emulator_write_emulated(unsigned long addr
,
2713 struct kvm_vcpu
*vcpu
)
2715 /* Crossing a page boundary? */
2716 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2719 now
= -addr
& ~PAGE_MASK
;
2720 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2721 if (rc
!= X86EMUL_CONTINUE
)
2727 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2729 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2731 static int emulator_cmpxchg_emulated(unsigned long addr
,
2735 struct kvm_vcpu
*vcpu
)
2737 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
2738 #ifndef CONFIG_X86_64
2739 /* guests cmpxchg8b have to be emulated atomically */
2746 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2748 if (gpa
== UNMAPPED_GVA
||
2749 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2752 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2757 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2759 kaddr
= kmap_atomic(page
, KM_USER0
);
2760 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2761 kunmap_atomic(kaddr
, KM_USER0
);
2762 kvm_release_page_dirty(page
);
2767 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2770 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2772 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2775 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2777 kvm_mmu_invlpg(vcpu
, address
);
2778 return X86EMUL_CONTINUE
;
2781 int emulate_clts(struct kvm_vcpu
*vcpu
)
2783 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
2784 return X86EMUL_CONTINUE
;
2787 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
2789 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
2793 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
2794 return X86EMUL_CONTINUE
;
2796 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
2797 return X86EMUL_UNHANDLEABLE
;
2801 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
2803 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
2806 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
2808 /* FIXME: better handling */
2809 return X86EMUL_UNHANDLEABLE
;
2811 return X86EMUL_CONTINUE
;
2814 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
2817 unsigned long rip
= kvm_rip_read(vcpu
);
2818 unsigned long rip_linear
;
2820 if (!printk_ratelimit())
2823 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
2825 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
2827 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2828 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
2830 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
2832 static struct x86_emulate_ops emulate_ops
= {
2833 .read_std
= kvm_read_guest_virt
,
2834 .read_emulated
= emulator_read_emulated
,
2835 .write_emulated
= emulator_write_emulated
,
2836 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
2839 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
2841 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2842 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
2843 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
2844 vcpu
->arch
.regs_dirty
= ~0;
2847 int emulate_instruction(struct kvm_vcpu
*vcpu
,
2853 struct decode_cache
*c
;
2854 struct kvm_run
*run
= vcpu
->run
;
2856 kvm_clear_exception_queue(vcpu
);
2857 vcpu
->arch
.mmio_fault_cr2
= cr2
;
2859 * TODO: fix emulate.c to use guest_read/write_register
2860 * instead of direct ->regs accesses, can save hundred cycles
2861 * on Intel for instructions that don't read/change RSP, for
2864 cache_all_regs(vcpu
);
2866 vcpu
->mmio_is_write
= 0;
2867 vcpu
->arch
.pio
.string
= 0;
2869 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
2871 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
2873 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
2874 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
2875 vcpu
->arch
.emulate_ctxt
.mode
=
2876 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
2877 ? X86EMUL_MODE_REAL
: cs_l
2878 ? X86EMUL_MODE_PROT64
: cs_db
2879 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
2881 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2883 /* Only allow emulation of specific instructions on #UD
2884 * (namely VMMCALL, sysenter, sysexit, syscall)*/
2885 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
2886 if (emulation_type
& EMULTYPE_TRAP_UD
) {
2888 return EMULATE_FAIL
;
2890 case 0x01: /* VMMCALL */
2891 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
2892 return EMULATE_FAIL
;
2894 case 0x34: /* sysenter */
2895 case 0x35: /* sysexit */
2896 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2897 return EMULATE_FAIL
;
2899 case 0x05: /* syscall */
2900 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2901 return EMULATE_FAIL
;
2904 return EMULATE_FAIL
;
2907 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
2908 return EMULATE_FAIL
;
2911 ++vcpu
->stat
.insn_emulation
;
2913 ++vcpu
->stat
.insn_emulation_fail
;
2914 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2915 return EMULATE_DONE
;
2916 return EMULATE_FAIL
;
2920 if (emulation_type
& EMULTYPE_SKIP
) {
2921 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
2922 return EMULATE_DONE
;
2925 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2926 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
2929 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
2931 if (vcpu
->arch
.pio
.string
)
2932 return EMULATE_DO_MMIO
;
2934 if ((r
|| vcpu
->mmio_is_write
) && run
) {
2935 run
->exit_reason
= KVM_EXIT_MMIO
;
2936 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
2937 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
2938 run
->mmio
.len
= vcpu
->mmio_size
;
2939 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
2943 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2944 return EMULATE_DONE
;
2945 if (!vcpu
->mmio_needed
) {
2946 kvm_report_emulation_failure(vcpu
, "mmio");
2947 return EMULATE_FAIL
;
2949 return EMULATE_DO_MMIO
;
2952 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
2954 if (vcpu
->mmio_is_write
) {
2955 vcpu
->mmio_needed
= 0;
2956 return EMULATE_DO_MMIO
;
2959 return EMULATE_DONE
;
2961 EXPORT_SYMBOL_GPL(emulate_instruction
);
2963 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
2965 void *p
= vcpu
->arch
.pio_data
;
2966 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
2970 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
2971 if (vcpu
->arch
.pio
.in
)
2972 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
2974 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
2978 int complete_pio(struct kvm_vcpu
*vcpu
)
2980 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2987 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2988 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
2989 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
2993 r
= pio_copy_data(vcpu
);
3000 delta
*= io
->cur_count
;
3002 * The size of the register should really depend on
3003 * current address size.
3005 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3007 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
3013 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3015 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
3017 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3019 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
3023 io
->count
-= io
->cur_count
;
3029 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3031 /* TODO: String I/O for in kernel device */
3034 if (vcpu
->arch
.pio
.in
)
3035 r
= kvm_io_bus_read(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3036 vcpu
->arch
.pio
.size
, pd
);
3038 r
= kvm_io_bus_write(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3039 vcpu
->arch
.pio
.size
, pd
);
3043 static int pio_string_write(struct kvm_vcpu
*vcpu
)
3045 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3046 void *pd
= vcpu
->arch
.pio_data
;
3049 for (i
= 0; i
< io
->cur_count
; i
++) {
3050 if (kvm_io_bus_write(&vcpu
->kvm
->pio_bus
,
3051 io
->port
, io
->size
, pd
)) {
3060 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
3064 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3065 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3066 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3067 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3068 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
3069 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3070 vcpu
->arch
.pio
.in
= in
;
3071 vcpu
->arch
.pio
.string
= 0;
3072 vcpu
->arch
.pio
.down
= 0;
3073 vcpu
->arch
.pio
.rep
= 0;
3075 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3078 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3079 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3081 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3087 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3089 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3090 int size
, unsigned long count
, int down
,
3091 gva_t address
, int rep
, unsigned port
)
3093 unsigned now
, in_page
;
3096 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3097 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3098 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3099 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3100 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3101 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3102 vcpu
->arch
.pio
.in
= in
;
3103 vcpu
->arch
.pio
.string
= 1;
3104 vcpu
->arch
.pio
.down
= down
;
3105 vcpu
->arch
.pio
.rep
= rep
;
3107 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3111 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3116 in_page
= PAGE_SIZE
- offset_in_page(address
);
3118 in_page
= offset_in_page(address
) + size
;
3119 now
= min(count
, (unsigned long)in_page
/ size
);
3124 * String I/O in reverse. Yuck. Kill the guest, fix later.
3126 pr_unimpl(vcpu
, "guest string pio down\n");
3127 kvm_inject_gp(vcpu
, 0);
3130 vcpu
->run
->io
.count
= now
;
3131 vcpu
->arch
.pio
.cur_count
= now
;
3133 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3134 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3136 vcpu
->arch
.pio
.guest_gva
= address
;
3138 if (!vcpu
->arch
.pio
.in
) {
3139 /* string PIO write */
3140 ret
= pio_copy_data(vcpu
);
3141 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3142 kvm_inject_gp(vcpu
, 0);
3145 if (ret
== 0 && !pio_string_write(vcpu
)) {
3147 if (vcpu
->arch
.pio
.count
== 0)
3151 /* no string PIO read support yet */
3155 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3157 static void bounce_off(void *info
)
3162 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3165 struct cpufreq_freqs
*freq
= data
;
3167 struct kvm_vcpu
*vcpu
;
3168 int i
, send_ipi
= 0;
3170 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3172 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3174 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3176 spin_lock(&kvm_lock
);
3177 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3178 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3179 if (vcpu
->cpu
!= freq
->cpu
)
3181 if (!kvm_request_guest_time_update(vcpu
))
3183 if (vcpu
->cpu
!= smp_processor_id())
3187 spin_unlock(&kvm_lock
);
3189 if (freq
->old
< freq
->new && send_ipi
) {
3191 * We upscale the frequency. Must make the guest
3192 * doesn't see old kvmclock values while running with
3193 * the new frequency, otherwise we risk the guest sees
3194 * time go backwards.
3196 * In case we update the frequency for another cpu
3197 * (which might be in guest context) send an interrupt
3198 * to kick the cpu out of guest context. Next time
3199 * guest context is entered kvmclock will be updated,
3200 * so the guest will not see stale values.
3202 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3207 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3208 .notifier_call
= kvmclock_cpufreq_notifier
3211 static void kvm_timer_init(void)
3215 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3216 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3217 CPUFREQ_TRANSITION_NOTIFIER
);
3218 for_each_online_cpu(cpu
) {
3219 unsigned long khz
= cpufreq_get(cpu
);
3222 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3225 for_each_possible_cpu(cpu
)
3226 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3230 int kvm_arch_init(void *opaque
)
3233 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3236 printk(KERN_ERR
"kvm: already loaded the other module\n");
3241 if (!ops
->cpu_has_kvm_support()) {
3242 printk(KERN_ERR
"kvm: no hardware support\n");
3246 if (ops
->disabled_by_bios()) {
3247 printk(KERN_ERR
"kvm: disabled by bios\n");
3252 r
= kvm_mmu_module_init();
3256 kvm_init_msr_list();
3259 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3260 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3261 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3262 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3272 void kvm_arch_exit(void)
3274 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3275 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3276 CPUFREQ_TRANSITION_NOTIFIER
);
3278 kvm_mmu_module_exit();
3281 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3283 ++vcpu
->stat
.halt_exits
;
3284 if (irqchip_in_kernel(vcpu
->kvm
)) {
3285 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3288 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3292 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3294 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3297 if (is_long_mode(vcpu
))
3300 return a0
| ((gpa_t
)a1
<< 32);
3303 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3305 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3308 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3309 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3310 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3311 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3312 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3314 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3316 if (!is_long_mode(vcpu
)) {
3324 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3330 case KVM_HC_VAPIC_POLL_IRQ
:
3334 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3341 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3342 ++vcpu
->stat
.hypercalls
;
3345 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3347 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3349 char instruction
[3];
3351 unsigned long rip
= kvm_rip_read(vcpu
);
3355 * Blow out the MMU to ensure that no other VCPU has an active mapping
3356 * to ensure that the updated hypercall appears atomically across all
3359 kvm_mmu_zap_all(vcpu
->kvm
);
3361 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3362 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3363 != X86EMUL_CONTINUE
)
3369 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3371 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3374 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3376 struct descriptor_table dt
= { limit
, base
};
3378 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3381 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3383 struct descriptor_table dt
= { limit
, base
};
3385 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3388 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3389 unsigned long *rflags
)
3391 kvm_lmsw(vcpu
, msw
);
3392 *rflags
= kvm_get_rflags(vcpu
);
3395 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3397 unsigned long value
;
3399 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3402 value
= vcpu
->arch
.cr0
;
3405 value
= vcpu
->arch
.cr2
;
3408 value
= vcpu
->arch
.cr3
;
3411 value
= vcpu
->arch
.cr4
;
3414 value
= kvm_get_cr8(vcpu
);
3417 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3424 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3425 unsigned long *rflags
)
3429 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3430 *rflags
= kvm_get_rflags(vcpu
);
3433 vcpu
->arch
.cr2
= val
;
3436 kvm_set_cr3(vcpu
, val
);
3439 kvm_set_cr4(vcpu
, mk_cr_64(vcpu
->arch
.cr4
, val
));
3442 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3445 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3449 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3451 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3452 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3454 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3455 /* when no next entry is found, the current entry[i] is reselected */
3456 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3457 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3458 if (ej
->function
== e
->function
) {
3459 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3463 return 0; /* silence gcc, even though control never reaches here */
3466 /* find an entry with matching function, matching index (if needed), and that
3467 * should be read next (if it's stateful) */
3468 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3469 u32 function
, u32 index
)
3471 if (e
->function
!= function
)
3473 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3475 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3476 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3481 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3482 u32 function
, u32 index
)
3485 struct kvm_cpuid_entry2
*best
= NULL
;
3487 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3488 struct kvm_cpuid_entry2
*e
;
3490 e
= &vcpu
->arch
.cpuid_entries
[i
];
3491 if (is_matching_cpuid_entry(e
, function
, index
)) {
3492 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3493 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3498 * Both basic or both extended?
3500 if (((e
->function
^ function
) & 0x80000000) == 0)
3501 if (!best
|| e
->function
> best
->function
)
3507 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3509 struct kvm_cpuid_entry2
*best
;
3511 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3513 return best
->eax
& 0xff;
3517 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3519 u32 function
, index
;
3520 struct kvm_cpuid_entry2
*best
;
3522 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3523 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3524 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3525 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3526 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3527 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3528 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3530 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3531 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3532 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3533 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3535 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3536 trace_kvm_cpuid(function
,
3537 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3538 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3539 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3540 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3542 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3545 * Check if userspace requested an interrupt window, and that the
3546 * interrupt window is open.
3548 * No need to exit to userspace if we already have an interrupt queued.
3550 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
3552 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3553 vcpu
->run
->request_interrupt_window
&&
3554 kvm_arch_interrupt_allowed(vcpu
));
3557 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
3559 struct kvm_run
*kvm_run
= vcpu
->run
;
3561 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3562 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3563 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3564 if (irqchip_in_kernel(vcpu
->kvm
))
3565 kvm_run
->ready_for_interrupt_injection
= 1;
3567 kvm_run
->ready_for_interrupt_injection
=
3568 kvm_arch_interrupt_allowed(vcpu
) &&
3569 !kvm_cpu_has_interrupt(vcpu
) &&
3570 !kvm_event_needs_reinjection(vcpu
);
3573 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3575 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3578 if (!apic
|| !apic
->vapic_addr
)
3581 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3583 vcpu
->arch
.apic
->vapic_page
= page
;
3586 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3588 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3590 if (!apic
|| !apic
->vapic_addr
)
3593 down_read(&vcpu
->kvm
->slots_lock
);
3594 kvm_release_page_dirty(apic
->vapic_page
);
3595 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3596 up_read(&vcpu
->kvm
->slots_lock
);
3599 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3603 if (!kvm_x86_ops
->update_cr8_intercept
)
3606 if (!vcpu
->arch
.apic
)
3609 if (!vcpu
->arch
.apic
->vapic_addr
)
3610 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3617 tpr
= kvm_lapic_get_cr8(vcpu
);
3619 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3622 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
3624 /* try to reinject previous events if any */
3625 if (vcpu
->arch
.exception
.pending
) {
3626 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3627 vcpu
->arch
.exception
.has_error_code
,
3628 vcpu
->arch
.exception
.error_code
);
3632 if (vcpu
->arch
.nmi_injected
) {
3633 kvm_x86_ops
->set_nmi(vcpu
);
3637 if (vcpu
->arch
.interrupt
.pending
) {
3638 kvm_x86_ops
->set_irq(vcpu
);
3642 /* try to inject new event if pending */
3643 if (vcpu
->arch
.nmi_pending
) {
3644 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3645 vcpu
->arch
.nmi_pending
= false;
3646 vcpu
->arch
.nmi_injected
= true;
3647 kvm_x86_ops
->set_nmi(vcpu
);
3649 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3650 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3651 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3653 kvm_x86_ops
->set_irq(vcpu
);
3658 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
3661 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3662 vcpu
->run
->request_interrupt_window
;
3665 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3666 kvm_mmu_unload(vcpu
);
3668 r
= kvm_mmu_reload(vcpu
);
3672 if (vcpu
->requests
) {
3673 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3674 __kvm_migrate_timers(vcpu
);
3675 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3676 kvm_write_guest_time(vcpu
);
3677 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3678 kvm_mmu_sync_roots(vcpu
);
3679 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3680 kvm_x86_ops
->tlb_flush(vcpu
);
3681 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3683 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3687 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3688 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3696 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3697 kvm_load_guest_fpu(vcpu
);
3699 local_irq_disable();
3701 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3702 smp_mb__after_clear_bit();
3704 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3705 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3712 inject_pending_event(vcpu
);
3714 /* enable NMI/IRQ window open exits if needed */
3715 if (vcpu
->arch
.nmi_pending
)
3716 kvm_x86_ops
->enable_nmi_window(vcpu
);
3717 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3718 kvm_x86_ops
->enable_irq_window(vcpu
);
3720 if (kvm_lapic_enabled(vcpu
)) {
3721 update_cr8_intercept(vcpu
);
3722 kvm_lapic_sync_to_vapic(vcpu
);
3725 up_read(&vcpu
->kvm
->slots_lock
);
3729 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3731 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3732 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3733 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3734 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3737 trace_kvm_entry(vcpu
->vcpu_id
);
3738 kvm_x86_ops
->run(vcpu
);
3740 if (unlikely(vcpu
->arch
.switch_db_regs
|| test_thread_flag(TIF_DEBUG
))) {
3741 set_debugreg(current
->thread
.debugreg0
, 0);
3742 set_debugreg(current
->thread
.debugreg1
, 1);
3743 set_debugreg(current
->thread
.debugreg2
, 2);
3744 set_debugreg(current
->thread
.debugreg3
, 3);
3745 set_debugreg(current
->thread
.debugreg6
, 6);
3746 set_debugreg(current
->thread
.debugreg7
, 7);
3749 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3755 * We must have an instruction between local_irq_enable() and
3756 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3757 * the interrupt shadow. The stat.exits increment will do nicely.
3758 * But we need to prevent reordering, hence this barrier():
3766 down_read(&vcpu
->kvm
->slots_lock
);
3769 * Profile KVM exit RIPs:
3771 if (unlikely(prof_on
== KVM_PROFILING
)) {
3772 unsigned long rip
= kvm_rip_read(vcpu
);
3773 profile_hit(KVM_PROFILING
, (void *)rip
);
3777 kvm_lapic_sync_from_vapic(vcpu
);
3779 r
= kvm_x86_ops
->handle_exit(vcpu
);
3785 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
3789 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
3790 pr_debug("vcpu %d received sipi with vector # %x\n",
3791 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
3792 kvm_lapic_reset(vcpu
);
3793 r
= kvm_arch_vcpu_reset(vcpu
);
3796 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
3799 down_read(&vcpu
->kvm
->slots_lock
);
3804 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
3805 r
= vcpu_enter_guest(vcpu
);
3807 up_read(&vcpu
->kvm
->slots_lock
);
3808 kvm_vcpu_block(vcpu
);
3809 down_read(&vcpu
->kvm
->slots_lock
);
3810 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
3812 switch(vcpu
->arch
.mp_state
) {
3813 case KVM_MP_STATE_HALTED
:
3814 vcpu
->arch
.mp_state
=
3815 KVM_MP_STATE_RUNNABLE
;
3816 case KVM_MP_STATE_RUNNABLE
:
3818 case KVM_MP_STATE_SIPI_RECEIVED
:
3829 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
3830 if (kvm_cpu_has_pending_timer(vcpu
))
3831 kvm_inject_pending_timer_irqs(vcpu
);
3833 if (dm_request_for_irq_injection(vcpu
)) {
3835 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
3836 ++vcpu
->stat
.request_irq_exits
;
3838 if (signal_pending(current
)) {
3840 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
3841 ++vcpu
->stat
.signal_exits
;
3843 if (need_resched()) {
3844 up_read(&vcpu
->kvm
->slots_lock
);
3846 down_read(&vcpu
->kvm
->slots_lock
);
3850 up_read(&vcpu
->kvm
->slots_lock
);
3851 post_kvm_run_save(vcpu
);
3858 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3865 if (vcpu
->sigset_active
)
3866 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
3868 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
3869 kvm_vcpu_block(vcpu
);
3870 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
3875 /* re-sync apic's tpr */
3876 if (!irqchip_in_kernel(vcpu
->kvm
))
3877 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
3879 if (vcpu
->arch
.pio
.cur_count
) {
3880 r
= complete_pio(vcpu
);
3884 if (vcpu
->mmio_needed
) {
3885 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
3886 vcpu
->mmio_read_completed
= 1;
3887 vcpu
->mmio_needed
= 0;
3889 down_read(&vcpu
->kvm
->slots_lock
);
3890 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
3891 EMULTYPE_NO_DECODE
);
3892 up_read(&vcpu
->kvm
->slots_lock
);
3893 if (r
== EMULATE_DO_MMIO
) {
3895 * Read-modify-write. Back to userspace.
3901 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
3902 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
3903 kvm_run
->hypercall
.ret
);
3905 r
= __vcpu_run(vcpu
);
3908 if (vcpu
->sigset_active
)
3909 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
3915 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3919 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3920 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3921 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3922 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3923 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3924 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3925 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3926 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
3927 #ifdef CONFIG_X86_64
3928 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3929 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
3930 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
3931 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
3932 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
3933 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
3934 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
3935 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
3938 regs
->rip
= kvm_rip_read(vcpu
);
3939 regs
->rflags
= kvm_get_rflags(vcpu
);
3946 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3950 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
3951 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
3952 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
3953 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
3954 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
3955 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
3956 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
3957 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
3958 #ifdef CONFIG_X86_64
3959 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
3960 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
3961 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
3962 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
3963 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
3964 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
3965 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
3966 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
3969 kvm_rip_write(vcpu
, regs
->rip
);
3970 kvm_set_rflags(vcpu
, regs
->rflags
);
3972 vcpu
->arch
.exception
.pending
= false;
3979 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3980 struct kvm_segment
*var
, int seg
)
3982 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3985 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
3987 struct kvm_segment cs
;
3989 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
3993 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
3995 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
3996 struct kvm_sregs
*sregs
)
3998 struct descriptor_table dt
;
4002 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4003 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4004 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4005 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4006 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4007 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4009 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4010 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4012 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4013 sregs
->idt
.limit
= dt
.limit
;
4014 sregs
->idt
.base
= dt
.base
;
4015 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4016 sregs
->gdt
.limit
= dt
.limit
;
4017 sregs
->gdt
.base
= dt
.base
;
4019 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4020 sregs
->cr0
= vcpu
->arch
.cr0
;
4021 sregs
->cr2
= vcpu
->arch
.cr2
;
4022 sregs
->cr3
= vcpu
->arch
.cr3
;
4023 sregs
->cr4
= vcpu
->arch
.cr4
;
4024 sregs
->cr8
= kvm_get_cr8(vcpu
);
4025 sregs
->efer
= vcpu
->arch
.shadow_efer
;
4026 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4028 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4030 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4031 set_bit(vcpu
->arch
.interrupt
.nr
,
4032 (unsigned long *)sregs
->interrupt_bitmap
);
4039 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4040 struct kvm_mp_state
*mp_state
)
4043 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4048 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4049 struct kvm_mp_state
*mp_state
)
4052 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4057 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4058 struct kvm_segment
*var
, int seg
)
4060 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4063 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
4064 struct kvm_segment
*kvm_desct
)
4066 kvm_desct
->base
= get_desc_base(seg_desc
);
4067 kvm_desct
->limit
= get_desc_limit(seg_desc
);
4069 kvm_desct
->limit
<<= 12;
4070 kvm_desct
->limit
|= 0xfff;
4072 kvm_desct
->selector
= selector
;
4073 kvm_desct
->type
= seg_desc
->type
;
4074 kvm_desct
->present
= seg_desc
->p
;
4075 kvm_desct
->dpl
= seg_desc
->dpl
;
4076 kvm_desct
->db
= seg_desc
->d
;
4077 kvm_desct
->s
= seg_desc
->s
;
4078 kvm_desct
->l
= seg_desc
->l
;
4079 kvm_desct
->g
= seg_desc
->g
;
4080 kvm_desct
->avl
= seg_desc
->avl
;
4082 kvm_desct
->unusable
= 1;
4084 kvm_desct
->unusable
= 0;
4085 kvm_desct
->padding
= 0;
4088 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4090 struct descriptor_table
*dtable
)
4092 if (selector
& 1 << 2) {
4093 struct kvm_segment kvm_seg
;
4095 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4097 if (kvm_seg
.unusable
)
4100 dtable
->limit
= kvm_seg
.limit
;
4101 dtable
->base
= kvm_seg
.base
;
4104 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4107 /* allowed just for 8 bytes segments */
4108 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4109 struct desc_struct
*seg_desc
)
4111 struct descriptor_table dtable
;
4112 u16 index
= selector
>> 3;
4114 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4116 if (dtable
.limit
< index
* 8 + 7) {
4117 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4120 return kvm_read_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4123 /* allowed just for 8 bytes segments */
4124 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4125 struct desc_struct
*seg_desc
)
4127 struct descriptor_table dtable
;
4128 u16 index
= selector
>> 3;
4130 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4132 if (dtable
.limit
< index
* 8 + 7)
4134 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4137 static gpa_t
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4138 struct desc_struct
*seg_desc
)
4140 u32 base_addr
= get_desc_base(seg_desc
);
4142 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4145 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4147 struct kvm_segment kvm_seg
;
4149 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4150 return kvm_seg
.selector
;
4153 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4155 struct kvm_segment
*kvm_seg
)
4157 struct desc_struct seg_desc
;
4159 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4161 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4165 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4167 struct kvm_segment segvar
= {
4168 .base
= selector
<< 4,
4170 .selector
= selector
,
4181 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4185 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4187 return (seg
!= VCPU_SREG_LDTR
) &&
4188 (seg
!= VCPU_SREG_TR
) &&
4189 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4192 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4193 int type_bits
, int seg
)
4195 struct kvm_segment kvm_seg
;
4197 if (is_vm86_segment(vcpu
, seg
) || !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4198 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4199 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4201 kvm_seg
.type
|= type_bits
;
4203 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4204 seg
!= VCPU_SREG_LDTR
)
4206 kvm_seg
.unusable
= 1;
4208 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4212 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4213 struct tss_segment_32
*tss
)
4215 tss
->cr3
= vcpu
->arch
.cr3
;
4216 tss
->eip
= kvm_rip_read(vcpu
);
4217 tss
->eflags
= kvm_get_rflags(vcpu
);
4218 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4219 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4220 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4221 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4222 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4223 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4224 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4225 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4226 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4227 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4228 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4229 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4230 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4231 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4232 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4235 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4236 struct tss_segment_32
*tss
)
4238 kvm_set_cr3(vcpu
, tss
->cr3
);
4240 kvm_rip_write(vcpu
, tss
->eip
);
4241 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4243 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4244 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4245 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4246 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4247 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4248 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4249 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4250 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4252 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4255 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4258 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4261 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4264 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4267 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4270 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4275 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4276 struct tss_segment_16
*tss
)
4278 tss
->ip
= kvm_rip_read(vcpu
);
4279 tss
->flag
= kvm_get_rflags(vcpu
);
4280 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4281 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4282 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4283 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4284 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4285 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4286 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4287 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4289 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4290 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4291 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4292 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4293 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4296 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4297 struct tss_segment_16
*tss
)
4299 kvm_rip_write(vcpu
, tss
->ip
);
4300 kvm_set_rflags(vcpu
, tss
->flag
| 2);
4301 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4302 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4303 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4304 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4305 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4306 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4307 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4308 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4310 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4313 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4316 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4319 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4322 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4327 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4328 u16 old_tss_sel
, u32 old_tss_base
,
4329 struct desc_struct
*nseg_desc
)
4331 struct tss_segment_16 tss_segment_16
;
4334 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4335 sizeof tss_segment_16
))
4338 save_state_to_tss16(vcpu
, &tss_segment_16
);
4340 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4341 sizeof tss_segment_16
))
4344 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4345 &tss_segment_16
, sizeof tss_segment_16
))
4348 if (old_tss_sel
!= 0xffff) {
4349 tss_segment_16
.prev_task_link
= old_tss_sel
;
4351 if (kvm_write_guest(vcpu
->kvm
,
4352 get_tss_base_addr(vcpu
, nseg_desc
),
4353 &tss_segment_16
.prev_task_link
,
4354 sizeof tss_segment_16
.prev_task_link
))
4358 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4366 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4367 u16 old_tss_sel
, u32 old_tss_base
,
4368 struct desc_struct
*nseg_desc
)
4370 struct tss_segment_32 tss_segment_32
;
4373 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4374 sizeof tss_segment_32
))
4377 save_state_to_tss32(vcpu
, &tss_segment_32
);
4379 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4380 sizeof tss_segment_32
))
4383 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4384 &tss_segment_32
, sizeof tss_segment_32
))
4387 if (old_tss_sel
!= 0xffff) {
4388 tss_segment_32
.prev_task_link
= old_tss_sel
;
4390 if (kvm_write_guest(vcpu
->kvm
,
4391 get_tss_base_addr(vcpu
, nseg_desc
),
4392 &tss_segment_32
.prev_task_link
,
4393 sizeof tss_segment_32
.prev_task_link
))
4397 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4405 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4407 struct kvm_segment tr_seg
;
4408 struct desc_struct cseg_desc
;
4409 struct desc_struct nseg_desc
;
4411 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4412 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4414 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4416 /* FIXME: Handle errors. Failure to read either TSS or their
4417 * descriptors should generate a pagefault.
4419 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4422 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4425 if (reason
!= TASK_SWITCH_IRET
) {
4428 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4429 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4430 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4435 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4436 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4440 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4441 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4442 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4445 if (reason
== TASK_SWITCH_IRET
) {
4446 u32 eflags
= kvm_get_rflags(vcpu
);
4447 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4450 /* set back link to prev task only if NT bit is set in eflags
4451 note that old_tss_sel is not used afetr this point */
4452 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4453 old_tss_sel
= 0xffff;
4455 /* set back link to prev task only if NT bit is set in eflags
4456 note that old_tss_sel is not used afetr this point */
4457 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4458 old_tss_sel
= 0xffff;
4460 if (nseg_desc
.type
& 8)
4461 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4462 old_tss_base
, &nseg_desc
);
4464 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4465 old_tss_base
, &nseg_desc
);
4467 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4468 u32 eflags
= kvm_get_rflags(vcpu
);
4469 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4472 if (reason
!= TASK_SWITCH_IRET
) {
4473 nseg_desc
.type
|= (1 << 1);
4474 save_guest_segment_descriptor(vcpu
, tss_selector
,
4478 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4479 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4481 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4485 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4487 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4488 struct kvm_sregs
*sregs
)
4490 int mmu_reset_needed
= 0;
4491 int pending_vec
, max_bits
;
4492 struct descriptor_table dt
;
4496 dt
.limit
= sregs
->idt
.limit
;
4497 dt
.base
= sregs
->idt
.base
;
4498 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4499 dt
.limit
= sregs
->gdt
.limit
;
4500 dt
.base
= sregs
->gdt
.base
;
4501 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4503 vcpu
->arch
.cr2
= sregs
->cr2
;
4504 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4505 vcpu
->arch
.cr3
= sregs
->cr3
;
4507 kvm_set_cr8(vcpu
, sregs
->cr8
);
4509 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4510 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4511 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4513 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4515 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4516 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4517 vcpu
->arch
.cr0
= sregs
->cr0
;
4519 mmu_reset_needed
|= vcpu
->arch
.cr4
!= sregs
->cr4
;
4520 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4521 if (!is_long_mode(vcpu
) && is_pae(vcpu
))
4522 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4524 if (mmu_reset_needed
)
4525 kvm_mmu_reset_context(vcpu
);
4527 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4528 pending_vec
= find_first_bit(
4529 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4530 if (pending_vec
< max_bits
) {
4531 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4532 pr_debug("Set back pending irq %d\n", pending_vec
);
4533 if (irqchip_in_kernel(vcpu
->kvm
))
4534 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4537 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4538 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4539 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4540 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4541 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4542 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4544 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4545 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4547 update_cr8_intercept(vcpu
);
4549 /* Older userspace won't unhalt the vcpu on reset. */
4550 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4551 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4552 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4553 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4560 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4561 struct kvm_guest_debug
*dbg
)
4563 unsigned long rflags
;
4569 * Read rflags as long as potentially injected trace flags are still
4572 rflags
= kvm_get_rflags(vcpu
);
4574 vcpu
->guest_debug
= dbg
->control
;
4575 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
4576 vcpu
->guest_debug
= 0;
4578 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
4579 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4580 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4581 vcpu
->arch
.switch_db_regs
=
4582 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4584 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4585 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4586 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4589 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
4590 vcpu
->arch
.singlestep_cs
=
4591 get_segment_selector(vcpu
, VCPU_SREG_CS
);
4592 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
);
4596 * Trigger an rflags update that will inject or remove the trace
4599 kvm_set_rflags(vcpu
, rflags
);
4601 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4603 if (vcpu
->guest_debug
& KVM_GUESTDBG_INJECT_DB
)
4604 kvm_queue_exception(vcpu
, DB_VECTOR
);
4605 else if (vcpu
->guest_debug
& KVM_GUESTDBG_INJECT_BP
)
4606 kvm_queue_exception(vcpu
, BP_VECTOR
);
4614 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4615 * we have asm/x86/processor.h
4626 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4627 #ifdef CONFIG_X86_64
4628 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4630 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4635 * Translate a guest virtual address to a guest physical address.
4637 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4638 struct kvm_translation
*tr
)
4640 unsigned long vaddr
= tr
->linear_address
;
4644 down_read(&vcpu
->kvm
->slots_lock
);
4645 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4646 up_read(&vcpu
->kvm
->slots_lock
);
4647 tr
->physical_address
= gpa
;
4648 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4656 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4658 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4662 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4663 fpu
->fcw
= fxsave
->cwd
;
4664 fpu
->fsw
= fxsave
->swd
;
4665 fpu
->ftwx
= fxsave
->twd
;
4666 fpu
->last_opcode
= fxsave
->fop
;
4667 fpu
->last_ip
= fxsave
->rip
;
4668 fpu
->last_dp
= fxsave
->rdp
;
4669 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4676 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4678 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4682 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4683 fxsave
->cwd
= fpu
->fcw
;
4684 fxsave
->swd
= fpu
->fsw
;
4685 fxsave
->twd
= fpu
->ftwx
;
4686 fxsave
->fop
= fpu
->last_opcode
;
4687 fxsave
->rip
= fpu
->last_ip
;
4688 fxsave
->rdp
= fpu
->last_dp
;
4689 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4696 void fx_init(struct kvm_vcpu
*vcpu
)
4698 unsigned after_mxcsr_mask
;
4701 * Touch the fpu the first time in non atomic context as if
4702 * this is the first fpu instruction the exception handler
4703 * will fire before the instruction returns and it'll have to
4704 * allocate ram with GFP_KERNEL.
4707 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4709 /* Initialize guest FPU by resetting ours and saving into guest's */
4711 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4713 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4714 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4717 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4718 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4719 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4720 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4721 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4723 EXPORT_SYMBOL_GPL(fx_init
);
4725 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4727 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4730 vcpu
->guest_fpu_loaded
= 1;
4731 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4732 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4734 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4736 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4738 if (!vcpu
->guest_fpu_loaded
)
4741 vcpu
->guest_fpu_loaded
= 0;
4742 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4743 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4744 ++vcpu
->stat
.fpu_reload
;
4746 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4748 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4750 if (vcpu
->arch
.time_page
) {
4751 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4752 vcpu
->arch
.time_page
= NULL
;
4755 kvm_x86_ops
->vcpu_free(vcpu
);
4758 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4761 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4764 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
4768 /* We do fxsave: this must be aligned. */
4769 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
4771 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
4773 r
= kvm_arch_vcpu_reset(vcpu
);
4775 r
= kvm_mmu_setup(vcpu
);
4782 kvm_x86_ops
->vcpu_free(vcpu
);
4786 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
4789 kvm_mmu_unload(vcpu
);
4792 kvm_x86_ops
->vcpu_free(vcpu
);
4795 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
4797 vcpu
->arch
.nmi_pending
= false;
4798 vcpu
->arch
.nmi_injected
= false;
4800 vcpu
->arch
.switch_db_regs
= 0;
4801 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
4802 vcpu
->arch
.dr6
= DR6_FIXED_1
;
4803 vcpu
->arch
.dr7
= DR7_FIXED_1
;
4805 return kvm_x86_ops
->vcpu_reset(vcpu
);
4808 int kvm_arch_hardware_enable(void *garbage
)
4811 * Since this may be called from a hotplug notifcation,
4812 * we can't get the CPU frequency directly.
4814 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4815 int cpu
= raw_smp_processor_id();
4816 per_cpu(cpu_tsc_khz
, cpu
) = 0;
4818 return kvm_x86_ops
->hardware_enable(garbage
);
4821 void kvm_arch_hardware_disable(void *garbage
)
4823 kvm_x86_ops
->hardware_disable(garbage
);
4826 int kvm_arch_hardware_setup(void)
4828 return kvm_x86_ops
->hardware_setup();
4831 void kvm_arch_hardware_unsetup(void)
4833 kvm_x86_ops
->hardware_unsetup();
4836 void kvm_arch_check_processor_compat(void *rtn
)
4838 kvm_x86_ops
->check_processor_compatibility(rtn
);
4841 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
4847 BUG_ON(vcpu
->kvm
== NULL
);
4850 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4851 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
4852 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4854 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
4856 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
4861 vcpu
->arch
.pio_data
= page_address(page
);
4863 r
= kvm_mmu_create(vcpu
);
4865 goto fail_free_pio_data
;
4867 if (irqchip_in_kernel(kvm
)) {
4868 r
= kvm_create_lapic(vcpu
);
4870 goto fail_mmu_destroy
;
4873 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
4875 if (!vcpu
->arch
.mce_banks
) {
4877 goto fail_mmu_destroy
;
4879 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
4884 kvm_mmu_destroy(vcpu
);
4886 free_page((unsigned long)vcpu
->arch
.pio_data
);
4891 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
4893 kvm_free_lapic(vcpu
);
4894 down_read(&vcpu
->kvm
->slots_lock
);
4895 kvm_mmu_destroy(vcpu
);
4896 up_read(&vcpu
->kvm
->slots_lock
);
4897 free_page((unsigned long)vcpu
->arch
.pio_data
);
4900 struct kvm
*kvm_arch_create_vm(void)
4902 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
4905 return ERR_PTR(-ENOMEM
);
4907 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
4908 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
4910 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4911 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
4913 rdtscll(kvm
->arch
.vm_init_tsc
);
4918 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
4921 kvm_mmu_unload(vcpu
);
4925 static void kvm_free_vcpus(struct kvm
*kvm
)
4928 struct kvm_vcpu
*vcpu
;
4931 * Unpin any mmu pages first.
4933 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4934 kvm_unload_vcpu_mmu(vcpu
);
4935 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4936 kvm_arch_vcpu_free(vcpu
);
4938 mutex_lock(&kvm
->lock
);
4939 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
4940 kvm
->vcpus
[i
] = NULL
;
4942 atomic_set(&kvm
->online_vcpus
, 0);
4943 mutex_unlock(&kvm
->lock
);
4946 void kvm_arch_sync_events(struct kvm
*kvm
)
4948 kvm_free_all_assigned_devices(kvm
);
4951 void kvm_arch_destroy_vm(struct kvm
*kvm
)
4953 kvm_iommu_unmap_guest(kvm
);
4955 kfree(kvm
->arch
.vpic
);
4956 kfree(kvm
->arch
.vioapic
);
4957 kvm_free_vcpus(kvm
);
4958 kvm_free_physmem(kvm
);
4959 if (kvm
->arch
.apic_access_page
)
4960 put_page(kvm
->arch
.apic_access_page
);
4961 if (kvm
->arch
.ept_identity_pagetable
)
4962 put_page(kvm
->arch
.ept_identity_pagetable
);
4966 int kvm_arch_set_memory_region(struct kvm
*kvm
,
4967 struct kvm_userspace_memory_region
*mem
,
4968 struct kvm_memory_slot old
,
4971 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
4972 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
4974 /*To keep backward compatibility with older userspace,
4975 *x86 needs to hanlde !user_alloc case.
4978 if (npages
&& !old
.rmap
) {
4979 unsigned long userspace_addr
;
4981 down_write(¤t
->mm
->mmap_sem
);
4982 userspace_addr
= do_mmap(NULL
, 0,
4984 PROT_READ
| PROT_WRITE
,
4985 MAP_PRIVATE
| MAP_ANONYMOUS
,
4987 up_write(¤t
->mm
->mmap_sem
);
4989 if (IS_ERR((void *)userspace_addr
))
4990 return PTR_ERR((void *)userspace_addr
);
4992 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4993 spin_lock(&kvm
->mmu_lock
);
4994 memslot
->userspace_addr
= userspace_addr
;
4995 spin_unlock(&kvm
->mmu_lock
);
4997 if (!old
.user_alloc
&& old
.rmap
) {
5000 down_write(¤t
->mm
->mmap_sem
);
5001 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5002 old
.npages
* PAGE_SIZE
);
5003 up_write(¤t
->mm
->mmap_sem
);
5006 "kvm_vm_ioctl_set_memory_region: "
5007 "failed to munmap memory\n");
5012 spin_lock(&kvm
->mmu_lock
);
5013 if (!kvm
->arch
.n_requested_mmu_pages
) {
5014 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5015 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5018 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5019 spin_unlock(&kvm
->mmu_lock
);
5024 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5026 kvm_mmu_zap_all(kvm
);
5027 kvm_reload_remote_mmus(kvm
);
5030 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5032 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5033 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5034 || vcpu
->arch
.nmi_pending
||
5035 (kvm_arch_interrupt_allowed(vcpu
) &&
5036 kvm_cpu_has_interrupt(vcpu
));
5039 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5042 int cpu
= vcpu
->cpu
;
5044 if (waitqueue_active(&vcpu
->wq
)) {
5045 wake_up_interruptible(&vcpu
->wq
);
5046 ++vcpu
->stat
.halt_wakeup
;
5050 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5051 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5052 smp_send_reschedule(cpu
);
5056 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5058 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5061 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5063 unsigned long rflags
;
5065 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5066 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5067 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
5070 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5072 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5074 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5075 vcpu
->arch
.singlestep_cs
==
5076 get_segment_selector(vcpu
, VCPU_SREG_CS
) &&
5077 vcpu
->arch
.singlestep_rip
== kvm_rip_read(vcpu
))
5078 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
5079 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5081 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5083 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5084 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5085 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5086 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5087 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5088 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5089 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5090 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5091 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5092 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5093 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);