2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
56 #include <asm/trampoline.h>
59 #include <asm/pgtable.h>
60 #include <asm/tlbflush.h>
63 #include <asm/genapic.h>
64 #include <linux/mc146818rtc.h>
66 #include <mach_apic.h>
67 #include <mach_wakecpu.h>
68 #include <smpboot_hooks.h>
71 u8 apicid_2_node
[MAX_APICID
];
72 static int low_mappings
;
75 /* State of each CPU */
76 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
78 /* Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
82 #ifdef CONFIG_HOTPLUG_CPU
84 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
85 * removed after init for !CONFIG_HOTPLUG_CPU.
87 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
88 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
89 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
91 struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
92 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
93 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
96 /* Number of siblings per CPU package */
97 int smp_num_siblings
= 1;
98 EXPORT_SYMBOL(smp_num_siblings
);
100 /* Last level cache ID of each logical CPU */
101 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
103 /* bitmap of online cpus */
104 cpumask_t cpu_online_map __read_mostly
;
105 EXPORT_SYMBOL(cpu_online_map
);
107 cpumask_t cpu_callin_map
;
108 cpumask_t cpu_callout_map
;
109 cpumask_t cpu_possible_map
;
110 EXPORT_SYMBOL(cpu_possible_map
);
112 /* representing HT siblings of each logical CPU */
113 DEFINE_PER_CPU(cpumask_t
, cpu_sibling_map
);
114 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
116 /* representing HT and core siblings of each logical CPU */
117 DEFINE_PER_CPU(cpumask_t
, cpu_core_map
);
118 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
120 /* Per CPU bogomips and other parameters */
121 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
122 EXPORT_PER_CPU_SYMBOL(cpu_info
);
124 static atomic_t init_deasserted
;
126 static int boot_cpu_logical_apicid
;
128 /* representing cpus for which sibling maps can be computed */
129 static cpumask_t cpu_sibling_setup_map
;
131 /* Set if we find a B stepping CPU */
132 int __cpuinitdata smp_b_stepping
;
134 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
136 /* which logical CPUs are on which nodes */
137 cpumask_t node_to_cpumask_map
[MAX_NUMNODES
] __read_mostly
=
138 { [0 ... MAX_NUMNODES
-1] = CPU_MASK_NONE
};
139 EXPORT_SYMBOL(node_to_cpumask_map
);
140 /* which node each logical CPU is on */
141 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
142 EXPORT_SYMBOL(cpu_to_node_map
);
144 /* set up a mapping between cpu and node. */
145 static void map_cpu_to_node(int cpu
, int node
)
147 printk(KERN_INFO
"Mapping cpu %d to node %d\n", cpu
, node
);
148 cpu_set(cpu
, node_to_cpumask_map
[node
]);
149 cpu_to_node_map
[cpu
] = node
;
152 /* undo a mapping between cpu and node. */
153 static void unmap_cpu_to_node(int cpu
)
157 printk(KERN_INFO
"Unmapping cpu %d from all nodes\n", cpu
);
158 for (node
= 0; node
< MAX_NUMNODES
; node
++)
159 cpu_clear(cpu
, node_to_cpumask_map
[node
]);
160 cpu_to_node_map
[cpu
] = 0;
162 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
163 #define map_cpu_to_node(cpu, node) ({})
164 #define unmap_cpu_to_node(cpu) ({})
168 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
=
169 { [0 ... NR_CPUS
-1] = BAD_APICID
};
171 static void map_cpu_to_logical_apicid(void)
173 int cpu
= smp_processor_id();
174 int apicid
= logical_smp_processor_id();
175 int node
= apicid_to_node(apicid
);
177 if (!node_online(node
))
178 node
= first_online_node
;
180 cpu_2_logical_apicid
[cpu
] = apicid
;
181 map_cpu_to_node(cpu
, node
);
184 void numa_remove_cpu(int cpu
)
186 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
187 unmap_cpu_to_node(cpu
);
190 #define map_cpu_to_logical_apicid() do {} while (0)
194 * Report back to the Boot Processor.
197 static void __cpuinit
smp_callin(void)
200 unsigned long timeout
;
203 * If waken up by an INIT in an 82489DX configuration
204 * we may get here before an INIT-deassert IPI reaches
205 * our local APIC. We have to wait for the IPI or we'll
206 * lock up on an APIC access.
208 wait_for_init_deassert(&init_deasserted
);
211 * (This works even if the APIC is not enabled.)
213 phys_id
= GET_APIC_ID(read_apic_id());
214 cpuid
= smp_processor_id();
215 if (cpu_isset(cpuid
, cpu_callin_map
)) {
216 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
219 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
222 * STARTUP IPIs are fragile beasts as they might sometimes
223 * trigger some glue motherboard logic. Complete APIC bus
224 * silence for 1 second, this overestimates the time the
225 * boot CPU is spending to send the up to 2 STARTUP IPIs
226 * by a factor of two. This should be enough.
230 * Waiting 2s total for startup (udelay is not yet working)
232 timeout
= jiffies
+ 2*HZ
;
233 while (time_before(jiffies
, timeout
)) {
235 * Has the boot CPU finished it's STARTUP sequence?
237 if (cpu_isset(cpuid
, cpu_callout_map
))
242 if (!time_before(jiffies
, timeout
)) {
243 panic("%s: CPU%d started up but did not get a callout!\n",
248 * the boot CPU has finished the init stage and is spinning
249 * on callin_map until we finish. We are free to set up this
250 * CPU, first the APIC. (this is probably redundant on most
254 pr_debug("CALLIN, before setup_local_APIC().\n");
255 smp_callin_clear_local_apic();
257 end_local_APIC_setup();
258 map_cpu_to_logical_apicid();
263 * Need to enable IRQs because it can take longer and then
264 * the NMI watchdog might kill us.
269 pr_debug("Stack at about %p\n", &cpuid
);
272 * Save our processor parameters
274 smp_store_cpu_info(cpuid
);
277 * Allow the master to continue.
279 cpu_set(cpuid
, cpu_callin_map
);
283 * Activate a secondary processor.
285 static void __cpuinit
start_secondary(void *unused
)
288 * Don't put *anything* before cpu_init(), SMP booting is too
289 * fragile that we want to limit the things done here to the
290 * most necessary things.
299 /* otherwise gcc will move up smp_processor_id before the cpu_init */
302 * Check TSC synchronization with the BP:
304 check_tsc_sync_target();
306 if (nmi_watchdog
== NMI_IO_APIC
) {
307 disable_8259A_irq(0);
308 enable_NMI_through_LVT0();
318 /* This must be done before setting cpu_online_map */
319 set_cpu_sibling_map(raw_smp_processor_id());
323 * We need to hold call_lock, so there is no inconsistency
324 * between the time smp_call_function() determines number of
325 * IPI recipients, and the time when the determination is made
326 * for which cpus receive the IPI. Holding this
327 * lock helps us to not include this cpu in a currently in progress
328 * smp_call_function().
331 #ifdef CONFIG_X86_IO_APIC
332 setup_vector_irq(smp_processor_id());
334 cpu_set(smp_processor_id(), cpu_online_map
);
335 ipi_call_unlock_irq();
336 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
338 setup_secondary_clock();
344 static void __cpuinit
smp_apply_quirks(struct cpuinfo_x86
*c
)
347 * Mask B, Pentium, but not Pentium MMX
349 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
351 c
->x86_mask
>= 1 && c
->x86_mask
<= 4 &&
354 * Remember we have B step Pentia with bugs
359 * Certain Athlons might work (for various values of 'work') in SMP
360 * but they are not certified as MP capable.
362 if ((c
->x86_vendor
== X86_VENDOR_AMD
) && (c
->x86
== 6)) {
364 if (num_possible_cpus() == 1)
367 /* Athlon 660/661 is valid. */
368 if ((c
->x86_model
== 6) && ((c
->x86_mask
== 0) ||
372 /* Duron 670 is valid */
373 if ((c
->x86_model
== 7) && (c
->x86_mask
== 0))
377 * Athlon 662, Duron 671, and Athlon >model 7 have capability
378 * bit. It's worth noting that the A5 stepping (662) of some
379 * Athlon XP's have the MP bit set.
380 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
383 if (((c
->x86_model
== 6) && (c
->x86_mask
>= 2)) ||
384 ((c
->x86_model
== 7) && (c
->x86_mask
>= 1)) ||
389 /* If we get here, not a certified SMP capable AMD system. */
390 add_taint(TAINT_UNSAFE_SMP
);
397 static void __cpuinit
smp_checks(void)
400 printk(KERN_WARNING
"WARNING: SMP operation may be unreliable"
401 "with B stepping processors.\n");
404 * Don't taint if we are running SMP kernel on a single non-MP
407 if (tainted
& TAINT_UNSAFE_SMP
) {
408 if (num_online_cpus())
409 printk(KERN_INFO
"WARNING: This combination of AMD"
410 "processors is not suitable for SMP.\n");
412 tainted
&= ~TAINT_UNSAFE_SMP
;
417 * The bootstrap kernel entry code has set these up. Save them for
421 void __cpuinit
smp_store_cpu_info(int id
)
423 struct cpuinfo_x86
*c
= &cpu_data(id
);
428 identify_secondary_cpu(c
);
433 void __cpuinit
set_cpu_sibling_map(int cpu
)
436 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
438 cpu_set(cpu
, cpu_sibling_setup_map
);
440 if (smp_num_siblings
> 1) {
441 for_each_cpu_mask_nr(i
, cpu_sibling_setup_map
) {
442 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
&&
443 c
->cpu_core_id
== cpu_data(i
).cpu_core_id
) {
444 cpu_set(i
, per_cpu(cpu_sibling_map
, cpu
));
445 cpu_set(cpu
, per_cpu(cpu_sibling_map
, i
));
446 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
447 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
448 cpu_set(i
, c
->llc_shared_map
);
449 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
453 cpu_set(cpu
, per_cpu(cpu_sibling_map
, cpu
));
456 cpu_set(cpu
, c
->llc_shared_map
);
458 if (current_cpu_data
.x86_max_cores
== 1) {
459 per_cpu(cpu_core_map
, cpu
) = per_cpu(cpu_sibling_map
, cpu
);
464 for_each_cpu_mask_nr(i
, cpu_sibling_setup_map
) {
465 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
466 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
467 cpu_set(i
, c
->llc_shared_map
);
468 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
470 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
471 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
472 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
474 * Does this new cpu bringup a new core?
476 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1) {
478 * for each core in package, increment
479 * the booted_cores for this new cpu
481 if (first_cpu(per_cpu(cpu_sibling_map
, i
)) == i
)
484 * increment the core count for all
485 * the other cpus in this package
488 cpu_data(i
).booted_cores
++;
489 } else if (i
!= cpu
&& !c
->booted_cores
)
490 c
->booted_cores
= cpu_data(i
).booted_cores
;
495 /* maps the cpu to the sched domain representing multi-core */
496 cpumask_t
cpu_coregroup_map(int cpu
)
498 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
500 * For perf, we return last level cache shared map.
501 * And for power savings, we return cpu_core_map
503 if (sched_mc_power_savings
|| sched_smt_power_savings
)
504 return per_cpu(cpu_core_map
, cpu
);
506 return c
->llc_shared_map
;
509 static void impress_friends(void)
512 unsigned long bogosum
= 0;
514 * Allow the user to impress friends.
516 pr_debug("Before bogomips.\n");
517 for_each_possible_cpu(cpu
)
518 if (cpu_isset(cpu
, cpu_callout_map
))
519 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
521 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
524 (bogosum
/(5000/HZ
))%100);
526 pr_debug("Before bogocount - setting activated=1.\n");
529 static inline void __inquire_remote_apic(int apicid
)
531 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
532 char *names
[] = { "ID", "VERSION", "SPIV" };
536 printk(KERN_INFO
"Inquiring remote APIC #%d...\n", apicid
);
538 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
539 printk(KERN_INFO
"... APIC #%d %s: ", apicid
, names
[i
]);
544 status
= safe_apic_wait_icr_idle();
547 "a previous APIC delivery may have failed\n");
549 apic_write(APIC_ICR2
, SET_APIC_DEST_FIELD(apicid
));
550 apic_write(APIC_ICR
, APIC_DM_REMRD
| regs
[i
]);
555 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
556 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
559 case APIC_ICR_RR_VALID
:
560 status
= apic_read(APIC_RRR
);
561 printk(KERN_CONT
"%08x\n", status
);
564 printk(KERN_CONT
"failed\n");
569 #ifdef WAKE_SECONDARY_VIA_NMI
571 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
572 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
573 * won't ... remember to clear down the APIC, etc later.
576 wakeup_secondary_cpu(int logical_apicid
, unsigned long start_eip
)
578 unsigned long send_status
, accept_status
= 0;
582 apic_write(APIC_ICR2
, SET_APIC_DEST_FIELD(logical_apicid
));
584 /* Boot on the stack */
585 /* Kick the second */
586 apic_write(APIC_ICR
, APIC_DM_NMI
| APIC_DEST_LOGICAL
);
588 pr_debug("Waiting for send to finish...\n");
589 send_status
= safe_apic_wait_icr_idle();
592 * Give the other CPU some time to accept the IPI.
595 maxlvt
= lapic_get_maxlvt();
596 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
597 apic_write(APIC_ESR
, 0);
598 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
599 pr_debug("NMI sent.\n");
602 printk(KERN_ERR
"APIC never delivered???\n");
604 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
606 return (send_status
| accept_status
);
608 #endif /* WAKE_SECONDARY_VIA_NMI */
610 #ifdef WAKE_SECONDARY_VIA_INIT
612 wakeup_secondary_cpu(int phys_apicid
, unsigned long start_eip
)
614 unsigned long send_status
, accept_status
= 0;
615 int maxlvt
, num_starts
, j
;
617 if (get_uv_system_type() == UV_NON_UNIQUE_APIC
) {
618 send_status
= uv_wakeup_secondary(phys_apicid
, start_eip
);
619 atomic_set(&init_deasserted
, 1);
623 maxlvt
= lapic_get_maxlvt();
626 * Be paranoid about clearing APIC errors.
628 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
629 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
630 apic_write(APIC_ESR
, 0);
634 pr_debug("Asserting INIT.\n");
637 * Turn INIT on target chip
639 apic_write(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
645 APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
| APIC_DM_INIT
);
647 pr_debug("Waiting for send to finish...\n");
648 send_status
= safe_apic_wait_icr_idle();
652 pr_debug("Deasserting INIT.\n");
655 apic_write(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
658 apic_write(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_DM_INIT
);
660 pr_debug("Waiting for send to finish...\n");
661 send_status
= safe_apic_wait_icr_idle();
664 atomic_set(&init_deasserted
, 1);
667 * Should we send STARTUP IPIs ?
669 * Determine this based on the APIC version.
670 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
672 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
678 * Paravirt / VMI wants a startup IPI hook here to set up the
679 * target processor state.
681 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
682 (unsigned long)stack_start
.sp
);
685 * Run STARTUP IPI loop.
687 pr_debug("#startup loops: %d.\n", num_starts
);
689 for (j
= 1; j
<= num_starts
; j
++) {
690 pr_debug("Sending STARTUP #%d.\n", j
);
691 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
692 apic_write(APIC_ESR
, 0);
694 pr_debug("After apic_write.\n");
701 apic_write(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
703 /* Boot on the stack */
704 /* Kick the second */
705 apic_write(APIC_ICR
, APIC_DM_STARTUP
| (start_eip
>> 12));
708 * Give the other CPU some time to accept the IPI.
712 pr_debug("Startup point 1.\n");
714 pr_debug("Waiting for send to finish...\n");
715 send_status
= safe_apic_wait_icr_idle();
718 * Give the other CPU some time to accept the IPI.
721 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
722 apic_write(APIC_ESR
, 0);
723 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
724 if (send_status
|| accept_status
)
727 pr_debug("After Startup.\n");
730 printk(KERN_ERR
"APIC never delivered???\n");
732 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
734 return (send_status
| accept_status
);
736 #endif /* WAKE_SECONDARY_VIA_INIT */
739 struct work_struct work
;
740 struct task_struct
*idle
;
741 struct completion done
;
745 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
747 struct create_idle
*c_idle
=
748 container_of(work
, struct create_idle
, work
);
750 c_idle
->idle
= fork_idle(c_idle
->cpu
);
751 complete(&c_idle
->done
);
756 * Allocate node local memory for the AP pda.
758 * Must be called after the _cpu_pda pointer table is initialized.
760 int __cpuinit
get_local_pda(int cpu
)
762 struct x8664_pda
*oldpda
, *newpda
;
763 unsigned long size
= sizeof(struct x8664_pda
);
764 int node
= cpu_to_node(cpu
);
766 if (cpu_pda(cpu
) && !cpu_pda(cpu
)->in_bootmem
)
769 oldpda
= cpu_pda(cpu
);
770 newpda
= kmalloc_node(size
, GFP_ATOMIC
, node
);
772 printk(KERN_ERR
"Could not allocate node local PDA "
773 "for CPU %d on node %d\n", cpu
, node
);
776 return 0; /* have a usable pda */
782 memcpy(newpda
, oldpda
, size
);
784 free_bootmem((unsigned long)oldpda
, size
);
787 newpda
->in_bootmem
= 0;
788 cpu_pda(cpu
) = newpda
;
791 #endif /* CONFIG_X86_64 */
793 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
795 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
796 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
797 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
800 unsigned long boot_error
= 0;
802 unsigned long start_ip
;
803 unsigned short nmi_high
= 0, nmi_low
= 0;
804 struct create_idle c_idle
= {
806 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
808 INIT_WORK(&c_idle
.work
, do_fork_idle
);
811 /* Allocate node local memory for AP pdas */
813 boot_error
= get_local_pda(cpu
);
816 /* if can't get pda memory, can't start cpu */
820 alternatives_smp_switch(1);
822 c_idle
.idle
= get_idle_for_cpu(cpu
);
825 * We can't use kernel_thread since we must avoid to
826 * reschedule the child.
829 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
830 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
831 init_idle(c_idle
.idle
, cpu
);
835 if (!keventd_up() || current_is_keventd())
836 c_idle
.work
.func(&c_idle
.work
);
838 schedule_work(&c_idle
.work
);
839 wait_for_completion(&c_idle
.done
);
842 if (IS_ERR(c_idle
.idle
)) {
843 printk("failed fork for CPU %d\n", cpu
);
844 return PTR_ERR(c_idle
.idle
);
847 set_idle_for_cpu(cpu
, c_idle
.idle
);
850 per_cpu(current_task
, cpu
) = c_idle
.idle
;
852 /* Stack for startup_32 can be just as for start_secondary onwards */
855 cpu_pda(cpu
)->pcurrent
= c_idle
.idle
;
856 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
858 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
859 initial_code
= (unsigned long)start_secondary
;
860 stack_start
.sp
= (void *) c_idle
.idle
->thread
.sp
;
862 /* start_ip had better be page-aligned! */
863 start_ip
= setup_trampoline();
865 /* So we see what's up */
866 printk(KERN_INFO
"Booting processor %d/%d ip %lx\n",
867 cpu
, apicid
, start_ip
);
870 * This grunge runs the startup process for
871 * the targeted processor.
874 atomic_set(&init_deasserted
, 0);
876 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
878 pr_debug("Setting warm reset code and vector.\n");
880 store_NMI_vector(&nmi_high
, &nmi_low
);
882 smpboot_setup_warm_reset_vector(start_ip
);
884 * Be paranoid about clearing APIC errors.
886 apic_write(APIC_ESR
, 0);
891 * Starting actual IPI sequence...
893 boot_error
= wakeup_secondary_cpu(apicid
, start_ip
);
897 * allow APs to start initializing.
899 pr_debug("Before Callout %d.\n", cpu
);
900 cpu_set(cpu
, cpu_callout_map
);
901 pr_debug("After Callout %d.\n", cpu
);
904 * Wait 5s total for a response
906 for (timeout
= 0; timeout
< 50000; timeout
++) {
907 if (cpu_isset(cpu
, cpu_callin_map
))
908 break; /* It has booted */
912 if (cpu_isset(cpu
, cpu_callin_map
)) {
913 /* number CPUs logically, starting from 1 (BSP is 0) */
915 printk(KERN_INFO
"CPU%d: ", cpu
);
916 print_cpu_info(&cpu_data(cpu
));
917 pr_debug("CPU has booted.\n");
920 if (*((volatile unsigned char *)trampoline_base
)
922 /* trampoline started but...? */
923 printk(KERN_ERR
"Stuck ??\n");
925 /* trampoline code not run */
926 printk(KERN_ERR
"Not responding.\n");
927 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
)
928 inquire_remote_apic(apicid
);
935 /* Try to put things back the way they were before ... */
936 numa_remove_cpu(cpu
); /* was set by numa_add_cpu */
937 cpu_clear(cpu
, cpu_callout_map
); /* was set by do_boot_cpu() */
938 cpu_clear(cpu
, cpu_initialized
); /* was set by cpu_init() */
939 cpu_clear(cpu
, cpu_present_map
);
940 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
943 /* mark "stuck" area as not stuck */
944 *((volatile unsigned long *)trampoline_base
) = 0;
947 * Cleanup possible dangling ends...
949 smpboot_restore_warm_reset_vector();
954 int __cpuinit
native_cpu_up(unsigned int cpu
)
956 int apicid
= cpu_present_to_apicid(cpu
);
960 WARN_ON(irqs_disabled());
962 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
964 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
965 !physid_isset(apicid
, phys_cpu_present_map
)) {
966 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
971 * Already booted CPU?
973 if (cpu_isset(cpu
, cpu_callin_map
)) {
974 pr_debug("do_boot_cpu %d Already started\n", cpu
);
979 * Save current MTRR state in case it was changed since early boot
980 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
984 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
987 /* init low mem mapping */
988 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
989 min_t(unsigned long, KERNEL_PGD_PTRS
, KERNEL_PGD_BOUNDARY
));
993 err
= do_boot_cpu(apicid
, cpu
);
998 err
= do_boot_cpu(apicid
, cpu
);
1001 pr_debug("do_boot_cpu failed %d\n", err
);
1006 * Check TSC synchronization with the AP (keep irqs disabled
1009 local_irq_save(flags
);
1010 check_tsc_sync_source(cpu
);
1011 local_irq_restore(flags
);
1013 while (!cpu_online(cpu
)) {
1015 touch_nmi_watchdog();
1022 * Fall back to non SMP mode after errors.
1024 * RED-PEN audit/test this more. I bet there is more state messed up here.
1026 static __init
void disable_smp(void)
1028 cpu_present_map
= cpumask_of_cpu(0);
1029 cpu_possible_map
= cpumask_of_cpu(0);
1030 smpboot_clear_io_apic_irqs();
1032 if (smp_found_config
)
1033 physid_set_mask_of_physid(boot_cpu_physical_apicid
, &phys_cpu_present_map
);
1035 physid_set_mask_of_physid(0, &phys_cpu_present_map
);
1036 map_cpu_to_logical_apicid();
1037 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
1038 cpu_set(0, per_cpu(cpu_core_map
, 0));
1042 * Various sanity checks.
1044 static int __init
smp_sanity_check(unsigned max_cpus
)
1047 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
1048 printk(KERN_WARNING
"weird, boot CPU (#%d) not listed"
1049 "by the BIOS.\n", hard_smp_processor_id());
1050 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1054 * If we couldn't find an SMP configuration at boot time,
1055 * get out of here now!
1057 if (!smp_found_config
&& !acpi_lapic
) {
1059 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
1061 if (APIC_init_uniprocessor())
1062 printk(KERN_NOTICE
"Local APIC not detected."
1063 " Using dummy APIC emulation.\n");
1068 * Should not be necessary because the MP table should list the boot
1069 * CPU too, but we do it for the sake of robustness anyway.
1071 if (!check_phys_apicid_present(boot_cpu_physical_apicid
)) {
1073 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1074 boot_cpu_physical_apicid
);
1075 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1080 * If we couldn't find a local APIC, then get out of here now!
1082 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
1084 printk(KERN_ERR
"BIOS bug, local APIC #%d not detected!...\n",
1085 boot_cpu_physical_apicid
);
1086 printk(KERN_ERR
"... forcing use of dummy APIC emulation."
1087 "(tell your hw vendor)\n");
1088 smpboot_clear_io_apic();
1092 verify_local_APIC();
1095 * If SMP should be disabled, then really disable it!
1098 printk(KERN_INFO
"SMP mode deactivated.\n");
1099 smpboot_clear_io_apic();
1101 localise_nmi_watchdog();
1105 end_local_APIC_setup();
1112 static void __init
smp_cpu_index_default(void)
1115 struct cpuinfo_x86
*c
;
1117 for_each_possible_cpu(i
) {
1119 /* mark all to hotplug */
1120 c
->cpu_index
= NR_CPUS
;
1125 * Prepare for SMP bootup. The MP table or ACPI has been read
1126 * earlier. Just do some sanity checking here and enable APIC mode.
1128 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1131 smp_cpu_index_default();
1132 current_cpu_data
= boot_cpu_data
;
1133 cpu_callin_map
= cpumask_of_cpu(0);
1136 * Setup boot CPU information
1138 smp_store_cpu_info(0); /* Final full version of the data */
1139 boot_cpu_logical_apicid
= logical_smp_processor_id();
1140 current_thread_info()->cpu
= 0; /* needed? */
1141 set_cpu_sibling_map(0);
1143 if (smp_sanity_check(max_cpus
) < 0) {
1144 printk(KERN_INFO
"SMP disabled\n");
1150 if (GET_APIC_ID(read_apic_id()) != boot_cpu_physical_apicid
) {
1151 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1152 GET_APIC_ID(read_apic_id()), boot_cpu_physical_apicid
);
1153 /* Or can we switch back to PIC here? */
1160 * Switch from PIC to APIC mode.
1164 #ifdef CONFIG_X86_64
1166 * Enable IO APIC before setting up error vector
1168 if (!skip_ioapic_setup
&& nr_ioapics
)
1171 end_local_APIC_setup();
1173 map_cpu_to_logical_apicid();
1175 setup_portio_remap();
1177 smpboot_setup_io_apic();
1179 * Set up local APIC timer on boot CPU.
1182 printk(KERN_INFO
"CPU%d: ", 0);
1183 print_cpu_info(&cpu_data(0));
1189 * Early setup to make printk work.
1191 void __init
native_smp_prepare_boot_cpu(void)
1193 int me
= smp_processor_id();
1194 #ifdef CONFIG_X86_32
1197 switch_to_new_gdt();
1198 /* already set me in cpu_online_map in boot_cpu_init() */
1199 cpu_set(me
, cpu_callout_map
);
1200 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1203 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1205 pr_debug("Boot done.\n");
1209 #ifdef CONFIG_X86_IO_APIC
1210 setup_ioapic_dest();
1212 check_nmi_watchdog();
1215 #ifdef CONFIG_HOTPLUG_CPU
1217 static void remove_siblinginfo(int cpu
)
1220 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1222 for_each_cpu_mask_nr(sibling
, per_cpu(cpu_core_map
, cpu
)) {
1223 cpu_clear(cpu
, per_cpu(cpu_core_map
, sibling
));
1225 * last thread sibling in this cpu core going down
1227 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1)
1228 cpu_data(sibling
).booted_cores
--;
1231 for_each_cpu_mask_nr(sibling
, per_cpu(cpu_sibling_map
, cpu
))
1232 cpu_clear(cpu
, per_cpu(cpu_sibling_map
, sibling
));
1233 cpus_clear(per_cpu(cpu_sibling_map
, cpu
));
1234 cpus_clear(per_cpu(cpu_core_map
, cpu
));
1235 c
->phys_proc_id
= 0;
1237 cpu_clear(cpu
, cpu_sibling_setup_map
);
1240 static int additional_cpus __initdata
= -1;
1242 static __init
int setup_additional_cpus(char *s
)
1244 return s
&& get_option(&s
, &additional_cpus
) ? 0 : -EINVAL
;
1246 early_param("additional_cpus", setup_additional_cpus
);
1249 * cpu_possible_map should be static, it cannot change as cpu's
1250 * are onlined, or offlined. The reason is per-cpu data-structures
1251 * are allocated by some modules at init time, and dont expect to
1252 * do this dynamically on cpu arrival/departure.
1253 * cpu_present_map on the other hand can change dynamically.
1254 * In case when cpu_hotplug is not compiled, then we resort to current
1255 * behaviour, which is cpu_possible == cpu_present.
1258 * Three ways to find out the number of additional hotplug CPUs:
1259 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1260 * - The user can overwrite it with additional_cpus=NUM
1261 * - Otherwise don't reserve additional CPUs.
1262 * We do this because additional CPUs waste a lot of memory.
1265 __init
void prefill_possible_map(void)
1270 /* no processor from mptable or madt */
1271 if (!num_processors
)
1274 #ifdef CONFIG_HOTPLUG_CPU
1275 if (additional_cpus
== -1) {
1276 if (disabled_cpus
> 0)
1277 additional_cpus
= disabled_cpus
;
1279 additional_cpus
= 0;
1282 additional_cpus
= 0;
1284 possible
= num_processors
+ additional_cpus
;
1285 if (possible
> NR_CPUS
)
1288 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1289 possible
, max_t(int, possible
- num_processors
, 0));
1291 for (i
= 0; i
< possible
; i
++)
1292 cpu_set(i
, cpu_possible_map
);
1294 nr_cpu_ids
= possible
;
1297 static void __ref
remove_cpu_from_maps(int cpu
)
1299 cpu_clear(cpu
, cpu_online_map
);
1300 cpu_clear(cpu
, cpu_callout_map
);
1301 cpu_clear(cpu
, cpu_callin_map
);
1302 /* was set by cpu_init() */
1303 cpu_clear(cpu
, cpu_initialized
);
1304 numa_remove_cpu(cpu
);
1307 int __cpu_disable(void)
1309 int cpu
= smp_processor_id();
1312 * Perhaps use cpufreq to drop frequency, but that could go
1313 * into generic code.
1315 * We won't take down the boot processor on i386 due to some
1316 * interrupts only being able to be serviced by the BSP.
1317 * Especially so if we're not using an IOAPIC -zwane
1322 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1323 stop_apic_nmi_watchdog(NULL
);
1328 * Allow any queued timer interrupts to get serviced
1329 * This is only a temporary solution until we cleanup
1330 * fixup_irqs as we do for IA64.
1335 local_irq_disable();
1336 remove_siblinginfo(cpu
);
1338 /* It's now safe to remove this processor from the online map */
1339 remove_cpu_from_maps(cpu
);
1340 fixup_irqs(cpu_online_map
);
1344 void __cpu_die(unsigned int cpu
)
1346 /* We don't do anything here: idle task is faking death itself. */
1349 for (i
= 0; i
< 10; i
++) {
1350 /* They ack this in play_dead by setting CPU_DEAD */
1351 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1352 printk(KERN_INFO
"CPU %d is now offline\n", cpu
);
1353 if (1 == num_online_cpus())
1354 alternatives_smp_switch(0);
1359 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
1361 #else /* ... !CONFIG_HOTPLUG_CPU */
1362 int __cpu_disable(void)
1367 void __cpu_die(unsigned int cpu
)
1369 /* We said "no" in __cpu_disable */
1375 * If the BIOS enumerates physical processors before logical,
1376 * maxcpus=N at enumeration-time can be used to disable HT.
1378 static int __init
parse_maxcpus(char *arg
)
1380 extern unsigned int maxcpus
;
1383 maxcpus
= simple_strtoul(arg
, NULL
, 0);
1386 early_param("maxcpus", parse_maxcpus
);