x86, apic: remove genapic.h
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / kernel / reboot.c
1 #include <linux/module.h>
2 #include <linux/reboot.h>
3 #include <linux/init.h>
4 #include <linux/pm.h>
5 #include <linux/efi.h>
6 #include <acpi/reboot.h>
7 #include <asm/io.h>
8 #include <asm/apic.h>
9 #include <asm/desc.h>
10 #include <asm/hpet.h>
11 #include <asm/pgtable.h>
12 #include <asm/proto.h>
13 #include <asm/reboot_fixups.h>
14 #include <asm/reboot.h>
15 #include <asm/pci_x86.h>
16 #include <asm/virtext.h>
17 #include <asm/cpu.h>
18
19 #ifdef CONFIG_X86_32
20 # include <linux/dmi.h>
21 # include <linux/ctype.h>
22 # include <linux/mc146818rtc.h>
23 #else
24 # include <asm/iommu.h>
25 #endif
26
27 #include <asm/apic.h>
28
29 /*
30 * Power off function, if any
31 */
32 void (*pm_power_off)(void);
33 EXPORT_SYMBOL(pm_power_off);
34
35 static const struct desc_ptr no_idt = {};
36 static int reboot_mode;
37 enum reboot_type reboot_type = BOOT_KBD;
38 int reboot_force;
39
40 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
41 static int reboot_cpu = -1;
42 #endif
43
44 /* This is set if we need to go through the 'emergency' path.
45 * When machine_emergency_restart() is called, we may be on
46 * an inconsistent state and won't be able to do a clean cleanup
47 */
48 static int reboot_emergency;
49
50 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */
51 bool port_cf9_safe = false;
52
53 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
54 warm Don't set the cold reboot flag
55 cold Set the cold reboot flag
56 bios Reboot by jumping through the BIOS (only for X86_32)
57 smp Reboot by executing reset on BSP or other CPU (only for X86_32)
58 triple Force a triple fault (init)
59 kbd Use the keyboard controller. cold reset (default)
60 acpi Use the RESET_REG in the FADT
61 efi Use efi reset_system runtime service
62 pci Use the so-called "PCI reset register", CF9
63 force Avoid anything that could hang.
64 */
65 static int __init reboot_setup(char *str)
66 {
67 for (;;) {
68 switch (*str) {
69 case 'w':
70 reboot_mode = 0x1234;
71 break;
72
73 case 'c':
74 reboot_mode = 0;
75 break;
76
77 #ifdef CONFIG_X86_32
78 #ifdef CONFIG_SMP
79 case 's':
80 if (isdigit(*(str+1))) {
81 reboot_cpu = (int) (*(str+1) - '0');
82 if (isdigit(*(str+2)))
83 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
84 }
85 /* we will leave sorting out the final value
86 when we are ready to reboot, since we might not
87 have set up boot_cpu_id or smp_num_cpu */
88 break;
89 #endif /* CONFIG_SMP */
90
91 case 'b':
92 #endif
93 case 'a':
94 case 'k':
95 case 't':
96 case 'e':
97 case 'p':
98 reboot_type = *str;
99 break;
100
101 case 'f':
102 reboot_force = 1;
103 break;
104 }
105
106 str = strchr(str, ',');
107 if (str)
108 str++;
109 else
110 break;
111 }
112 return 1;
113 }
114
115 __setup("reboot=", reboot_setup);
116
117
118 #ifdef CONFIG_X86_32
119 /*
120 * Reboot options and system auto-detection code provided by
121 * Dell Inc. so their systems "just work". :-)
122 */
123
124 /*
125 * Some machines require the "reboot=b" commandline option,
126 * this quirk makes that automatic.
127 */
128 static int __init set_bios_reboot(const struct dmi_system_id *d)
129 {
130 if (reboot_type != BOOT_BIOS) {
131 reboot_type = BOOT_BIOS;
132 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
133 }
134 return 0;
135 }
136
137 static struct dmi_system_id __initdata reboot_dmi_table[] = {
138 { /* Handle problems with rebooting on Dell E520's */
139 .callback = set_bios_reboot,
140 .ident = "Dell E520",
141 .matches = {
142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
143 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
144 },
145 },
146 { /* Handle problems with rebooting on Dell 1300's */
147 .callback = set_bios_reboot,
148 .ident = "Dell PowerEdge 1300",
149 .matches = {
150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
152 },
153 },
154 { /* Handle problems with rebooting on Dell 300's */
155 .callback = set_bios_reboot,
156 .ident = "Dell PowerEdge 300",
157 .matches = {
158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
159 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
160 },
161 },
162 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
163 .callback = set_bios_reboot,
164 .ident = "Dell OptiPlex 745",
165 .matches = {
166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
168 },
169 },
170 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/
171 .callback = set_bios_reboot,
172 .ident = "Dell OptiPlex 745",
173 .matches = {
174 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
175 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
176 DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
177 },
178 },
179 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
180 .callback = set_bios_reboot,
181 .ident = "Dell OptiPlex 745",
182 .matches = {
183 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
184 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
185 DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
186 },
187 },
188 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
189 .callback = set_bios_reboot,
190 .ident = "Dell OptiPlex 330",
191 .matches = {
192 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
193 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
194 DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
195 },
196 },
197 { /* Handle problems with rebooting on Dell 2400's */
198 .callback = set_bios_reboot,
199 .ident = "Dell PowerEdge 2400",
200 .matches = {
201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
202 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
203 },
204 },
205 { /* Handle problems with rebooting on Dell T5400's */
206 .callback = set_bios_reboot,
207 .ident = "Dell Precision T5400",
208 .matches = {
209 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
210 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
211 },
212 },
213 { /* Handle problems with rebooting on HP laptops */
214 .callback = set_bios_reboot,
215 .ident = "HP Compaq Laptop",
216 .matches = {
217 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
218 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
219 },
220 },
221 { }
222 };
223
224 static int __init reboot_init(void)
225 {
226 dmi_check_system(reboot_dmi_table);
227 return 0;
228 }
229 core_initcall(reboot_init);
230
231 /* The following code and data reboots the machine by switching to real
232 mode and jumping to the BIOS reset entry point, as if the CPU has
233 really been reset. The previous version asked the keyboard
234 controller to pulse the CPU reset line, which is more thorough, but
235 doesn't work with at least one type of 486 motherboard. It is easy
236 to stop this code working; hence the copious comments. */
237 static const unsigned long long
238 real_mode_gdt_entries [3] =
239 {
240 0x0000000000000000ULL, /* Null descriptor */
241 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
242 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
243 };
244
245 static const struct desc_ptr
246 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
247 real_mode_idt = { 0x3ff, 0 };
248
249 /* This is 16-bit protected mode code to disable paging and the cache,
250 switch to real mode and jump to the BIOS reset code.
251
252 The instruction that switches to real mode by writing to CR0 must be
253 followed immediately by a far jump instruction, which set CS to a
254 valid value for real mode, and flushes the prefetch queue to avoid
255 running instructions that have already been decoded in protected
256 mode.
257
258 Clears all the flags except ET, especially PG (paging), PE
259 (protected-mode enable) and TS (task switch for coprocessor state
260 save). Flushes the TLB after paging has been disabled. Sets CD and
261 NW, to disable the cache on a 486, and invalidates the cache. This
262 is more like the state of a 486 after reset. I don't know if
263 something else should be done for other chips.
264
265 More could be done here to set up the registers as if a CPU reset had
266 occurred; hopefully real BIOSs don't assume much. */
267 static const unsigned char real_mode_switch [] =
268 {
269 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
270 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
271 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
272 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
273 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
274 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
275 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
276 0x74, 0x02, /* jz f */
277 0x0f, 0x09, /* wbinvd */
278 0x24, 0x10, /* f: andb $0x10,al */
279 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
280 };
281 static const unsigned char jump_to_bios [] =
282 {
283 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
284 };
285
286 /*
287 * Switch to real mode and then execute the code
288 * specified by the code and length parameters.
289 * We assume that length will aways be less that 100!
290 */
291 void machine_real_restart(const unsigned char *code, int length)
292 {
293 local_irq_disable();
294
295 /* Write zero to CMOS register number 0x0f, which the BIOS POST
296 routine will recognize as telling it to do a proper reboot. (Well
297 that's what this book in front of me says -- it may only apply to
298 the Phoenix BIOS though, it's not clear). At the same time,
299 disable NMIs by setting the top bit in the CMOS address register,
300 as we're about to do peculiar things to the CPU. I'm not sure if
301 `outb_p' is needed instead of just `outb'. Use it to be on the
302 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
303 */
304 spin_lock(&rtc_lock);
305 CMOS_WRITE(0x00, 0x8f);
306 spin_unlock(&rtc_lock);
307
308 /* Remap the kernel at virtual address zero, as well as offset zero
309 from the kernel segment. This assumes the kernel segment starts at
310 virtual address PAGE_OFFSET. */
311 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
312 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
313
314 /*
315 * Use `swapper_pg_dir' as our page directory.
316 */
317 load_cr3(swapper_pg_dir);
318
319 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
320 this on booting to tell it to "Bypass memory test (also warm
321 boot)". This seems like a fairly standard thing that gets set by
322 REBOOT.COM programs, and the previous reset routine did this
323 too. */
324 *((unsigned short *)0x472) = reboot_mode;
325
326 /* For the switch to real mode, copy some code to low memory. It has
327 to be in the first 64k because it is running in 16-bit mode, and it
328 has to have the same physical and virtual address, because it turns
329 off paging. Copy it near the end of the first page, out of the way
330 of BIOS variables. */
331 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
332 real_mode_switch, sizeof (real_mode_switch));
333 memcpy((void *)(0x1000 - 100), code, length);
334
335 /* Set up the IDT for real mode. */
336 load_idt(&real_mode_idt);
337
338 /* Set up a GDT from which we can load segment descriptors for real
339 mode. The GDT is not used in real mode; it is just needed here to
340 prepare the descriptors. */
341 load_gdt(&real_mode_gdt);
342
343 /* Load the data segment registers, and thus the descriptors ready for
344 real mode. The base address of each segment is 0x100, 16 times the
345 selector value being loaded here. This is so that the segment
346 registers don't have to be reloaded after switching to real mode:
347 the values are consistent for real mode operation already. */
348 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
349 "\tmovl %%eax,%%ds\n"
350 "\tmovl %%eax,%%es\n"
351 "\tmovl %%eax,%%fs\n"
352 "\tmovl %%eax,%%gs\n"
353 "\tmovl %%eax,%%ss" : : : "eax");
354
355 /* Jump to the 16-bit code that we copied earlier. It disables paging
356 and the cache, switches to real mode, and jumps to the BIOS reset
357 entry point. */
358 __asm__ __volatile__ ("ljmp $0x0008,%0"
359 :
360 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
361 }
362 #ifdef CONFIG_APM_MODULE
363 EXPORT_SYMBOL(machine_real_restart);
364 #endif
365
366 #endif /* CONFIG_X86_32 */
367
368 static inline void kb_wait(void)
369 {
370 int i;
371
372 for (i = 0; i < 0x10000; i++) {
373 if ((inb(0x64) & 0x02) == 0)
374 break;
375 udelay(2);
376 }
377 }
378
379 static void vmxoff_nmi(int cpu, struct die_args *args)
380 {
381 cpu_emergency_vmxoff();
382 }
383
384 /* Use NMIs as IPIs to tell all CPUs to disable virtualization
385 */
386 static void emergency_vmx_disable_all(void)
387 {
388 /* Just make sure we won't change CPUs while doing this */
389 local_irq_disable();
390
391 /* We need to disable VMX on all CPUs before rebooting, otherwise
392 * we risk hanging up the machine, because the CPU ignore INIT
393 * signals when VMX is enabled.
394 *
395 * We can't take any locks and we may be on an inconsistent
396 * state, so we use NMIs as IPIs to tell the other CPUs to disable
397 * VMX and halt.
398 *
399 * For safety, we will avoid running the nmi_shootdown_cpus()
400 * stuff unnecessarily, but we don't have a way to check
401 * if other CPUs have VMX enabled. So we will call it only if the
402 * CPU we are running on has VMX enabled.
403 *
404 * We will miss cases where VMX is not enabled on all CPUs. This
405 * shouldn't do much harm because KVM always enable VMX on all
406 * CPUs anyway. But we can miss it on the small window where KVM
407 * is still enabling VMX.
408 */
409 if (cpu_has_vmx() && cpu_vmx_enabled()) {
410 /* Disable VMX on this CPU.
411 */
412 cpu_vmxoff();
413
414 /* Halt and disable VMX on the other CPUs */
415 nmi_shootdown_cpus(vmxoff_nmi);
416
417 }
418 }
419
420
421 void __attribute__((weak)) mach_reboot_fixups(void)
422 {
423 }
424
425 static void native_machine_emergency_restart(void)
426 {
427 int i;
428
429 if (reboot_emergency)
430 emergency_vmx_disable_all();
431
432 /* Tell the BIOS if we want cold or warm reboot */
433 *((unsigned short *)__va(0x472)) = reboot_mode;
434
435 for (;;) {
436 /* Could also try the reset bit in the Hammer NB */
437 switch (reboot_type) {
438 case BOOT_KBD:
439 mach_reboot_fixups(); /* for board specific fixups */
440
441 for (i = 0; i < 10; i++) {
442 kb_wait();
443 udelay(50);
444 outb(0xfe, 0x64); /* pulse reset low */
445 udelay(50);
446 }
447
448 case BOOT_TRIPLE:
449 load_idt(&no_idt);
450 __asm__ __volatile__("int3");
451
452 reboot_type = BOOT_KBD;
453 break;
454
455 #ifdef CONFIG_X86_32
456 case BOOT_BIOS:
457 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
458
459 reboot_type = BOOT_KBD;
460 break;
461 #endif
462
463 case BOOT_ACPI:
464 acpi_reboot();
465 reboot_type = BOOT_KBD;
466 break;
467
468 case BOOT_EFI:
469 if (efi_enabled)
470 efi.reset_system(reboot_mode ?
471 EFI_RESET_WARM :
472 EFI_RESET_COLD,
473 EFI_SUCCESS, 0, NULL);
474 reboot_type = BOOT_KBD;
475 break;
476
477 case BOOT_CF9:
478 port_cf9_safe = true;
479 /* fall through */
480
481 case BOOT_CF9_COND:
482 if (port_cf9_safe) {
483 u8 cf9 = inb(0xcf9) & ~6;
484 outb(cf9|2, 0xcf9); /* Request hard reset */
485 udelay(50);
486 outb(cf9|6, 0xcf9); /* Actually do the reset */
487 udelay(50);
488 }
489 reboot_type = BOOT_KBD;
490 break;
491 }
492 }
493 }
494
495 void native_machine_shutdown(void)
496 {
497 /* Stop the cpus and apics */
498 #ifdef CONFIG_SMP
499
500 /* The boot cpu is always logical cpu 0 */
501 int reboot_cpu_id = 0;
502
503 #ifdef CONFIG_X86_32
504 /* See if there has been given a command line override */
505 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
506 cpu_online(reboot_cpu))
507 reboot_cpu_id = reboot_cpu;
508 #endif
509
510 /* Make certain the cpu I'm about to reboot on is online */
511 if (!cpu_online(reboot_cpu_id))
512 reboot_cpu_id = smp_processor_id();
513
514 /* Make certain I only run on the appropriate processor */
515 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
516
517 /* O.K Now that I'm on the appropriate processor,
518 * stop all of the others.
519 */
520 smp_send_stop();
521 #endif
522
523 lapic_shutdown();
524
525 #ifdef CONFIG_X86_IO_APIC
526 disable_IO_APIC();
527 #endif
528
529 #ifdef CONFIG_HPET_TIMER
530 hpet_disable();
531 #endif
532
533 #ifdef CONFIG_X86_64
534 pci_iommu_shutdown();
535 #endif
536 }
537
538 static void __machine_emergency_restart(int emergency)
539 {
540 reboot_emergency = emergency;
541 machine_ops.emergency_restart();
542 }
543
544 static void native_machine_restart(char *__unused)
545 {
546 printk("machine restart\n");
547
548 if (!reboot_force)
549 machine_shutdown();
550 __machine_emergency_restart(0);
551 }
552
553 static void native_machine_halt(void)
554 {
555 /* stop other cpus and apics */
556 machine_shutdown();
557
558 /* stop this cpu */
559 stop_this_cpu(NULL);
560 }
561
562 static void native_machine_power_off(void)
563 {
564 if (pm_power_off) {
565 if (!reboot_force)
566 machine_shutdown();
567 pm_power_off();
568 }
569 }
570
571 struct machine_ops machine_ops = {
572 .power_off = native_machine_power_off,
573 .shutdown = native_machine_shutdown,
574 .emergency_restart = native_machine_emergency_restart,
575 .restart = native_machine_restart,
576 .halt = native_machine_halt,
577 #ifdef CONFIG_KEXEC
578 .crash_shutdown = native_machine_crash_shutdown,
579 #endif
580 };
581
582 void machine_power_off(void)
583 {
584 machine_ops.power_off();
585 }
586
587 void machine_shutdown(void)
588 {
589 machine_ops.shutdown();
590 }
591
592 void machine_emergency_restart(void)
593 {
594 __machine_emergency_restart(1);
595 }
596
597 void machine_restart(char *cmd)
598 {
599 machine_ops.restart(cmd);
600 }
601
602 void machine_halt(void)
603 {
604 machine_ops.halt();
605 }
606
607 #ifdef CONFIG_KEXEC
608 void machine_crash_shutdown(struct pt_regs *regs)
609 {
610 machine_ops.crash_shutdown(regs);
611 }
612 #endif
613
614
615 #if defined(CONFIG_SMP)
616
617 /* This keeps a track of which one is crashing cpu. */
618 static int crashing_cpu;
619 static nmi_shootdown_cb shootdown_callback;
620
621 static atomic_t waiting_for_crash_ipi;
622
623 static int crash_nmi_callback(struct notifier_block *self,
624 unsigned long val, void *data)
625 {
626 int cpu;
627
628 if (val != DIE_NMI_IPI)
629 return NOTIFY_OK;
630
631 cpu = raw_smp_processor_id();
632
633 /* Don't do anything if this handler is invoked on crashing cpu.
634 * Otherwise, system will completely hang. Crashing cpu can get
635 * an NMI if system was initially booted with nmi_watchdog parameter.
636 */
637 if (cpu == crashing_cpu)
638 return NOTIFY_STOP;
639 local_irq_disable();
640
641 shootdown_callback(cpu, (struct die_args *)data);
642
643 atomic_dec(&waiting_for_crash_ipi);
644 /* Assume hlt works */
645 halt();
646 for (;;)
647 cpu_relax();
648
649 return 1;
650 }
651
652 static void smp_send_nmi_allbutself(void)
653 {
654 apic->send_IPI_allbutself(NMI_VECTOR);
655 }
656
657 static struct notifier_block crash_nmi_nb = {
658 .notifier_call = crash_nmi_callback,
659 };
660
661 /* Halt all other CPUs, calling the specified function on each of them
662 *
663 * This function can be used to halt all other CPUs on crash
664 * or emergency reboot time. The function passed as parameter
665 * will be called inside a NMI handler on all CPUs.
666 */
667 void nmi_shootdown_cpus(nmi_shootdown_cb callback)
668 {
669 unsigned long msecs;
670 local_irq_disable();
671
672 /* Make a note of crashing cpu. Will be used in NMI callback.*/
673 crashing_cpu = safe_smp_processor_id();
674
675 shootdown_callback = callback;
676
677 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
678 /* Would it be better to replace the trap vector here? */
679 if (register_die_notifier(&crash_nmi_nb))
680 return; /* return what? */
681 /* Ensure the new callback function is set before sending
682 * out the NMI
683 */
684 wmb();
685
686 smp_send_nmi_allbutself();
687
688 msecs = 1000; /* Wait at most a second for the other cpus to stop */
689 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
690 mdelay(1);
691 msecs--;
692 }
693
694 /* Leave the nmi callback set */
695 }
696 #else /* !CONFIG_SMP */
697 void nmi_shootdown_cpus(nmi_shootdown_cb callback)
698 {
699 /* No other CPUs to shoot down */
700 }
701 #endif