arch/x86/kernel/cpu/cpufreq/gx-suspmod.c

   1 /*
   2  *      Cyrix MediaGX and NatSemi Geode Suspend Modulation
   3  *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
   4  *      (C) 2002 Hiroshi Miura   <miura@da-cha.org>
   5  *      All Rights Reserved
   6  *
   7  *      This program is free software; you can redistribute it and/or
   8  *      modify it under the terms of the GNU General Public License
   9  *      version 2 as published by the Free Software Foundation
  10  *
  11  *      The author(s) of this software shall not be held liable for damages
  12  *      of any nature resulting due to the use of this software. This
  13  *      software is provided AS-IS with no warranties.
  14  *
  15  * Theoretical note:
  16  *
  17  *      (see Geode(tm) CS5530 manual (rev.4.1) page.56)
  18  *
  19  *      CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
  20  *      are based on Suspend Modulation.
  21  *
  22  *      Suspend Modulation works by asserting and de-asserting the SUSP# pin
  23  *      to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
  24  *      the CPU enters an idle state. GX1 stops its core clock when SUSP# is
  25  *      asserted then power consumption is reduced.
  26  *
  27  *      Suspend Modulation's OFF/ON duration are configurable
  28  *      with 'Suspend Modulation OFF Count Register'
  29  *      and 'Suspend Modulation ON Count Register'.
  30  *      These registers are 8bit counters that represent the number of
  31  *      32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
  32  *      to the processor.
  33  *
  34  *      These counters define a ratio which is the effective frequency
  35  *      of operation of the system.
  36  *
  37  *                             OFF Count
  38  *      F_eff = Fgx * ----------------------
  39  *                      OFF Count + ON Count
  40  *
  41  *      0 <= On Count, Off Count <= 255
  42  *
  43  *      From these limits, we can get register values
  44  *
  45  *      off_duration + on_duration <= MAX_DURATION
  46  *      on_duration = off_duration * (stock_freq - freq) / freq
  47  *
  48  *      off_duration  =  (freq * DURATION) / stock_freq
  49  *      on_duration = DURATION - off_duration
  50  *
  51  *
  52  *---------------------------------------------------------------------------
  53  *
  54  * ChangeLog:
  55  *      Dec. 12, 2003   Hiroshi Miura <miura@da-cha.org>
  56  *              - fix on/off register mistake
  57  *              - fix cpu_khz calc when it stops cpu modulation.
  58  *
  59  *      Dec. 11, 2002   Hiroshi Miura <miura@da-cha.org>
  60  *              - rewrite for Cyrix MediaGX Cx5510/5520 and
  61  *                NatSemi Geode Cs5530(A).
  62  *
  63  *      Jul. ??, 2002  Zwane Mwaikambo <zwane@commfireservices.com>
  64  *              - cs5530_mod patch for 2.4.19-rc1.
  65  *
  66  *---------------------------------------------------------------------------
  67  *
  68  * Todo
  69  *      Test on machines with 5510, 5530, 5530A
  70  */
  71
  72 /************************************************************************
  73  *                      Suspend Modulation - Definitions                *
  74  ************************************************************************/
  75
  76 #include <linux/kernel.h>
  77 #include <linux/module.h>
  78 #include <linux/init.h>
  79 #include <linux/smp.h>
  80 #include <linux/cpufreq.h>
  81 #include <linux/pci.h>
  82 #include <linux/errno.h>
  83 #include <linux/slab.h>
  84
  85 #include <asm/processor-cyrix.h>
  86
  87 /* PCI config registers, all at F0 */
  88 #define PCI_PMER1       0x80    /* power management enable register 1 */
  89 #define PCI_PMER2       0x81    /* power management enable register 2 */
  90 #define PCI_PMER3       0x82    /* power management enable register 3 */
  91 #define PCI_IRQTC       0x8c    /* irq speedup timer counter register:typical 2 to 4ms */
  92 #define PCI_VIDTC       0x8d    /* video speedup timer counter register: typical 50 to 100ms */
  93 #define PCI_MODOFF      0x94    /* suspend modulation OFF counter register, 1 = 32us */
  94 #define PCI_MODON       0x95    /* suspend modulation ON counter register */
  95 #define PCI_SUSCFG      0x96    /* suspend configuration register */
  96
  97 /* PMER1 bits */
  98 #define GPM             (1<<0)  /* global power management */
  99 #define GIT             (1<<1)  /* globally enable PM device idle timers */
 100 #define GTR             (1<<2)  /* globally enable IO traps */
 101 #define IRQ_SPDUP       (1<<3)  /* disable clock throttle during interrupt handling */
 102 #define VID_SPDUP       (1<<4)  /* disable clock throttle during vga video handling */
 103
 104 /* SUSCFG bits */
 105 #define SUSMOD          (1<<0)  /* enable/disable suspend modulation */
 106 /* the below is supported only with cs5530 (after rev.1.2)/cs5530A */
 107 #define SMISPDUP        (1<<1)  /* select how SMI re-enable suspend modulation: */
 108                                 /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
 109 #define SUSCFG          (1<<2)  /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
 110 /* the below is supported only with cs5530A */
 111 #define PWRSVE_ISA      (1<<3)  /* stop ISA clock  */
 112 #define PWRSVE          (1<<4)  /* active idle */
 113
 114 struct gxfreq_params {
 115         u8 on_duration;
 116         u8 off_duration;
 117         u8 pci_suscfg;
 118         u8 pci_pmer1;
 119         u8 pci_pmer2;
 120         struct pci_dev *cs55x0;
 121 };
 122
 123 static struct gxfreq_params *gx_params;
 124 static int stock_freq;
 125
 126 /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
 127 static int pci_busclk;
 128 module_param(pci_busclk, int, 0444);
 129
 130 /* maximum duration for which the cpu may be suspended
 131  * (32us * MAX_DURATION). If no parameter is given, this defaults
 132  * to 255.
 133  * Note that this leads to a maximum of 8 ms(!) where the CPU clock
 134  * is suspended -- processing power is just 0.39% of what it used to be,
 135  * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
 136 static int max_duration = 255;
 137 module_param(max_duration, int, 0444);
 138
 139 /* For the default policy, we want at least some processing power
 140  * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
 141  */
 142 #define POLICY_MIN_DIV 20
 143
 144
 145 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
 146                 "gx-suspmod", msg)
 147
 148 /**
 149  * we can detect a core multipiler from dir0_lsb
 150  * from GX1 datasheet p.56,
 151  *      MULT[3:0]:
 152  *      0000 = SYSCLK multiplied by 4 (test only)
 153  *      0001 = SYSCLK multiplied by 10
 154  *      0010 = SYSCLK multiplied by 4
 155  *      0011 = SYSCLK multiplied by 6
 156  *      0100 = SYSCLK multiplied by 9
 157  *      0101 = SYSCLK multiplied by 5
 158  *      0110 = SYSCLK multiplied by 7
 159  *      0111 = SYSCLK multiplied by 8
 160  *              of 33.3MHz
 161  **/
 162 static int gx_freq_mult[16] = {
 163                 4, 10, 4, 6, 9, 5, 7, 8,
 164                 0, 0, 0, 0, 0, 0, 0, 0
 165 };
 166
 167
 168 /****************************************************************
 169  *      Low Level chipset interface                             *
 170  ****************************************************************/
 171 static struct pci_device_id gx_chipset_tbl[] __initdata = {
 172         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY,
 173                 PCI_ANY_ID, PCI_ANY_ID },
 174         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520,
 175                 PCI_ANY_ID, PCI_ANY_ID },
 176         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510,
 177                 PCI_ANY_ID, PCI_ANY_ID },
 178         { 0, },
 179 };
 180
 181 static void gx_write_byte(int reg, int value)
 182 {
 183         pci_write_config_byte(gx_params->cs55x0, reg, value);
 184 }
 185
 186 /**
 187  * gx_detect_chipset:
 188  *
 189  **/
 190 static __init struct pci_dev *gx_detect_chipset(void)
 191 {
 192         struct pci_dev *gx_pci = NULL;
 193
 194         /* check if CPU is a MediaGX or a Geode. */
 195         if ((boot_cpu_data.x86_vendor != X86_VENDOR_NSC) &&
 196             (boot_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) {
 197                 dprintk("error: no MediaGX/Geode processor found!\n");
 198                 return NULL;
 199         }
 200
 201         /* detect which companion chip is used */
 202         while ((gx_pci = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) {
 203                 if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
 204                         return gx_pci;
 205         }
 206
 207         dprintk("error: no supported chipset found!\n");
 208         return NULL;
 209 }
 210
 211 /**
 212  * gx_get_cpuspeed:
 213  *
 214  * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
 215  * Geode CPU runs.
 216  */
 217 static unsigned int gx_get_cpuspeed(unsigned int cpu)
 218 {
 219         if ((gx_params->pci_suscfg & SUSMOD) == 0)
 220                 return stock_freq;
 221
 222         return (stock_freq * gx_params->off_duration)
 223                 / (gx_params->on_duration + gx_params->off_duration);
 224 }
 225
 226 /**
 227  *      gx_validate_speed:
 228  *      determine current cpu speed
 229  *
 230  **/
 231
 232 static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
 233                 u8 *off_duration)
 234 {
 235         unsigned int i;
 236         u8 tmp_on, tmp_off;
 237         int old_tmp_freq = stock_freq;
 238         int tmp_freq;
 239
 240         *off_duration = 1;
 241         *on_duration = 0;
 242
 243         for (i = max_duration; i > 0; i--) {
 244                 tmp_off = ((khz * i) / stock_freq) & 0xff;
 245                 tmp_on = i - tmp_off;
 246                 tmp_freq = (stock_freq * tmp_off) / i;
 247                 /* if this relation is closer to khz, use this. If it's equal,
 248                  * prefer it, too - lower latency */
 249                 if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
 250                         *on_duration = tmp_on;
 251                         *off_duration = tmp_off;
 252                         old_tmp_freq = tmp_freq;
 253                 }
 254         }
 255
 256         return old_tmp_freq;
 257 }
 258
 259
 260 /**
 261  * gx_set_cpuspeed:
 262  * set cpu speed in khz.
 263  **/
 264
 265 static void gx_set_cpuspeed(unsigned int khz)
 266 {
 267         u8 suscfg, pmer1;
 268         unsigned int new_khz;
 269         unsigned long flags;
 270         struct cpufreq_freqs freqs;
 271
 272         freqs.cpu = 0;
 273         freqs.old = gx_get_cpuspeed(0);
 274
 275         new_khz = gx_validate_speed(khz, &gx_params->on_duration,
 276                         &gx_params->off_duration);
 277
 278         freqs.new = new_khz;
 279
 280         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 281         local_irq_save(flags);
 282
 283
 284
 285         if (new_khz != stock_freq) {
 286                 /* if new khz == 100% of CPU speed, it is special case */
 287                 switch (gx_params->cs55x0->device) {
 288                 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
 289                         pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
 290                         /* FIXME: need to test other values -- Zwane,Miura */
 291                         /* typical 2 to 4ms */
 292                         gx_write_byte(PCI_IRQTC, 4);
 293                         /* typical 50 to 100ms */
 294                         gx_write_byte(PCI_VIDTC, 100);
 295                         gx_write_byte(PCI_PMER1, pmer1);
 296
 297                         if (gx_params->cs55x0->revision < 0x10) {
 298                                 /* CS5530(rev 1.2, 1.3) */
 299                                 suscfg = gx_params->pci_suscfg|SUSMOD;
 300                         } else {
 301                                 /* CS5530A,B.. */
 302                                 suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
 303                         }
 304                         break;
 305                 case PCI_DEVICE_ID_CYRIX_5520:
 306                 case PCI_DEVICE_ID_CYRIX_5510:
 307                         suscfg = gx_params->pci_suscfg | SUSMOD;
 308                         break;
 309                 default:
 310                         local_irq_restore(flags);
 311                         dprintk("fatal: try to set unknown chipset.\n");
 312                         return;
 313                 }
 314         } else {
 315                 suscfg = gx_params->pci_suscfg & ~(SUSMOD);
 316                 gx_params->off_duration = 0;
 317                 gx_params->on_duration = 0;
 318                 dprintk("suspend modulation disabled: cpu runs 100%% speed.\n");
 319         }
 320
 321         gx_write_byte(PCI_MODOFF, gx_params->off_duration);
 322         gx_write_byte(PCI_MODON, gx_params->on_duration);
 323
 324         gx_write_byte(PCI_SUSCFG, suscfg);
 325         pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
 326
 327         local_irq_restore(flags);
 328
 329         gx_params->pci_suscfg = suscfg;
 330
 331         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 332
 333         dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
 334                 gx_params->on_duration * 32, gx_params->off_duration * 32);
 335         dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
 336 }
 337
 338 /****************************************************************
 339  *             High level functions                             *
 340  ****************************************************************/
 341
 342 /*
 343  *      cpufreq_gx_verify: test if frequency range is valid
 344  *
 345  *      This function checks if a given frequency range in kHz is valid
 346  *      for the hardware supported by the driver.
 347  */
 348
 349 static int cpufreq_gx_verify(struct cpufreq_policy *policy)
 350 {
 351         unsigned int tmp_freq = 0;
 352         u8 tmp1, tmp2;
 353
 354         if (!stock_freq || !policy)
 355                 return -EINVAL;
 356
 357         policy->cpu = 0;
 358         cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
 359                         stock_freq);
 360
 361         /* it needs to be assured that at least one supported frequency is
 362          * within policy->min and policy->max. If it is not, policy->max
 363          * needs to be increased until one freuqency is supported.
 364          * policy->min may not be decreased, though. This way we guarantee a
 365          * specific processing capacity.
 366          */
 367         tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
 368         if (tmp_freq < policy->min)
 369                 tmp_freq += stock_freq / max_duration;
 370         policy->min = tmp_freq;
 371         if (policy->min > policy->max)
 372                 policy->max = tmp_freq;
 373         tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
 374         if (tmp_freq > policy->max)
 375                 tmp_freq -= stock_freq / max_duration;
 376         policy->max = tmp_freq;
 377         if (policy->max < policy->min)
 378                 policy->max = policy->min;
 379         cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
 380                         stock_freq);
 381
 382         return 0;
 383 }
 384
 385 /*
 386  *      cpufreq_gx_target:
 387  *
 388  */
 389 static int cpufreq_gx_target(struct cpufreq_policy *policy,
 390                              unsigned int target_freq,
 391                              unsigned int relation)
 392 {
 393         u8 tmp1, tmp2;
 394         unsigned int tmp_freq;
 395
 396         if (!stock_freq || !policy)
 397                 return -EINVAL;
 398
 399         policy->cpu = 0;
 400
 401         tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
 402         while (tmp_freq < policy->min) {
 403                 tmp_freq += stock_freq / max_duration;
 404                 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
 405         }
 406         while (tmp_freq > policy->max) {
 407                 tmp_freq -= stock_freq / max_duration;
 408                 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
 409         }
 410
 411         gx_set_cpuspeed(tmp_freq);
 412
 413         return 0;
 414 }
 415
 416 static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
 417 {
 418         unsigned int maxfreq, curfreq;
 419
 420         if (!policy || policy->cpu != 0)
 421                 return -ENODEV;
 422
 423         /* determine maximum frequency */
 424         if (pci_busclk)
 425                 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
 426         else if (cpu_khz)
 427                 maxfreq = cpu_khz;
 428         else
 429                 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
 430
 431         stock_freq = maxfreq;
 432         curfreq = gx_get_cpuspeed(0);
 433
 434         dprintk("cpu max frequency is %d.\n", maxfreq);
 435         dprintk("cpu current frequency is %dkHz.\n", curfreq);
 436
 437         /* setup basic struct for cpufreq API */
 438         policy->cpu = 0;
 439
 440         if (max_duration < POLICY_MIN_DIV)
 441                 policy->min = maxfreq / max_duration;
 442         else
 443                 policy->min = maxfreq / POLICY_MIN_DIV;
 444         policy->max = maxfreq;
 445         policy->cur = curfreq;
 446         policy->cpuinfo.min_freq = maxfreq / max_duration;
 447         policy->cpuinfo.max_freq = maxfreq;
 448         policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
 449
 450         return 0;
 451 }
 452
 453 /*
 454  * cpufreq_gx_init:
 455  *   MediaGX/Geode GX initialize cpufreq driver
 456  */
 457 static struct cpufreq_driver gx_suspmod_driver = {
 458         .get            = gx_get_cpuspeed,
 459         .verify         = cpufreq_gx_verify,
 460         .target         = cpufreq_gx_target,
 461         .init           = cpufreq_gx_cpu_init,
 462         .name           = "gx-suspmod",
 463         .owner          = THIS_MODULE,
 464 };
 465
 466 static int __init cpufreq_gx_init(void)
 467 {
 468         int ret;
 469         struct gxfreq_params *params;
 470         struct pci_dev *gx_pci;
 471
 472         /* Test if we have the right hardware */
 473         gx_pci = gx_detect_chipset();
 474         if (gx_pci == NULL)
 475                 return -ENODEV;
 476
 477         /* check whether module parameters are sane */
 478         if (max_duration > 0xff)
 479                 max_duration = 0xff;
 480
 481         dprintk("geode suspend modulation available.\n");
 482
 483         params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL);
 484         if (params == NULL)
 485                 return -ENOMEM;
 486
 487         params->cs55x0 = gx_pci;
 488         gx_params = params;
 489
 490         /* keep cs55x0 configurations */
 491         pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
 492         pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
 493         pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
 494         pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
 495         pci_read_config_byte(params->cs55x0, PCI_MODOFF,
 496                         &(params->off_duration));
 497
 498         ret = cpufreq_register_driver(&gx_suspmod_driver);
 499         if (ret) {
 500                 kfree(params);
 501                 return ret;                   /* register error! */
 502         }
 503
 504         return 0;
 505 }
 506
 507 static void __exit cpufreq_gx_exit(void)
 508 {
 509         cpufreq_unregister_driver(&gx_suspmod_driver);
 510         pci_dev_put(gx_params->cs55x0);
 511         kfree(gx_params);
 512 }
 513
 514 MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
 515 MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
 516 MODULE_LICENSE("GPL");
 517
 518 module_init(cpufreq_gx_init);
 519 module_exit(cpufreq_gx_exit);
 520