2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <linux/err.h>
42 .section .entry.text, "ax"
44 #ifdef CONFIG_PARAVIRT
45 ENTRY(native_usergs_sysret64)
48 ENDPROC(native_usergs_sysret64)
49 #endif /* CONFIG_PARAVIRT */
51 .macro TRACE_IRQS_IRETQ
52 #ifdef CONFIG_TRACE_IRQFLAGS
53 bt $9, EFLAGS(%rsp) /* interrupts off? */
61 * When dynamic function tracer is enabled it will add a breakpoint
62 * to all locations that it is about to modify, sync CPUs, update
63 * all the code, sync CPUs, then remove the breakpoints. In this time
64 * if lockdep is enabled, it might jump back into the debug handler
65 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
67 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
68 * make sure the stack pointer does not get reset back to the top
69 * of the debug stack, and instead just reuses the current stack.
71 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
73 .macro TRACE_IRQS_OFF_DEBUG
74 call debug_stack_set_zero
76 call debug_stack_reset
79 .macro TRACE_IRQS_ON_DEBUG
80 call debug_stack_set_zero
82 call debug_stack_reset
85 .macro TRACE_IRQS_IRETQ_DEBUG
86 bt $9, EFLAGS(%rsp) /* interrupts off? */
93 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
94 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
95 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
99 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
101 * This is the only entry point used for 64-bit system calls. The
102 * hardware interface is reasonably well designed and the register to
103 * argument mapping Linux uses fits well with the registers that are
104 * available when SYSCALL is used.
106 * SYSCALL instructions can be found inlined in libc implementations as
107 * well as some other programs and libraries. There are also a handful
108 * of SYSCALL instructions in the vDSO used, for example, as a
109 * clock_gettimeofday fallback.
111 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
112 * then loads new ss, cs, and rip from previously programmed MSRs.
113 * rflags gets masked by a value from another MSR (so CLD and CLAC
114 * are not needed). SYSCALL does not save anything on the stack
115 * and does not change rsp.
117 * Registers on entry:
118 * rax system call number
120 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
124 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
127 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
129 * Only called from user space.
131 * When user can change pt_regs->foo always force IRET. That is because
132 * it deals with uncanonical addresses better. SYSRET has trouble
133 * with them due to bugs in both AMD and Intel CPUs.
136 ENTRY(entry_SYSCALL_64)
138 * Interrupts are off on entry.
139 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
140 * it is too small to ever cause noticeable irq latency.
144 * A hypervisor implementation might want to use a label
145 * after the swapgs, so that it can do the swapgs
146 * for the guest and jump here on syscall.
148 GLOBAL(entry_SYSCALL_64_after_swapgs)
150 movq %rsp, PER_CPU_VAR(rsp_scratch)
151 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
155 /* Construct struct pt_regs on stack */
156 pushq $__USER_DS /* pt_regs->ss */
157 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
158 pushq %r11 /* pt_regs->flags */
159 pushq $__USER_CS /* pt_regs->cs */
160 pushq %rcx /* pt_regs->ip */
161 pushq %rax /* pt_regs->orig_ax */
162 pushq %rdi /* pt_regs->di */
163 pushq %rsi /* pt_regs->si */
164 pushq %rdx /* pt_regs->dx */
165 pushq %rcx /* pt_regs->cx */
166 pushq $-ENOSYS /* pt_regs->ax */
167 pushq %r8 /* pt_regs->r8 */
168 pushq %r9 /* pt_regs->r9 */
169 pushq %r10 /* pt_regs->r10 */
170 pushq %r11 /* pt_regs->r11 */
171 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
174 * If we need to do entry work or if we guess we'll need to do
175 * exit work, go straight to the slow path.
177 movq PER_CPU_VAR(current_task), %r11
178 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
179 jnz entry_SYSCALL64_slow_path
181 entry_SYSCALL_64_fastpath:
183 * Easy case: enable interrupts and issue the syscall. If the syscall
184 * needs pt_regs, we'll call a stub that disables interrupts again
185 * and jumps to the slow path.
188 ENABLE_INTERRUPTS(CLBR_NONE)
189 #if __SYSCALL_MASK == ~0
190 cmpq $__NR_syscall_max, %rax
192 andl $__SYSCALL_MASK, %eax
193 cmpl $__NR_syscall_max, %eax
195 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
199 * This call instruction is handled specially in stub_ptregs_64.
200 * It might end up jumping to the slow path. If it jumps, RAX
201 * and all argument registers are clobbered.
203 call *sys_call_table(, %rax, 8)
204 .Lentry_SYSCALL_64_after_fastpath_call:
210 * If we get here, then we know that pt_regs is clean for SYSRET64.
211 * If we see that no exit work is required (which we are required
212 * to check with IRQs off), then we can go straight to SYSRET64.
214 DISABLE_INTERRUPTS(CLBR_NONE)
216 movq PER_CPU_VAR(current_task), %r11
217 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
221 TRACE_IRQS_ON /* user mode is traced as IRQs on */
223 movq EFLAGS(%rsp), %r11
224 RESTORE_C_REGS_EXCEPT_RCX_R11
230 * The fast path looked good when we started, but something changed
231 * along the way and we need to switch to the slow path. Calling
232 * raise(3) will trigger this, for example. IRQs are off.
235 ENABLE_INTERRUPTS(CLBR_NONE)
238 call syscall_return_slowpath /* returns with IRQs disabled */
239 jmp return_from_SYSCALL_64
241 entry_SYSCALL64_slow_path:
245 call do_syscall_64 /* returns with IRQs disabled */
247 return_from_SYSCALL_64:
249 TRACE_IRQS_IRETQ /* we're about to change IF */
252 * Try to use SYSRET instead of IRET if we're returning to
253 * a completely clean 64-bit userspace context.
257 cmpq %rcx, %r11 /* RCX == RIP */
258 jne opportunistic_sysret_failed
261 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
262 * in kernel space. This essentially lets the user take over
263 * the kernel, since userspace controls RSP.
265 * If width of "canonical tail" ever becomes variable, this will need
266 * to be updated to remain correct on both old and new CPUs.
268 .ifne __VIRTUAL_MASK_SHIFT - 47
269 .error "virtual address width changed -- SYSRET checks need update"
272 /* Change top 16 bits to be the sign-extension of 47th bit */
273 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
274 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
276 /* If this changed %rcx, it was not canonical */
278 jne opportunistic_sysret_failed
280 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
281 jne opportunistic_sysret_failed
284 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
285 jne opportunistic_sysret_failed
288 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
289 * restore RF properly. If the slowpath sets it for whatever reason, we
290 * need to restore it correctly.
292 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
293 * trap from userspace immediately after SYSRET. This would cause an
294 * infinite loop whenever #DB happens with register state that satisfies
295 * the opportunistic SYSRET conditions. For example, single-stepping
298 * movq $stuck_here, %rcx
303 * would never get past 'stuck_here'.
305 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
306 jnz opportunistic_sysret_failed
308 /* nothing to check for RSP */
310 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
311 jne opportunistic_sysret_failed
314 * We win! This label is here just for ease of understanding
315 * perf profiles. Nothing jumps here.
317 syscall_return_via_sysret:
318 /* rcx and r11 are already restored (see code above) */
319 RESTORE_C_REGS_EXCEPT_RCX_R11
323 opportunistic_sysret_failed:
325 jmp restore_c_regs_and_iret
326 END(entry_SYSCALL_64)
328 ENTRY(stub_ptregs_64)
330 * Syscalls marked as needing ptregs land here.
331 * If we are on the fast path, we need to save the extra regs,
332 * which we achieve by trying again on the slow path. If we are on
333 * the slow path, the extra regs are already saved.
335 * RAX stores a pointer to the C function implementing the syscall.
338 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
342 * Called from fast path -- disable IRQs again, pop return address
343 * and jump to slow path
345 DISABLE_INTERRUPTS(CLBR_NONE)
348 jmp entry_SYSCALL64_slow_path
351 jmp *%rax /* Called from C */
354 .macro ptregs_stub func
356 leaq \func(%rip), %rax
361 /* Instantiate ptregs_stub for each ptregs-using syscall */
362 #define __SYSCALL_64_QUAL_(sym)
363 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
364 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
365 #include <asm/syscalls_64.h>
371 ENTRY(__switch_to_asm)
373 * Save callee-saved registers
374 * This must match the order in inactive_task_frame
384 movq %rsp, TASK_threadsp(%rdi)
385 movq TASK_threadsp(%rsi), %rsp
387 #ifdef CONFIG_CC_STACKPROTECTOR
388 movq TASK_stack_canary(%rsi), %rbx
389 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
392 /* restore callee-saved registers */
404 * A newly forked process directly context switches into this address.
406 * rax: prev task we switched from
407 * rbx: kernel thread func (NULL for user thread)
408 * r12: kernel thread arg
412 call schedule_tail /* rdi: 'prev' task parameter */
414 testq %rbx, %rbx /* from kernel_thread? */
415 jnz 1f /* kernel threads are uncommon */
419 call syscall_return_slowpath /* returns with IRQs disabled */
420 TRACE_IRQS_ON /* user mode is traced as IRQS on */
422 jmp restore_regs_and_iret
429 * A kernel thread is allowed to return here after successfully
430 * calling do_execve(). Exit to userspace to complete the execve()
438 * Build the entry stubs with some assembler magic.
439 * We pack 1 stub into every 8-byte block.
442 ENTRY(irq_entries_start)
443 vector=FIRST_EXTERNAL_VECTOR
444 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
445 pushq $(~vector+0x80) /* Note: always in signed byte range */
450 END(irq_entries_start)
453 * Interrupt entry/exit.
455 * Interrupt entry points save only callee clobbered registers in fast path.
457 * Entry runs with interrupts off.
460 /* 0(%rsp): ~(interrupt number) */
461 .macro interrupt func
463 ALLOC_PT_GPREGS_ON_STACK
472 * IRQ from user mode. Switch to kernel gsbase and inform context
473 * tracking that we're in kernel mode.
478 * We need to tell lockdep that IRQs are off. We can't do this until
479 * we fix gsbase, and we should do it before enter_from_user_mode
480 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
481 * the simplest way to handle it is to just call it twice if
482 * we enter from user mode. There's no reason to optimize this since
483 * TRACE_IRQS_OFF is a no-op if lockdep is off.
487 CALL_enter_from_user_mode
491 * Save previous stack pointer, optionally switch to interrupt stack.
492 * irq_count is used to check if a CPU is already on an interrupt stack
493 * or not. While this is essentially redundant with preempt_count it is
494 * a little cheaper to use a separate counter in the PDA (short of
495 * moving irq_enter into assembly, which would be too much work)
498 incl PER_CPU_VAR(irq_count)
499 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
501 /* We entered an interrupt context - irqs are off: */
504 call \func /* rdi points to pt_regs */
508 * The interrupt stubs push (~vector+0x80) onto the stack and
509 * then jump to common_interrupt.
511 .p2align CONFIG_X86_L1_CACHE_SHIFT
514 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
516 /* 0(%rsp): old RSP */
518 DISABLE_INTERRUPTS(CLBR_NONE)
520 decl PER_CPU_VAR(irq_count)
522 /* Restore saved previous stack */
528 /* Interrupt came from user space */
531 call prepare_exit_to_usermode
534 jmp restore_regs_and_iret
536 /* Returning to kernel space */
538 #ifdef CONFIG_PREEMPT
539 /* Interrupts are off */
540 /* Check if we need preemption */
541 bt $9, EFLAGS(%rsp) /* were interrupts off? */
543 0: cmpl $0, PER_CPU_VAR(__preempt_count)
545 call preempt_schedule_irq
550 * The iretq could re-enable interrupts:
555 * At this label, code paths which return to kernel and to user,
556 * which come from interrupts/exception and from syscalls, merge.
558 GLOBAL(restore_regs_and_iret)
560 restore_c_regs_and_iret:
562 REMOVE_PT_GPREGS_FROM_STACK 8
567 * Are we returning to a stack segment from the LDT? Note: in
568 * 64-bit mode SS:RSP on the exception stack is always valid.
570 #ifdef CONFIG_X86_ESPFIX64
571 testb $4, (SS-RIP)(%rsp)
572 jnz native_irq_return_ldt
575 .global native_irq_return_iret
576 native_irq_return_iret:
578 * This may fault. Non-paranoid faults on return to userspace are
579 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
580 * Double-faults due to espfix64 are handled in do_double_fault.
581 * Other faults here are fatal.
585 #ifdef CONFIG_X86_ESPFIX64
586 native_irq_return_ldt:
588 * We are running with user GSBASE. All GPRs contain their user
589 * values. We have a percpu ESPFIX stack that is eight slots
590 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
591 * of the ESPFIX stack.
593 * We clobber RAX and RDI in this code. We stash RDI on the
594 * normal stack and RAX on the ESPFIX stack.
596 * The ESPFIX stack layout we set up looks like this:
598 * --- top of ESPFIX stack ---
603 * RIP <-- RSP points here when we're done
604 * RAX <-- espfix_waddr points here
605 * --- bottom of ESPFIX stack ---
608 pushq %rdi /* Stash user RDI */
610 movq PER_CPU_VAR(espfix_waddr), %rdi
611 movq %rax, (0*8)(%rdi) /* user RAX */
612 movq (1*8)(%rsp), %rax /* user RIP */
613 movq %rax, (1*8)(%rdi)
614 movq (2*8)(%rsp), %rax /* user CS */
615 movq %rax, (2*8)(%rdi)
616 movq (3*8)(%rsp), %rax /* user RFLAGS */
617 movq %rax, (3*8)(%rdi)
618 movq (5*8)(%rsp), %rax /* user SS */
619 movq %rax, (5*8)(%rdi)
620 movq (4*8)(%rsp), %rax /* user RSP */
621 movq %rax, (4*8)(%rdi)
622 /* Now RAX == RSP. */
624 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
625 popq %rdi /* Restore user RDI */
628 * espfix_stack[31:16] == 0. The page tables are set up such that
629 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
630 * espfix_waddr for any X. That is, there are 65536 RO aliases of
631 * the same page. Set up RSP so that RSP[31:16] contains the
632 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
633 * still points to an RO alias of the ESPFIX stack.
635 orq PER_CPU_VAR(espfix_stack), %rax
640 * At this point, we cannot write to the stack any more, but we can
643 popq %rax /* Restore user RAX */
646 * RSP now points to an ordinary IRET frame, except that the page
647 * is read-only and RSP[31:16] are preloaded with the userspace
648 * values. We can now IRET back to userspace.
650 jmp native_irq_return_iret
652 END(common_interrupt)
657 .macro apicinterrupt3 num sym do_sym
667 #ifdef CONFIG_TRACING
668 #define trace(sym) trace_##sym
669 #define smp_trace(sym) smp_trace_##sym
671 .macro trace_apicinterrupt num sym
672 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
675 .macro trace_apicinterrupt num sym do_sym
679 /* Make sure APIC interrupt handlers end up in the irqentry section: */
680 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
681 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
682 # define POP_SECTION_IRQENTRY .popsection
684 # define PUSH_SECTION_IRQENTRY
685 # define POP_SECTION_IRQENTRY
688 .macro apicinterrupt num sym do_sym
689 PUSH_SECTION_IRQENTRY
690 apicinterrupt3 \num \sym \do_sym
691 trace_apicinterrupt \num \sym
696 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
697 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
701 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
704 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
705 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
707 #ifdef CONFIG_HAVE_KVM
708 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
709 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
712 #ifdef CONFIG_X86_MCE_THRESHOLD
713 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
716 #ifdef CONFIG_X86_MCE_AMD
717 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
720 #ifdef CONFIG_X86_THERMAL_VECTOR
721 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
725 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
726 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
727 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
730 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
731 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
733 #ifdef CONFIG_IRQ_WORK
734 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
738 * Exception entry points.
740 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
742 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
745 .if \shift_ist != -1 && \paranoid == 0
746 .error "using shift_ist requires paranoid=1"
750 PARAVIRT_ADJUST_EXCEPTION_FRAME
752 .ifeq \has_error_code
753 pushq $-1 /* ORIG_RAX: no syscall to restart */
756 ALLOC_PT_GPREGS_ON_STACK
760 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
767 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
771 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
777 movq %rsp, %rdi /* pt_regs pointer */
780 movq ORIG_RAX(%rsp), %rsi /* get error code */
781 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
783 xorl %esi, %esi /* no error code */
787 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
793 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
796 /* these procedures expect "no swapgs" flag in ebx */
805 * Paranoid entry from userspace. Switch stacks and treat it
806 * as a normal entry. This means that paranoid handlers
807 * run in real process context if user_mode(regs).
813 movq %rsp, %rdi /* pt_regs pointer */
815 movq %rax, %rsp /* switch stack */
817 movq %rsp, %rdi /* pt_regs pointer */
820 movq ORIG_RAX(%rsp), %rsi /* get error code */
821 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
823 xorl %esi, %esi /* no error code */
828 jmp error_exit /* %ebx: no swapgs flag */
833 #ifdef CONFIG_TRACING
834 .macro trace_idtentry sym do_sym has_error_code:req
835 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
836 idtentry \sym \do_sym has_error_code=\has_error_code
839 .macro trace_idtentry sym do_sym has_error_code:req
840 idtentry \sym \do_sym has_error_code=\has_error_code
844 idtentry divide_error do_divide_error has_error_code=0
845 idtentry overflow do_overflow has_error_code=0
846 idtentry bounds do_bounds has_error_code=0
847 idtentry invalid_op do_invalid_op has_error_code=0
848 idtentry device_not_available do_device_not_available has_error_code=0
849 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
850 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
851 idtentry invalid_TSS do_invalid_TSS has_error_code=1
852 idtentry segment_not_present do_segment_not_present has_error_code=1
853 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
854 idtentry coprocessor_error do_coprocessor_error has_error_code=0
855 idtentry alignment_check do_alignment_check has_error_code=1
856 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
860 * Reload gs selector with exception handling
863 ENTRY(native_load_gs_index)
865 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
869 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
873 END(native_load_gs_index)
874 EXPORT_SYMBOL(native_load_gs_index)
876 _ASM_EXTABLE(.Lgs_change, bad_gs)
877 .section .fixup, "ax"
878 /* running with kernelgs */
880 SWAPGS /* switch back to user gs */
882 /* This can't be a string because the preprocessor needs to see it. */
883 movl $__USER_DS, %eax
886 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
892 /* Call softirq on interrupt stack. Interrupts are off. */
893 ENTRY(do_softirq_own_stack)
896 incl PER_CPU_VAR(irq_count)
897 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
898 push %rbp /* frame pointer backlink */
901 decl PER_CPU_VAR(irq_count)
903 END(do_softirq_own_stack)
906 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
909 * A note on the "critical region" in our callback handler.
910 * We want to avoid stacking callback handlers due to events occurring
911 * during handling of the last event. To do this, we keep events disabled
912 * until we've done all processing. HOWEVER, we must enable events before
913 * popping the stack frame (can't be done atomically) and so it would still
914 * be possible to get enough handler activations to overflow the stack.
915 * Although unlikely, bugs of that kind are hard to track down, so we'd
916 * like to avoid the possibility.
917 * So, on entry to the handler we detect whether we interrupted an
918 * existing activation in its critical region -- if so, we pop the current
919 * activation and restart the handler using the previous one.
921 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
924 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
925 * see the correct pointer to the pt_regs
927 movq %rdi, %rsp /* we don't return, adjust the stack frame */
928 11: incl PER_CPU_VAR(irq_count)
930 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
931 pushq %rbp /* frame pointer backlink */
932 call xen_evtchn_do_upcall
934 decl PER_CPU_VAR(irq_count)
935 #ifndef CONFIG_PREEMPT
936 call xen_maybe_preempt_hcall
939 END(xen_do_hypervisor_callback)
942 * Hypervisor uses this for application faults while it executes.
943 * We get here for two reasons:
944 * 1. Fault while reloading DS, ES, FS or GS
945 * 2. Fault while executing IRET
946 * Category 1 we do not need to fix up as Xen has already reloaded all segment
947 * registers that could be reloaded and zeroed the others.
948 * Category 2 we fix up by killing the current process. We cannot use the
949 * normal Linux return path in this case because if we use the IRET hypercall
950 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
951 * We distinguish between categories by comparing each saved segment register
952 * with its current contents: any discrepancy means we in category 1.
954 ENTRY(xen_failsafe_callback)
967 /* All segments match their saved values => Category 2 (Bad IRET). */
974 jmp general_protection
975 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
979 pushq $-1 /* orig_ax = -1 => not a system call */
980 ALLOC_PT_GPREGS_ON_STACK
985 END(xen_failsafe_callback)
987 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
988 xen_hvm_callback_vector xen_evtchn_do_upcall
990 #endif /* CONFIG_XEN */
992 #if IS_ENABLED(CONFIG_HYPERV)
993 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
994 hyperv_callback_vector hyperv_vector_handler
995 #endif /* CONFIG_HYPERV */
997 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
998 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
999 idtentry stack_segment do_stack_segment has_error_code=1
1002 idtentry xen_debug do_debug has_error_code=0
1003 idtentry xen_int3 do_int3 has_error_code=0
1004 idtentry xen_stack_segment do_stack_segment has_error_code=1
1007 idtentry general_protection do_general_protection has_error_code=1
1008 trace_idtentry page_fault do_page_fault has_error_code=1
1010 #ifdef CONFIG_KVM_GUEST
1011 idtentry async_page_fault do_async_page_fault has_error_code=1
1014 #ifdef CONFIG_X86_MCE
1015 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1019 * Save all registers in pt_regs, and switch gs if needed.
1020 * Use slow, but surefire "are we in kernel?" check.
1021 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1023 ENTRY(paranoid_entry)
1027 ENCODE_FRAME_POINTER 8
1029 movl $MSR_GS_BASE, %ecx
1032 js 1f /* negative -> in kernel */
1039 * "Paranoid" exit path from exception stack. This is invoked
1040 * only on return from non-NMI IST interrupts that came
1041 * from kernel space.
1043 * We may be returning to very strange contexts (e.g. very early
1044 * in syscall entry), so checking for preemption here would
1045 * be complicated. Fortunately, we there's no good reason
1046 * to try to handle preemption here.
1048 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1050 ENTRY(paranoid_exit)
1051 DISABLE_INTERRUPTS(CLBR_NONE)
1052 TRACE_IRQS_OFF_DEBUG
1053 testl %ebx, %ebx /* swapgs needed? */
1054 jnz paranoid_exit_no_swapgs
1057 jmp paranoid_exit_restore
1058 paranoid_exit_no_swapgs:
1059 TRACE_IRQS_IRETQ_DEBUG
1060 paranoid_exit_restore:
1063 REMOVE_PT_GPREGS_FROM_STACK 8
1068 * Save all registers in pt_regs, and switch gs if needed.
1069 * Return: EBX=0: came from user mode; EBX=1: otherwise
1075 ENCODE_FRAME_POINTER 8
1077 testb $3, CS+8(%rsp)
1078 jz .Lerror_kernelspace
1081 * We entered from user mode or we're pretending to have entered
1082 * from user mode due to an IRET fault.
1086 .Lerror_entry_from_usermode_after_swapgs:
1088 * We need to tell lockdep that IRQs are off. We can't do this until
1089 * we fix gsbase, and we should do it before enter_from_user_mode
1090 * (which can take locks).
1093 CALL_enter_from_user_mode
1101 * There are two places in the kernel that can potentially fault with
1102 * usergs. Handle them here. B stepping K8s sometimes report a
1103 * truncated RIP for IRET exceptions returning to compat mode. Check
1104 * for these here too.
1106 .Lerror_kernelspace:
1108 leaq native_irq_return_iret(%rip), %rcx
1109 cmpq %rcx, RIP+8(%rsp)
1111 movl %ecx, %eax /* zero extend */
1112 cmpq %rax, RIP+8(%rsp)
1114 cmpq $.Lgs_change, RIP+8(%rsp)
1115 jne .Lerror_entry_done
1118 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1119 * gsbase and proceed. We'll fix up the exception and land in
1120 * .Lgs_change's error handler with kernel gsbase.
1123 jmp .Lerror_entry_done
1126 /* Fix truncated RIP */
1127 movq %rcx, RIP+8(%rsp)
1132 * We came from an IRET to user mode, so we have user gsbase.
1133 * Switch to kernel gsbase:
1138 * Pretend that the exception came from user mode: set up pt_regs
1139 * as if we faulted immediately after IRET and clear EBX so that
1140 * error_exit knows that we will be returning to user mode.
1146 jmp .Lerror_entry_from_usermode_after_swapgs
1151 * On entry, EBX is a "return to kernel mode" flag:
1152 * 1: already in kernel mode, don't need SWAPGS
1153 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1157 DISABLE_INTERRUPTS(CLBR_NONE)
1164 /* Runs on exception stack */
1167 * Fix up the exception frame if we're on Xen.
1168 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1169 * one value to the stack on native, so it may clobber the rdx
1170 * scratch slot, but it won't clobber any of the important
1173 * Xen is a different story, because the Xen frame itself overlaps
1174 * the "NMI executing" variable.
1176 PARAVIRT_ADJUST_EXCEPTION_FRAME
1179 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1180 * the iretq it performs will take us out of NMI context.
1181 * This means that we can have nested NMIs where the next
1182 * NMI is using the top of the stack of the previous NMI. We
1183 * can't let it execute because the nested NMI will corrupt the
1184 * stack of the previous NMI. NMI handlers are not re-entrant
1187 * To handle this case we do the following:
1188 * Check the a special location on the stack that contains
1189 * a variable that is set when NMIs are executing.
1190 * The interrupted task's stack is also checked to see if it
1192 * If the variable is not set and the stack is not the NMI
1194 * o Set the special variable on the stack
1195 * o Copy the interrupt frame into an "outermost" location on the
1197 * o Copy the interrupt frame into an "iret" location on the stack
1198 * o Continue processing the NMI
1199 * If the variable is set or the previous stack is the NMI stack:
1200 * o Modify the "iret" location to jump to the repeat_nmi
1201 * o return back to the first NMI
1203 * Now on exit of the first NMI, we first clear the stack variable
1204 * The NMI stack will tell any nested NMIs at that point that it is
1205 * nested. Then we pop the stack normally with iret, and if there was
1206 * a nested NMI that updated the copy interrupt stack frame, a
1207 * jump will be made to the repeat_nmi code that will handle the second
1210 * However, espfix prevents us from directly returning to userspace
1211 * with a single IRET instruction. Similarly, IRET to user mode
1212 * can fault. We therefore handle NMIs from user space like
1213 * other IST entries.
1216 /* Use %rdx as our temp variable throughout */
1219 testb $3, CS-RIP+8(%rsp)
1220 jz .Lnmi_from_kernel
1223 * NMI from user mode. We need to run on the thread stack, but we
1224 * can't go through the normal entry paths: NMIs are masked, and
1225 * we don't want to enable interrupts, because then we'll end
1226 * up in an awkward situation in which IRQs are on but NMIs
1229 * We also must not push anything to the stack before switching
1230 * stacks lest we corrupt the "NMI executing" variable.
1236 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1237 pushq 5*8(%rdx) /* pt_regs->ss */
1238 pushq 4*8(%rdx) /* pt_regs->rsp */
1239 pushq 3*8(%rdx) /* pt_regs->flags */
1240 pushq 2*8(%rdx) /* pt_regs->cs */
1241 pushq 1*8(%rdx) /* pt_regs->rip */
1242 pushq $-1 /* pt_regs->orig_ax */
1243 pushq %rdi /* pt_regs->di */
1244 pushq %rsi /* pt_regs->si */
1245 pushq (%rdx) /* pt_regs->dx */
1246 pushq %rcx /* pt_regs->cx */
1247 pushq %rax /* pt_regs->ax */
1248 pushq %r8 /* pt_regs->r8 */
1249 pushq %r9 /* pt_regs->r9 */
1250 pushq %r10 /* pt_regs->r10 */
1251 pushq %r11 /* pt_regs->r11 */
1252 pushq %rbx /* pt_regs->rbx */
1253 pushq %rbp /* pt_regs->rbp */
1254 pushq %r12 /* pt_regs->r12 */
1255 pushq %r13 /* pt_regs->r13 */
1256 pushq %r14 /* pt_regs->r14 */
1257 pushq %r15 /* pt_regs->r15 */
1258 ENCODE_FRAME_POINTER
1261 * At this point we no longer need to worry about stack damage
1262 * due to nesting -- we're on the normal thread stack and we're
1263 * done with the NMI stack.
1271 * Return back to user mode. We must *not* do the normal exit
1272 * work, because we don't want to enable interrupts.
1275 jmp restore_regs_and_iret
1279 * Here's what our stack frame will look like:
1280 * +---------------------------------------------------------+
1282 * | original Return RSP |
1283 * | original RFLAGS |
1286 * +---------------------------------------------------------+
1287 * | temp storage for rdx |
1288 * +---------------------------------------------------------+
1289 * | "NMI executing" variable |
1290 * +---------------------------------------------------------+
1291 * | iret SS } Copied from "outermost" frame |
1292 * | iret Return RSP } on each loop iteration; overwritten |
1293 * | iret RFLAGS } by a nested NMI to force another |
1294 * | iret CS } iteration if needed. |
1296 * +---------------------------------------------------------+
1297 * | outermost SS } initialized in first_nmi; |
1298 * | outermost Return RSP } will not be changed before |
1299 * | outermost RFLAGS } NMI processing is done. |
1300 * | outermost CS } Copied to "iret" frame on each |
1301 * | outermost RIP } iteration. |
1302 * +---------------------------------------------------------+
1304 * +---------------------------------------------------------+
1306 * The "original" frame is used by hardware. Before re-enabling
1307 * NMIs, we need to be done with it, and we need to leave enough
1308 * space for the asm code here.
1310 * We return by executing IRET while RSP points to the "iret" frame.
1311 * That will either return for real or it will loop back into NMI
1314 * The "outermost" frame is copied to the "iret" frame on each
1315 * iteration of the loop, so each iteration starts with the "iret"
1316 * frame pointing to the final return target.
1320 * Determine whether we're a nested NMI.
1322 * If we interrupted kernel code between repeat_nmi and
1323 * end_repeat_nmi, then we are a nested NMI. We must not
1324 * modify the "iret" frame because it's being written by
1325 * the outer NMI. That's okay; the outer NMI handler is
1326 * about to about to call do_nmi anyway, so we can just
1327 * resume the outer NMI.
1330 movq $repeat_nmi, %rdx
1333 movq $end_repeat_nmi, %rdx
1339 * Now check "NMI executing". If it's set, then we're nested.
1340 * This will not detect if we interrupted an outer NMI just
1347 * Now test if the previous stack was an NMI stack. This covers
1348 * the case where we interrupt an outer NMI after it clears
1349 * "NMI executing" but before IRET. We need to be careful, though:
1350 * there is one case in which RSP could point to the NMI stack
1351 * despite there being no NMI active: naughty userspace controls
1352 * RSP at the very beginning of the SYSCALL targets. We can
1353 * pull a fast one on naughty userspace, though: we program
1354 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1355 * if it controls the kernel's RSP. We set DF before we clear
1359 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1360 cmpq %rdx, 4*8(%rsp)
1361 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1364 subq $EXCEPTION_STKSZ, %rdx
1365 cmpq %rdx, 4*8(%rsp)
1366 /* If it is below the NMI stack, it is a normal NMI */
1369 /* Ah, it is within the NMI stack. */
1371 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1372 jz first_nmi /* RSP was user controlled. */
1374 /* This is a nested NMI. */
1378 * Modify the "iret" frame to point to repeat_nmi, forcing another
1379 * iteration of NMI handling.
1382 leaq -10*8(%rsp), %rdx
1389 /* Put stack back */
1395 /* We are returning to kernel mode, so this cannot result in a fault. */
1402 /* Make room for "NMI executing". */
1405 /* Leave room for the "iret" frame */
1408 /* Copy the "original" frame to the "outermost" frame */
1413 /* Everything up to here is safe from nested NMIs */
1415 #ifdef CONFIG_DEBUG_ENTRY
1417 * For ease of testing, unmask NMIs right away. Disabled by
1418 * default because IRET is very expensive.
1421 pushq %rsp /* RSP (minus 8 because of the previous push) */
1422 addq $8, (%rsp) /* Fix up RSP */
1424 pushq $__KERNEL_CS /* CS */
1426 INTERRUPT_RETURN /* continues at repeat_nmi below */
1432 * If there was a nested NMI, the first NMI's iret will return
1433 * here. But NMIs are still enabled and we can take another
1434 * nested NMI. The nested NMI checks the interrupted RIP to see
1435 * if it is between repeat_nmi and end_repeat_nmi, and if so
1436 * it will just return, as we are about to repeat an NMI anyway.
1437 * This makes it safe to copy to the stack frame that a nested
1440 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1441 * we're repeating an NMI, gsbase has the same value that it had on
1442 * the first iteration. paranoid_entry will load the kernel
1443 * gsbase if needed before we call do_nmi. "NMI executing"
1446 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1449 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1450 * here must not modify the "iret" frame while we're writing to
1451 * it or it will end up containing garbage.
1461 * Everything below this point can be preempted by a nested NMI.
1462 * If this happens, then the inner NMI will change the "iret"
1463 * frame to point back to repeat_nmi.
1465 pushq $-1 /* ORIG_RAX: no syscall to restart */
1466 ALLOC_PT_GPREGS_ON_STACK
1469 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1470 * as we should not be calling schedule in NMI context.
1471 * Even with normal interrupts enabled. An NMI should not be
1472 * setting NEED_RESCHED or anything that normal interrupts and
1473 * exceptions might do.
1477 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1482 testl %ebx, %ebx /* swapgs needed? */
1490 /* Point RSP at the "iret" frame. */
1491 REMOVE_PT_GPREGS_FROM_STACK 6*8
1494 * Clear "NMI executing". Set DF first so that we can easily
1495 * distinguish the remaining code between here and IRET from
1496 * the SYSCALL entry and exit paths. On a native kernel, we
1497 * could just inspect RIP, but, on paravirt kernels,
1498 * INTERRUPT_RETURN can translate into a jump into a
1502 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1505 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1506 * stack in a single instruction. We are returning to kernel
1507 * mode, so this cannot result in a fault.
1512 ENTRY(ignore_sysret)
1517 ENTRY(rewind_stack_do_exit)
1518 /* Prevent any naive code from trying to unwind to our caller. */
1521 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1522 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1526 END(rewind_stack_do_exit)