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sparc64: Use generic CMOS driver.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / sparc64 / kernel / time.c
1 /* time.c: UltraSparc timer and TOD clock support.
2 *
3 * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
5 *
6 * Based largely on code which is:
7 *
8 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
9 */
10
11 #include <linux/errno.h>
12 #include <linux/module.h>
13 #include <linux/sched.h>
14 #include <linux/smp_lock.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/miscdevice.h>
32 #include <linux/rtc.h>
33 #include <linux/rtc/m48t59.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
37 #include <linux/of_device.h>
38 #include <linux/platform_device.h>
39
40 #include <asm/oplib.h>
41 #include <asm/timer.h>
42 #include <asm/irq.h>
43 #include <asm/io.h>
44 #include <asm/prom.h>
45 #include <asm/starfire.h>
46 #include <asm/smp.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
50 #include <asm/irq_regs.h>
51
52 #include "entry.h"
53
54 DEFINE_SPINLOCK(rtc_lock);
55 static void __iomem *bq4802_regs;
56
57 static int set_rtc_mmss(unsigned long);
58
59 #define TICK_PRIV_BIT (1UL << 63)
60 #define TICKCMP_IRQ_BIT (1UL << 63)
61
62 #ifdef CONFIG_SMP
63 unsigned long profile_pc(struct pt_regs *regs)
64 {
65 unsigned long pc = instruction_pointer(regs);
66
67 if (in_lock_functions(pc))
68 return regs->u_regs[UREG_RETPC];
69 return pc;
70 }
71 EXPORT_SYMBOL(profile_pc);
72 #endif
73
74 static void tick_disable_protection(void)
75 {
76 /* Set things up so user can access tick register for profiling
77 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
78 * read back of %tick after writing it.
79 */
80 __asm__ __volatile__(
81 " ba,pt %%xcc, 1f\n"
82 " nop\n"
83 " .align 64\n"
84 "1: rd %%tick, %%g2\n"
85 " add %%g2, 6, %%g2\n"
86 " andn %%g2, %0, %%g2\n"
87 " wrpr %%g2, 0, %%tick\n"
88 " rdpr %%tick, %%g0"
89 : /* no outputs */
90 : "r" (TICK_PRIV_BIT)
91 : "g2");
92 }
93
94 static void tick_disable_irq(void)
95 {
96 __asm__ __volatile__(
97 " ba,pt %%xcc, 1f\n"
98 " nop\n"
99 " .align 64\n"
100 "1: wr %0, 0x0, %%tick_cmpr\n"
101 " rd %%tick_cmpr, %%g0"
102 : /* no outputs */
103 : "r" (TICKCMP_IRQ_BIT));
104 }
105
106 static void tick_init_tick(void)
107 {
108 tick_disable_protection();
109 tick_disable_irq();
110 }
111
112 static unsigned long tick_get_tick(void)
113 {
114 unsigned long ret;
115
116 __asm__ __volatile__("rd %%tick, %0\n\t"
117 "mov %0, %0"
118 : "=r" (ret));
119
120 return ret & ~TICK_PRIV_BIT;
121 }
122
123 static int tick_add_compare(unsigned long adj)
124 {
125 unsigned long orig_tick, new_tick, new_compare;
126
127 __asm__ __volatile__("rd %%tick, %0"
128 : "=r" (orig_tick));
129
130 orig_tick &= ~TICKCMP_IRQ_BIT;
131
132 /* Workaround for Spitfire Errata (#54 I think??), I discovered
133 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
134 * number 103640.
135 *
136 * On Blackbird writes to %tick_cmpr can fail, the
137 * workaround seems to be to execute the wr instruction
138 * at the start of an I-cache line, and perform a dummy
139 * read back from %tick_cmpr right after writing to it. -DaveM
140 */
141 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
142 " add %1, %2, %0\n\t"
143 ".align 64\n"
144 "1:\n\t"
145 "wr %0, 0, %%tick_cmpr\n\t"
146 "rd %%tick_cmpr, %%g0\n\t"
147 : "=r" (new_compare)
148 : "r" (orig_tick), "r" (adj));
149
150 __asm__ __volatile__("rd %%tick, %0"
151 : "=r" (new_tick));
152 new_tick &= ~TICKCMP_IRQ_BIT;
153
154 return ((long)(new_tick - (orig_tick+adj))) > 0L;
155 }
156
157 static unsigned long tick_add_tick(unsigned long adj)
158 {
159 unsigned long new_tick;
160
161 /* Also need to handle Blackbird bug here too. */
162 __asm__ __volatile__("rd %%tick, %0\n\t"
163 "add %0, %1, %0\n\t"
164 "wrpr %0, 0, %%tick\n\t"
165 : "=&r" (new_tick)
166 : "r" (adj));
167
168 return new_tick;
169 }
170
171 static struct sparc64_tick_ops tick_operations __read_mostly = {
172 .name = "tick",
173 .init_tick = tick_init_tick,
174 .disable_irq = tick_disable_irq,
175 .get_tick = tick_get_tick,
176 .add_tick = tick_add_tick,
177 .add_compare = tick_add_compare,
178 .softint_mask = 1UL << 0,
179 };
180
181 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
182
183 static void stick_disable_irq(void)
184 {
185 __asm__ __volatile__(
186 "wr %0, 0x0, %%asr25"
187 : /* no outputs */
188 : "r" (TICKCMP_IRQ_BIT));
189 }
190
191 static void stick_init_tick(void)
192 {
193 /* Writes to the %tick and %stick register are not
194 * allowed on sun4v. The Hypervisor controls that
195 * bit, per-strand.
196 */
197 if (tlb_type != hypervisor) {
198 tick_disable_protection();
199 tick_disable_irq();
200
201 /* Let the user get at STICK too. */
202 __asm__ __volatile__(
203 " rd %%asr24, %%g2\n"
204 " andn %%g2, %0, %%g2\n"
205 " wr %%g2, 0, %%asr24"
206 : /* no outputs */
207 : "r" (TICK_PRIV_BIT)
208 : "g1", "g2");
209 }
210
211 stick_disable_irq();
212 }
213
214 static unsigned long stick_get_tick(void)
215 {
216 unsigned long ret;
217
218 __asm__ __volatile__("rd %%asr24, %0"
219 : "=r" (ret));
220
221 return ret & ~TICK_PRIV_BIT;
222 }
223
224 static unsigned long stick_add_tick(unsigned long adj)
225 {
226 unsigned long new_tick;
227
228 __asm__ __volatile__("rd %%asr24, %0\n\t"
229 "add %0, %1, %0\n\t"
230 "wr %0, 0, %%asr24\n\t"
231 : "=&r" (new_tick)
232 : "r" (adj));
233
234 return new_tick;
235 }
236
237 static int stick_add_compare(unsigned long adj)
238 {
239 unsigned long orig_tick, new_tick;
240
241 __asm__ __volatile__("rd %%asr24, %0"
242 : "=r" (orig_tick));
243 orig_tick &= ~TICKCMP_IRQ_BIT;
244
245 __asm__ __volatile__("wr %0, 0, %%asr25"
246 : /* no outputs */
247 : "r" (orig_tick + adj));
248
249 __asm__ __volatile__("rd %%asr24, %0"
250 : "=r" (new_tick));
251 new_tick &= ~TICKCMP_IRQ_BIT;
252
253 return ((long)(new_tick - (orig_tick+adj))) > 0L;
254 }
255
256 static struct sparc64_tick_ops stick_operations __read_mostly = {
257 .name = "stick",
258 .init_tick = stick_init_tick,
259 .disable_irq = stick_disable_irq,
260 .get_tick = stick_get_tick,
261 .add_tick = stick_add_tick,
262 .add_compare = stick_add_compare,
263 .softint_mask = 1UL << 16,
264 };
265
266 /* On Hummingbird the STICK/STICK_CMPR register is implemented
267 * in I/O space. There are two 64-bit registers each, the
268 * first holds the low 32-bits of the value and the second holds
269 * the high 32-bits.
270 *
271 * Since STICK is constantly updating, we have to access it carefully.
272 *
273 * The sequence we use to read is:
274 * 1) read high
275 * 2) read low
276 * 3) read high again, if it rolled re-read both low and high again.
277 *
278 * Writing STICK safely is also tricky:
279 * 1) write low to zero
280 * 2) write high
281 * 3) write low
282 */
283 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
284 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
285
286 static unsigned long __hbird_read_stick(void)
287 {
288 unsigned long ret, tmp1, tmp2, tmp3;
289 unsigned long addr = HBIRD_STICK_ADDR+8;
290
291 __asm__ __volatile__("ldxa [%1] %5, %2\n"
292 "1:\n\t"
293 "sub %1, 0x8, %1\n\t"
294 "ldxa [%1] %5, %3\n\t"
295 "add %1, 0x8, %1\n\t"
296 "ldxa [%1] %5, %4\n\t"
297 "cmp %4, %2\n\t"
298 "bne,a,pn %%xcc, 1b\n\t"
299 " mov %4, %2\n\t"
300 "sllx %4, 32, %4\n\t"
301 "or %3, %4, %0\n\t"
302 : "=&r" (ret), "=&r" (addr),
303 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
304 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
305
306 return ret;
307 }
308
309 static void __hbird_write_stick(unsigned long val)
310 {
311 unsigned long low = (val & 0xffffffffUL);
312 unsigned long high = (val >> 32UL);
313 unsigned long addr = HBIRD_STICK_ADDR;
314
315 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
316 "add %0, 0x8, %0\n\t"
317 "stxa %3, [%0] %4\n\t"
318 "sub %0, 0x8, %0\n\t"
319 "stxa %2, [%0] %4"
320 : "=&r" (addr)
321 : "0" (addr), "r" (low), "r" (high),
322 "i" (ASI_PHYS_BYPASS_EC_E));
323 }
324
325 static void __hbird_write_compare(unsigned long val)
326 {
327 unsigned long low = (val & 0xffffffffUL);
328 unsigned long high = (val >> 32UL);
329 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
330
331 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
332 "sub %0, 0x8, %0\n\t"
333 "stxa %2, [%0] %4"
334 : "=&r" (addr)
335 : "0" (addr), "r" (low), "r" (high),
336 "i" (ASI_PHYS_BYPASS_EC_E));
337 }
338
339 static void hbtick_disable_irq(void)
340 {
341 __hbird_write_compare(TICKCMP_IRQ_BIT);
342 }
343
344 static void hbtick_init_tick(void)
345 {
346 tick_disable_protection();
347
348 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
349 * XXX into actually sending STICK interrupts. I think because
350 * XXX of how we store %tick_cmpr in head.S this somehow resets the
351 * XXX {TICK + STICK} interrupt mux. -DaveM
352 */
353 __hbird_write_stick(__hbird_read_stick());
354
355 hbtick_disable_irq();
356 }
357
358 static unsigned long hbtick_get_tick(void)
359 {
360 return __hbird_read_stick() & ~TICK_PRIV_BIT;
361 }
362
363 static unsigned long hbtick_add_tick(unsigned long adj)
364 {
365 unsigned long val;
366
367 val = __hbird_read_stick() + adj;
368 __hbird_write_stick(val);
369
370 return val;
371 }
372
373 static int hbtick_add_compare(unsigned long adj)
374 {
375 unsigned long val = __hbird_read_stick();
376 unsigned long val2;
377
378 val &= ~TICKCMP_IRQ_BIT;
379 val += adj;
380 __hbird_write_compare(val);
381
382 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
383
384 return ((long)(val2 - val)) > 0L;
385 }
386
387 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
388 .name = "hbtick",
389 .init_tick = hbtick_init_tick,
390 .disable_irq = hbtick_disable_irq,
391 .get_tick = hbtick_get_tick,
392 .add_tick = hbtick_add_tick,
393 .add_compare = hbtick_add_compare,
394 .softint_mask = 1UL << 0,
395 };
396
397 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
398
399 int update_persistent_clock(struct timespec now)
400 {
401 struct rtc_device *rtc = rtc_class_open("rtc0");
402
403 if (rtc)
404 return rtc_set_mmss(rtc, now.tv_sec);
405
406 return set_rtc_mmss(now.tv_sec);
407 }
408
409 /* Probe for the real time clock chip. */
410 static void __init set_system_time(void)
411 {
412 unsigned int year, mon, day, hour, min, sec;
413 void __iomem *bregs = bq4802_regs;
414 unsigned char val = readb(bregs + 0x0e);
415 unsigned int century;
416
417 if (!bregs) {
418 prom_printf("Something wrong, clock regs not mapped yet.\n");
419 prom_halt();
420 }
421
422 /* BQ4802 RTC chip. */
423
424 writeb(val | 0x08, bregs + 0x0e);
425
426 sec = readb(bregs + 0x00);
427 min = readb(bregs + 0x02);
428 hour = readb(bregs + 0x04);
429 day = readb(bregs + 0x06);
430 mon = readb(bregs + 0x09);
431 year = readb(bregs + 0x0a);
432 century = readb(bregs + 0x0f);
433
434 writeb(val, bregs + 0x0e);
435
436 BCD_TO_BIN(sec);
437 BCD_TO_BIN(min);
438 BCD_TO_BIN(hour);
439 BCD_TO_BIN(day);
440 BCD_TO_BIN(mon);
441 BCD_TO_BIN(year);
442 BCD_TO_BIN(century);
443
444 year += (century * 100);
445
446 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
447 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
448 set_normalized_timespec(&wall_to_monotonic,
449 -xtime.tv_sec, -xtime.tv_nsec);
450 }
451
452 /* davem suggests we keep this within the 4M locked kernel image */
453 static u32 starfire_get_time(void)
454 {
455 static char obp_gettod[32];
456 static u32 unix_tod;
457
458 sprintf(obp_gettod, "h# %08x unix-gettod",
459 (unsigned int) (long) &unix_tod);
460 prom_feval(obp_gettod);
461
462 return unix_tod;
463 }
464
465 static int starfire_set_time(u32 val)
466 {
467 /* Do nothing, time is set using the service processor
468 * console on this platform.
469 */
470 return 0;
471 }
472
473 static u32 hypervisor_get_time(void)
474 {
475 unsigned long ret, time;
476 int retries = 10000;
477
478 retry:
479 ret = sun4v_tod_get(&time);
480 if (ret == HV_EOK)
481 return time;
482 if (ret == HV_EWOULDBLOCK) {
483 if (--retries > 0) {
484 udelay(100);
485 goto retry;
486 }
487 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
488 return 0;
489 }
490 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
491 return 0;
492 }
493
494 static int hypervisor_set_time(u32 secs)
495 {
496 unsigned long ret;
497 int retries = 10000;
498
499 retry:
500 ret = sun4v_tod_set(secs);
501 if (ret == HV_EOK)
502 return 0;
503 if (ret == HV_EWOULDBLOCK) {
504 if (--retries > 0) {
505 udelay(100);
506 goto retry;
507 }
508 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
509 return -EAGAIN;
510 }
511 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
512 return -EOPNOTSUPP;
513 }
514
515 unsigned long cmos_regs;
516 EXPORT_SYMBOL(cmos_regs);
517
518 struct resource rtc_cmos_resource;
519
520 static struct platform_device rtc_cmos_device = {
521 .name = "rtc_cmos",
522 .id = -1,
523 .resource = &rtc_cmos_resource,
524 .num_resources = 1,
525 };
526
527 static int __devinit rtc_probe(struct of_device *op, const struct of_device_id *match)
528 {
529 struct resource *r;
530
531 printk(KERN_INFO "%s: RTC regs at 0x%lx\n",
532 op->node->full_name, op->resource[0].start);
533
534 /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
535 * up a fake resource so that the probe works for all cases.
536 * When the RTC is behind an ISA bus it will have IORESOURCE_IO
537 * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
538 */
539
540 r = &rtc_cmos_resource;
541 r->flags = IORESOURCE_IO;
542 r->name = op->resource[0].name;
543 r->start = op->resource[0].start;
544 r->end = op->resource[0].end;
545
546 cmos_regs = op->resource[0].start;
547 return platform_device_register(&rtc_cmos_device);
548 }
549
550 static struct of_device_id rtc_match[] = {
551 {
552 .name = "rtc",
553 .compatible = "m5819",
554 },
555 {
556 .name = "rtc",
557 .compatible = "isa-m5819p",
558 },
559 {
560 .name = "rtc",
561 .compatible = "isa-m5823p",
562 },
563 {
564 .name = "rtc",
565 .compatible = "ds1287",
566 },
567 {},
568 };
569
570 static struct of_platform_driver rtc_driver = {
571 .match_table = rtc_match,
572 .probe = rtc_probe,
573 .driver = {
574 .name = "rtc",
575 },
576 };
577
578 static int __devinit bq4802_probe(struct of_device *op, const struct of_device_id *match)
579 {
580 struct device_node *dp = op->node;
581 unsigned long flags;
582
583 bq4802_regs = of_ioremap(&op->resource[0], 0, resource_size(&op->resource[0]), "bq4802");
584 if (!bq4802_regs)
585 return -ENOMEM;
586
587 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, bq4802_regs);
588
589 local_irq_save(flags);
590
591 set_system_time();
592
593 local_irq_restore(flags);
594
595 return 0;
596 }
597
598 static struct of_device_id bq4802_match[] = {
599 {
600 .name = "rtc",
601 .compatible = "bq4802",
602 },
603 };
604
605 static struct of_platform_driver bq4802_driver = {
606 .match_table = bq4802_match,
607 .probe = bq4802_probe,
608 .driver = {
609 .name = "bq4802",
610 },
611 };
612
613 static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
614 {
615 struct platform_device *pdev = to_platform_device(dev);
616 void __iomem *regs;
617 unsigned char val;
618
619 regs = (void __iomem *) pdev->resource[0].start;
620 val = readb(regs + ofs);
621
622 /* the year 0 is 1968 */
623 if (ofs == M48T59_YEAR) {
624 val += 0x68;
625 if ((val & 0xf) > 9)
626 val += 6;
627 }
628 return val;
629 }
630
631 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
632 {
633 struct platform_device *pdev = to_platform_device(dev);
634 void __iomem *regs;
635
636 regs = (void __iomem *) pdev->resource[0].start;
637 if (ofs == M48T59_YEAR) {
638 if (val < 0x68)
639 val += 0x32;
640 else
641 val -= 0x68;
642 if ((val & 0xf) > 9)
643 val += 6;
644 if ((val & 0xf0) > 0x9A)
645 val += 0x60;
646 }
647 writeb(val, regs + ofs);
648 }
649
650 static struct m48t59_plat_data m48t59_data = {
651 .read_byte = mostek_read_byte,
652 .write_byte = mostek_write_byte,
653 };
654
655 static struct platform_device m48t59_rtc = {
656 .name = "rtc-m48t59",
657 .id = 0,
658 .num_resources = 1,
659 .dev = {
660 .platform_data = &m48t59_data,
661 },
662 };
663
664 static int __devinit mostek_probe(struct of_device *op, const struct of_device_id *match)
665 {
666 struct device_node *dp = op->node;
667
668 /* On an Enterprise system there can be multiple mostek clocks.
669 * We should only match the one that is on the central FHC bus.
670 */
671 if (!strcmp(dp->parent->name, "fhc") &&
672 strcmp(dp->parent->parent->name, "central") != 0)
673 return -ENODEV;
674
675 printk(KERN_INFO "%s: Mostek regs at 0x%lx\n",
676 dp->full_name, op->resource[0].start);
677
678 m48t59_rtc.resource = &op->resource[0];
679 return platform_device_register(&m48t59_rtc);
680 }
681
682 static struct of_device_id mostek_match[] = {
683 {
684 .name = "eeprom",
685 },
686 {},
687 };
688
689 static struct of_platform_driver mostek_driver = {
690 .match_table = mostek_match,
691 .probe = mostek_probe,
692 .driver = {
693 .name = "mostek",
694 },
695 };
696
697 static int __init clock_init(void)
698 {
699 if (this_is_starfire) {
700 xtime.tv_sec = starfire_get_time();
701 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
702 set_normalized_timespec(&wall_to_monotonic,
703 -xtime.tv_sec, -xtime.tv_nsec);
704 return 0;
705 }
706 if (tlb_type == hypervisor) {
707 xtime.tv_sec = hypervisor_get_time();
708 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
709 set_normalized_timespec(&wall_to_monotonic,
710 -xtime.tv_sec, -xtime.tv_nsec);
711 return 0;
712 }
713
714 (void) of_register_driver(&rtc_driver, &of_platform_bus_type);
715 (void) of_register_driver(&mostek_driver, &of_platform_bus_type);
716 (void) of_register_driver(&bq4802_driver, &of_platform_bus_type);
717
718 return 0;
719 }
720
721 /* Must be after subsys_initcall() so that busses are probed. Must
722 * be before device_initcall() because things like the RTC driver
723 * need to see the clock registers.
724 */
725 fs_initcall(clock_init);
726
727 /* This is gets the master TICK_INT timer going. */
728 static unsigned long sparc64_init_timers(void)
729 {
730 struct device_node *dp;
731 unsigned long clock;
732
733 dp = of_find_node_by_path("/");
734 if (tlb_type == spitfire) {
735 unsigned long ver, manuf, impl;
736
737 __asm__ __volatile__ ("rdpr %%ver, %0"
738 : "=&r" (ver));
739 manuf = ((ver >> 48) & 0xffff);
740 impl = ((ver >> 32) & 0xffff);
741 if (manuf == 0x17 && impl == 0x13) {
742 /* Hummingbird, aka Ultra-IIe */
743 tick_ops = &hbtick_operations;
744 clock = of_getintprop_default(dp, "stick-frequency", 0);
745 } else {
746 tick_ops = &tick_operations;
747 clock = local_cpu_data().clock_tick;
748 }
749 } else {
750 tick_ops = &stick_operations;
751 clock = of_getintprop_default(dp, "stick-frequency", 0);
752 }
753
754 return clock;
755 }
756
757 struct freq_table {
758 unsigned long clock_tick_ref;
759 unsigned int ref_freq;
760 };
761 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
762
763 unsigned long sparc64_get_clock_tick(unsigned int cpu)
764 {
765 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
766
767 if (ft->clock_tick_ref)
768 return ft->clock_tick_ref;
769 return cpu_data(cpu).clock_tick;
770 }
771
772 #ifdef CONFIG_CPU_FREQ
773
774 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
775 void *data)
776 {
777 struct cpufreq_freqs *freq = data;
778 unsigned int cpu = freq->cpu;
779 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
780
781 if (!ft->ref_freq) {
782 ft->ref_freq = freq->old;
783 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
784 }
785 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
786 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
787 (val == CPUFREQ_RESUMECHANGE)) {
788 cpu_data(cpu).clock_tick =
789 cpufreq_scale(ft->clock_tick_ref,
790 ft->ref_freq,
791 freq->new);
792 }
793
794 return 0;
795 }
796
797 static struct notifier_block sparc64_cpufreq_notifier_block = {
798 .notifier_call = sparc64_cpufreq_notifier
799 };
800
801 static int __init register_sparc64_cpufreq_notifier(void)
802 {
803
804 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
805 CPUFREQ_TRANSITION_NOTIFIER);
806 return 0;
807 }
808
809 core_initcall(register_sparc64_cpufreq_notifier);
810
811 #endif /* CONFIG_CPU_FREQ */
812
813 static int sparc64_next_event(unsigned long delta,
814 struct clock_event_device *evt)
815 {
816 return tick_ops->add_compare(delta) ? -ETIME : 0;
817 }
818
819 static void sparc64_timer_setup(enum clock_event_mode mode,
820 struct clock_event_device *evt)
821 {
822 switch (mode) {
823 case CLOCK_EVT_MODE_ONESHOT:
824 case CLOCK_EVT_MODE_RESUME:
825 break;
826
827 case CLOCK_EVT_MODE_SHUTDOWN:
828 tick_ops->disable_irq();
829 break;
830
831 case CLOCK_EVT_MODE_PERIODIC:
832 case CLOCK_EVT_MODE_UNUSED:
833 WARN_ON(1);
834 break;
835 };
836 }
837
838 static struct clock_event_device sparc64_clockevent = {
839 .features = CLOCK_EVT_FEAT_ONESHOT,
840 .set_mode = sparc64_timer_setup,
841 .set_next_event = sparc64_next_event,
842 .rating = 100,
843 .shift = 30,
844 .irq = -1,
845 };
846 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
847
848 void timer_interrupt(int irq, struct pt_regs *regs)
849 {
850 struct pt_regs *old_regs = set_irq_regs(regs);
851 unsigned long tick_mask = tick_ops->softint_mask;
852 int cpu = smp_processor_id();
853 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
854
855 clear_softint(tick_mask);
856
857 irq_enter();
858
859 kstat_this_cpu.irqs[0]++;
860
861 if (unlikely(!evt->event_handler)) {
862 printk(KERN_WARNING
863 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
864 } else
865 evt->event_handler(evt);
866
867 irq_exit();
868
869 set_irq_regs(old_regs);
870 }
871
872 void __devinit setup_sparc64_timer(void)
873 {
874 struct clock_event_device *sevt;
875 unsigned long pstate;
876
877 /* Guarantee that the following sequences execute
878 * uninterrupted.
879 */
880 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
881 "wrpr %0, %1, %%pstate"
882 : "=r" (pstate)
883 : "i" (PSTATE_IE));
884
885 tick_ops->init_tick();
886
887 /* Restore PSTATE_IE. */
888 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
889 : /* no outputs */
890 : "r" (pstate));
891
892 sevt = &__get_cpu_var(sparc64_events);
893
894 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
895 sevt->cpumask = cpumask_of_cpu(smp_processor_id());
896
897 clockevents_register_device(sevt);
898 }
899
900 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
901
902 static struct clocksource clocksource_tick = {
903 .rating = 100,
904 .mask = CLOCKSOURCE_MASK(64),
905 .shift = 16,
906 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
907 };
908
909 static void __init setup_clockevent_multiplier(unsigned long hz)
910 {
911 unsigned long mult, shift = 32;
912
913 while (1) {
914 mult = div_sc(hz, NSEC_PER_SEC, shift);
915 if (mult && (mult >> 32UL) == 0UL)
916 break;
917
918 shift--;
919 }
920
921 sparc64_clockevent.shift = shift;
922 sparc64_clockevent.mult = mult;
923 }
924
925 static unsigned long tb_ticks_per_usec __read_mostly;
926
927 void __delay(unsigned long loops)
928 {
929 unsigned long bclock, now;
930
931 bclock = tick_ops->get_tick();
932 do {
933 now = tick_ops->get_tick();
934 } while ((now-bclock) < loops);
935 }
936 EXPORT_SYMBOL(__delay);
937
938 void udelay(unsigned long usecs)
939 {
940 __delay(tb_ticks_per_usec * usecs);
941 }
942 EXPORT_SYMBOL(udelay);
943
944 void __init time_init(void)
945 {
946 unsigned long clock = sparc64_init_timers();
947
948 tb_ticks_per_usec = clock / USEC_PER_SEC;
949
950 timer_ticks_per_nsec_quotient =
951 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
952
953 clocksource_tick.name = tick_ops->name;
954 clocksource_tick.mult =
955 clocksource_hz2mult(clock,
956 clocksource_tick.shift);
957 clocksource_tick.read = tick_ops->get_tick;
958
959 printk("clocksource: mult[%x] shift[%d]\n",
960 clocksource_tick.mult, clocksource_tick.shift);
961
962 clocksource_register(&clocksource_tick);
963
964 sparc64_clockevent.name = tick_ops->name;
965
966 setup_clockevent_multiplier(clock);
967
968 sparc64_clockevent.max_delta_ns =
969 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
970 sparc64_clockevent.min_delta_ns =
971 clockevent_delta2ns(0xF, &sparc64_clockevent);
972
973 printk("clockevent: mult[%lx] shift[%d]\n",
974 sparc64_clockevent.mult, sparc64_clockevent.shift);
975
976 setup_sparc64_timer();
977 }
978
979 unsigned long long sched_clock(void)
980 {
981 unsigned long ticks = tick_ops->get_tick();
982
983 return (ticks * timer_ticks_per_nsec_quotient)
984 >> SPARC64_NSEC_PER_CYC_SHIFT;
985 }
986
987 static int set_rtc_mmss(unsigned long nowtime)
988 {
989 int real_seconds, real_minutes, chip_minutes;
990 void __iomem *bregs = bq4802_regs;
991 unsigned long flags;
992 unsigned char val;
993 int retval = 0;
994
995 /*
996 * Not having a register set can lead to trouble.
997 * Also starfire doesn't have a tod clock.
998 */
999 if (!bregs)
1000 return -1;
1001
1002 spin_lock_irqsave(&rtc_lock, flags);
1003
1004 val = readb(bregs + 0x0e);
1005
1006 /* BQ4802 RTC chip. */
1007
1008 writeb(val | 0x08, bregs + 0x0e);
1009
1010 chip_minutes = readb(bregs + 0x02);
1011 BCD_TO_BIN(chip_minutes);
1012 real_seconds = nowtime % 60;
1013 real_minutes = nowtime / 60;
1014 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1015 real_minutes += 30;
1016 real_minutes %= 60;
1017
1018 if (abs(real_minutes - chip_minutes) < 30) {
1019 BIN_TO_BCD(real_seconds);
1020 BIN_TO_BCD(real_minutes);
1021 writeb(real_seconds, bregs + 0x00);
1022 writeb(real_minutes, bregs + 0x02);
1023 } else {
1024 printk(KERN_WARNING
1025 "set_rtc_mmss: can't update from %d to %d\n",
1026 chip_minutes, real_minutes);
1027 retval = -1;
1028 }
1029
1030 writeb(val, bregs + 0x0e);
1031
1032 spin_unlock_irqrestore(&rtc_lock, flags);
1033
1034 return retval;
1035 }
1036
1037 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1038 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1039
1040 #define FEBRUARY 2
1041 #define STARTOFTIME 1970
1042 #define SECDAY 86400L
1043 #define SECYR (SECDAY * 365)
1044 #define leapyear(year) ((year) % 4 == 0 && \
1045 ((year) % 100 != 0 || (year) % 400 == 0))
1046 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1047 #define days_in_month(a) (month_days[(a) - 1])
1048
1049 static int month_days[12] = {
1050 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1051 };
1052
1053 /*
1054 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1055 */
1056 static void GregorianDay(struct rtc_time * tm)
1057 {
1058 int leapsToDate;
1059 int lastYear;
1060 int day;
1061 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1062
1063 lastYear = tm->tm_year - 1;
1064
1065 /*
1066 * Number of leap corrections to apply up to end of last year
1067 */
1068 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1069
1070 /*
1071 * This year is a leap year if it is divisible by 4 except when it is
1072 * divisible by 100 unless it is divisible by 400
1073 *
1074 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1075 */
1076 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1077
1078 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1079 tm->tm_mday;
1080
1081 tm->tm_wday = day % 7;
1082 }
1083
1084 static void to_tm(int tim, struct rtc_time *tm)
1085 {
1086 register int i;
1087 register long hms, day;
1088
1089 day = tim / SECDAY;
1090 hms = tim % SECDAY;
1091
1092 /* Hours, minutes, seconds are easy */
1093 tm->tm_hour = hms / 3600;
1094 tm->tm_min = (hms % 3600) / 60;
1095 tm->tm_sec = (hms % 3600) % 60;
1096
1097 /* Number of years in days */
1098 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1099 day -= days_in_year(i);
1100 tm->tm_year = i;
1101
1102 /* Number of months in days left */
1103 if (leapyear(tm->tm_year))
1104 days_in_month(FEBRUARY) = 29;
1105 for (i = 1; day >= days_in_month(i); i++)
1106 day -= days_in_month(i);
1107 days_in_month(FEBRUARY) = 28;
1108 tm->tm_mon = i;
1109
1110 /* Days are what is left over (+1) from all that. */
1111 tm->tm_mday = day + 1;
1112
1113 /*
1114 * Determine the day of week
1115 */
1116 GregorianDay(tm);
1117 }
1118
1119 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1120 * aka Unix time. So we have to convert to/from rtc_time.
1121 */
1122 static void starfire_get_rtc_time(struct rtc_time *time)
1123 {
1124 u32 seconds = starfire_get_time();
1125
1126 to_tm(seconds, time);
1127 time->tm_year -= 1900;
1128 time->tm_mon -= 1;
1129 }
1130
1131 static int starfire_set_rtc_time(struct rtc_time *time)
1132 {
1133 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1134 time->tm_mday, time->tm_hour,
1135 time->tm_min, time->tm_sec);
1136
1137 return starfire_set_time(seconds);
1138 }
1139
1140 static void hypervisor_get_rtc_time(struct rtc_time *time)
1141 {
1142 u32 seconds = hypervisor_get_time();
1143
1144 to_tm(seconds, time);
1145 time->tm_year -= 1900;
1146 time->tm_mon -= 1;
1147 }
1148
1149 static int hypervisor_set_rtc_time(struct rtc_time *time)
1150 {
1151 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1152 time->tm_mday, time->tm_hour,
1153 time->tm_min, time->tm_sec);
1154
1155 return hypervisor_set_time(seconds);
1156 }
1157
1158 static void bq4802_get_rtc_time(struct rtc_time *time)
1159 {
1160 unsigned char val = readb(bq4802_regs + 0x0e);
1161 unsigned int century;
1162
1163 writeb(val | 0x08, bq4802_regs + 0x0e);
1164
1165 time->tm_sec = readb(bq4802_regs + 0x00);
1166 time->tm_min = readb(bq4802_regs + 0x02);
1167 time->tm_hour = readb(bq4802_regs + 0x04);
1168 time->tm_mday = readb(bq4802_regs + 0x06);
1169 time->tm_mon = readb(bq4802_regs + 0x09);
1170 time->tm_year = readb(bq4802_regs + 0x0a);
1171 time->tm_wday = readb(bq4802_regs + 0x08);
1172 century = readb(bq4802_regs + 0x0f);
1173
1174 writeb(val, bq4802_regs + 0x0e);
1175
1176 BCD_TO_BIN(time->tm_sec);
1177 BCD_TO_BIN(time->tm_min);
1178 BCD_TO_BIN(time->tm_hour);
1179 BCD_TO_BIN(time->tm_mday);
1180 BCD_TO_BIN(time->tm_mon);
1181 BCD_TO_BIN(time->tm_year);
1182 BCD_TO_BIN(time->tm_wday);
1183 BCD_TO_BIN(century);
1184
1185 time->tm_year += (century * 100);
1186 time->tm_year -= 1900;
1187
1188 time->tm_mon--;
1189 }
1190
1191 static int bq4802_set_rtc_time(struct rtc_time *time)
1192 {
1193 unsigned char val = readb(bq4802_regs + 0x0e);
1194 unsigned char sec, min, hrs, day, mon, yrs, century;
1195 unsigned int year;
1196
1197 year = time->tm_year + 1900;
1198 century = year / 100;
1199 yrs = year % 100;
1200
1201 mon = time->tm_mon + 1; /* tm_mon starts at zero */
1202 day = time->tm_mday;
1203 hrs = time->tm_hour;
1204 min = time->tm_min;
1205 sec = time->tm_sec;
1206
1207 BIN_TO_BCD(sec);
1208 BIN_TO_BCD(min);
1209 BIN_TO_BCD(hrs);
1210 BIN_TO_BCD(day);
1211 BIN_TO_BCD(mon);
1212 BIN_TO_BCD(yrs);
1213 BIN_TO_BCD(century);
1214
1215 writeb(val | 0x08, bq4802_regs + 0x0e);
1216
1217 writeb(sec, bq4802_regs + 0x00);
1218 writeb(min, bq4802_regs + 0x02);
1219 writeb(hrs, bq4802_regs + 0x04);
1220 writeb(day, bq4802_regs + 0x06);
1221 writeb(mon, bq4802_regs + 0x09);
1222 writeb(yrs, bq4802_regs + 0x0a);
1223 writeb(century, bq4802_regs + 0x0f);
1224
1225 writeb(val, bq4802_regs + 0x0e);
1226
1227 return 0;
1228 }
1229
1230 struct mini_rtc_ops {
1231 void (*get_rtc_time)(struct rtc_time *);
1232 int (*set_rtc_time)(struct rtc_time *);
1233 };
1234
1235 static struct mini_rtc_ops starfire_rtc_ops = {
1236 .get_rtc_time = starfire_get_rtc_time,
1237 .set_rtc_time = starfire_set_rtc_time,
1238 };
1239
1240 static struct mini_rtc_ops hypervisor_rtc_ops = {
1241 .get_rtc_time = hypervisor_get_rtc_time,
1242 .set_rtc_time = hypervisor_set_rtc_time,
1243 };
1244
1245 static struct mini_rtc_ops bq4802_rtc_ops = {
1246 .get_rtc_time = bq4802_get_rtc_time,
1247 .set_rtc_time = bq4802_set_rtc_time,
1248 };
1249
1250 static struct mini_rtc_ops *mini_rtc_ops;
1251
1252 static inline void mini_get_rtc_time(struct rtc_time *time)
1253 {
1254 unsigned long flags;
1255
1256 spin_lock_irqsave(&rtc_lock, flags);
1257 mini_rtc_ops->get_rtc_time(time);
1258 spin_unlock_irqrestore(&rtc_lock, flags);
1259 }
1260
1261 static inline int mini_set_rtc_time(struct rtc_time *time)
1262 {
1263 unsigned long flags;
1264 int err;
1265
1266 spin_lock_irqsave(&rtc_lock, flags);
1267 err = mini_rtc_ops->set_rtc_time(time);
1268 spin_unlock_irqrestore(&rtc_lock, flags);
1269
1270 return err;
1271 }
1272
1273 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1274 unsigned int cmd, unsigned long arg)
1275 {
1276 struct rtc_time wtime;
1277 void __user *argp = (void __user *)arg;
1278
1279 switch (cmd) {
1280
1281 case RTC_PLL_GET:
1282 return -EINVAL;
1283
1284 case RTC_PLL_SET:
1285 return -EINVAL;
1286
1287 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1288 return 0;
1289
1290 case RTC_UIE_ON: /* enable ints for RTC updates. */
1291 return -EINVAL;
1292
1293 case RTC_RD_TIME: /* Read the time/date from RTC */
1294 /* this doesn't get week-day, who cares */
1295 memset(&wtime, 0, sizeof(wtime));
1296 mini_get_rtc_time(&wtime);
1297
1298 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1299
1300 case RTC_SET_TIME: /* Set the RTC */
1301 {
1302 int year, days;
1303
1304 if (!capable(CAP_SYS_TIME))
1305 return -EACCES;
1306
1307 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1308 return -EFAULT;
1309
1310 year = wtime.tm_year + 1900;
1311 days = month_days[wtime.tm_mon] +
1312 ((wtime.tm_mon == 1) && leapyear(year));
1313
1314 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1315 (wtime.tm_mday < 1))
1316 return -EINVAL;
1317
1318 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1319 return -EINVAL;
1320
1321 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1322 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1323 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1324 return -EINVAL;
1325
1326 return mini_set_rtc_time(&wtime);
1327 }
1328 }
1329
1330 return -EINVAL;
1331 }
1332
1333 static int mini_rtc_open(struct inode *inode, struct file *file)
1334 {
1335 lock_kernel();
1336 if (mini_rtc_status & RTC_IS_OPEN) {
1337 unlock_kernel();
1338 return -EBUSY;
1339 }
1340
1341 mini_rtc_status |= RTC_IS_OPEN;
1342 unlock_kernel();
1343
1344 return 0;
1345 }
1346
1347 static int mini_rtc_release(struct inode *inode, struct file *file)
1348 {
1349 mini_rtc_status &= ~RTC_IS_OPEN;
1350 return 0;
1351 }
1352
1353
1354 static const struct file_operations mini_rtc_fops = {
1355 .owner = THIS_MODULE,
1356 .ioctl = mini_rtc_ioctl,
1357 .open = mini_rtc_open,
1358 .release = mini_rtc_release,
1359 };
1360
1361 static struct miscdevice rtc_mini_dev =
1362 {
1363 .minor = RTC_MINOR,
1364 .name = "rtc",
1365 .fops = &mini_rtc_fops,
1366 };
1367
1368 static int __init rtc_mini_init(void)
1369 {
1370 int retval;
1371
1372 if (tlb_type == hypervisor)
1373 mini_rtc_ops = &hypervisor_rtc_ops;
1374 else if (this_is_starfire)
1375 mini_rtc_ops = &starfire_rtc_ops;
1376 else if (bq4802_regs)
1377 mini_rtc_ops = &bq4802_rtc_ops;
1378 else
1379 return -ENODEV;
1380
1381 printk(KERN_INFO "Mini RTC Driver\n");
1382
1383 retval = misc_register(&rtc_mini_dev);
1384 if (retval < 0)
1385 return retval;
1386
1387 return 0;
1388 }
1389
1390 static void __exit rtc_mini_exit(void)
1391 {
1392 misc_deregister(&rtc_mini_dev);
1393 }
1394
1395 int __devinit read_current_timer(unsigned long *timer_val)
1396 {
1397 *timer_val = tick_ops->get_tick();
1398 return 0;
1399 }
1400
1401 module_init(rtc_mini_init);
1402 module_exit(rtc_mini_exit);
kernel source for telekom puls (alcatel/mediatek)