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sparc64: Use generic sun4v RTC driver.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / sparc64 / kernel / time.c
1 /* time.c: UltraSparc timer and TOD clock support.
2 *
3 * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
5 *
6 * Based largely on code which is:
7 *
8 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
9 */
10
11 #include <linux/errno.h>
12 #include <linux/module.h>
13 #include <linux/sched.h>
14 #include <linux/smp_lock.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/miscdevice.h>
32 #include <linux/rtc.h>
33 #include <linux/rtc/m48t59.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
37 #include <linux/of_device.h>
38 #include <linux/platform_device.h>
39
40 #include <asm/oplib.h>
41 #include <asm/timer.h>
42 #include <asm/irq.h>
43 #include <asm/io.h>
44 #include <asm/prom.h>
45 #include <asm/starfire.h>
46 #include <asm/smp.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
50 #include <asm/irq_regs.h>
51
52 #include "entry.h"
53
54 DEFINE_SPINLOCK(rtc_lock);
55
56 #define TICK_PRIV_BIT (1UL << 63)
57 #define TICKCMP_IRQ_BIT (1UL << 63)
58
59 #ifdef CONFIG_SMP
60 unsigned long profile_pc(struct pt_regs *regs)
61 {
62 unsigned long pc = instruction_pointer(regs);
63
64 if (in_lock_functions(pc))
65 return regs->u_regs[UREG_RETPC];
66 return pc;
67 }
68 EXPORT_SYMBOL(profile_pc);
69 #endif
70
71 static void tick_disable_protection(void)
72 {
73 /* Set things up so user can access tick register for profiling
74 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
75 * read back of %tick after writing it.
76 */
77 __asm__ __volatile__(
78 " ba,pt %%xcc, 1f\n"
79 " nop\n"
80 " .align 64\n"
81 "1: rd %%tick, %%g2\n"
82 " add %%g2, 6, %%g2\n"
83 " andn %%g2, %0, %%g2\n"
84 " wrpr %%g2, 0, %%tick\n"
85 " rdpr %%tick, %%g0"
86 : /* no outputs */
87 : "r" (TICK_PRIV_BIT)
88 : "g2");
89 }
90
91 static void tick_disable_irq(void)
92 {
93 __asm__ __volatile__(
94 " ba,pt %%xcc, 1f\n"
95 " nop\n"
96 " .align 64\n"
97 "1: wr %0, 0x0, %%tick_cmpr\n"
98 " rd %%tick_cmpr, %%g0"
99 : /* no outputs */
100 : "r" (TICKCMP_IRQ_BIT));
101 }
102
103 static void tick_init_tick(void)
104 {
105 tick_disable_protection();
106 tick_disable_irq();
107 }
108
109 static unsigned long tick_get_tick(void)
110 {
111 unsigned long ret;
112
113 __asm__ __volatile__("rd %%tick, %0\n\t"
114 "mov %0, %0"
115 : "=r" (ret));
116
117 return ret & ~TICK_PRIV_BIT;
118 }
119
120 static int tick_add_compare(unsigned long adj)
121 {
122 unsigned long orig_tick, new_tick, new_compare;
123
124 __asm__ __volatile__("rd %%tick, %0"
125 : "=r" (orig_tick));
126
127 orig_tick &= ~TICKCMP_IRQ_BIT;
128
129 /* Workaround for Spitfire Errata (#54 I think??), I discovered
130 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
131 * number 103640.
132 *
133 * On Blackbird writes to %tick_cmpr can fail, the
134 * workaround seems to be to execute the wr instruction
135 * at the start of an I-cache line, and perform a dummy
136 * read back from %tick_cmpr right after writing to it. -DaveM
137 */
138 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
139 " add %1, %2, %0\n\t"
140 ".align 64\n"
141 "1:\n\t"
142 "wr %0, 0, %%tick_cmpr\n\t"
143 "rd %%tick_cmpr, %%g0\n\t"
144 : "=r" (new_compare)
145 : "r" (orig_tick), "r" (adj));
146
147 __asm__ __volatile__("rd %%tick, %0"
148 : "=r" (new_tick));
149 new_tick &= ~TICKCMP_IRQ_BIT;
150
151 return ((long)(new_tick - (orig_tick+adj))) > 0L;
152 }
153
154 static unsigned long tick_add_tick(unsigned long adj)
155 {
156 unsigned long new_tick;
157
158 /* Also need to handle Blackbird bug here too. */
159 __asm__ __volatile__("rd %%tick, %0\n\t"
160 "add %0, %1, %0\n\t"
161 "wrpr %0, 0, %%tick\n\t"
162 : "=&r" (new_tick)
163 : "r" (adj));
164
165 return new_tick;
166 }
167
168 static struct sparc64_tick_ops tick_operations __read_mostly = {
169 .name = "tick",
170 .init_tick = tick_init_tick,
171 .disable_irq = tick_disable_irq,
172 .get_tick = tick_get_tick,
173 .add_tick = tick_add_tick,
174 .add_compare = tick_add_compare,
175 .softint_mask = 1UL << 0,
176 };
177
178 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
179
180 static void stick_disable_irq(void)
181 {
182 __asm__ __volatile__(
183 "wr %0, 0x0, %%asr25"
184 : /* no outputs */
185 : "r" (TICKCMP_IRQ_BIT));
186 }
187
188 static void stick_init_tick(void)
189 {
190 /* Writes to the %tick and %stick register are not
191 * allowed on sun4v. The Hypervisor controls that
192 * bit, per-strand.
193 */
194 if (tlb_type != hypervisor) {
195 tick_disable_protection();
196 tick_disable_irq();
197
198 /* Let the user get at STICK too. */
199 __asm__ __volatile__(
200 " rd %%asr24, %%g2\n"
201 " andn %%g2, %0, %%g2\n"
202 " wr %%g2, 0, %%asr24"
203 : /* no outputs */
204 : "r" (TICK_PRIV_BIT)
205 : "g1", "g2");
206 }
207
208 stick_disable_irq();
209 }
210
211 static unsigned long stick_get_tick(void)
212 {
213 unsigned long ret;
214
215 __asm__ __volatile__("rd %%asr24, %0"
216 : "=r" (ret));
217
218 return ret & ~TICK_PRIV_BIT;
219 }
220
221 static unsigned long stick_add_tick(unsigned long adj)
222 {
223 unsigned long new_tick;
224
225 __asm__ __volatile__("rd %%asr24, %0\n\t"
226 "add %0, %1, %0\n\t"
227 "wr %0, 0, %%asr24\n\t"
228 : "=&r" (new_tick)
229 : "r" (adj));
230
231 return new_tick;
232 }
233
234 static int stick_add_compare(unsigned long adj)
235 {
236 unsigned long orig_tick, new_tick;
237
238 __asm__ __volatile__("rd %%asr24, %0"
239 : "=r" (orig_tick));
240 orig_tick &= ~TICKCMP_IRQ_BIT;
241
242 __asm__ __volatile__("wr %0, 0, %%asr25"
243 : /* no outputs */
244 : "r" (orig_tick + adj));
245
246 __asm__ __volatile__("rd %%asr24, %0"
247 : "=r" (new_tick));
248 new_tick &= ~TICKCMP_IRQ_BIT;
249
250 return ((long)(new_tick - (orig_tick+adj))) > 0L;
251 }
252
253 static struct sparc64_tick_ops stick_operations __read_mostly = {
254 .name = "stick",
255 .init_tick = stick_init_tick,
256 .disable_irq = stick_disable_irq,
257 .get_tick = stick_get_tick,
258 .add_tick = stick_add_tick,
259 .add_compare = stick_add_compare,
260 .softint_mask = 1UL << 16,
261 };
262
263 /* On Hummingbird the STICK/STICK_CMPR register is implemented
264 * in I/O space. There are two 64-bit registers each, the
265 * first holds the low 32-bits of the value and the second holds
266 * the high 32-bits.
267 *
268 * Since STICK is constantly updating, we have to access it carefully.
269 *
270 * The sequence we use to read is:
271 * 1) read high
272 * 2) read low
273 * 3) read high again, if it rolled re-read both low and high again.
274 *
275 * Writing STICK safely is also tricky:
276 * 1) write low to zero
277 * 2) write high
278 * 3) write low
279 */
280 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
281 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
282
283 static unsigned long __hbird_read_stick(void)
284 {
285 unsigned long ret, tmp1, tmp2, tmp3;
286 unsigned long addr = HBIRD_STICK_ADDR+8;
287
288 __asm__ __volatile__("ldxa [%1] %5, %2\n"
289 "1:\n\t"
290 "sub %1, 0x8, %1\n\t"
291 "ldxa [%1] %5, %3\n\t"
292 "add %1, 0x8, %1\n\t"
293 "ldxa [%1] %5, %4\n\t"
294 "cmp %4, %2\n\t"
295 "bne,a,pn %%xcc, 1b\n\t"
296 " mov %4, %2\n\t"
297 "sllx %4, 32, %4\n\t"
298 "or %3, %4, %0\n\t"
299 : "=&r" (ret), "=&r" (addr),
300 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
301 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
302
303 return ret;
304 }
305
306 static void __hbird_write_stick(unsigned long val)
307 {
308 unsigned long low = (val & 0xffffffffUL);
309 unsigned long high = (val >> 32UL);
310 unsigned long addr = HBIRD_STICK_ADDR;
311
312 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
313 "add %0, 0x8, %0\n\t"
314 "stxa %3, [%0] %4\n\t"
315 "sub %0, 0x8, %0\n\t"
316 "stxa %2, [%0] %4"
317 : "=&r" (addr)
318 : "0" (addr), "r" (low), "r" (high),
319 "i" (ASI_PHYS_BYPASS_EC_E));
320 }
321
322 static void __hbird_write_compare(unsigned long val)
323 {
324 unsigned long low = (val & 0xffffffffUL);
325 unsigned long high = (val >> 32UL);
326 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
327
328 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
329 "sub %0, 0x8, %0\n\t"
330 "stxa %2, [%0] %4"
331 : "=&r" (addr)
332 : "0" (addr), "r" (low), "r" (high),
333 "i" (ASI_PHYS_BYPASS_EC_E));
334 }
335
336 static void hbtick_disable_irq(void)
337 {
338 __hbird_write_compare(TICKCMP_IRQ_BIT);
339 }
340
341 static void hbtick_init_tick(void)
342 {
343 tick_disable_protection();
344
345 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
346 * XXX into actually sending STICK interrupts. I think because
347 * XXX of how we store %tick_cmpr in head.S this somehow resets the
348 * XXX {TICK + STICK} interrupt mux. -DaveM
349 */
350 __hbird_write_stick(__hbird_read_stick());
351
352 hbtick_disable_irq();
353 }
354
355 static unsigned long hbtick_get_tick(void)
356 {
357 return __hbird_read_stick() & ~TICK_PRIV_BIT;
358 }
359
360 static unsigned long hbtick_add_tick(unsigned long adj)
361 {
362 unsigned long val;
363
364 val = __hbird_read_stick() + adj;
365 __hbird_write_stick(val);
366
367 return val;
368 }
369
370 static int hbtick_add_compare(unsigned long adj)
371 {
372 unsigned long val = __hbird_read_stick();
373 unsigned long val2;
374
375 val &= ~TICKCMP_IRQ_BIT;
376 val += adj;
377 __hbird_write_compare(val);
378
379 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
380
381 return ((long)(val2 - val)) > 0L;
382 }
383
384 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
385 .name = "hbtick",
386 .init_tick = hbtick_init_tick,
387 .disable_irq = hbtick_disable_irq,
388 .get_tick = hbtick_get_tick,
389 .add_tick = hbtick_add_tick,
390 .add_compare = hbtick_add_compare,
391 .softint_mask = 1UL << 0,
392 };
393
394 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
395
396 int update_persistent_clock(struct timespec now)
397 {
398 struct rtc_device *rtc = rtc_class_open("rtc0");
399
400 if (rtc)
401 return rtc_set_mmss(rtc, now.tv_sec);
402
403 return -1;
404 }
405
406 /* davem suggests we keep this within the 4M locked kernel image */
407 static u32 starfire_get_time(void)
408 {
409 static char obp_gettod[32];
410 static u32 unix_tod;
411
412 sprintf(obp_gettod, "h# %08x unix-gettod",
413 (unsigned int) (long) &unix_tod);
414 prom_feval(obp_gettod);
415
416 return unix_tod;
417 }
418
419 static int starfire_set_time(u32 val)
420 {
421 /* Do nothing, time is set using the service processor
422 * console on this platform.
423 */
424 return 0;
425 }
426
427 unsigned long cmos_regs;
428 EXPORT_SYMBOL(cmos_regs);
429
430 struct resource rtc_cmos_resource;
431
432 static struct platform_device rtc_cmos_device = {
433 .name = "rtc_cmos",
434 .id = -1,
435 .resource = &rtc_cmos_resource,
436 .num_resources = 1,
437 };
438
439 static int __devinit rtc_probe(struct of_device *op, const struct of_device_id *match)
440 {
441 struct resource *r;
442
443 printk(KERN_INFO "%s: RTC regs at 0x%lx\n",
444 op->node->full_name, op->resource[0].start);
445
446 /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
447 * up a fake resource so that the probe works for all cases.
448 * When the RTC is behind an ISA bus it will have IORESOURCE_IO
449 * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
450 */
451
452 r = &rtc_cmos_resource;
453 r->flags = IORESOURCE_IO;
454 r->name = op->resource[0].name;
455 r->start = op->resource[0].start;
456 r->end = op->resource[0].end;
457
458 cmos_regs = op->resource[0].start;
459 return platform_device_register(&rtc_cmos_device);
460 }
461
462 static struct of_device_id rtc_match[] = {
463 {
464 .name = "rtc",
465 .compatible = "m5819",
466 },
467 {
468 .name = "rtc",
469 .compatible = "isa-m5819p",
470 },
471 {
472 .name = "rtc",
473 .compatible = "isa-m5823p",
474 },
475 {
476 .name = "rtc",
477 .compatible = "ds1287",
478 },
479 {},
480 };
481
482 static struct of_platform_driver rtc_driver = {
483 .match_table = rtc_match,
484 .probe = rtc_probe,
485 .driver = {
486 .name = "rtc",
487 },
488 };
489
490 static struct platform_device rtc_bq4802_device = {
491 .name = "rtc-bq4802",
492 .id = -1,
493 .num_resources = 1,
494 };
495
496 static int __devinit bq4802_probe(struct of_device *op, const struct of_device_id *match)
497 {
498
499 printk(KERN_INFO "%s: BQ4802 regs at 0x%lx\n",
500 op->node->full_name, op->resource[0].start);
501
502 rtc_bq4802_device.resource = &op->resource[0];
503 return platform_device_register(&rtc_bq4802_device);
504 }
505
506 static struct of_device_id bq4802_match[] = {
507 {
508 .name = "rtc",
509 .compatible = "bq4802",
510 },
511 };
512
513 static struct of_platform_driver bq4802_driver = {
514 .match_table = bq4802_match,
515 .probe = bq4802_probe,
516 .driver = {
517 .name = "bq4802",
518 },
519 };
520
521 static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
522 {
523 struct platform_device *pdev = to_platform_device(dev);
524 void __iomem *regs;
525 unsigned char val;
526
527 regs = (void __iomem *) pdev->resource[0].start;
528 val = readb(regs + ofs);
529
530 /* the year 0 is 1968 */
531 if (ofs == M48T59_YEAR) {
532 val += 0x68;
533 if ((val & 0xf) > 9)
534 val += 6;
535 }
536 return val;
537 }
538
539 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
540 {
541 struct platform_device *pdev = to_platform_device(dev);
542 void __iomem *regs;
543
544 regs = (void __iomem *) pdev->resource[0].start;
545 if (ofs == M48T59_YEAR) {
546 if (val < 0x68)
547 val += 0x32;
548 else
549 val -= 0x68;
550 if ((val & 0xf) > 9)
551 val += 6;
552 if ((val & 0xf0) > 0x9A)
553 val += 0x60;
554 }
555 writeb(val, regs + ofs);
556 }
557
558 static struct m48t59_plat_data m48t59_data = {
559 .read_byte = mostek_read_byte,
560 .write_byte = mostek_write_byte,
561 };
562
563 static struct platform_device m48t59_rtc = {
564 .name = "rtc-m48t59",
565 .id = 0,
566 .num_resources = 1,
567 .dev = {
568 .platform_data = &m48t59_data,
569 },
570 };
571
572 static int __devinit mostek_probe(struct of_device *op, const struct of_device_id *match)
573 {
574 struct device_node *dp = op->node;
575
576 /* On an Enterprise system there can be multiple mostek clocks.
577 * We should only match the one that is on the central FHC bus.
578 */
579 if (!strcmp(dp->parent->name, "fhc") &&
580 strcmp(dp->parent->parent->name, "central") != 0)
581 return -ENODEV;
582
583 printk(KERN_INFO "%s: Mostek regs at 0x%lx\n",
584 dp->full_name, op->resource[0].start);
585
586 m48t59_rtc.resource = &op->resource[0];
587 return platform_device_register(&m48t59_rtc);
588 }
589
590 static struct of_device_id mostek_match[] = {
591 {
592 .name = "eeprom",
593 },
594 {},
595 };
596
597 static struct of_platform_driver mostek_driver = {
598 .match_table = mostek_match,
599 .probe = mostek_probe,
600 .driver = {
601 .name = "mostek",
602 },
603 };
604
605 static struct platform_device rtc_sun4v_device = {
606 .name = "rtc-sun4v",
607 .id = -1,
608 };
609
610 static int __init clock_init(void)
611 {
612 if (this_is_starfire) {
613 xtime.tv_sec = starfire_get_time();
614 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
615 set_normalized_timespec(&wall_to_monotonic,
616 -xtime.tv_sec, -xtime.tv_nsec);
617 return 0;
618 }
619 if (tlb_type == hypervisor)
620 return platform_device_register(&rtc_sun4v_device);
621
622 (void) of_register_driver(&rtc_driver, &of_platform_bus_type);
623 (void) of_register_driver(&mostek_driver, &of_platform_bus_type);
624 (void) of_register_driver(&bq4802_driver, &of_platform_bus_type);
625
626 return 0;
627 }
628
629 /* Must be after subsys_initcall() so that busses are probed. Must
630 * be before device_initcall() because things like the RTC driver
631 * need to see the clock registers.
632 */
633 fs_initcall(clock_init);
634
635 /* This is gets the master TICK_INT timer going. */
636 static unsigned long sparc64_init_timers(void)
637 {
638 struct device_node *dp;
639 unsigned long clock;
640
641 dp = of_find_node_by_path("/");
642 if (tlb_type == spitfire) {
643 unsigned long ver, manuf, impl;
644
645 __asm__ __volatile__ ("rdpr %%ver, %0"
646 : "=&r" (ver));
647 manuf = ((ver >> 48) & 0xffff);
648 impl = ((ver >> 32) & 0xffff);
649 if (manuf == 0x17 && impl == 0x13) {
650 /* Hummingbird, aka Ultra-IIe */
651 tick_ops = &hbtick_operations;
652 clock = of_getintprop_default(dp, "stick-frequency", 0);
653 } else {
654 tick_ops = &tick_operations;
655 clock = local_cpu_data().clock_tick;
656 }
657 } else {
658 tick_ops = &stick_operations;
659 clock = of_getintprop_default(dp, "stick-frequency", 0);
660 }
661
662 return clock;
663 }
664
665 struct freq_table {
666 unsigned long clock_tick_ref;
667 unsigned int ref_freq;
668 };
669 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
670
671 unsigned long sparc64_get_clock_tick(unsigned int cpu)
672 {
673 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
674
675 if (ft->clock_tick_ref)
676 return ft->clock_tick_ref;
677 return cpu_data(cpu).clock_tick;
678 }
679
680 #ifdef CONFIG_CPU_FREQ
681
682 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
683 void *data)
684 {
685 struct cpufreq_freqs *freq = data;
686 unsigned int cpu = freq->cpu;
687 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
688
689 if (!ft->ref_freq) {
690 ft->ref_freq = freq->old;
691 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
692 }
693 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
694 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
695 (val == CPUFREQ_RESUMECHANGE)) {
696 cpu_data(cpu).clock_tick =
697 cpufreq_scale(ft->clock_tick_ref,
698 ft->ref_freq,
699 freq->new);
700 }
701
702 return 0;
703 }
704
705 static struct notifier_block sparc64_cpufreq_notifier_block = {
706 .notifier_call = sparc64_cpufreq_notifier
707 };
708
709 static int __init register_sparc64_cpufreq_notifier(void)
710 {
711
712 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
713 CPUFREQ_TRANSITION_NOTIFIER);
714 return 0;
715 }
716
717 core_initcall(register_sparc64_cpufreq_notifier);
718
719 #endif /* CONFIG_CPU_FREQ */
720
721 static int sparc64_next_event(unsigned long delta,
722 struct clock_event_device *evt)
723 {
724 return tick_ops->add_compare(delta) ? -ETIME : 0;
725 }
726
727 static void sparc64_timer_setup(enum clock_event_mode mode,
728 struct clock_event_device *evt)
729 {
730 switch (mode) {
731 case CLOCK_EVT_MODE_ONESHOT:
732 case CLOCK_EVT_MODE_RESUME:
733 break;
734
735 case CLOCK_EVT_MODE_SHUTDOWN:
736 tick_ops->disable_irq();
737 break;
738
739 case CLOCK_EVT_MODE_PERIODIC:
740 case CLOCK_EVT_MODE_UNUSED:
741 WARN_ON(1);
742 break;
743 };
744 }
745
746 static struct clock_event_device sparc64_clockevent = {
747 .features = CLOCK_EVT_FEAT_ONESHOT,
748 .set_mode = sparc64_timer_setup,
749 .set_next_event = sparc64_next_event,
750 .rating = 100,
751 .shift = 30,
752 .irq = -1,
753 };
754 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
755
756 void timer_interrupt(int irq, struct pt_regs *regs)
757 {
758 struct pt_regs *old_regs = set_irq_regs(regs);
759 unsigned long tick_mask = tick_ops->softint_mask;
760 int cpu = smp_processor_id();
761 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
762
763 clear_softint(tick_mask);
764
765 irq_enter();
766
767 kstat_this_cpu.irqs[0]++;
768
769 if (unlikely(!evt->event_handler)) {
770 printk(KERN_WARNING
771 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
772 } else
773 evt->event_handler(evt);
774
775 irq_exit();
776
777 set_irq_regs(old_regs);
778 }
779
780 void __devinit setup_sparc64_timer(void)
781 {
782 struct clock_event_device *sevt;
783 unsigned long pstate;
784
785 /* Guarantee that the following sequences execute
786 * uninterrupted.
787 */
788 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
789 "wrpr %0, %1, %%pstate"
790 : "=r" (pstate)
791 : "i" (PSTATE_IE));
792
793 tick_ops->init_tick();
794
795 /* Restore PSTATE_IE. */
796 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
797 : /* no outputs */
798 : "r" (pstate));
799
800 sevt = &__get_cpu_var(sparc64_events);
801
802 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
803 sevt->cpumask = cpumask_of_cpu(smp_processor_id());
804
805 clockevents_register_device(sevt);
806 }
807
808 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
809
810 static struct clocksource clocksource_tick = {
811 .rating = 100,
812 .mask = CLOCKSOURCE_MASK(64),
813 .shift = 16,
814 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
815 };
816
817 static void __init setup_clockevent_multiplier(unsigned long hz)
818 {
819 unsigned long mult, shift = 32;
820
821 while (1) {
822 mult = div_sc(hz, NSEC_PER_SEC, shift);
823 if (mult && (mult >> 32UL) == 0UL)
824 break;
825
826 shift--;
827 }
828
829 sparc64_clockevent.shift = shift;
830 sparc64_clockevent.mult = mult;
831 }
832
833 static unsigned long tb_ticks_per_usec __read_mostly;
834
835 void __delay(unsigned long loops)
836 {
837 unsigned long bclock, now;
838
839 bclock = tick_ops->get_tick();
840 do {
841 now = tick_ops->get_tick();
842 } while ((now-bclock) < loops);
843 }
844 EXPORT_SYMBOL(__delay);
845
846 void udelay(unsigned long usecs)
847 {
848 __delay(tb_ticks_per_usec * usecs);
849 }
850 EXPORT_SYMBOL(udelay);
851
852 void __init time_init(void)
853 {
854 unsigned long clock = sparc64_init_timers();
855
856 tb_ticks_per_usec = clock / USEC_PER_SEC;
857
858 timer_ticks_per_nsec_quotient =
859 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
860
861 clocksource_tick.name = tick_ops->name;
862 clocksource_tick.mult =
863 clocksource_hz2mult(clock,
864 clocksource_tick.shift);
865 clocksource_tick.read = tick_ops->get_tick;
866
867 printk("clocksource: mult[%x] shift[%d]\n",
868 clocksource_tick.mult, clocksource_tick.shift);
869
870 clocksource_register(&clocksource_tick);
871
872 sparc64_clockevent.name = tick_ops->name;
873
874 setup_clockevent_multiplier(clock);
875
876 sparc64_clockevent.max_delta_ns =
877 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
878 sparc64_clockevent.min_delta_ns =
879 clockevent_delta2ns(0xF, &sparc64_clockevent);
880
881 printk("clockevent: mult[%lx] shift[%d]\n",
882 sparc64_clockevent.mult, sparc64_clockevent.shift);
883
884 setup_sparc64_timer();
885 }
886
887 unsigned long long sched_clock(void)
888 {
889 unsigned long ticks = tick_ops->get_tick();
890
891 return (ticks * timer_ticks_per_nsec_quotient)
892 >> SPARC64_NSEC_PER_CYC_SHIFT;
893 }
894
895 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
896 static unsigned char mini_rtc_status; /* bitmapped status byte. */
897
898 #define FEBRUARY 2
899 #define STARTOFTIME 1970
900 #define SECDAY 86400L
901 #define SECYR (SECDAY * 365)
902 #define leapyear(year) ((year) % 4 == 0 && \
903 ((year) % 100 != 0 || (year) % 400 == 0))
904 #define days_in_year(a) (leapyear(a) ? 366 : 365)
905 #define days_in_month(a) (month_days[(a) - 1])
906
907 static int month_days[12] = {
908 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
909 };
910
911 /*
912 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
913 */
914 static void GregorianDay(struct rtc_time * tm)
915 {
916 int leapsToDate;
917 int lastYear;
918 int day;
919 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
920
921 lastYear = tm->tm_year - 1;
922
923 /*
924 * Number of leap corrections to apply up to end of last year
925 */
926 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
927
928 /*
929 * This year is a leap year if it is divisible by 4 except when it is
930 * divisible by 100 unless it is divisible by 400
931 *
932 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
933 */
934 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
935
936 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
937 tm->tm_mday;
938
939 tm->tm_wday = day % 7;
940 }
941
942 static void to_tm(int tim, struct rtc_time *tm)
943 {
944 register int i;
945 register long hms, day;
946
947 day = tim / SECDAY;
948 hms = tim % SECDAY;
949
950 /* Hours, minutes, seconds are easy */
951 tm->tm_hour = hms / 3600;
952 tm->tm_min = (hms % 3600) / 60;
953 tm->tm_sec = (hms % 3600) % 60;
954
955 /* Number of years in days */
956 for (i = STARTOFTIME; day >= days_in_year(i); i++)
957 day -= days_in_year(i);
958 tm->tm_year = i;
959
960 /* Number of months in days left */
961 if (leapyear(tm->tm_year))
962 days_in_month(FEBRUARY) = 29;
963 for (i = 1; day >= days_in_month(i); i++)
964 day -= days_in_month(i);
965 days_in_month(FEBRUARY) = 28;
966 tm->tm_mon = i;
967
968 /* Days are what is left over (+1) from all that. */
969 tm->tm_mday = day + 1;
970
971 /*
972 * Determine the day of week
973 */
974 GregorianDay(tm);
975 }
976
977 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
978 * aka Unix time. So we have to convert to/from rtc_time.
979 */
980 static void starfire_get_rtc_time(struct rtc_time *time)
981 {
982 u32 seconds = starfire_get_time();
983
984 to_tm(seconds, time);
985 time->tm_year -= 1900;
986 time->tm_mon -= 1;
987 }
988
989 static int starfire_set_rtc_time(struct rtc_time *time)
990 {
991 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
992 time->tm_mday, time->tm_hour,
993 time->tm_min, time->tm_sec);
994
995 return starfire_set_time(seconds);
996 }
997
998 struct mini_rtc_ops {
999 void (*get_rtc_time)(struct rtc_time *);
1000 int (*set_rtc_time)(struct rtc_time *);
1001 };
1002
1003 static struct mini_rtc_ops starfire_rtc_ops = {
1004 .get_rtc_time = starfire_get_rtc_time,
1005 .set_rtc_time = starfire_set_rtc_time,
1006 };
1007
1008 static struct mini_rtc_ops *mini_rtc_ops;
1009
1010 static inline void mini_get_rtc_time(struct rtc_time *time)
1011 {
1012 unsigned long flags;
1013
1014 spin_lock_irqsave(&rtc_lock, flags);
1015 mini_rtc_ops->get_rtc_time(time);
1016 spin_unlock_irqrestore(&rtc_lock, flags);
1017 }
1018
1019 static inline int mini_set_rtc_time(struct rtc_time *time)
1020 {
1021 unsigned long flags;
1022 int err;
1023
1024 spin_lock_irqsave(&rtc_lock, flags);
1025 err = mini_rtc_ops->set_rtc_time(time);
1026 spin_unlock_irqrestore(&rtc_lock, flags);
1027
1028 return err;
1029 }
1030
1031 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1032 unsigned int cmd, unsigned long arg)
1033 {
1034 struct rtc_time wtime;
1035 void __user *argp = (void __user *)arg;
1036
1037 switch (cmd) {
1038
1039 case RTC_PLL_GET:
1040 return -EINVAL;
1041
1042 case RTC_PLL_SET:
1043 return -EINVAL;
1044
1045 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1046 return 0;
1047
1048 case RTC_UIE_ON: /* enable ints for RTC updates. */
1049 return -EINVAL;
1050
1051 case RTC_RD_TIME: /* Read the time/date from RTC */
1052 /* this doesn't get week-day, who cares */
1053 memset(&wtime, 0, sizeof(wtime));
1054 mini_get_rtc_time(&wtime);
1055
1056 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1057
1058 case RTC_SET_TIME: /* Set the RTC */
1059 {
1060 int year, days;
1061
1062 if (!capable(CAP_SYS_TIME))
1063 return -EACCES;
1064
1065 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1066 return -EFAULT;
1067
1068 year = wtime.tm_year + 1900;
1069 days = month_days[wtime.tm_mon] +
1070 ((wtime.tm_mon == 1) && leapyear(year));
1071
1072 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1073 (wtime.tm_mday < 1))
1074 return -EINVAL;
1075
1076 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1077 return -EINVAL;
1078
1079 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1080 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1081 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1082 return -EINVAL;
1083
1084 return mini_set_rtc_time(&wtime);
1085 }
1086 }
1087
1088 return -EINVAL;
1089 }
1090
1091 static int mini_rtc_open(struct inode *inode, struct file *file)
1092 {
1093 lock_kernel();
1094 if (mini_rtc_status & RTC_IS_OPEN) {
1095 unlock_kernel();
1096 return -EBUSY;
1097 }
1098
1099 mini_rtc_status |= RTC_IS_OPEN;
1100 unlock_kernel();
1101
1102 return 0;
1103 }
1104
1105 static int mini_rtc_release(struct inode *inode, struct file *file)
1106 {
1107 mini_rtc_status &= ~RTC_IS_OPEN;
1108 return 0;
1109 }
1110
1111
1112 static const struct file_operations mini_rtc_fops = {
1113 .owner = THIS_MODULE,
1114 .ioctl = mini_rtc_ioctl,
1115 .open = mini_rtc_open,
1116 .release = mini_rtc_release,
1117 };
1118
1119 static struct miscdevice rtc_mini_dev =
1120 {
1121 .minor = RTC_MINOR,
1122 .name = "rtc",
1123 .fops = &mini_rtc_fops,
1124 };
1125
1126 static int __init rtc_mini_init(void)
1127 {
1128 int retval;
1129
1130 if (this_is_starfire)
1131 mini_rtc_ops = &starfire_rtc_ops;
1132 else
1133 return -ENODEV;
1134
1135 printk(KERN_INFO "Mini RTC Driver\n");
1136
1137 retval = misc_register(&rtc_mini_dev);
1138 if (retval < 0)
1139 return retval;
1140
1141 return 0;
1142 }
1143
1144 static void __exit rtc_mini_exit(void)
1145 {
1146 misc_deregister(&rtc_mini_dev);
1147 }
1148
1149 int __devinit read_current_timer(unsigned long *timer_val)
1150 {
1151 *timer_val = tick_ops->get_tick();
1152 return 0;
1153 }
1154
1155 module_init(rtc_mini_init);
1156 module_exit(rtc_mini_exit);
kernel source for telekom puls (alcatel/mediatek)