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sparc64: Convert Mostek rtc to use generic RTC layer driver.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / sparc64 / kernel / time.c
1 /* time.c: UltraSparc timer and TOD clock support.
2 *
3 * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
5 *
6 * Based largely on code which is:
7 *
8 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
9 */
10
11 #include <linux/errno.h>
12 #include <linux/module.h>
13 #include <linux/sched.h>
14 #include <linux/smp_lock.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/miscdevice.h>
32 #include <linux/rtc.h>
33 #include <linux/rtc/m48t59.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
37 #include <linux/of_device.h>
38 #include <linux/platform_device.h>
39
40 #include <asm/oplib.h>
41 #include <asm/timer.h>
42 #include <asm/irq.h>
43 #include <asm/io.h>
44 #include <asm/prom.h>
45 #include <asm/starfire.h>
46 #include <asm/smp.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
50 #include <asm/irq_regs.h>
51
52 #include "entry.h"
53
54 DEFINE_SPINLOCK(rtc_lock);
55 #ifdef CONFIG_PCI
56 unsigned long ds1287_regs = 0UL;
57 static void __iomem *bq4802_regs;
58 #endif
59
60 static int set_rtc_mmss(unsigned long);
61
62 #define TICK_PRIV_BIT (1UL << 63)
63 #define TICKCMP_IRQ_BIT (1UL << 63)
64
65 #ifdef CONFIG_SMP
66 unsigned long profile_pc(struct pt_regs *regs)
67 {
68 unsigned long pc = instruction_pointer(regs);
69
70 if (in_lock_functions(pc))
71 return regs->u_regs[UREG_RETPC];
72 return pc;
73 }
74 EXPORT_SYMBOL(profile_pc);
75 #endif
76
77 static void tick_disable_protection(void)
78 {
79 /* Set things up so user can access tick register for profiling
80 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
81 * read back of %tick after writing it.
82 */
83 __asm__ __volatile__(
84 " ba,pt %%xcc, 1f\n"
85 " nop\n"
86 " .align 64\n"
87 "1: rd %%tick, %%g2\n"
88 " add %%g2, 6, %%g2\n"
89 " andn %%g2, %0, %%g2\n"
90 " wrpr %%g2, 0, %%tick\n"
91 " rdpr %%tick, %%g0"
92 : /* no outputs */
93 : "r" (TICK_PRIV_BIT)
94 : "g2");
95 }
96
97 static void tick_disable_irq(void)
98 {
99 __asm__ __volatile__(
100 " ba,pt %%xcc, 1f\n"
101 " nop\n"
102 " .align 64\n"
103 "1: wr %0, 0x0, %%tick_cmpr\n"
104 " rd %%tick_cmpr, %%g0"
105 : /* no outputs */
106 : "r" (TICKCMP_IRQ_BIT));
107 }
108
109 static void tick_init_tick(void)
110 {
111 tick_disable_protection();
112 tick_disable_irq();
113 }
114
115 static unsigned long tick_get_tick(void)
116 {
117 unsigned long ret;
118
119 __asm__ __volatile__("rd %%tick, %0\n\t"
120 "mov %0, %0"
121 : "=r" (ret));
122
123 return ret & ~TICK_PRIV_BIT;
124 }
125
126 static int tick_add_compare(unsigned long adj)
127 {
128 unsigned long orig_tick, new_tick, new_compare;
129
130 __asm__ __volatile__("rd %%tick, %0"
131 : "=r" (orig_tick));
132
133 orig_tick &= ~TICKCMP_IRQ_BIT;
134
135 /* Workaround for Spitfire Errata (#54 I think??), I discovered
136 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
137 * number 103640.
138 *
139 * On Blackbird writes to %tick_cmpr can fail, the
140 * workaround seems to be to execute the wr instruction
141 * at the start of an I-cache line, and perform a dummy
142 * read back from %tick_cmpr right after writing to it. -DaveM
143 */
144 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
145 " add %1, %2, %0\n\t"
146 ".align 64\n"
147 "1:\n\t"
148 "wr %0, 0, %%tick_cmpr\n\t"
149 "rd %%tick_cmpr, %%g0\n\t"
150 : "=r" (new_compare)
151 : "r" (orig_tick), "r" (adj));
152
153 __asm__ __volatile__("rd %%tick, %0"
154 : "=r" (new_tick));
155 new_tick &= ~TICKCMP_IRQ_BIT;
156
157 return ((long)(new_tick - (orig_tick+adj))) > 0L;
158 }
159
160 static unsigned long tick_add_tick(unsigned long adj)
161 {
162 unsigned long new_tick;
163
164 /* Also need to handle Blackbird bug here too. */
165 __asm__ __volatile__("rd %%tick, %0\n\t"
166 "add %0, %1, %0\n\t"
167 "wrpr %0, 0, %%tick\n\t"
168 : "=&r" (new_tick)
169 : "r" (adj));
170
171 return new_tick;
172 }
173
174 static struct sparc64_tick_ops tick_operations __read_mostly = {
175 .name = "tick",
176 .init_tick = tick_init_tick,
177 .disable_irq = tick_disable_irq,
178 .get_tick = tick_get_tick,
179 .add_tick = tick_add_tick,
180 .add_compare = tick_add_compare,
181 .softint_mask = 1UL << 0,
182 };
183
184 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
185
186 static void stick_disable_irq(void)
187 {
188 __asm__ __volatile__(
189 "wr %0, 0x0, %%asr25"
190 : /* no outputs */
191 : "r" (TICKCMP_IRQ_BIT));
192 }
193
194 static void stick_init_tick(void)
195 {
196 /* Writes to the %tick and %stick register are not
197 * allowed on sun4v. The Hypervisor controls that
198 * bit, per-strand.
199 */
200 if (tlb_type != hypervisor) {
201 tick_disable_protection();
202 tick_disable_irq();
203
204 /* Let the user get at STICK too. */
205 __asm__ __volatile__(
206 " rd %%asr24, %%g2\n"
207 " andn %%g2, %0, %%g2\n"
208 " wr %%g2, 0, %%asr24"
209 : /* no outputs */
210 : "r" (TICK_PRIV_BIT)
211 : "g1", "g2");
212 }
213
214 stick_disable_irq();
215 }
216
217 static unsigned long stick_get_tick(void)
218 {
219 unsigned long ret;
220
221 __asm__ __volatile__("rd %%asr24, %0"
222 : "=r" (ret));
223
224 return ret & ~TICK_PRIV_BIT;
225 }
226
227 static unsigned long stick_add_tick(unsigned long adj)
228 {
229 unsigned long new_tick;
230
231 __asm__ __volatile__("rd %%asr24, %0\n\t"
232 "add %0, %1, %0\n\t"
233 "wr %0, 0, %%asr24\n\t"
234 : "=&r" (new_tick)
235 : "r" (adj));
236
237 return new_tick;
238 }
239
240 static int stick_add_compare(unsigned long adj)
241 {
242 unsigned long orig_tick, new_tick;
243
244 __asm__ __volatile__("rd %%asr24, %0"
245 : "=r" (orig_tick));
246 orig_tick &= ~TICKCMP_IRQ_BIT;
247
248 __asm__ __volatile__("wr %0, 0, %%asr25"
249 : /* no outputs */
250 : "r" (orig_tick + adj));
251
252 __asm__ __volatile__("rd %%asr24, %0"
253 : "=r" (new_tick));
254 new_tick &= ~TICKCMP_IRQ_BIT;
255
256 return ((long)(new_tick - (orig_tick+adj))) > 0L;
257 }
258
259 static struct sparc64_tick_ops stick_operations __read_mostly = {
260 .name = "stick",
261 .init_tick = stick_init_tick,
262 .disable_irq = stick_disable_irq,
263 .get_tick = stick_get_tick,
264 .add_tick = stick_add_tick,
265 .add_compare = stick_add_compare,
266 .softint_mask = 1UL << 16,
267 };
268
269 /* On Hummingbird the STICK/STICK_CMPR register is implemented
270 * in I/O space. There are two 64-bit registers each, the
271 * first holds the low 32-bits of the value and the second holds
272 * the high 32-bits.
273 *
274 * Since STICK is constantly updating, we have to access it carefully.
275 *
276 * The sequence we use to read is:
277 * 1) read high
278 * 2) read low
279 * 3) read high again, if it rolled re-read both low and high again.
280 *
281 * Writing STICK safely is also tricky:
282 * 1) write low to zero
283 * 2) write high
284 * 3) write low
285 */
286 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
287 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
288
289 static unsigned long __hbird_read_stick(void)
290 {
291 unsigned long ret, tmp1, tmp2, tmp3;
292 unsigned long addr = HBIRD_STICK_ADDR+8;
293
294 __asm__ __volatile__("ldxa [%1] %5, %2\n"
295 "1:\n\t"
296 "sub %1, 0x8, %1\n\t"
297 "ldxa [%1] %5, %3\n\t"
298 "add %1, 0x8, %1\n\t"
299 "ldxa [%1] %5, %4\n\t"
300 "cmp %4, %2\n\t"
301 "bne,a,pn %%xcc, 1b\n\t"
302 " mov %4, %2\n\t"
303 "sllx %4, 32, %4\n\t"
304 "or %3, %4, %0\n\t"
305 : "=&r" (ret), "=&r" (addr),
306 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
307 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
308
309 return ret;
310 }
311
312 static void __hbird_write_stick(unsigned long val)
313 {
314 unsigned long low = (val & 0xffffffffUL);
315 unsigned long high = (val >> 32UL);
316 unsigned long addr = HBIRD_STICK_ADDR;
317
318 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
319 "add %0, 0x8, %0\n\t"
320 "stxa %3, [%0] %4\n\t"
321 "sub %0, 0x8, %0\n\t"
322 "stxa %2, [%0] %4"
323 : "=&r" (addr)
324 : "0" (addr), "r" (low), "r" (high),
325 "i" (ASI_PHYS_BYPASS_EC_E));
326 }
327
328 static void __hbird_write_compare(unsigned long val)
329 {
330 unsigned long low = (val & 0xffffffffUL);
331 unsigned long high = (val >> 32UL);
332 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
333
334 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
335 "sub %0, 0x8, %0\n\t"
336 "stxa %2, [%0] %4"
337 : "=&r" (addr)
338 : "0" (addr), "r" (low), "r" (high),
339 "i" (ASI_PHYS_BYPASS_EC_E));
340 }
341
342 static void hbtick_disable_irq(void)
343 {
344 __hbird_write_compare(TICKCMP_IRQ_BIT);
345 }
346
347 static void hbtick_init_tick(void)
348 {
349 tick_disable_protection();
350
351 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
352 * XXX into actually sending STICK interrupts. I think because
353 * XXX of how we store %tick_cmpr in head.S this somehow resets the
354 * XXX {TICK + STICK} interrupt mux. -DaveM
355 */
356 __hbird_write_stick(__hbird_read_stick());
357
358 hbtick_disable_irq();
359 }
360
361 static unsigned long hbtick_get_tick(void)
362 {
363 return __hbird_read_stick() & ~TICK_PRIV_BIT;
364 }
365
366 static unsigned long hbtick_add_tick(unsigned long adj)
367 {
368 unsigned long val;
369
370 val = __hbird_read_stick() + adj;
371 __hbird_write_stick(val);
372
373 return val;
374 }
375
376 static int hbtick_add_compare(unsigned long adj)
377 {
378 unsigned long val = __hbird_read_stick();
379 unsigned long val2;
380
381 val &= ~TICKCMP_IRQ_BIT;
382 val += adj;
383 __hbird_write_compare(val);
384
385 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
386
387 return ((long)(val2 - val)) > 0L;
388 }
389
390 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
391 .name = "hbtick",
392 .init_tick = hbtick_init_tick,
393 .disable_irq = hbtick_disable_irq,
394 .get_tick = hbtick_get_tick,
395 .add_tick = hbtick_add_tick,
396 .add_compare = hbtick_add_compare,
397 .softint_mask = 1UL << 0,
398 };
399
400 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
401
402 int update_persistent_clock(struct timespec now)
403 {
404 struct rtc_device *rtc = rtc_class_open("rtc0");
405
406 if (rtc)
407 return rtc_set_mmss(rtc, now.tv_sec);
408
409 return set_rtc_mmss(now.tv_sec);
410 }
411
412 /* Probe for the real time clock chip. */
413 static void __init set_system_time(void)
414 {
415 unsigned int year, mon, day, hour, min, sec;
416 #ifdef CONFIG_PCI
417 unsigned long dregs = ds1287_regs;
418 void __iomem *bregs = bq4802_regs;
419 #else
420 unsigned long dregs = 0UL;
421 void __iomem *bregs = 0UL;
422 #endif
423
424 if (!dregs && !bregs) {
425 prom_printf("Something wrong, clock regs not mapped yet.\n");
426 prom_halt();
427 }
428
429 if (bregs) {
430 unsigned char val = readb(bregs + 0x0e);
431 unsigned int century;
432
433 /* BQ4802 RTC chip. */
434
435 writeb(val | 0x08, bregs + 0x0e);
436
437 sec = readb(bregs + 0x00);
438 min = readb(bregs + 0x02);
439 hour = readb(bregs + 0x04);
440 day = readb(bregs + 0x06);
441 mon = readb(bregs + 0x09);
442 year = readb(bregs + 0x0a);
443 century = readb(bregs + 0x0f);
444
445 writeb(val, bregs + 0x0e);
446
447 BCD_TO_BIN(sec);
448 BCD_TO_BIN(min);
449 BCD_TO_BIN(hour);
450 BCD_TO_BIN(day);
451 BCD_TO_BIN(mon);
452 BCD_TO_BIN(year);
453 BCD_TO_BIN(century);
454
455 year += (century * 100);
456 } else {
457 /* Dallas 12887 RTC chip. */
458
459 do {
460 sec = CMOS_READ(RTC_SECONDS);
461 min = CMOS_READ(RTC_MINUTES);
462 hour = CMOS_READ(RTC_HOURS);
463 day = CMOS_READ(RTC_DAY_OF_MONTH);
464 mon = CMOS_READ(RTC_MONTH);
465 year = CMOS_READ(RTC_YEAR);
466 } while (sec != CMOS_READ(RTC_SECONDS));
467
468 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
469 BCD_TO_BIN(sec);
470 BCD_TO_BIN(min);
471 BCD_TO_BIN(hour);
472 BCD_TO_BIN(day);
473 BCD_TO_BIN(mon);
474 BCD_TO_BIN(year);
475 }
476 if ((year += 1900) < 1970)
477 year += 100;
478 }
479
480 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
481 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
482 set_normalized_timespec(&wall_to_monotonic,
483 -xtime.tv_sec, -xtime.tv_nsec);
484 }
485
486 /* davem suggests we keep this within the 4M locked kernel image */
487 static u32 starfire_get_time(void)
488 {
489 static char obp_gettod[32];
490 static u32 unix_tod;
491
492 sprintf(obp_gettod, "h# %08x unix-gettod",
493 (unsigned int) (long) &unix_tod);
494 prom_feval(obp_gettod);
495
496 return unix_tod;
497 }
498
499 static int starfire_set_time(u32 val)
500 {
501 /* Do nothing, time is set using the service processor
502 * console on this platform.
503 */
504 return 0;
505 }
506
507 static u32 hypervisor_get_time(void)
508 {
509 unsigned long ret, time;
510 int retries = 10000;
511
512 retry:
513 ret = sun4v_tod_get(&time);
514 if (ret == HV_EOK)
515 return time;
516 if (ret == HV_EWOULDBLOCK) {
517 if (--retries > 0) {
518 udelay(100);
519 goto retry;
520 }
521 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
522 return 0;
523 }
524 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
525 return 0;
526 }
527
528 static int hypervisor_set_time(u32 secs)
529 {
530 unsigned long ret;
531 int retries = 10000;
532
533 retry:
534 ret = sun4v_tod_set(secs);
535 if (ret == HV_EOK)
536 return 0;
537 if (ret == HV_EWOULDBLOCK) {
538 if (--retries > 0) {
539 udelay(100);
540 goto retry;
541 }
542 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
543 return -EAGAIN;
544 }
545 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
546 return -EOPNOTSUPP;
547 }
548
549 static int __init rtc_model_matches(const char *model)
550 {
551 if (strcmp(model, "m5819") &&
552 strcmp(model, "m5819p") &&
553 strcmp(model, "m5823") &&
554 strcmp(model, "ds1287") &&
555 strcmp(model, "bq4802"))
556 return 0;
557
558 return 1;
559 }
560
561 static int __devinit rtc_probe(struct of_device *op, const struct of_device_id *match)
562 {
563 struct device_node *dp = op->node;
564 const char *model = of_get_property(dp, "model", NULL);
565 const char *compat = of_get_property(dp, "compatible", NULL);
566 unsigned long size, flags;
567 void __iomem *regs;
568
569 if (!model)
570 model = compat;
571
572 if (!model || !rtc_model_matches(model))
573 return -ENODEV;
574
575 size = (op->resource[0].end - op->resource[0].start) + 1;
576 regs = of_ioremap(&op->resource[0], 0, size, "clock");
577 if (!regs)
578 return -ENOMEM;
579
580 #ifdef CONFIG_PCI
581 if (!strcmp(model, "ds1287") ||
582 !strcmp(model, "m5819") ||
583 !strcmp(model, "m5819p") ||
584 !strcmp(model, "m5823")) {
585 ds1287_regs = (unsigned long) regs;
586 } else if (!strcmp(model, "bq4802")) {
587 bq4802_regs = regs;
588 }
589 #endif
590 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
591
592 local_irq_save(flags);
593
594 set_system_time();
595
596 local_irq_restore(flags);
597
598 return 0;
599 }
600
601 static struct of_device_id rtc_match[] = {
602 {
603 .name = "rtc",
604 },
605 {},
606 };
607
608 static struct of_platform_driver rtc_driver = {
609 .match_table = rtc_match,
610 .probe = rtc_probe,
611 .driver = {
612 .name = "rtc",
613 },
614 };
615
616 static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
617 {
618 struct platform_device *pdev = to_platform_device(dev);
619 void __iomem *regs;
620 unsigned char val;
621
622 regs = (void __iomem *) pdev->resource[0].start;
623 val = readb(regs + ofs);
624
625 /* the year 0 is 1968 */
626 if (ofs == M48T59_YEAR) {
627 val += 0x68;
628 if ((val & 0xf) > 9)
629 val += 6;
630 }
631 return val;
632 }
633
634 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
635 {
636 struct platform_device *pdev = to_platform_device(dev);
637 void __iomem *regs;
638
639 regs = (void __iomem *) pdev->resource[0].start;
640 if (ofs == M48T59_YEAR) {
641 if (val < 0x68)
642 val += 0x32;
643 else
644 val -= 0x68;
645 if ((val & 0xf) > 9)
646 val += 6;
647 if ((val & 0xf0) > 0x9A)
648 val += 0x60;
649 }
650 writeb(val, regs + ofs);
651 }
652
653 static struct m48t59_plat_data m48t59_data = {
654 .read_byte = mostek_read_byte,
655 .write_byte = mostek_write_byte,
656 };
657
658 static struct platform_device m48t59_rtc = {
659 .name = "rtc-m48t59",
660 .id = 0,
661 .num_resources = 1,
662 .dev = {
663 .platform_data = &m48t59_data,
664 },
665 };
666
667 static int __devinit mostek_probe(struct of_device *op, const struct of_device_id *match)
668 {
669 struct device_node *dp = op->node;
670
671 /* On an Enterprise system there can be multiple mostek clocks.
672 * We should only match the one that is on the central FHC bus.
673 */
674 if (!strcmp(dp->parent->name, "fhc") &&
675 strcmp(dp->parent->parent->name, "central") != 0)
676 return -ENODEV;
677
678 printk(KERN_INFO "%s: Mostek regs at 0x%lx\n",
679 dp->full_name, op->resource[0].start);
680
681 m48t59_rtc.resource = &op->resource[0];
682 return platform_device_register(&m48t59_rtc);
683 }
684
685 static struct of_device_id mostek_match[] = {
686 {
687 .name = "eeprom",
688 },
689 {},
690 };
691
692 static struct of_platform_driver mostek_driver = {
693 .match_table = mostek_match,
694 .probe = mostek_probe,
695 .driver = {
696 .name = "mostek",
697 },
698 };
699
700 static int __init clock_init(void)
701 {
702 if (this_is_starfire) {
703 xtime.tv_sec = starfire_get_time();
704 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
705 set_normalized_timespec(&wall_to_monotonic,
706 -xtime.tv_sec, -xtime.tv_nsec);
707 return 0;
708 }
709 if (tlb_type == hypervisor) {
710 xtime.tv_sec = hypervisor_get_time();
711 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
712 set_normalized_timespec(&wall_to_monotonic,
713 -xtime.tv_sec, -xtime.tv_nsec);
714 return 0;
715 }
716
717 (void) of_register_driver(&rtc_driver, &of_platform_bus_type);
718 (void) of_register_driver(&mostek_driver, &of_platform_bus_type);
719
720 return 0;
721 }
722
723 /* Must be after subsys_initcall() so that busses are probed. Must
724 * be before device_initcall() because things like the RTC driver
725 * need to see the clock registers.
726 */
727 fs_initcall(clock_init);
728
729 /* This is gets the master TICK_INT timer going. */
730 static unsigned long sparc64_init_timers(void)
731 {
732 struct device_node *dp;
733 unsigned long clock;
734
735 dp = of_find_node_by_path("/");
736 if (tlb_type == spitfire) {
737 unsigned long ver, manuf, impl;
738
739 __asm__ __volatile__ ("rdpr %%ver, %0"
740 : "=&r" (ver));
741 manuf = ((ver >> 48) & 0xffff);
742 impl = ((ver >> 32) & 0xffff);
743 if (manuf == 0x17 && impl == 0x13) {
744 /* Hummingbird, aka Ultra-IIe */
745 tick_ops = &hbtick_operations;
746 clock = of_getintprop_default(dp, "stick-frequency", 0);
747 } else {
748 tick_ops = &tick_operations;
749 clock = local_cpu_data().clock_tick;
750 }
751 } else {
752 tick_ops = &stick_operations;
753 clock = of_getintprop_default(dp, "stick-frequency", 0);
754 }
755
756 return clock;
757 }
758
759 struct freq_table {
760 unsigned long clock_tick_ref;
761 unsigned int ref_freq;
762 };
763 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
764
765 unsigned long sparc64_get_clock_tick(unsigned int cpu)
766 {
767 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
768
769 if (ft->clock_tick_ref)
770 return ft->clock_tick_ref;
771 return cpu_data(cpu).clock_tick;
772 }
773
774 #ifdef CONFIG_CPU_FREQ
775
776 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
777 void *data)
778 {
779 struct cpufreq_freqs *freq = data;
780 unsigned int cpu = freq->cpu;
781 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
782
783 if (!ft->ref_freq) {
784 ft->ref_freq = freq->old;
785 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
786 }
787 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
788 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
789 (val == CPUFREQ_RESUMECHANGE)) {
790 cpu_data(cpu).clock_tick =
791 cpufreq_scale(ft->clock_tick_ref,
792 ft->ref_freq,
793 freq->new);
794 }
795
796 return 0;
797 }
798
799 static struct notifier_block sparc64_cpufreq_notifier_block = {
800 .notifier_call = sparc64_cpufreq_notifier
801 };
802
803 static int __init register_sparc64_cpufreq_notifier(void)
804 {
805
806 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
807 CPUFREQ_TRANSITION_NOTIFIER);
808 return 0;
809 }
810
811 core_initcall(register_sparc64_cpufreq_notifier);
812
813 #endif /* CONFIG_CPU_FREQ */
814
815 static int sparc64_next_event(unsigned long delta,
816 struct clock_event_device *evt)
817 {
818 return tick_ops->add_compare(delta) ? -ETIME : 0;
819 }
820
821 static void sparc64_timer_setup(enum clock_event_mode mode,
822 struct clock_event_device *evt)
823 {
824 switch (mode) {
825 case CLOCK_EVT_MODE_ONESHOT:
826 case CLOCK_EVT_MODE_RESUME:
827 break;
828
829 case CLOCK_EVT_MODE_SHUTDOWN:
830 tick_ops->disable_irq();
831 break;
832
833 case CLOCK_EVT_MODE_PERIODIC:
834 case CLOCK_EVT_MODE_UNUSED:
835 WARN_ON(1);
836 break;
837 };
838 }
839
840 static struct clock_event_device sparc64_clockevent = {
841 .features = CLOCK_EVT_FEAT_ONESHOT,
842 .set_mode = sparc64_timer_setup,
843 .set_next_event = sparc64_next_event,
844 .rating = 100,
845 .shift = 30,
846 .irq = -1,
847 };
848 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
849
850 void timer_interrupt(int irq, struct pt_regs *regs)
851 {
852 struct pt_regs *old_regs = set_irq_regs(regs);
853 unsigned long tick_mask = tick_ops->softint_mask;
854 int cpu = smp_processor_id();
855 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
856
857 clear_softint(tick_mask);
858
859 irq_enter();
860
861 kstat_this_cpu.irqs[0]++;
862
863 if (unlikely(!evt->event_handler)) {
864 printk(KERN_WARNING
865 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
866 } else
867 evt->event_handler(evt);
868
869 irq_exit();
870
871 set_irq_regs(old_regs);
872 }
873
874 void __devinit setup_sparc64_timer(void)
875 {
876 struct clock_event_device *sevt;
877 unsigned long pstate;
878
879 /* Guarantee that the following sequences execute
880 * uninterrupted.
881 */
882 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
883 "wrpr %0, %1, %%pstate"
884 : "=r" (pstate)
885 : "i" (PSTATE_IE));
886
887 tick_ops->init_tick();
888
889 /* Restore PSTATE_IE. */
890 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
891 : /* no outputs */
892 : "r" (pstate));
893
894 sevt = &__get_cpu_var(sparc64_events);
895
896 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
897 sevt->cpumask = cpumask_of_cpu(smp_processor_id());
898
899 clockevents_register_device(sevt);
900 }
901
902 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
903
904 static struct clocksource clocksource_tick = {
905 .rating = 100,
906 .mask = CLOCKSOURCE_MASK(64),
907 .shift = 16,
908 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
909 };
910
911 static void __init setup_clockevent_multiplier(unsigned long hz)
912 {
913 unsigned long mult, shift = 32;
914
915 while (1) {
916 mult = div_sc(hz, NSEC_PER_SEC, shift);
917 if (mult && (mult >> 32UL) == 0UL)
918 break;
919
920 shift--;
921 }
922
923 sparc64_clockevent.shift = shift;
924 sparc64_clockevent.mult = mult;
925 }
926
927 static unsigned long tb_ticks_per_usec __read_mostly;
928
929 void __delay(unsigned long loops)
930 {
931 unsigned long bclock, now;
932
933 bclock = tick_ops->get_tick();
934 do {
935 now = tick_ops->get_tick();
936 } while ((now-bclock) < loops);
937 }
938 EXPORT_SYMBOL(__delay);
939
940 void udelay(unsigned long usecs)
941 {
942 __delay(tb_ticks_per_usec * usecs);
943 }
944 EXPORT_SYMBOL(udelay);
945
946 void __init time_init(void)
947 {
948 unsigned long clock = sparc64_init_timers();
949
950 tb_ticks_per_usec = clock / USEC_PER_SEC;
951
952 timer_ticks_per_nsec_quotient =
953 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
954
955 clocksource_tick.name = tick_ops->name;
956 clocksource_tick.mult =
957 clocksource_hz2mult(clock,
958 clocksource_tick.shift);
959 clocksource_tick.read = tick_ops->get_tick;
960
961 printk("clocksource: mult[%x] shift[%d]\n",
962 clocksource_tick.mult, clocksource_tick.shift);
963
964 clocksource_register(&clocksource_tick);
965
966 sparc64_clockevent.name = tick_ops->name;
967
968 setup_clockevent_multiplier(clock);
969
970 sparc64_clockevent.max_delta_ns =
971 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
972 sparc64_clockevent.min_delta_ns =
973 clockevent_delta2ns(0xF, &sparc64_clockevent);
974
975 printk("clockevent: mult[%lx] shift[%d]\n",
976 sparc64_clockevent.mult, sparc64_clockevent.shift);
977
978 setup_sparc64_timer();
979 }
980
981 unsigned long long sched_clock(void)
982 {
983 unsigned long ticks = tick_ops->get_tick();
984
985 return (ticks * timer_ticks_per_nsec_quotient)
986 >> SPARC64_NSEC_PER_CYC_SHIFT;
987 }
988
989 static int set_rtc_mmss(unsigned long nowtime)
990 {
991 int real_seconds, real_minutes, chip_minutes;
992 #ifdef CONFIG_PCI
993 unsigned long dregs = ds1287_regs;
994 void __iomem *bregs = bq4802_regs;
995 #else
996 unsigned long dregs = 0UL;
997 void __iomem *bregs = 0UL;
998 #endif
999 unsigned long flags;
1000
1001 /*
1002 * Not having a register set can lead to trouble.
1003 * Also starfire doesn't have a tod clock.
1004 */
1005 if (!dregs && !bregs)
1006 return -1;
1007
1008 if (bregs) {
1009 int retval = 0;
1010 unsigned char val = readb(bregs + 0x0e);
1011
1012 /* BQ4802 RTC chip. */
1013
1014 writeb(val | 0x08, bregs + 0x0e);
1015
1016 chip_minutes = readb(bregs + 0x02);
1017 BCD_TO_BIN(chip_minutes);
1018 real_seconds = nowtime % 60;
1019 real_minutes = nowtime / 60;
1020 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1021 real_minutes += 30;
1022 real_minutes %= 60;
1023
1024 if (abs(real_minutes - chip_minutes) < 30) {
1025 BIN_TO_BCD(real_seconds);
1026 BIN_TO_BCD(real_minutes);
1027 writeb(real_seconds, bregs + 0x00);
1028 writeb(real_minutes, bregs + 0x02);
1029 } else {
1030 printk(KERN_WARNING
1031 "set_rtc_mmss: can't update from %d to %d\n",
1032 chip_minutes, real_minutes);
1033 retval = -1;
1034 }
1035
1036 writeb(val, bregs + 0x0e);
1037
1038 return retval;
1039 } else {
1040 int retval = 0;
1041 unsigned char save_control, save_freq_select;
1042
1043 /* Stolen from arch/i386/kernel/time.c, see there for
1044 * credits and descriptive comments.
1045 */
1046 spin_lock_irqsave(&rtc_lock, flags);
1047 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1048 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1049
1050 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1051 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1052
1053 chip_minutes = CMOS_READ(RTC_MINUTES);
1054 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1055 BCD_TO_BIN(chip_minutes);
1056 real_seconds = nowtime % 60;
1057 real_minutes = nowtime / 60;
1058 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1059 real_minutes += 30;
1060 real_minutes %= 60;
1061
1062 if (abs(real_minutes - chip_minutes) < 30) {
1063 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1064 BIN_TO_BCD(real_seconds);
1065 BIN_TO_BCD(real_minutes);
1066 }
1067 CMOS_WRITE(real_seconds,RTC_SECONDS);
1068 CMOS_WRITE(real_minutes,RTC_MINUTES);
1069 } else {
1070 printk(KERN_WARNING
1071 "set_rtc_mmss: can't update from %d to %d\n",
1072 chip_minutes, real_minutes);
1073 retval = -1;
1074 }
1075
1076 CMOS_WRITE(save_control, RTC_CONTROL);
1077 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1078 spin_unlock_irqrestore(&rtc_lock, flags);
1079
1080 return retval;
1081 }
1082 }
1083
1084 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1085 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1086
1087 #define FEBRUARY 2
1088 #define STARTOFTIME 1970
1089 #define SECDAY 86400L
1090 #define SECYR (SECDAY * 365)
1091 #define leapyear(year) ((year) % 4 == 0 && \
1092 ((year) % 100 != 0 || (year) % 400 == 0))
1093 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1094 #define days_in_month(a) (month_days[(a) - 1])
1095
1096 static int month_days[12] = {
1097 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1098 };
1099
1100 /*
1101 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1102 */
1103 static void GregorianDay(struct rtc_time * tm)
1104 {
1105 int leapsToDate;
1106 int lastYear;
1107 int day;
1108 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1109
1110 lastYear = tm->tm_year - 1;
1111
1112 /*
1113 * Number of leap corrections to apply up to end of last year
1114 */
1115 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1116
1117 /*
1118 * This year is a leap year if it is divisible by 4 except when it is
1119 * divisible by 100 unless it is divisible by 400
1120 *
1121 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1122 */
1123 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1124
1125 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1126 tm->tm_mday;
1127
1128 tm->tm_wday = day % 7;
1129 }
1130
1131 static void to_tm(int tim, struct rtc_time *tm)
1132 {
1133 register int i;
1134 register long hms, day;
1135
1136 day = tim / SECDAY;
1137 hms = tim % SECDAY;
1138
1139 /* Hours, minutes, seconds are easy */
1140 tm->tm_hour = hms / 3600;
1141 tm->tm_min = (hms % 3600) / 60;
1142 tm->tm_sec = (hms % 3600) % 60;
1143
1144 /* Number of years in days */
1145 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1146 day -= days_in_year(i);
1147 tm->tm_year = i;
1148
1149 /* Number of months in days left */
1150 if (leapyear(tm->tm_year))
1151 days_in_month(FEBRUARY) = 29;
1152 for (i = 1; day >= days_in_month(i); i++)
1153 day -= days_in_month(i);
1154 days_in_month(FEBRUARY) = 28;
1155 tm->tm_mon = i;
1156
1157 /* Days are what is left over (+1) from all that. */
1158 tm->tm_mday = day + 1;
1159
1160 /*
1161 * Determine the day of week
1162 */
1163 GregorianDay(tm);
1164 }
1165
1166 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1167 * aka Unix time. So we have to convert to/from rtc_time.
1168 */
1169 static void starfire_get_rtc_time(struct rtc_time *time)
1170 {
1171 u32 seconds = starfire_get_time();
1172
1173 to_tm(seconds, time);
1174 time->tm_year -= 1900;
1175 time->tm_mon -= 1;
1176 }
1177
1178 static int starfire_set_rtc_time(struct rtc_time *time)
1179 {
1180 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1181 time->tm_mday, time->tm_hour,
1182 time->tm_min, time->tm_sec);
1183
1184 return starfire_set_time(seconds);
1185 }
1186
1187 static void hypervisor_get_rtc_time(struct rtc_time *time)
1188 {
1189 u32 seconds = hypervisor_get_time();
1190
1191 to_tm(seconds, time);
1192 time->tm_year -= 1900;
1193 time->tm_mon -= 1;
1194 }
1195
1196 static int hypervisor_set_rtc_time(struct rtc_time *time)
1197 {
1198 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1199 time->tm_mday, time->tm_hour,
1200 time->tm_min, time->tm_sec);
1201
1202 return hypervisor_set_time(seconds);
1203 }
1204
1205 #ifdef CONFIG_PCI
1206 static void bq4802_get_rtc_time(struct rtc_time *time)
1207 {
1208 unsigned char val = readb(bq4802_regs + 0x0e);
1209 unsigned int century;
1210
1211 writeb(val | 0x08, bq4802_regs + 0x0e);
1212
1213 time->tm_sec = readb(bq4802_regs + 0x00);
1214 time->tm_min = readb(bq4802_regs + 0x02);
1215 time->tm_hour = readb(bq4802_regs + 0x04);
1216 time->tm_mday = readb(bq4802_regs + 0x06);
1217 time->tm_mon = readb(bq4802_regs + 0x09);
1218 time->tm_year = readb(bq4802_regs + 0x0a);
1219 time->tm_wday = readb(bq4802_regs + 0x08);
1220 century = readb(bq4802_regs + 0x0f);
1221
1222 writeb(val, bq4802_regs + 0x0e);
1223
1224 BCD_TO_BIN(time->tm_sec);
1225 BCD_TO_BIN(time->tm_min);
1226 BCD_TO_BIN(time->tm_hour);
1227 BCD_TO_BIN(time->tm_mday);
1228 BCD_TO_BIN(time->tm_mon);
1229 BCD_TO_BIN(time->tm_year);
1230 BCD_TO_BIN(time->tm_wday);
1231 BCD_TO_BIN(century);
1232
1233 time->tm_year += (century * 100);
1234 time->tm_year -= 1900;
1235
1236 time->tm_mon--;
1237 }
1238
1239 static int bq4802_set_rtc_time(struct rtc_time *time)
1240 {
1241 unsigned char val = readb(bq4802_regs + 0x0e);
1242 unsigned char sec, min, hrs, day, mon, yrs, century;
1243 unsigned int year;
1244
1245 year = time->tm_year + 1900;
1246 century = year / 100;
1247 yrs = year % 100;
1248
1249 mon = time->tm_mon + 1; /* tm_mon starts at zero */
1250 day = time->tm_mday;
1251 hrs = time->tm_hour;
1252 min = time->tm_min;
1253 sec = time->tm_sec;
1254
1255 BIN_TO_BCD(sec);
1256 BIN_TO_BCD(min);
1257 BIN_TO_BCD(hrs);
1258 BIN_TO_BCD(day);
1259 BIN_TO_BCD(mon);
1260 BIN_TO_BCD(yrs);
1261 BIN_TO_BCD(century);
1262
1263 writeb(val | 0x08, bq4802_regs + 0x0e);
1264
1265 writeb(sec, bq4802_regs + 0x00);
1266 writeb(min, bq4802_regs + 0x02);
1267 writeb(hrs, bq4802_regs + 0x04);
1268 writeb(day, bq4802_regs + 0x06);
1269 writeb(mon, bq4802_regs + 0x09);
1270 writeb(yrs, bq4802_regs + 0x0a);
1271 writeb(century, bq4802_regs + 0x0f);
1272
1273 writeb(val, bq4802_regs + 0x0e);
1274
1275 return 0;
1276 }
1277
1278 static void cmos_get_rtc_time(struct rtc_time *rtc_tm)
1279 {
1280 unsigned char ctrl;
1281
1282 rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
1283 rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
1284 rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
1285 rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
1286 rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
1287 rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
1288 rtc_tm->tm_wday = CMOS_READ(RTC_DAY_OF_WEEK);
1289
1290 ctrl = CMOS_READ(RTC_CONTROL);
1291 if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1292 BCD_TO_BIN(rtc_tm->tm_sec);
1293 BCD_TO_BIN(rtc_tm->tm_min);
1294 BCD_TO_BIN(rtc_tm->tm_hour);
1295 BCD_TO_BIN(rtc_tm->tm_mday);
1296 BCD_TO_BIN(rtc_tm->tm_mon);
1297 BCD_TO_BIN(rtc_tm->tm_year);
1298 BCD_TO_BIN(rtc_tm->tm_wday);
1299 }
1300
1301 if (rtc_tm->tm_year <= 69)
1302 rtc_tm->tm_year += 100;
1303
1304 rtc_tm->tm_mon--;
1305 }
1306
1307 static int cmos_set_rtc_time(struct rtc_time *rtc_tm)
1308 {
1309 unsigned char mon, day, hrs, min, sec;
1310 unsigned char save_control, save_freq_select;
1311 unsigned int yrs;
1312
1313 yrs = rtc_tm->tm_year;
1314 mon = rtc_tm->tm_mon + 1;
1315 day = rtc_tm->tm_mday;
1316 hrs = rtc_tm->tm_hour;
1317 min = rtc_tm->tm_min;
1318 sec = rtc_tm->tm_sec;
1319
1320 if (yrs >= 100)
1321 yrs -= 100;
1322
1323 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1324 BIN_TO_BCD(sec);
1325 BIN_TO_BCD(min);
1326 BIN_TO_BCD(hrs);
1327 BIN_TO_BCD(day);
1328 BIN_TO_BCD(mon);
1329 BIN_TO_BCD(yrs);
1330 }
1331
1332 save_control = CMOS_READ(RTC_CONTROL);
1333 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1334 save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
1335 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1336
1337 CMOS_WRITE(yrs, RTC_YEAR);
1338 CMOS_WRITE(mon, RTC_MONTH);
1339 CMOS_WRITE(day, RTC_DAY_OF_MONTH);
1340 CMOS_WRITE(hrs, RTC_HOURS);
1341 CMOS_WRITE(min, RTC_MINUTES);
1342 CMOS_WRITE(sec, RTC_SECONDS);
1343
1344 CMOS_WRITE(save_control, RTC_CONTROL);
1345 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1346
1347 return 0;
1348 }
1349 #endif /* CONFIG_PCI */
1350
1351 struct mini_rtc_ops {
1352 void (*get_rtc_time)(struct rtc_time *);
1353 int (*set_rtc_time)(struct rtc_time *);
1354 };
1355
1356 static struct mini_rtc_ops starfire_rtc_ops = {
1357 .get_rtc_time = starfire_get_rtc_time,
1358 .set_rtc_time = starfire_set_rtc_time,
1359 };
1360
1361 static struct mini_rtc_ops hypervisor_rtc_ops = {
1362 .get_rtc_time = hypervisor_get_rtc_time,
1363 .set_rtc_time = hypervisor_set_rtc_time,
1364 };
1365
1366 #ifdef CONFIG_PCI
1367 static struct mini_rtc_ops bq4802_rtc_ops = {
1368 .get_rtc_time = bq4802_get_rtc_time,
1369 .set_rtc_time = bq4802_set_rtc_time,
1370 };
1371
1372 static struct mini_rtc_ops cmos_rtc_ops = {
1373 .get_rtc_time = cmos_get_rtc_time,
1374 .set_rtc_time = cmos_set_rtc_time,
1375 };
1376 #endif /* CONFIG_PCI */
1377
1378 static struct mini_rtc_ops *mini_rtc_ops;
1379
1380 static inline void mini_get_rtc_time(struct rtc_time *time)
1381 {
1382 unsigned long flags;
1383
1384 spin_lock_irqsave(&rtc_lock, flags);
1385 mini_rtc_ops->get_rtc_time(time);
1386 spin_unlock_irqrestore(&rtc_lock, flags);
1387 }
1388
1389 static inline int mini_set_rtc_time(struct rtc_time *time)
1390 {
1391 unsigned long flags;
1392 int err;
1393
1394 spin_lock_irqsave(&rtc_lock, flags);
1395 err = mini_rtc_ops->set_rtc_time(time);
1396 spin_unlock_irqrestore(&rtc_lock, flags);
1397
1398 return err;
1399 }
1400
1401 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1402 unsigned int cmd, unsigned long arg)
1403 {
1404 struct rtc_time wtime;
1405 void __user *argp = (void __user *)arg;
1406
1407 switch (cmd) {
1408
1409 case RTC_PLL_GET:
1410 return -EINVAL;
1411
1412 case RTC_PLL_SET:
1413 return -EINVAL;
1414
1415 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1416 return 0;
1417
1418 case RTC_UIE_ON: /* enable ints for RTC updates. */
1419 return -EINVAL;
1420
1421 case RTC_RD_TIME: /* Read the time/date from RTC */
1422 /* this doesn't get week-day, who cares */
1423 memset(&wtime, 0, sizeof(wtime));
1424 mini_get_rtc_time(&wtime);
1425
1426 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1427
1428 case RTC_SET_TIME: /* Set the RTC */
1429 {
1430 int year, days;
1431
1432 if (!capable(CAP_SYS_TIME))
1433 return -EACCES;
1434
1435 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1436 return -EFAULT;
1437
1438 year = wtime.tm_year + 1900;
1439 days = month_days[wtime.tm_mon] +
1440 ((wtime.tm_mon == 1) && leapyear(year));
1441
1442 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1443 (wtime.tm_mday < 1))
1444 return -EINVAL;
1445
1446 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1447 return -EINVAL;
1448
1449 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1450 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1451 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1452 return -EINVAL;
1453
1454 return mini_set_rtc_time(&wtime);
1455 }
1456 }
1457
1458 return -EINVAL;
1459 }
1460
1461 static int mini_rtc_open(struct inode *inode, struct file *file)
1462 {
1463 lock_kernel();
1464 if (mini_rtc_status & RTC_IS_OPEN) {
1465 unlock_kernel();
1466 return -EBUSY;
1467 }
1468
1469 mini_rtc_status |= RTC_IS_OPEN;
1470 unlock_kernel();
1471
1472 return 0;
1473 }
1474
1475 static int mini_rtc_release(struct inode *inode, struct file *file)
1476 {
1477 mini_rtc_status &= ~RTC_IS_OPEN;
1478 return 0;
1479 }
1480
1481
1482 static const struct file_operations mini_rtc_fops = {
1483 .owner = THIS_MODULE,
1484 .ioctl = mini_rtc_ioctl,
1485 .open = mini_rtc_open,
1486 .release = mini_rtc_release,
1487 };
1488
1489 static struct miscdevice rtc_mini_dev =
1490 {
1491 .minor = RTC_MINOR,
1492 .name = "rtc",
1493 .fops = &mini_rtc_fops,
1494 };
1495
1496 static int __init rtc_mini_init(void)
1497 {
1498 int retval;
1499
1500 if (tlb_type == hypervisor)
1501 mini_rtc_ops = &hypervisor_rtc_ops;
1502 else if (this_is_starfire)
1503 mini_rtc_ops = &starfire_rtc_ops;
1504 #ifdef CONFIG_PCI
1505 else if (bq4802_regs)
1506 mini_rtc_ops = &bq4802_rtc_ops;
1507 else if (ds1287_regs)
1508 mini_rtc_ops = &cmos_rtc_ops;
1509 #endif /* CONFIG_PCI */
1510 else
1511 return -ENODEV;
1512
1513 printk(KERN_INFO "Mini RTC Driver\n");
1514
1515 retval = misc_register(&rtc_mini_dev);
1516 if (retval < 0)
1517 return retval;
1518
1519 return 0;
1520 }
1521
1522 static void __exit rtc_mini_exit(void)
1523 {
1524 misc_deregister(&rtc_mini_dev);
1525 }
1526
1527 int __devinit read_current_timer(unsigned long *timer_val)
1528 {
1529 *timer_val = tick_ops->get_tick();
1530 return 0;
1531 }
1532
1533 module_init(rtc_mini_init);
1534 module_exit(rtc_mini_exit);
kernel source for telekom puls (alcatel/mediatek)