arch/sparc/include/asm/processor_64.h

   1 /*
   2  * include/asm/processor.h
   3  *
   4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6
   7 #ifndef __ASM_SPARC64_PROCESSOR_H
   8 #define __ASM_SPARC64_PROCESSOR_H
   9
  10 /*
  11  * Sparc64 implementation of macro that returns current
  12  * instruction pointer ("program counter").
  13  */
  14 #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
  15
  16 #include <asm/asi.h>
  17 #include <asm/pstate.h>
  18 #include <asm/ptrace.h>
  19 #include <asm/page.h>
  20
  21 /*
  22  * User lives in his very own context, and cannot reference us. Note
  23  * that TASK_SIZE is a misnomer, it really gives maximum user virtual
  24  * address that the kernel will allocate out.
  25  *
  26  * XXX No longer using virtual page tables, kill this upper limit...
  27  */
  28 #define VA_BITS         44
  29 #ifndef __ASSEMBLY__
  30 #define VPTE_SIZE       (1UL << (VA_BITS - PAGE_SHIFT + 3))
  31 #else
  32 #define VPTE_SIZE       (1 << (VA_BITS - PAGE_SHIFT + 3))
  33 #endif
  34
  35 #define TASK_SIZE_OF(tsk) \
  36         (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
  37          (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
  38 #define TASK_SIZE \
  39         (test_thread_flag(TIF_32BIT) ? \
  40          (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
  41 #ifdef __KERNEL__
  42
  43 #define STACK_TOP32     ((1UL << 32UL) - PAGE_SIZE)
  44 #define STACK_TOP64     (0x0000080000000000UL - (1UL << 32UL))
  45
  46 #define STACK_TOP       (test_thread_flag(TIF_32BIT) ? \
  47                          STACK_TOP32 : STACK_TOP64)
  48
  49 #define STACK_TOP_MAX   STACK_TOP64
  50
  51 #endif
  52
  53 #ifndef __ASSEMBLY__
  54
  55 typedef struct {
  56         unsigned char seg;
  57 } mm_segment_t;
  58
  59 /* The Sparc processor specific thread struct. */
  60 /* XXX This should die, everything can go into thread_info now. */
  61 struct thread_struct {
  62 #ifdef CONFIG_DEBUG_SPINLOCK
  63         /* How many spinlocks held by this thread.
  64          * Used with spin lock debugging to catch tasks
  65          * sleeping illegally with locks held.
  66          */
  67         int smp_lock_count;
  68         unsigned int smp_lock_pc;
  69 #else
  70         int dummy; /* f'in gcc bug... */
  71 #endif
  72 };
  73
  74 #endif /* !(__ASSEMBLY__) */
  75
  76 #ifndef CONFIG_DEBUG_SPINLOCK
  77 #define INIT_THREAD  {                  \
  78         0,                              \
  79 }
  80 #else /* CONFIG_DEBUG_SPINLOCK */
  81 #define INIT_THREAD  {                                  \
  82 /* smp_lock_count, smp_lock_pc, */                      \
  83    0,              0,                                   \
  84 }
  85 #endif /* !(CONFIG_DEBUG_SPINLOCK) */
  86
  87 #ifndef __ASSEMBLY__
  88
  89 #include <linux/types.h>
  90 #include <asm/fpumacro.h>
  91
  92 /* Return saved PC of a blocked thread. */
  93 struct task_struct;
  94 unsigned long thread_saved_pc(struct task_struct *);
  95
  96 /* On Uniprocessor, even in RMO processes see TSO semantics */
  97 #ifdef CONFIG_SMP
  98 #define TSTATE_INITIAL_MM       TSTATE_TSO
  99 #else
 100 #define TSTATE_INITIAL_MM       TSTATE_RMO
 101 #endif
 102
 103 /* Do necessary setup to start up a newly executed thread. */
 104 #define start_thread(regs, pc, sp) \
 105 do { \
 106         unsigned long __asi = ASI_PNF; \
 107         regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
 108         regs->tpc = ((pc & (~3)) - 4); \
 109         regs->tnpc = regs->tpc + 4; \
 110         regs->y = 0; \
 111         set_thread_wstate(1 << 3); \
 112         if (current_thread_info()->utraps) { \
 113                 if (*(current_thread_info()->utraps) < 2) \
 114                         kfree(current_thread_info()->utraps); \
 115                 else \
 116                         (*(current_thread_info()->utraps))--; \
 117                 current_thread_info()->utraps = NULL; \
 118         } \
 119         __asm__ __volatile__( \
 120         "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
 121         "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
 122         "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
 123         "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
 124         "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
 125         "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
 126         "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
 127         "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
 128         "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
 129         "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
 130         "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
 131         "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
 132         "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
 133         "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
 134         "stx            %1,   [%0 + %2 + 0x70]\n\t" \
 135         "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
 136         "wrpr           %%g0, (1 << 3), %%wstate\n\t" \
 137         : \
 138         : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
 139           "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
 140         fprs_write(0);  \
 141         current_thread_info()->xfsr[0] = 0;     \
 142         current_thread_info()->fpsaved[0] = 0;  \
 143         regs->tstate &= ~TSTATE_PEF;    \
 144 } while (0)
 145
 146 #define start_thread32(regs, pc, sp) \
 147 do { \
 148         unsigned long __asi = ASI_PNF; \
 149         pc &= 0x00000000ffffffffUL; \
 150         sp &= 0x00000000ffffffffUL; \
 151         regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
 152         regs->tpc = ((pc & (~3)) - 4); \
 153         regs->tnpc = regs->tpc + 4; \
 154         regs->y = 0; \
 155         set_thread_wstate(2 << 3); \
 156         if (current_thread_info()->utraps) { \
 157                 if (*(current_thread_info()->utraps) < 2) \
 158                         kfree(current_thread_info()->utraps); \
 159                 else \
 160                         (*(current_thread_info()->utraps))--; \
 161                 current_thread_info()->utraps = NULL; \
 162         } \
 163         __asm__ __volatile__( \
 164         "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
 165         "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
 166         "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
 167         "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
 168         "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
 169         "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
 170         "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
 171         "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
 172         "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
 173         "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
 174         "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
 175         "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
 176         "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
 177         "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
 178         "stx            %1,   [%0 + %2 + 0x70]\n\t" \
 179         "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
 180         "wrpr           %%g0, (2 << 3), %%wstate\n\t" \
 181         : \
 182         : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
 183           "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
 184         fprs_write(0);  \
 185         current_thread_info()->xfsr[0] = 0;     \
 186         current_thread_info()->fpsaved[0] = 0;  \
 187         regs->tstate &= ~TSTATE_PEF;    \
 188 } while (0)
 189
 190 /* Free all resources held by a thread. */
 191 #define release_thread(tsk)             do { } while (0)
 192
 193 unsigned long get_wchan(struct task_struct *task);
 194
 195 #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
 196 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
 197 #define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])
 198
 199 /* Please see the commentary in asm/backoff.h for a description of
 200  * what these instructions are doing and how they have been chosen.
 201  * To make a long story short, we are trying to yield the current cpu
 202  * strand during busy loops.
 203  */
 204 #define cpu_relax()     asm volatile("\n99:\n\t"                        \
 205                                      "rd        %%ccr, %%g0\n\t"        \
 206                                      "rd        %%ccr, %%g0\n\t"        \
 207                                      "rd        %%ccr, %%g0\n\t"        \
 208                                      ".section  .pause_3insn_patch,\"ax\"\n\t"\
 209                                      ".word     99b\n\t"                \
 210                                      "wr        %%g0, 128, %%asr27\n\t" \
 211                                      "nop\n\t"                          \
 212                                      "nop\n\t"                          \
 213                                      ".previous"                        \
 214                                      ::: "memory")
 215
 216 /* Prefetch support.  This is tuned for UltraSPARC-III and later.
 217  * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
 218  * a shallower prefetch queue than later chips.
 219  */
 220 #define ARCH_HAS_PREFETCH
 221 #define ARCH_HAS_PREFETCHW
 222 #define ARCH_HAS_SPINLOCK_PREFETCH
 223
 224 static inline void prefetch(const void *x)
 225 {
 226         /* We do not use the read prefetch mnemonic because that
 227          * prefetches into the prefetch-cache which only is accessible
 228          * by floating point operations in UltraSPARC-III and later.
 229          * By contrast, "#one_write" prefetches into the L2 cache
 230          * in shared state.
 231          */
 232         __asm__ __volatile__("prefetch [%0], #one_write"
 233                              : /* no outputs */
 234                              : "r" (x));
 235 }
 236
 237 static inline void prefetchw(const void *x)
 238 {
 239         /* The most optimal prefetch to use for writes is
 240          * "#n_writes".  This brings the cacheline into the
 241          * L2 cache in "owned" state.
 242          */
 243         __asm__ __volatile__("prefetch [%0], #n_writes"
 244                              : /* no outputs */
 245                              : "r" (x));
 246 }
 247
 248 #define spin_lock_prefetch(x)   prefetchw(x)
 249
 250 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 251
 252 int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap);
 253
 254 #endif /* !(__ASSEMBLY__) */
 255
 256 #endif /* !(__ASM_SPARC64_PROCESSOR_H) */