arch/sh/boards/mach-se/7724/setup.c

   1 /*
   2  * linux/arch/sh/boards/se/7724/setup.c
   3  *
   4  * Copyright (C) 2009 Renesas Solutions Corp.
   5  *
   6  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/device.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mfd/sh_mobile_sdhi.h>
  18 #include <linux/mtd/physmap.h>
  19 #include <linux/delay.h>
  20 #include <linux/smc91x.h>
  21 #include <linux/gpio.h>
  22 #include <linux/input.h>
  23 #include <linux/input/sh_keysc.h>
  24 #include <linux/usb/r8a66597.h>
  25 #include <video/sh_mobile_lcdc.h>
  26 #include <media/sh_mobile_ceu.h>
  27 #include <sound/sh_fsi.h>
  28 #include <asm/io.h>
  29 #include <asm/heartbeat.h>
  30 #include <asm/sh_eth.h>
  31 #include <asm/clock.h>
  32 #include <asm/suspend.h>
  33 #include <cpu/sh7724.h>
  34 #include <mach-se/mach/se7724.h>
  35
  36 /*
  37  * SWx    1234 5678
  38  * ------------------------------------
  39  * SW31 : 1001 1100    : default
  40  * SW32 : 0111 1111    : use on board flash
  41  *
  42  * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
  43  *                          1 : Digital monitor
  44  *                      b = 0 : VGA
  45  *                          1 : 720p
  46  */
  47
  48 /*
  49  * about 720p
  50  *
  51  * When you use 1280 x 720 lcdc output,
  52  * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
  53  * and change SW41 to use 720p
  54  */
  55
  56 /*
  57  * about sound
  58  *
  59  * This setup.c supports FSI slave mode.
  60  * Please change J20, J21, J22 pin to 1-2 connection.
  61  */
  62
  63 /* Heartbeat */
  64 static struct resource heartbeat_resource = {
  65         .start  = PA_LED,
  66         .end    = PA_LED,
  67         .flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  68 };
  69
  70 static struct platform_device heartbeat_device = {
  71         .name           = "heartbeat",
  72         .id             = -1,
  73         .num_resources  = 1,
  74         .resource       = &heartbeat_resource,
  75 };
  76
  77 /* LAN91C111 */
  78 static struct smc91x_platdata smc91x_info = {
  79         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  80 };
  81
  82 static struct resource smc91x_eth_resources[] = {
  83         [0] = {
  84                 .name   = "SMC91C111" ,
  85                 .start  = 0x1a300300,
  86                 .end    = 0x1a30030f,
  87                 .flags  = IORESOURCE_MEM,
  88         },
  89         [1] = {
  90                 .start  = IRQ0_SMC,
  91                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  92         },
  93 };
  94
  95 static struct platform_device smc91x_eth_device = {
  96         .name   = "smc91x",
  97         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
  98         .resource       = smc91x_eth_resources,
  99         .dev    = {
 100                 .platform_data  = &smc91x_info,
 101         },
 102 };
 103
 104 /* MTD */
 105 static struct mtd_partition nor_flash_partitions[] = {
 106         {
 107                 .name = "uboot",
 108                 .offset = 0,
 109                 .size = (1 * 1024 * 1024),
 110                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 111         }, {
 112                 .name = "kernel",
 113                 .offset = MTDPART_OFS_APPEND,
 114                 .size = (2 * 1024 * 1024),
 115         }, {
 116                 .name = "free-area",
 117                 .offset = MTDPART_OFS_APPEND,
 118                 .size = MTDPART_SIZ_FULL,
 119         },
 120 };
 121
 122 static struct physmap_flash_data nor_flash_data = {
 123         .width          = 2,
 124         .parts          = nor_flash_partitions,
 125         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
 126 };
 127
 128 static struct resource nor_flash_resources[] = {
 129         [0] = {
 130                 .name   = "NOR Flash",
 131                 .start  = 0x00000000,
 132                 .end    = 0x01ffffff,
 133                 .flags  = IORESOURCE_MEM,
 134         }
 135 };
 136
 137 static struct platform_device nor_flash_device = {
 138         .name           = "physmap-flash",
 139         .resource       = nor_flash_resources,
 140         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 141         .dev            = {
 142                 .platform_data = &nor_flash_data,
 143         },
 144 };
 145
 146 /* LCDC */
 147 const static struct fb_videomode lcdc_720p_modes[] = {
 148         {
 149                 .name           = "LB070WV1",
 150                 .sync           = 0, /* hsync and vsync are active low */
 151                 .xres           = 1280,
 152                 .yres           = 720,
 153                 .left_margin    = 220,
 154                 .right_margin   = 110,
 155                 .hsync_len      = 40,
 156                 .upper_margin   = 20,
 157                 .lower_margin   = 5,
 158                 .vsync_len      = 5,
 159         },
 160 };
 161
 162 const static struct fb_videomode lcdc_vga_modes[] = {
 163         {
 164                 .name           = "LB070WV1",
 165                 .sync           = 0, /* hsync and vsync are active low */
 166                 .xres           = 640,
 167                 .yres           = 480,
 168                 .left_margin    = 105,
 169                 .right_margin   = 50,
 170                 .hsync_len      = 96,
 171                 .upper_margin   = 33,
 172                 .lower_margin   = 10,
 173                 .vsync_len      = 2,
 174         },
 175 };
 176
 177 static struct sh_mobile_lcdc_info lcdc_info = {
 178         .clock_source = LCDC_CLK_EXTERNAL,
 179         .ch[0] = {
 180                 .chan = LCDC_CHAN_MAINLCD,
 181                 .bpp = 16,
 182                 .clock_divider = 1,
 183                 .lcd_size_cfg = { /* 7.0 inch */
 184                         .width = 152,
 185                         .height = 91,
 186                 },
 187                 .board_cfg = {
 188                 },
 189         }
 190 };
 191
 192 static struct resource lcdc_resources[] = {
 193         [0] = {
 194                 .name   = "LCDC",
 195                 .start  = 0xfe940000,
 196                 .end    = 0xfe942fff,
 197                 .flags  = IORESOURCE_MEM,
 198         },
 199         [1] = {
 200                 .start  = 106,
 201                 .flags  = IORESOURCE_IRQ,
 202         },
 203 };
 204
 205 static struct platform_device lcdc_device = {
 206         .name           = "sh_mobile_lcdc_fb",
 207         .num_resources  = ARRAY_SIZE(lcdc_resources),
 208         .resource       = lcdc_resources,
 209         .dev            = {
 210                 .platform_data  = &lcdc_info,
 211         },
 212         .archdata = {
 213                 .hwblk_id = HWBLK_LCDC,
 214         },
 215 };
 216
 217 /* CEU0 */
 218 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
 219         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 220 };
 221
 222 static struct resource ceu0_resources[] = {
 223         [0] = {
 224                 .name   = "CEU0",
 225                 .start  = 0xfe910000,
 226                 .end    = 0xfe91009f,
 227                 .flags  = IORESOURCE_MEM,
 228         },
 229         [1] = {
 230                 .start  = 52,
 231                 .flags  = IORESOURCE_IRQ,
 232         },
 233         [2] = {
 234                 /* place holder for contiguous memory */
 235         },
 236 };
 237
 238 static struct platform_device ceu0_device = {
 239         .name           = "sh_mobile_ceu",
 240         .id             = 0, /* "ceu0" clock */
 241         .num_resources  = ARRAY_SIZE(ceu0_resources),
 242         .resource       = ceu0_resources,
 243         .dev    = {
 244                 .platform_data  = &sh_mobile_ceu0_info,
 245         },
 246         .archdata = {
 247                 .hwblk_id = HWBLK_CEU0,
 248         },
 249 };
 250
 251 /* CEU1 */
 252 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
 253         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 254 };
 255
 256 static struct resource ceu1_resources[] = {
 257         [0] = {
 258                 .name   = "CEU1",
 259                 .start  = 0xfe914000,
 260                 .end    = 0xfe91409f,
 261                 .flags  = IORESOURCE_MEM,
 262         },
 263         [1] = {
 264                 .start  = 63,
 265                 .flags  = IORESOURCE_IRQ,
 266         },
 267         [2] = {
 268                 /* place holder for contiguous memory */
 269         },
 270 };
 271
 272 static struct platform_device ceu1_device = {
 273         .name           = "sh_mobile_ceu",
 274         .id             = 1, /* "ceu1" clock */
 275         .num_resources  = ARRAY_SIZE(ceu1_resources),
 276         .resource       = ceu1_resources,
 277         .dev    = {
 278                 .platform_data  = &sh_mobile_ceu1_info,
 279         },
 280         .archdata = {
 281                 .hwblk_id = HWBLK_CEU1,
 282         },
 283 };
 284
 285 /* FSI */
 286 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
 287 static struct sh_fsi_platform_info fsi_info = {
 288         .porta_flags = SH_FSI_BRS_INV |
 289                        SH_FSI_OUT_SLAVE_MODE |
 290                        SH_FSI_IN_SLAVE_MODE |
 291                        SH_FSI_OFMT(PCM) |
 292                        SH_FSI_IFMT(PCM),
 293 };
 294
 295 static struct resource fsi_resources[] = {
 296         [0] = {
 297                 .name   = "FSI",
 298                 .start  = 0xFE3C0000,
 299                 .end    = 0xFE3C021d,
 300                 .flags  = IORESOURCE_MEM,
 301         },
 302         [1] = {
 303                 .start  = 108,
 304                 .flags  = IORESOURCE_IRQ,
 305         },
 306 };
 307
 308 static struct platform_device fsi_device = {
 309         .name           = "sh_fsi",
 310         .id             = 0,
 311         .num_resources  = ARRAY_SIZE(fsi_resources),
 312         .resource       = fsi_resources,
 313         .dev    = {
 314                 .platform_data  = &fsi_info,
 315         },
 316         .archdata = {
 317                 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
 318         },
 319 };
 320
 321 /* KEYSC in SoC (Needs SW33-2 set to ON) */
 322 static struct sh_keysc_info keysc_info = {
 323         .mode = SH_KEYSC_MODE_1,
 324         .scan_timing = 3,
 325         .delay = 50,
 326         .keycodes = {
 327                 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
 328                 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
 329                 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
 330                 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
 331                 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
 332                 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
 333         },
 334 };
 335
 336 static struct resource keysc_resources[] = {
 337         [0] = {
 338                 .name   = "KEYSC",
 339                 .start  = 0x044b0000,
 340                 .end    = 0x044b000f,
 341                 .flags  = IORESOURCE_MEM,
 342         },
 343         [1] = {
 344                 .start  = 79,
 345                 .flags  = IORESOURCE_IRQ,
 346         },
 347 };
 348
 349 static struct platform_device keysc_device = {
 350         .name           = "sh_keysc",
 351         .id             = 0, /* "keysc0" clock */
 352         .num_resources  = ARRAY_SIZE(keysc_resources),
 353         .resource       = keysc_resources,
 354         .dev    = {
 355                 .platform_data  = &keysc_info,
 356         },
 357         .archdata = {
 358                 .hwblk_id = HWBLK_KEYSC,
 359         },
 360 };
 361
 362 /* SH Eth */
 363 static struct resource sh_eth_resources[] = {
 364         [0] = {
 365                 .start = SH_ETH_ADDR,
 366                 .end   = SH_ETH_ADDR + 0x1FC,
 367                 .flags = IORESOURCE_MEM,
 368         },
 369         [1] = {
 370                 .start = 91,
 371                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 372         },
 373 };
 374
 375 static struct sh_eth_plat_data sh_eth_plat = {
 376         .phy = 0x1f, /* SMSC LAN8187 */
 377         .edmac_endian = EDMAC_LITTLE_ENDIAN,
 378 };
 379
 380 static struct platform_device sh_eth_device = {
 381         .name = "sh-eth",
 382         .id     = 0,
 383         .dev = {
 384                 .platform_data = &sh_eth_plat,
 385         },
 386         .num_resources = ARRAY_SIZE(sh_eth_resources),
 387         .resource = sh_eth_resources,
 388         .archdata = {
 389                 .hwblk_id = HWBLK_ETHER,
 390         },
 391 };
 392
 393 static struct r8a66597_platdata sh7724_usb0_host_data = {
 394         .on_chip = 1,
 395 };
 396
 397 static struct resource sh7724_usb0_host_resources[] = {
 398         [0] = {
 399                 .start  = 0xa4d80000,
 400                 .end    = 0xa4d80124 - 1,
 401                 .flags  = IORESOURCE_MEM,
 402         },
 403         [1] = {
 404                 .start  = 65,
 405                 .end    = 65,
 406                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 407         },
 408 };
 409
 410 static struct platform_device sh7724_usb0_host_device = {
 411         .name           = "r8a66597_hcd",
 412         .id             = 0,
 413         .dev = {
 414                 .dma_mask               = NULL,         /*  not use dma */
 415                 .coherent_dma_mask      = 0xffffffff,
 416                 .platform_data          = &sh7724_usb0_host_data,
 417         },
 418         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
 419         .resource       = sh7724_usb0_host_resources,
 420         .archdata = {
 421                 .hwblk_id = HWBLK_USB0,
 422         },
 423 };
 424
 425 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
 426         .on_chip = 1,
 427 };
 428
 429 static struct resource sh7724_usb1_gadget_resources[] = {
 430         [0] = {
 431                 .start  = 0xa4d90000,
 432                 .end    = 0xa4d90123,
 433                 .flags  = IORESOURCE_MEM,
 434         },
 435         [1] = {
 436                 .start  = 66,
 437                 .end    = 66,
 438                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 439         },
 440 };
 441
 442 static struct platform_device sh7724_usb1_gadget_device = {
 443         .name           = "r8a66597_udc",
 444         .id             = 1, /* USB1 */
 445         .dev = {
 446                 .dma_mask               = NULL,         /*  not use dma */
 447                 .coherent_dma_mask      = 0xffffffff,
 448                 .platform_data          = &sh7724_usb1_gadget_data,
 449         },
 450         .num_resources  = ARRAY_SIZE(sh7724_usb1_gadget_resources),
 451         .resource       = sh7724_usb1_gadget_resources,
 452 };
 453
 454 static struct resource sdhi0_cn7_resources[] = {
 455         [0] = {
 456                 .name   = "SDHI0",
 457                 .start  = 0x04ce0000,
 458                 .end    = 0x04ce01ff,
 459                 .flags  = IORESOURCE_MEM,
 460         },
 461         [1] = {
 462                 .start  = 100,
 463                 .flags  = IORESOURCE_IRQ,
 464         },
 465 };
 466
 467 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
 468         .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
 469         .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
 470 };
 471
 472 static struct platform_device sdhi0_cn7_device = {
 473         .name           = "sh_mobile_sdhi",
 474         .id             = 0,
 475         .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
 476         .resource       = sdhi0_cn7_resources,
 477         .dev = {
 478                 .platform_data  = &sh7724_sdhi0_data,
 479         },
 480         .archdata = {
 481                 .hwblk_id = HWBLK_SDHI0,
 482         },
 483 };
 484
 485 static struct resource sdhi1_cn8_resources[] = {
 486         [0] = {
 487                 .name   = "SDHI1",
 488                 .start  = 0x04cf0000,
 489                 .end    = 0x04cf01ff,
 490                 .flags  = IORESOURCE_MEM,
 491         },
 492         [1] = {
 493                 .start  = 23,
 494                 .flags  = IORESOURCE_IRQ,
 495         },
 496 };
 497
 498 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
 499         .dma_slave_tx   = SHDMA_SLAVE_SDHI1_TX,
 500         .dma_slave_rx   = SHDMA_SLAVE_SDHI1_RX,
 501 };
 502
 503 static struct platform_device sdhi1_cn8_device = {
 504         .name           = "sh_mobile_sdhi",
 505         .id             = 1,
 506         .num_resources  = ARRAY_SIZE(sdhi1_cn8_resources),
 507         .resource       = sdhi1_cn8_resources,
 508         .dev = {
 509                 .platform_data  = &sh7724_sdhi1_data,
 510         },
 511         .archdata = {
 512                 .hwblk_id = HWBLK_SDHI1,
 513         },
 514 };
 515
 516 /* IrDA */
 517 static struct resource irda_resources[] = {
 518         [0] = {
 519                 .name   = "IrDA",
 520                 .start  = 0xA45D0000,
 521                 .end    = 0xA45D0049,
 522                 .flags  = IORESOURCE_MEM,
 523         },
 524         [1] = {
 525                 .start  = 20,
 526                 .flags  = IORESOURCE_IRQ,
 527         },
 528 };
 529
 530 static struct platform_device irda_device = {
 531         .name           = "sh_sir",
 532         .num_resources  = ARRAY_SIZE(irda_resources),
 533         .resource       = irda_resources,
 534 };
 535
 536 #include <media/ak881x.h>
 537 #include <media/sh_vou.h>
 538
 539 static struct ak881x_pdata ak881x_pdata = {
 540         .flags = AK881X_IF_MODE_SLAVE,
 541 };
 542
 543 static struct i2c_board_info ak8813 = {
 544         /* With open J18 jumper address is 0x21 */
 545         I2C_BOARD_INFO("ak8813", 0x20),
 546         .platform_data = &ak881x_pdata,
 547 };
 548
 549 static struct sh_vou_pdata sh_vou_pdata = {
 550         .bus_fmt        = SH_VOU_BUS_8BIT,
 551         .flags          = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
 552         .board_info     = &ak8813,
 553         .i2c_adap       = 0,
 554 };
 555
 556 static struct resource sh_vou_resources[] = {
 557         [0] = {
 558                 .start  = 0xfe960000,
 559                 .end    = 0xfe962043,
 560                 .flags  = IORESOURCE_MEM,
 561         },
 562         [1] = {
 563                 .start  = 55,
 564                 .flags  = IORESOURCE_IRQ,
 565         },
 566 };
 567
 568 static struct platform_device vou_device = {
 569         .name           = "sh-vou",
 570         .id             = -1,
 571         .num_resources  = ARRAY_SIZE(sh_vou_resources),
 572         .resource       = sh_vou_resources,
 573         .dev            = {
 574                 .platform_data  = &sh_vou_pdata,
 575         },
 576         .archdata       = {
 577                 .hwblk_id       = HWBLK_VOU,
 578         },
 579 };
 580
 581 static struct platform_device *ms7724se_devices[] __initdata = {
 582         &heartbeat_device,
 583         &smc91x_eth_device,
 584         &lcdc_device,
 585         &nor_flash_device,
 586         &ceu0_device,
 587         &ceu1_device,
 588         &keysc_device,
 589         &sh_eth_device,
 590         &sh7724_usb0_host_device,
 591         &sh7724_usb1_gadget_device,
 592         &fsi_device,
 593         &sdhi0_cn7_device,
 594         &sdhi1_cn8_device,
 595         &irda_device,
 596         &vou_device,
 597 };
 598
 599 /* I2C device */
 600 static struct i2c_board_info i2c0_devices[] = {
 601         {
 602                 I2C_BOARD_INFO("ak4642", 0x12),
 603         },
 604 };
 605
 606 #define EEPROM_OP   0xBA206000
 607 #define EEPROM_ADR  0xBA206004
 608 #define EEPROM_DATA 0xBA20600C
 609 #define EEPROM_STAT 0xBA206010
 610 #define EEPROM_STRT 0xBA206014
 611 static int __init sh_eth_is_eeprom_ready(void)
 612 {
 613         int t = 10000;
 614
 615         while (t--) {
 616                 if (!__raw_readw(EEPROM_STAT))
 617                         return 1;
 618                 udelay(1);
 619         }
 620
 621         printk(KERN_ERR "ms7724se can not access to eeprom\n");
 622         return 0;
 623 }
 624
 625 static void __init sh_eth_init(void)
 626 {
 627         int i;
 628         u16 mac;
 629
 630         /* check EEPROM status */
 631         if (!sh_eth_is_eeprom_ready())
 632                 return;
 633
 634         /* read MAC addr from EEPROM */
 635         for (i = 0 ; i < 3 ; i++) {
 636                 __raw_writew(0x0, EEPROM_OP); /* read */
 637                 __raw_writew(i*2, EEPROM_ADR);
 638                 __raw_writew(0x1, EEPROM_STRT);
 639                 if (!sh_eth_is_eeprom_ready())
 640                         return;
 641
 642                 mac = __raw_readw(EEPROM_DATA);
 643                 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
 644                 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
 645         }
 646 }
 647
 648 #define SW4140    0xBA201000
 649 #define FPGA_OUT  0xBA200400
 650 #define PORT_HIZA 0xA4050158
 651 #define PORT_MSELCRB 0xA4050182
 652
 653 #define SW41_A    0x0100
 654 #define SW41_B    0x0200
 655 #define SW41_C    0x0400
 656 #define SW41_D    0x0800
 657 #define SW41_E    0x1000
 658 #define SW41_F    0x2000
 659 #define SW41_G    0x4000
 660 #define SW41_H    0x8000
 661
 662 extern char ms7724se_sdram_enter_start;
 663 extern char ms7724se_sdram_enter_end;
 664 extern char ms7724se_sdram_leave_start;
 665 extern char ms7724se_sdram_leave_end;
 666
 667
 668 static int __init arch_setup(void)
 669 {
 670         /* enable I2C device */
 671         i2c_register_board_info(0, i2c0_devices,
 672                                 ARRAY_SIZE(i2c0_devices));
 673         return 0;
 674 }
 675 arch_initcall(arch_setup);
 676
 677 static int __init devices_setup(void)
 678 {
 679         u16 sw = __raw_readw(SW4140); /* select camera, monitor */
 680         struct clk *clk;
 681         u16 fpga_out;
 682
 683         /* register board specific self-refresh code */
 684         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
 685                                         SUSP_SH_RSTANDBY,
 686                                         &ms7724se_sdram_enter_start,
 687                                         &ms7724se_sdram_enter_end,
 688                                         &ms7724se_sdram_leave_start,
 689                                         &ms7724se_sdram_leave_end);
 690         /* Reset Release */
 691         fpga_out = __raw_readw(FPGA_OUT);
 692         /* bit4: NTSC_PDN, bit5: NTSC_RESET */
 693         fpga_out &= ~((1 << 1)  | /* LAN */
 694                       (1 << 4)  | /* AK8813 PDN */
 695                       (1 << 5)  | /* AK8813 RESET */
 696                       (1 << 6)  | /* VIDEO DAC */
 697                       (1 << 7)  | /* AK4643 */
 698                       (1 << 8)  | /* IrDA */
 699                       (1 << 12) | /* USB0 */
 700                       (1 << 14)); /* RMII */
 701         __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
 702
 703         udelay(10);
 704
 705         /* AK8813 RESET */
 706         __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
 707
 708         udelay(10);
 709
 710         __raw_writew(fpga_out, FPGA_OUT);
 711
 712         /* turn on USB clocks, use external clock */
 713         __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 714
 715         /* Let LED9 show STATUS2 */
 716         gpio_request(GPIO_FN_STATUS2, NULL);
 717
 718         /* Lit LED10 show STATUS0 */
 719         gpio_request(GPIO_FN_STATUS0, NULL);
 720
 721         /* Lit LED11 show PDSTATUS */
 722         gpio_request(GPIO_FN_PDSTATUS, NULL);
 723
 724         /* enable USB0 port */
 725         __raw_writew(0x0600, 0xa40501d4);
 726
 727         /* enable USB1 port */
 728         __raw_writew(0x0600, 0xa4050192);
 729
 730         /* enable IRQ 0,1,2 */
 731         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
 732         gpio_request(GPIO_FN_INTC_IRQ1, NULL);
 733         gpio_request(GPIO_FN_INTC_IRQ2, NULL);
 734
 735         /* enable SCIFA3 */
 736         gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
 737         gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
 738         gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
 739         gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
 740         gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
 741
 742         /* enable LCDC */
 743         gpio_request(GPIO_FN_LCDD23,   NULL);
 744         gpio_request(GPIO_FN_LCDD22,   NULL);
 745         gpio_request(GPIO_FN_LCDD21,   NULL);
 746         gpio_request(GPIO_FN_LCDD20,   NULL);
 747         gpio_request(GPIO_FN_LCDD19,   NULL);
 748         gpio_request(GPIO_FN_LCDD18,   NULL);
 749         gpio_request(GPIO_FN_LCDD17,   NULL);
 750         gpio_request(GPIO_FN_LCDD16,   NULL);
 751         gpio_request(GPIO_FN_LCDD15,   NULL);
 752         gpio_request(GPIO_FN_LCDD14,   NULL);
 753         gpio_request(GPIO_FN_LCDD13,   NULL);
 754         gpio_request(GPIO_FN_LCDD12,   NULL);
 755         gpio_request(GPIO_FN_LCDD11,   NULL);
 756         gpio_request(GPIO_FN_LCDD10,   NULL);
 757         gpio_request(GPIO_FN_LCDD9,    NULL);
 758         gpio_request(GPIO_FN_LCDD8,    NULL);
 759         gpio_request(GPIO_FN_LCDD7,    NULL);
 760         gpio_request(GPIO_FN_LCDD6,    NULL);
 761         gpio_request(GPIO_FN_LCDD5,    NULL);
 762         gpio_request(GPIO_FN_LCDD4,    NULL);
 763         gpio_request(GPIO_FN_LCDD3,    NULL);
 764         gpio_request(GPIO_FN_LCDD2,    NULL);
 765         gpio_request(GPIO_FN_LCDD1,    NULL);
 766         gpio_request(GPIO_FN_LCDD0,    NULL);
 767         gpio_request(GPIO_FN_LCDDISP,  NULL);
 768         gpio_request(GPIO_FN_LCDHSYN,  NULL);
 769         gpio_request(GPIO_FN_LCDDCK,   NULL);
 770         gpio_request(GPIO_FN_LCDVSYN,  NULL);
 771         gpio_request(GPIO_FN_LCDDON,   NULL);
 772         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 773         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 774         gpio_request(GPIO_FN_LCDRD,    NULL);
 775         gpio_request(GPIO_FN_LCDLCLK,  NULL);
 776         __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 777
 778         /* enable CEU0 */
 779         gpio_request(GPIO_FN_VIO0_D15, NULL);
 780         gpio_request(GPIO_FN_VIO0_D14, NULL);
 781         gpio_request(GPIO_FN_VIO0_D13, NULL);
 782         gpio_request(GPIO_FN_VIO0_D12, NULL);
 783         gpio_request(GPIO_FN_VIO0_D11, NULL);
 784         gpio_request(GPIO_FN_VIO0_D10, NULL);
 785         gpio_request(GPIO_FN_VIO0_D9,  NULL);
 786         gpio_request(GPIO_FN_VIO0_D8,  NULL);
 787         gpio_request(GPIO_FN_VIO0_D7,  NULL);
 788         gpio_request(GPIO_FN_VIO0_D6,  NULL);
 789         gpio_request(GPIO_FN_VIO0_D5,  NULL);
 790         gpio_request(GPIO_FN_VIO0_D4,  NULL);
 791         gpio_request(GPIO_FN_VIO0_D3,  NULL);
 792         gpio_request(GPIO_FN_VIO0_D2,  NULL);
 793         gpio_request(GPIO_FN_VIO0_D1,  NULL);
 794         gpio_request(GPIO_FN_VIO0_D0,  NULL);
 795         gpio_request(GPIO_FN_VIO0_VD,  NULL);
 796         gpio_request(GPIO_FN_VIO0_CLK, NULL);
 797         gpio_request(GPIO_FN_VIO0_FLD, NULL);
 798         gpio_request(GPIO_FN_VIO0_HD,  NULL);
 799         platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
 800
 801         /* enable CEU1 */
 802         gpio_request(GPIO_FN_VIO1_D7,  NULL);
 803         gpio_request(GPIO_FN_VIO1_D6,  NULL);
 804         gpio_request(GPIO_FN_VIO1_D5,  NULL);
 805         gpio_request(GPIO_FN_VIO1_D4,  NULL);
 806         gpio_request(GPIO_FN_VIO1_D3,  NULL);
 807         gpio_request(GPIO_FN_VIO1_D2,  NULL);
 808         gpio_request(GPIO_FN_VIO1_D1,  NULL);
 809         gpio_request(GPIO_FN_VIO1_D0,  NULL);
 810         gpio_request(GPIO_FN_VIO1_FLD, NULL);
 811         gpio_request(GPIO_FN_VIO1_HD,  NULL);
 812         gpio_request(GPIO_FN_VIO1_VD,  NULL);
 813         gpio_request(GPIO_FN_VIO1_CLK, NULL);
 814         platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
 815
 816         /* KEYSC */
 817         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 818         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 819         gpio_request(GPIO_FN_KEYIN4,      NULL);
 820         gpio_request(GPIO_FN_KEYIN3,      NULL);
 821         gpio_request(GPIO_FN_KEYIN2,      NULL);
 822         gpio_request(GPIO_FN_KEYIN1,      NULL);
 823         gpio_request(GPIO_FN_KEYIN0,      NULL);
 824         gpio_request(GPIO_FN_KEYOUT3,     NULL);
 825         gpio_request(GPIO_FN_KEYOUT2,     NULL);
 826         gpio_request(GPIO_FN_KEYOUT1,     NULL);
 827         gpio_request(GPIO_FN_KEYOUT0,     NULL);
 828
 829         /* enable FSI */
 830         gpio_request(GPIO_FN_FSIMCKA,    NULL);
 831         gpio_request(GPIO_FN_FSIIASD,    NULL);
 832         gpio_request(GPIO_FN_FSIOASD,    NULL);
 833         gpio_request(GPIO_FN_FSIIABCK,   NULL);
 834         gpio_request(GPIO_FN_FSIIALRCK,  NULL);
 835         gpio_request(GPIO_FN_FSIOABCK,   NULL);
 836         gpio_request(GPIO_FN_FSIOALRCK,  NULL);
 837         gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
 838
 839         /* set SPU2 clock to 83.4 MHz */
 840         clk = clk_get(NULL, "spu_clk");
 841         if (!IS_ERR(clk)) {
 842                 clk_set_rate(clk, clk_round_rate(clk, 83333333));
 843                 clk_put(clk);
 844         }
 845
 846         /* change parent of FSI A */
 847         clk = clk_get(NULL, "fsia_clk");
 848         if (!IS_ERR(clk)) {
 849                 /* 48kHz dummy clock was used to make sure 1/1 divide */
 850                 clk_set_rate(&sh7724_fsimcka_clk, 48000);
 851                 clk_set_parent(clk, &sh7724_fsimcka_clk);
 852                 clk_set_rate(clk, 48000);
 853                 clk_put(clk);
 854         }
 855
 856         /* SDHI0 connected to cn7 */
 857         gpio_request(GPIO_FN_SDHI0CD, NULL);
 858         gpio_request(GPIO_FN_SDHI0WP, NULL);
 859         gpio_request(GPIO_FN_SDHI0D3, NULL);
 860         gpio_request(GPIO_FN_SDHI0D2, NULL);
 861         gpio_request(GPIO_FN_SDHI0D1, NULL);
 862         gpio_request(GPIO_FN_SDHI0D0, NULL);
 863         gpio_request(GPIO_FN_SDHI0CMD, NULL);
 864         gpio_request(GPIO_FN_SDHI0CLK, NULL);
 865
 866         /* SDHI1 connected to cn8 */
 867         gpio_request(GPIO_FN_SDHI1CD, NULL);
 868         gpio_request(GPIO_FN_SDHI1WP, NULL);
 869         gpio_request(GPIO_FN_SDHI1D3, NULL);
 870         gpio_request(GPIO_FN_SDHI1D2, NULL);
 871         gpio_request(GPIO_FN_SDHI1D1, NULL);
 872         gpio_request(GPIO_FN_SDHI1D0, NULL);
 873         gpio_request(GPIO_FN_SDHI1CMD, NULL);
 874         gpio_request(GPIO_FN_SDHI1CLK, NULL);
 875
 876         /* enable IrDA */
 877         gpio_request(GPIO_FN_IRDA_OUT, NULL);
 878         gpio_request(GPIO_FN_IRDA_IN,  NULL);
 879
 880         /*
 881          * enable SH-Eth
 882          *
 883          * please remove J33 pin from your board !!
 884          *
 885          * ms7724 board should not use GPIO_FN_LNKSTA pin
 886          * So, This time PTX5 is set to input pin
 887          */
 888         gpio_request(GPIO_FN_RMII_RXD0,    NULL);
 889         gpio_request(GPIO_FN_RMII_RXD1,    NULL);
 890         gpio_request(GPIO_FN_RMII_TXD0,    NULL);
 891         gpio_request(GPIO_FN_RMII_TXD1,    NULL);
 892         gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
 893         gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
 894         gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
 895         gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
 896         gpio_request(GPIO_FN_MDIO,         NULL);
 897         gpio_request(GPIO_FN_MDC,          NULL);
 898         gpio_request(GPIO_PTX5, NULL);
 899         gpio_direction_input(GPIO_PTX5);
 900         sh_eth_init();
 901
 902         if (sw & SW41_B) {
 903                 /* 720p */
 904                 lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
 905                 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
 906         } else {
 907                 /* VGA */
 908                 lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
 909                 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
 910         }
 911
 912         if (sw & SW41_A) {
 913                 /* Digital monitor */
 914                 lcdc_info.ch[0].interface_type = RGB18;
 915                 lcdc_info.ch[0].flags          = 0;
 916         } else {
 917                 /* Analog monitor */
 918                 lcdc_info.ch[0].interface_type = RGB24;
 919                 lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
 920         }
 921
 922         /* VOU */
 923         gpio_request(GPIO_FN_DV_D15, NULL);
 924         gpio_request(GPIO_FN_DV_D14, NULL);
 925         gpio_request(GPIO_FN_DV_D13, NULL);
 926         gpio_request(GPIO_FN_DV_D12, NULL);
 927         gpio_request(GPIO_FN_DV_D11, NULL);
 928         gpio_request(GPIO_FN_DV_D10, NULL);
 929         gpio_request(GPIO_FN_DV_D9, NULL);
 930         gpio_request(GPIO_FN_DV_D8, NULL);
 931         gpio_request(GPIO_FN_DV_CLKI, NULL);
 932         gpio_request(GPIO_FN_DV_CLK, NULL);
 933         gpio_request(GPIO_FN_DV_VSYNC, NULL);
 934         gpio_request(GPIO_FN_DV_HSYNC, NULL);
 935
 936         return platform_add_devices(ms7724se_devices,
 937                                     ARRAY_SIZE(ms7724se_devices));
 938 }
 939 device_initcall(devices_setup);
 940
 941 static struct sh_machine_vector mv_ms7724se __initmv = {
 942         .mv_name        = "ms7724se",
 943         .mv_init_irq    = init_se7724_IRQ,
 944         .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
 945 };