arch/sh/boards/mach-migor/setup.c

   1 /*
   2  * Renesas System Solutions Asia Pte. Ltd - Migo-R
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10 #include <linux/init.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/input.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/mtd/nand.h>
  16 #include <linux/i2c.h>
  17 #include <linux/smc91x.h>
  18 #include <linux/delay.h>
  19 #include <linux/clk.h>
  20 #include <linux/gpio.h>
  21 #include <video/sh_mobile_lcdc.h>
  22 #include <media/sh_mobile_ceu.h>
  23 #include <media/ov772x.h>
  24 #include <media/tw9910.h>
  25 #include <asm/clock.h>
  26 #include <asm/machvec.h>
  27 #include <asm/io.h>
  28 #include <asm/sh_keysc.h>
  29 #include <asm/suspend.h>
  30 #include <mach/migor.h>
  31 #include <cpu/sh7722.h>
  32
  33 /* Address     IRQ  Size  Bus  Description
  34  * 0x00000000       64MB  16   NOR Flash (SP29PL256N)
  35  * 0x0c000000       64MB  64   SDRAM (2xK4M563233G)
  36  * 0x10000000  IRQ0       16   Ethernet (SMC91C111)
  37  * 0x14000000  IRQ4       16   USB 2.0 Host Controller (M66596)
  38  * 0x18000000       8GB    8   NAND Flash (K9K8G08U0A)
  39  */
  40
  41 static struct smc91x_platdata smc91x_info = {
  42         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  43 };
  44
  45 static struct resource smc91x_eth_resources[] = {
  46         [0] = {
  47                 .name   = "SMC91C111" ,
  48                 .start  = 0x10000300,
  49                 .end    = 0x1000030f,
  50                 .flags  = IORESOURCE_MEM,
  51         },
  52         [1] = {
  53                 .start  = 32, /* IRQ0 */
  54                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  55         },
  56 };
  57
  58 static struct platform_device smc91x_eth_device = {
  59         .name           = "smc91x",
  60         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
  61         .resource       = smc91x_eth_resources,
  62         .dev    = {
  63                 .platform_data  = &smc91x_info,
  64         },
  65 };
  66
  67 static struct sh_keysc_info sh_keysc_info = {
  68         .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
  69         .scan_timing = 3,
  70         .delay = 5,
  71         .keycodes = {
  72                 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
  73                 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
  74                 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
  75                 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
  76                 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
  77         },
  78 };
  79
  80 static struct resource sh_keysc_resources[] = {
  81         [0] = {
  82                 .start  = 0x044b0000,
  83                 .end    = 0x044b000f,
  84                 .flags  = IORESOURCE_MEM,
  85         },
  86         [1] = {
  87                 .start  = 79,
  88                 .flags  = IORESOURCE_IRQ,
  89         },
  90 };
  91
  92 static struct platform_device sh_keysc_device = {
  93         .name           = "sh_keysc",
  94         .id             = 0, /* "keysc0" clock */
  95         .num_resources  = ARRAY_SIZE(sh_keysc_resources),
  96         .resource       = sh_keysc_resources,
  97         .dev    = {
  98                 .platform_data  = &sh_keysc_info,
  99         },
 100         .archdata = {
 101                 .hwblk_id = HWBLK_KEYSC,
 102         },
 103 };
 104
 105 static struct mtd_partition migor_nor_flash_partitions[] =
 106 {
 107         {
 108                 .name = "uboot",
 109                 .offset = 0,
 110                 .size = (1 * 1024 * 1024),
 111                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 112         },
 113         {
 114                 .name = "rootfs",
 115                 .offset = MTDPART_OFS_APPEND,
 116                 .size = (15 * 1024 * 1024),
 117         },
 118         {
 119                 .name = "other",
 120                 .offset = MTDPART_OFS_APPEND,
 121                 .size = MTDPART_SIZ_FULL,
 122         },
 123 };
 124
 125 static struct physmap_flash_data migor_nor_flash_data = {
 126         .width          = 2,
 127         .parts          = migor_nor_flash_partitions,
 128         .nr_parts       = ARRAY_SIZE(migor_nor_flash_partitions),
 129 };
 130
 131 static struct resource migor_nor_flash_resources[] = {
 132         [0] = {
 133                 .name           = "NOR Flash",
 134                 .start          = 0x00000000,
 135                 .end            = 0x03ffffff,
 136                 .flags          = IORESOURCE_MEM,
 137         }
 138 };
 139
 140 static struct platform_device migor_nor_flash_device = {
 141         .name           = "physmap-flash",
 142         .resource       = migor_nor_flash_resources,
 143         .num_resources  = ARRAY_SIZE(migor_nor_flash_resources),
 144         .dev            = {
 145                 .platform_data = &migor_nor_flash_data,
 146         },
 147 };
 148
 149 static struct mtd_partition migor_nand_flash_partitions[] = {
 150         {
 151                 .name           = "nanddata1",
 152                 .offset         = 0x0,
 153                 .size           = 512 * 1024 * 1024,
 154         },
 155         {
 156                 .name           = "nanddata2",
 157                 .offset         = MTDPART_OFS_APPEND,
 158                 .size           = 512 * 1024 * 1024,
 159         },
 160 };
 161
 162 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
 163                                      unsigned int ctrl)
 164 {
 165         struct nand_chip *chip = mtd->priv;
 166
 167         if (cmd == NAND_CMD_NONE)
 168                 return;
 169
 170         if (ctrl & NAND_CLE)
 171                 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
 172         else if (ctrl & NAND_ALE)
 173                 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
 174         else
 175                 writeb(cmd, chip->IO_ADDR_W);
 176 }
 177
 178 static int migor_nand_flash_ready(struct mtd_info *mtd)
 179 {
 180         return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
 181 }
 182
 183 struct platform_nand_data migor_nand_flash_data = {
 184         .chip = {
 185                 .nr_chips = 1,
 186                 .partitions = migor_nand_flash_partitions,
 187                 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
 188                 .chip_delay = 20,
 189                 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
 190         },
 191         .ctrl = {
 192                 .dev_ready = migor_nand_flash_ready,
 193                 .cmd_ctrl = migor_nand_flash_cmd_ctl,
 194         },
 195 };
 196
 197 static struct resource migor_nand_flash_resources[] = {
 198         [0] = {
 199                 .name           = "NAND Flash",
 200                 .start          = 0x18000000,
 201                 .end            = 0x18ffffff,
 202                 .flags          = IORESOURCE_MEM,
 203         },
 204 };
 205
 206 static struct platform_device migor_nand_flash_device = {
 207         .name           = "gen_nand",
 208         .resource       = migor_nand_flash_resources,
 209         .num_resources  = ARRAY_SIZE(migor_nand_flash_resources),
 210         .dev            = {
 211                 .platform_data = &migor_nand_flash_data,
 212         }
 213 };
 214
 215 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
 216 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
 217         .clock_source = LCDC_CLK_BUS,
 218         .ch[0] = {
 219                 .chan = LCDC_CHAN_MAINLCD,
 220                 .bpp = 16,
 221                 .interface_type = RGB16,
 222                 .clock_divider = 2,
 223                 .lcd_cfg = {
 224                         .name = "LB070WV1",
 225                         .xres = 800,
 226                         .yres = 480,
 227                         .left_margin = 64,
 228                         .right_margin = 16,
 229                         .hsync_len = 120,
 230                         .upper_margin = 1,
 231                         .lower_margin = 17,
 232                         .vsync_len = 2,
 233                         .sync = 0,
 234                 },
 235                 .lcd_size_cfg = { /* 7.0 inch */
 236                         .width = 152,
 237                         .height = 91,
 238                 },
 239         }
 240 #endif
 241 #ifdef CONFIG_SH_MIGOR_QVGA
 242         .clock_source = LCDC_CLK_PERIPHERAL,
 243         .ch[0] = {
 244                 .chan = LCDC_CHAN_MAINLCD,
 245                 .bpp = 16,
 246                 .interface_type = SYS16A,
 247                 .clock_divider = 10,
 248                 .lcd_cfg = {
 249                         .name = "PH240320T",
 250                         .xres = 320,
 251                         .yres = 240,
 252                         .left_margin = 0,
 253                         .right_margin = 16,
 254                         .hsync_len = 8,
 255                         .upper_margin = 1,
 256                         .lower_margin = 17,
 257                         .vsync_len = 2,
 258                         .sync = FB_SYNC_HOR_HIGH_ACT,
 259                 },
 260                 .lcd_size_cfg = { /* 2.4 inch */
 261                         .width = 49,
 262                         .height = 37,
 263                 },
 264                 .board_cfg = {
 265                         .setup_sys = migor_lcd_qvga_setup,
 266                 },
 267                 .sys_bus_cfg = {
 268                         .ldmt2r = 0x06000a09,
 269                         .ldmt3r = 0x180e3418,
 270                         /* set 1s delay to encourage fsync() */
 271                         .deferred_io_msec = 1000,
 272                 },
 273         }
 274 #endif
 275 };
 276
 277 static struct resource migor_lcdc_resources[] = {
 278         [0] = {
 279                 .name   = "LCDC",
 280                 .start  = 0xfe940000, /* P4-only space */
 281                 .end    = 0xfe942fff,
 282                 .flags  = IORESOURCE_MEM,
 283         },
 284         [1] = {
 285                 .start  = 28,
 286                 .flags  = IORESOURCE_IRQ,
 287         },
 288 };
 289
 290 static struct platform_device migor_lcdc_device = {
 291         .name           = "sh_mobile_lcdc_fb",
 292         .num_resources  = ARRAY_SIZE(migor_lcdc_resources),
 293         .resource       = migor_lcdc_resources,
 294         .dev    = {
 295                 .platform_data  = &sh_mobile_lcdc_info,
 296         },
 297         .archdata = {
 298                 .hwblk_id = HWBLK_LCDC,
 299         },
 300 };
 301
 302 static struct clk *camera_clk;
 303 static DEFINE_MUTEX(camera_lock);
 304
 305 static void camera_power_on(int is_tw)
 306 {
 307         mutex_lock(&camera_lock);
 308
 309         /* Use 10 MHz VIO_CKO instead of 24 MHz to work
 310          * around signal quality issues on Panel Board V2.1.
 311          */
 312         camera_clk = clk_get(NULL, "video_clk");
 313         clk_set_rate(camera_clk, 10000000);
 314         clk_enable(camera_clk); /* start VIO_CKO */
 315
 316         /* use VIO_RST to take camera out of reset */
 317         mdelay(10);
 318         if (is_tw) {
 319                 gpio_set_value(GPIO_PTT2, 0);
 320                 gpio_set_value(GPIO_PTT0, 0);
 321         } else {
 322                 gpio_set_value(GPIO_PTT0, 1);
 323         }
 324         gpio_set_value(GPIO_PTT3, 0);
 325         mdelay(10);
 326         gpio_set_value(GPIO_PTT3, 1);
 327         mdelay(10); /* wait to let chip come out of reset */
 328 }
 329
 330 static void camera_power_off(void)
 331 {
 332         clk_disable(camera_clk); /* stop VIO_CKO */
 333         clk_put(camera_clk);
 334
 335         gpio_set_value(GPIO_PTT3, 0);
 336         mutex_unlock(&camera_lock);
 337 }
 338
 339 static int ov7725_power(struct device *dev, int mode)
 340 {
 341         if (mode)
 342                 camera_power_on(0);
 343         else
 344                 camera_power_off();
 345
 346         return 0;
 347 }
 348
 349 static int tw9910_power(struct device *dev, int mode)
 350 {
 351         if (mode)
 352                 camera_power_on(1);
 353         else
 354                 camera_power_off();
 355
 356         return 0;
 357 }
 358
 359 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
 360         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 361 };
 362
 363 static struct resource migor_ceu_resources[] = {
 364         [0] = {
 365                 .name   = "CEU",
 366                 .start  = 0xfe910000,
 367                 .end    = 0xfe91009f,
 368                 .flags  = IORESOURCE_MEM,
 369         },
 370         [1] = {
 371                 .start  = 52,
 372                 .flags  = IORESOURCE_IRQ,
 373         },
 374         [2] = {
 375                 /* place holder for contiguous memory */
 376         },
 377 };
 378
 379 static struct platform_device migor_ceu_device = {
 380         .name           = "sh_mobile_ceu",
 381         .id             = 0, /* "ceu0" clock */
 382         .num_resources  = ARRAY_SIZE(migor_ceu_resources),
 383         .resource       = migor_ceu_resources,
 384         .dev    = {
 385                 .platform_data  = &sh_mobile_ceu_info,
 386         },
 387         .archdata = {
 388                 .hwblk_id = HWBLK_CEU,
 389         },
 390 };
 391
 392 static struct resource sdhi_cn9_resources[] = {
 393         [0] = {
 394                 .name   = "SDHI",
 395                 .start  = 0x04ce0000,
 396                 .end    = 0x04ce01ff,
 397                 .flags  = IORESOURCE_MEM,
 398         },
 399         [1] = {
 400                 .start  = 101,
 401                 .flags  = IORESOURCE_IRQ,
 402         },
 403 };
 404
 405 static struct platform_device sdhi_cn9_device = {
 406         .name           = "sh_mobile_sdhi",
 407         .num_resources  = ARRAY_SIZE(sdhi_cn9_resources),
 408         .resource       = sdhi_cn9_resources,
 409         .archdata = {
 410                 .hwblk_id = HWBLK_SDHI,
 411         },
 412 };
 413
 414 static struct i2c_board_info migor_i2c_devices[] = {
 415         {
 416                 I2C_BOARD_INFO("rs5c372b", 0x32),
 417         },
 418         {
 419                 I2C_BOARD_INFO("migor_ts", 0x51),
 420                 .irq = 38, /* IRQ6 */
 421         },
 422 };
 423
 424 static struct i2c_board_info migor_i2c_camera[] = {
 425         {
 426                 I2C_BOARD_INFO("ov772x", 0x21),
 427         },
 428         {
 429                 I2C_BOARD_INFO("tw9910", 0x45),
 430         },
 431 };
 432
 433 static struct ov772x_camera_info ov7725_info = {
 434         .buswidth       = SOCAM_DATAWIDTH_8,
 435         .link = {
 436                 .power          = ov7725_power,
 437                 .board_info     = &migor_i2c_camera[0],
 438                 .i2c_adapter_id = 0,
 439                 .module_name    = "ov772x",
 440         },
 441 };
 442
 443 static struct tw9910_video_info tw9910_info = {
 444         .buswidth       = SOCAM_DATAWIDTH_8,
 445         .mpout          = TW9910_MPO_FIELD,
 446         .link = {
 447                 .power          = tw9910_power,
 448                 .board_info     = &migor_i2c_camera[1],
 449                 .i2c_adapter_id = 0,
 450                 .module_name    = "tw9910",
 451         }
 452 };
 453
 454 static struct platform_device migor_camera[] = {
 455         {
 456                 .name   = "soc-camera-pdrv",
 457                 .id     = 0,
 458                 .dev    = {
 459                         .platform_data = &ov7725_info.link,
 460                 },
 461         }, {
 462                 .name   = "soc-camera-pdrv",
 463                 .id     = 1,
 464                 .dev    = {
 465                         .platform_data = &tw9910_info.link,
 466                 },
 467         },
 468 };
 469
 470 static struct platform_device *migor_devices[] __initdata = {
 471         &smc91x_eth_device,
 472         &sh_keysc_device,
 473         &migor_lcdc_device,
 474         &migor_ceu_device,
 475         &migor_nor_flash_device,
 476         &migor_nand_flash_device,
 477         &sdhi_cn9_device,
 478         &migor_camera[0],
 479         &migor_camera[1],
 480 };
 481
 482 extern char migor_sdram_enter_start;
 483 extern char migor_sdram_enter_end;
 484 extern char migor_sdram_leave_start;
 485 extern char migor_sdram_leave_end;
 486
 487 static int __init migor_devices_setup(void)
 488 {
 489         /* register board specific self-refresh code */
 490         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
 491                                         &migor_sdram_enter_start,
 492                                         &migor_sdram_enter_end,
 493                                         &migor_sdram_leave_start,
 494                                         &migor_sdram_leave_end);
 495 #ifdef CONFIG_PM
 496         /* Let D11 LED show STATUS0 */
 497         gpio_request(GPIO_FN_STATUS0, NULL);
 498
 499         /* Lit D12 LED show PDSTATUS */
 500         gpio_request(GPIO_FN_PDSTATUS, NULL);
 501 #else
 502         /* Lit D11 LED */
 503         gpio_request(GPIO_PTJ7, NULL);
 504         gpio_direction_output(GPIO_PTJ7, 1);
 505         gpio_export(GPIO_PTJ7, 0);
 506
 507         /* Lit D12 LED */
 508         gpio_request(GPIO_PTJ5, NULL);
 509         gpio_direction_output(GPIO_PTJ5, 1);
 510         gpio_export(GPIO_PTJ5, 0);
 511 #endif
 512
 513         /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
 514         gpio_request(GPIO_FN_IRQ0, NULL);
 515         ctrl_outl(0x00003400, BSC_CS4BCR);
 516         ctrl_outl(0x00110080, BSC_CS4WCR);
 517
 518         /* KEYSC */
 519         gpio_request(GPIO_FN_KEYOUT0, NULL);
 520         gpio_request(GPIO_FN_KEYOUT1, NULL);
 521         gpio_request(GPIO_FN_KEYOUT2, NULL);
 522         gpio_request(GPIO_FN_KEYOUT3, NULL);
 523         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 524         gpio_request(GPIO_FN_KEYIN1, NULL);
 525         gpio_request(GPIO_FN_KEYIN2, NULL);
 526         gpio_request(GPIO_FN_KEYIN3, NULL);
 527         gpio_request(GPIO_FN_KEYIN4, NULL);
 528         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 529
 530         /* NAND Flash */
 531         gpio_request(GPIO_FN_CS6A_CE2B, NULL);
 532         ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
 533         gpio_request(GPIO_PTA1, NULL);
 534         gpio_direction_input(GPIO_PTA1);
 535
 536         /* SDHI */
 537         gpio_request(GPIO_FN_SDHICD, NULL);
 538         gpio_request(GPIO_FN_SDHIWP, NULL);
 539         gpio_request(GPIO_FN_SDHID3, NULL);
 540         gpio_request(GPIO_FN_SDHID2, NULL);
 541         gpio_request(GPIO_FN_SDHID1, NULL);
 542         gpio_request(GPIO_FN_SDHID0, NULL);
 543         gpio_request(GPIO_FN_SDHICMD, NULL);
 544         gpio_request(GPIO_FN_SDHICLK, NULL);
 545
 546         /* Touch Panel */
 547         gpio_request(GPIO_FN_IRQ6, NULL);
 548
 549         /* LCD Panel */
 550 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
 551         gpio_request(GPIO_FN_LCDD17, NULL);
 552         gpio_request(GPIO_FN_LCDD16, NULL);
 553         gpio_request(GPIO_FN_LCDD15, NULL);
 554         gpio_request(GPIO_FN_LCDD14, NULL);
 555         gpio_request(GPIO_FN_LCDD13, NULL);
 556         gpio_request(GPIO_FN_LCDD12, NULL);
 557         gpio_request(GPIO_FN_LCDD11, NULL);
 558         gpio_request(GPIO_FN_LCDD10, NULL);
 559         gpio_request(GPIO_FN_LCDD8, NULL);
 560         gpio_request(GPIO_FN_LCDD7, NULL);
 561         gpio_request(GPIO_FN_LCDD6, NULL);
 562         gpio_request(GPIO_FN_LCDD5, NULL);
 563         gpio_request(GPIO_FN_LCDD4, NULL);
 564         gpio_request(GPIO_FN_LCDD3, NULL);
 565         gpio_request(GPIO_FN_LCDD2, NULL);
 566         gpio_request(GPIO_FN_LCDD1, NULL);
 567         gpio_request(GPIO_FN_LCDRS, NULL);
 568         gpio_request(GPIO_FN_LCDCS, NULL);
 569         gpio_request(GPIO_FN_LCDRD, NULL);
 570         gpio_request(GPIO_FN_LCDWR, NULL);
 571         gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
 572         gpio_direction_output(GPIO_PTH2, 1);
 573 #endif
 574 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
 575         gpio_request(GPIO_FN_LCDD15, NULL);
 576         gpio_request(GPIO_FN_LCDD14, NULL);
 577         gpio_request(GPIO_FN_LCDD13, NULL);
 578         gpio_request(GPIO_FN_LCDD12, NULL);
 579         gpio_request(GPIO_FN_LCDD11, NULL);
 580         gpio_request(GPIO_FN_LCDD10, NULL);
 581         gpio_request(GPIO_FN_LCDD9, NULL);
 582         gpio_request(GPIO_FN_LCDD8, NULL);
 583         gpio_request(GPIO_FN_LCDD7, NULL);
 584         gpio_request(GPIO_FN_LCDD6, NULL);
 585         gpio_request(GPIO_FN_LCDD5, NULL);
 586         gpio_request(GPIO_FN_LCDD4, NULL);
 587         gpio_request(GPIO_FN_LCDD3, NULL);
 588         gpio_request(GPIO_FN_LCDD2, NULL);
 589         gpio_request(GPIO_FN_LCDD1, NULL);
 590         gpio_request(GPIO_FN_LCDD0, NULL);
 591         gpio_request(GPIO_FN_LCDLCLK, NULL);
 592         gpio_request(GPIO_FN_LCDDCK, NULL);
 593         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 594         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 595         gpio_request(GPIO_FN_LCDVSYN, NULL);
 596         gpio_request(GPIO_FN_LCDHSYN, NULL);
 597         gpio_request(GPIO_FN_LCDDISP, NULL);
 598         gpio_request(GPIO_FN_LCDDON, NULL);
 599 #endif
 600
 601         /* CEU */
 602         gpio_request(GPIO_FN_VIO_CLK2, NULL);
 603         gpio_request(GPIO_FN_VIO_VD2, NULL);
 604         gpio_request(GPIO_FN_VIO_HD2, NULL);
 605         gpio_request(GPIO_FN_VIO_FLD, NULL);
 606         gpio_request(GPIO_FN_VIO_CKO, NULL);
 607         gpio_request(GPIO_FN_VIO_D15, NULL);
 608         gpio_request(GPIO_FN_VIO_D14, NULL);
 609         gpio_request(GPIO_FN_VIO_D13, NULL);
 610         gpio_request(GPIO_FN_VIO_D12, NULL);
 611         gpio_request(GPIO_FN_VIO_D11, NULL);
 612         gpio_request(GPIO_FN_VIO_D10, NULL);
 613         gpio_request(GPIO_FN_VIO_D9, NULL);
 614         gpio_request(GPIO_FN_VIO_D8, NULL);
 615
 616         gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
 617         gpio_direction_output(GPIO_PTT3, 0);
 618         gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
 619         gpio_direction_output(GPIO_PTT2, 1);
 620         gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
 621 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
 622         gpio_direction_output(GPIO_PTT0, 0);
 623 #else
 624         gpio_direction_output(GPIO_PTT0, 1);
 625 #endif
 626         ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
 627
 628         platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
 629
 630         i2c_register_board_info(0, migor_i2c_devices,
 631                                 ARRAY_SIZE(migor_i2c_devices));
 632
 633         return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
 634 }
 635 arch_initcall(migor_devices_setup);
 636
 637 /* Return the board specific boot mode pin configuration */
 638 static int migor_mode_pins(void)
 639 {
 640         /* MD0=1, MD1=1, MD2=0: Clock Mode 3
 641          * MD3=0: 16-bit Area0 Bus Width
 642          * MD5=1: Little Endian
 643          * TSTMD=1, MD8=0: Test Mode Disabled
 644          */
 645         return MODE_PIN0 | MODE_PIN1 | MODE_PIN5;
 646 }
 647
 648 /*
 649  * The Machine Vector
 650  */
 651 static struct sh_machine_vector mv_migor __initmv = {
 652         .mv_name                = "Migo-R",
 653         .mv_mode_pins           = migor_mode_pins,
 654 };