2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
22 #include <linux/interrupt.h>
23 #include <linux/time.h>
24 #include <linux/sysdev.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/smp.h>
28 #include <linux/types.h>
29 #include <linux/profile.h>
30 #include <linux/timex.h>
31 #include <linux/notifier.h>
32 #include <linux/clocksource.h>
33 #include <linux/clockchips.h>
34 #include <linux/bootmem.h>
35 #include <asm/uaccess.h>
36 #include <asm/delay.h>
37 #include <asm/s390_ext.h>
38 #include <asm/div64.h>
40 #include <asm/irq_regs.h>
41 #include <asm/timer.h>
45 /* change this if you have some constant time drift */
46 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
47 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
49 /* The value of the TOD clock for 1.1.1970. */
50 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
53 * Create a small time difference between the timer interrupts
54 * on the different cpus to avoid lock contention.
56 #define CPU_DEVIATION (smp_processor_id() << 12)
58 #define TICK_SIZE tick
60 static ext_int_info_t ext_int_info_cc
;
61 static ext_int_info_t ext_int_etr_cc
;
62 static u64 jiffies_timer_cc
;
64 static DEFINE_PER_CPU(struct clock_event_device
, comparators
);
67 * Scheduler clock - returns current time in nanosec units.
69 unsigned long long sched_clock(void)
71 return ((get_clock_xt() - jiffies_timer_cc
) * 125) >> 9;
75 * Monotonic_clock - returns # of nanoseconds passed since time_init()
77 unsigned long long monotonic_clock(void)
81 EXPORT_SYMBOL(monotonic_clock
);
83 void tod_to_timeval(__u64 todval
, struct timespec
*xtime
)
85 unsigned long long sec
;
90 todval
-= (sec
* 1000000) << 12;
91 xtime
->tv_nsec
= ((todval
* 1000) >> 12);
94 #ifdef CONFIG_PROFILING
95 #define s390_do_profile() profile_tick(CPU_PROFILING)
97 #define s390_do_profile() do { ; } while(0)
98 #endif /* CONFIG_PROFILING */
100 void clock_comparator_work(void)
102 struct clock_event_device
*cd
;
104 S390_lowcore
.clock_comparator
= -1ULL;
105 set_clock_comparator(S390_lowcore
.clock_comparator
);
106 cd
= &__get_cpu_var(comparators
);
107 cd
->event_handler(cd
);
112 * Fixup the clock comparator.
114 static void fixup_clock_comparator(unsigned long long delta
)
116 /* If nobody is waiting there's nothing to fix. */
117 if (S390_lowcore
.clock_comparator
== -1ULL)
119 S390_lowcore
.clock_comparator
+= delta
;
120 set_clock_comparator(S390_lowcore
.clock_comparator
);
123 static int s390_next_event(unsigned long delta
,
124 struct clock_event_device
*evt
)
126 S390_lowcore
.clock_comparator
= get_clock() + delta
;
127 set_clock_comparator(S390_lowcore
.clock_comparator
);
131 static void s390_set_mode(enum clock_event_mode mode
,
132 struct clock_event_device
*evt
)
137 * Set up lowcore and control register of the current cpu to
138 * enable TOD clock and clock comparator interrupts.
140 void init_cpu_timer(void)
142 struct clock_event_device
*cd
;
145 S390_lowcore
.clock_comparator
= -1ULL;
146 set_clock_comparator(S390_lowcore
.clock_comparator
);
148 cpu
= smp_processor_id();
149 cd
= &per_cpu(comparators
, cpu
);
150 cd
->name
= "comparator";
151 cd
->features
= CLOCK_EVT_FEAT_ONESHOT
;
154 cd
->min_delta_ns
= 1;
155 cd
->max_delta_ns
= LONG_MAX
;
157 cd
->cpumask
= cpumask_of_cpu(cpu
);
158 cd
->set_next_event
= s390_next_event
;
159 cd
->set_mode
= s390_set_mode
;
161 clockevents_register_device(cd
);
163 /* Enable clock comparator timer interrupt. */
166 /* Always allow the timing alert external interrupt. */
170 static void clock_comparator_interrupt(__u16 code
)
174 static void etr_timing_alert(struct etr_irq_parm
*);
175 static void stp_timing_alert(struct stp_irq_parm
*);
177 static void timing_alert_interrupt(__u16 code
)
179 if (S390_lowcore
.ext_params
& 0x00c40000)
180 etr_timing_alert((struct etr_irq_parm
*)
181 &S390_lowcore
.ext_params
);
182 if (S390_lowcore
.ext_params
& 0x00038000)
183 stp_timing_alert((struct stp_irq_parm
*)
184 &S390_lowcore
.ext_params
);
187 static void etr_reset(void);
188 static void stp_reset(void);
191 * Get the TOD clock running.
193 static u64 __init
reset_tod_clock(void)
199 if (store_clock(&time
) == 0)
201 /* TOD clock not running. Set the clock to Unix Epoch. */
202 if (set_clock(TOD_UNIX_EPOCH
) != 0 || store_clock(&time
) != 0)
203 panic("TOD clock not operational.");
205 return TOD_UNIX_EPOCH
;
208 static cycle_t
read_tod_clock(void)
213 static struct clocksource clocksource_tod
= {
216 .read
= read_tod_clock
,
220 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
225 * Initialize the TOD clock and the CPU timer of
228 void __init
time_init(void)
232 init_timer_cc
= reset_tod_clock();
233 jiffies_timer_cc
= init_timer_cc
- jiffies_64
* CLK_TICKS_PER_JIFFY
;
236 tod_to_timeval(init_timer_cc
- TOD_UNIX_EPOCH
, &xtime
);
237 set_normalized_timespec(&wall_to_monotonic
,
238 -xtime
.tv_sec
, -xtime
.tv_nsec
);
240 /* request the clock comparator external interrupt */
241 if (register_early_external_interrupt(0x1004,
242 clock_comparator_interrupt
,
243 &ext_int_info_cc
) != 0)
244 panic("Couldn't request external interrupt 0x1004");
246 if (clocksource_register(&clocksource_tod
) != 0)
247 panic("Could not register TOD clock source");
249 /* request the timing alert external interrupt */
250 if (register_early_external_interrupt(0x1406,
251 timing_alert_interrupt
,
252 &ext_int_etr_cc
) != 0)
253 panic("Couldn't request external interrupt 0x1406");
255 /* Enable TOD clock interrupts on the boot cpu. */
258 #ifdef CONFIG_VIRT_TIMER
264 * The time is "clock". old is what we think the time is.
265 * Adjust the value by a multiple of jiffies and add the delta to ntp.
266 * "delay" is an approximation how long the synchronization took. If
267 * the time correction is positive, then "delay" is subtracted from
268 * the time difference and only the remaining part is passed to ntp.
270 static unsigned long long adjust_time(unsigned long long old
,
271 unsigned long long clock
,
272 unsigned long long delay
)
274 unsigned long long delta
, ticks
;
278 /* It is later than we thought. */
279 delta
= ticks
= clock
- old
;
280 delta
= ticks
= (delta
< delay
) ? 0 : delta
- delay
;
281 delta
-= do_div(ticks
, CLK_TICKS_PER_JIFFY
);
282 adjust
.offset
= ticks
* (1000000 / HZ
);
284 /* It is earlier than we thought. */
285 delta
= ticks
= old
- clock
;
286 delta
-= do_div(ticks
, CLK_TICKS_PER_JIFFY
);
288 adjust
.offset
= -ticks
* (1000000 / HZ
);
290 jiffies_timer_cc
+= delta
;
291 if (adjust
.offset
!= 0) {
292 printk(KERN_NOTICE
"etr: time adjusted by %li micro-seconds\n",
294 adjust
.modes
= ADJ_OFFSET_SINGLESHOT
;
295 do_adjtimex(&adjust
);
300 static DEFINE_PER_CPU(atomic_t
, clock_sync_word
);
301 static unsigned long clock_sync_flags
;
303 #define CLOCK_SYNC_HAS_ETR 0
304 #define CLOCK_SYNC_HAS_STP 1
305 #define CLOCK_SYNC_ETR 2
306 #define CLOCK_SYNC_STP 3
309 * The synchronous get_clock function. It will write the current clock
310 * value to the clock pointer and return 0 if the clock is in sync with
311 * the external time source. If the clock mode is local it will return
312 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
315 int get_sync_clock(unsigned long long *clock
)
318 unsigned int sw0
, sw1
;
320 sw_ptr
= &get_cpu_var(clock_sync_word
);
321 sw0
= atomic_read(sw_ptr
);
322 *clock
= get_clock();
323 sw1
= atomic_read(sw_ptr
);
324 put_cpu_var(clock_sync_sync
);
325 if (sw0
== sw1
&& (sw0
& 0x80000000U
))
326 /* Success: time is in sync. */
328 if (!test_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
) &&
329 !test_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
))
331 if (!test_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
) &&
332 !test_bit(CLOCK_SYNC_STP
, &clock_sync_flags
))
336 EXPORT_SYMBOL(get_sync_clock
);
339 * Make get_sync_clock return -EAGAIN.
341 static void disable_sync_clock(void *dummy
)
343 atomic_t
*sw_ptr
= &__get_cpu_var(clock_sync_word
);
345 * Clear the in-sync bit 2^31. All get_sync_clock calls will
346 * fail until the sync bit is turned back on. In addition
347 * increase the "sequence" counter to avoid the race of an
348 * etr event and the complete recovery against get_sync_clock.
350 atomic_clear_mask(0x80000000, sw_ptr
);
355 * Make get_sync_clock return 0 again.
356 * Needs to be called from a context disabled for preemption.
358 static void enable_sync_clock(void)
360 atomic_t
*sw_ptr
= &__get_cpu_var(clock_sync_word
);
361 atomic_set_mask(0x80000000, sw_ptr
);
365 * External Time Reference (ETR) code.
367 static int etr_port0_online
;
368 static int etr_port1_online
;
369 static int etr_steai_available
;
371 static int __init
early_parse_etr(char *p
)
373 if (strncmp(p
, "off", 3) == 0)
374 etr_port0_online
= etr_port1_online
= 0;
375 else if (strncmp(p
, "port0", 5) == 0)
376 etr_port0_online
= 1;
377 else if (strncmp(p
, "port1", 5) == 0)
378 etr_port1_online
= 1;
379 else if (strncmp(p
, "on", 2) == 0)
380 etr_port0_online
= etr_port1_online
= 1;
383 early_param("etr", early_parse_etr
);
386 ETR_EVENT_PORT0_CHANGE
,
387 ETR_EVENT_PORT1_CHANGE
,
388 ETR_EVENT_PORT_ALERT
,
389 ETR_EVENT_SYNC_CHECK
,
390 ETR_EVENT_SWITCH_LOCAL
,
395 * Valid bit combinations of the eacr register are (x = don't care):
396 * e0 e1 dp p0 p1 ea es sl
397 * 0 0 x 0 0 0 0 0 initial, disabled state
398 * 0 0 x 0 1 1 0 0 port 1 online
399 * 0 0 x 1 0 1 0 0 port 0 online
400 * 0 0 x 1 1 1 0 0 both ports online
401 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
402 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
403 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
404 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
405 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
406 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
407 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
408 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
409 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
410 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
411 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
412 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
413 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
414 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
415 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
416 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
418 static struct etr_eacr etr_eacr
;
419 static u64 etr_tolec
; /* time of last eacr update */
420 static struct etr_aib etr_port0
;
421 static int etr_port0_uptodate
;
422 static struct etr_aib etr_port1
;
423 static int etr_port1_uptodate
;
424 static unsigned long etr_events
;
425 static struct timer_list etr_timer
;
427 static void etr_timeout(unsigned long dummy
);
428 static void etr_work_fn(struct work_struct
*work
);
429 static DECLARE_WORK(etr_work
, etr_work_fn
);
432 * Reset ETR attachment.
434 static void etr_reset(void)
436 etr_eacr
= (struct etr_eacr
) {
437 .e0
= 0, .e1
= 0, ._pad0
= 4, .dp
= 0,
438 .p0
= 0, .p1
= 0, ._pad1
= 0, .ea
= 0,
440 if (etr_setr(&etr_eacr
) == 0) {
441 etr_tolec
= get_clock();
442 set_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
);
443 } else if (etr_port0_online
|| etr_port1_online
) {
444 printk(KERN_WARNING
"Running on non ETR capable "
445 "machine, only local mode available.\n");
446 etr_port0_online
= etr_port1_online
= 0;
450 static int __init
etr_init(void)
454 if (!test_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
))
456 /* Check if this machine has the steai instruction. */
457 if (etr_steai(&aib
, ETR_STEAI_STEPPING_PORT
) == 0)
458 etr_steai_available
= 1;
459 setup_timer(&etr_timer
, etr_timeout
, 0UL);
460 if (etr_port0_online
) {
461 set_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
);
462 schedule_work(&etr_work
);
464 if (etr_port1_online
) {
465 set_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
);
466 schedule_work(&etr_work
);
471 arch_initcall(etr_init
);
474 * Two sorts of ETR machine checks. The architecture reads:
475 * "When a machine-check niterruption occurs and if a switch-to-local or
476 * ETR-sync-check interrupt request is pending but disabled, this pending
477 * disabled interruption request is indicated and is cleared".
478 * Which means that we can get etr_switch_to_local events from the machine
479 * check handler although the interruption condition is disabled. Lovely..
483 * Switch to local machine check. This is called when the last usable
484 * ETR port goes inactive. After switch to local the clock is not in sync.
486 void etr_switch_to_local(void)
490 if (test_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
))
491 disable_sync_clock(NULL
);
492 set_bit(ETR_EVENT_SWITCH_LOCAL
, &etr_events
);
493 schedule_work(&etr_work
);
497 * ETR sync check machine check. This is called when the ETR OTE and the
498 * local clock OTE are farther apart than the ETR sync check tolerance.
499 * After a ETR sync check the clock is not in sync. The machine check
500 * is broadcasted to all cpus at the same time.
502 void etr_sync_check(void)
506 if (test_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
))
507 disable_sync_clock(NULL
);
508 set_bit(ETR_EVENT_SYNC_CHECK
, &etr_events
);
509 schedule_work(&etr_work
);
513 * ETR timing alert. There are two causes:
514 * 1) port state change, check the usability of the port
515 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
516 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
517 * or ETR-data word 4 (edf4) has changed.
519 static void etr_timing_alert(struct etr_irq_parm
*intparm
)
522 /* ETR port 0 state change. */
523 set_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
);
525 /* ETR port 1 state change. */
526 set_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
);
529 * ETR port alert on either port 0, 1 or both.
530 * Both ports are not up-to-date now.
532 set_bit(ETR_EVENT_PORT_ALERT
, &etr_events
);
533 schedule_work(&etr_work
);
536 static void etr_timeout(unsigned long dummy
)
538 set_bit(ETR_EVENT_UPDATE
, &etr_events
);
539 schedule_work(&etr_work
);
543 * Check if the etr mode is pss.
545 static inline int etr_mode_is_pps(struct etr_eacr eacr
)
547 return eacr
.es
&& !eacr
.sl
;
551 * Check if the etr mode is etr.
553 static inline int etr_mode_is_etr(struct etr_eacr eacr
)
555 return eacr
.es
&& eacr
.sl
;
559 * Check if the port can be used for TOD synchronization.
560 * For PPS mode the port has to receive OTEs. For ETR mode
561 * the port has to receive OTEs, the ETR stepping bit has to
562 * be zero and the validity bits for data frame 1, 2, and 3
565 static int etr_port_valid(struct etr_aib
*aib
, int port
)
569 /* Check that this port is receiving OTEs. */
573 psc
= port
? aib
->esw
.psc1
: aib
->esw
.psc0
;
574 if (psc
== etr_lpsc_pps_mode
)
576 if (psc
== etr_lpsc_operational_step
)
577 return !aib
->esw
.y
&& aib
->slsw
.v1
&&
578 aib
->slsw
.v2
&& aib
->slsw
.v3
;
583 * Check if two ports are on the same network.
585 static int etr_compare_network(struct etr_aib
*aib1
, struct etr_aib
*aib2
)
587 // FIXME: any other fields we have to compare?
588 return aib1
->edf1
.net_id
== aib2
->edf1
.net_id
;
592 * Wrapper for etr_stei that converts physical port states
593 * to logical port states to be consistent with the output
594 * of stetr (see etr_psc vs. etr_lpsc).
596 static void etr_steai_cv(struct etr_aib
*aib
, unsigned int func
)
598 BUG_ON(etr_steai(aib
, func
) != 0);
599 /* Convert port state to logical port state. */
600 if (aib
->esw
.psc0
== 1)
602 else if (aib
->esw
.psc0
== 0 && aib
->esw
.p
== 0)
604 if (aib
->esw
.psc1
== 1)
606 else if (aib
->esw
.psc1
== 0 && aib
->esw
.p
== 1)
611 * Check if the aib a2 is still connected to the same attachment as
612 * aib a1, the etv values differ by one and a2 is valid.
614 static int etr_aib_follows(struct etr_aib
*a1
, struct etr_aib
*a2
, int p
)
616 int state_a1
, state_a2
;
618 /* Paranoia check: e0/e1 should better be the same. */
619 if (a1
->esw
.eacr
.e0
!= a2
->esw
.eacr
.e0
||
620 a1
->esw
.eacr
.e1
!= a2
->esw
.eacr
.e1
)
623 /* Still connected to the same etr ? */
624 state_a1
= p
? a1
->esw
.psc1
: a1
->esw
.psc0
;
625 state_a2
= p
? a2
->esw
.psc1
: a2
->esw
.psc0
;
626 if (state_a1
== etr_lpsc_operational_step
) {
627 if (state_a2
!= etr_lpsc_operational_step
||
628 a1
->edf1
.net_id
!= a2
->edf1
.net_id
||
629 a1
->edf1
.etr_id
!= a2
->edf1
.etr_id
||
630 a1
->edf1
.etr_pn
!= a2
->edf1
.etr_pn
)
632 } else if (state_a2
!= etr_lpsc_pps_mode
)
635 /* The ETV value of a2 needs to be ETV of a1 + 1. */
636 if (a1
->edf2
.etv
+ 1 != a2
->edf2
.etv
)
639 if (!etr_port_valid(a2
, p
))
645 struct clock_sync_data
{
647 unsigned long long fixup_cc
;
650 static void clock_sync_cpu_start(void *dummy
)
652 struct clock_sync_data
*sync
= dummy
;
656 * This looks like a busy wait loop but it isn't. etr_sync_cpus
657 * is called on all other cpus while the TOD clocks is stopped.
658 * __udelay will stop the cpu on an enabled wait psw until the
659 * TOD is running again.
661 while (sync
->in_sync
== 0) {
664 * A different cpu changes *in_sync. Therefore use
665 * barrier() to force memory access.
669 if (sync
->in_sync
!= 1)
670 /* Didn't work. Clear per-cpu in sync bit again. */
671 disable_sync_clock(NULL
);
673 * This round of TOD syncing is done. Set the clock comparator
674 * to the next tick and let the processor continue.
676 fixup_clock_comparator(sync
->fixup_cc
);
679 static void clock_sync_cpu_end(void *dummy
)
684 * Sync the TOD clock using the port refered to by aibp. This port
685 * has to be enabled and the other port has to be disabled. The
686 * last eacr update has to be more than 1.6 seconds in the past.
688 static int etr_sync_clock(struct etr_aib
*aib
, int port
)
690 struct etr_aib
*sync_port
;
691 struct clock_sync_data etr_sync
;
692 unsigned long long clock
, old_clock
, delay
, delta
;
696 /* Check if the current aib is adjacent to the sync port aib. */
697 sync_port
= (port
== 0) ? &etr_port0
: &etr_port1
;
698 follows
= etr_aib_follows(sync_port
, aib
, port
);
699 memcpy(sync_port
, aib
, sizeof(*aib
));
704 * Catch all other cpus and make them wait until we have
705 * successfully synced the clock. smp_call_function will
706 * return after all other cpus are in etr_sync_cpu_start.
708 memset(&etr_sync
, 0, sizeof(etr_sync
));
710 smp_call_function(clock_sync_cpu_start
, &etr_sync
, 0);
714 /* Set clock to next OTE. */
715 __ctl_set_bit(14, 21);
716 __ctl_set_bit(0, 29);
717 clock
= ((unsigned long long) (aib
->edf2
.etv
+ 1)) << 32;
718 old_clock
= get_clock();
719 if (set_clock(clock
) == 0) {
720 __udelay(1); /* Wait for the clock to start. */
721 __ctl_clear_bit(0, 29);
722 __ctl_clear_bit(14, 21);
724 /* Adjust Linux timing variables. */
725 delay
= (unsigned long long)
726 (aib
->edf2
.etv
- sync_port
->edf2
.etv
) << 32;
727 delta
= adjust_time(old_clock
, clock
, delay
);
728 etr_sync
.fixup_cc
= delta
;
729 fixup_clock_comparator(delta
);
730 /* Verify that the clock is properly set. */
731 if (!etr_aib_follows(sync_port
, aib
, port
)) {
733 disable_sync_clock(NULL
);
734 etr_sync
.in_sync
= -EAGAIN
;
737 etr_sync
.in_sync
= 1;
741 /* Could not set the clock ?!? */
742 __ctl_clear_bit(0, 29);
743 __ctl_clear_bit(14, 21);
744 disable_sync_clock(NULL
);
745 etr_sync
.in_sync
= -EAGAIN
;
749 smp_call_function(clock_sync_cpu_end
, NULL
, 0);
755 * Handle the immediate effects of the different events.
756 * The port change event is used for online/offline changes.
758 static struct etr_eacr
etr_handle_events(struct etr_eacr eacr
)
760 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK
, &etr_events
))
762 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL
, &etr_events
))
763 eacr
.es
= eacr
.sl
= 0;
764 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT
, &etr_events
))
765 etr_port0_uptodate
= etr_port1_uptodate
= 0;
767 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
)) {
770 * Port change of an enabled port. We have to
771 * assume that this can have caused an stepping
774 etr_tolec
= get_clock();
775 eacr
.p0
= etr_port0_online
;
778 etr_port0_uptodate
= 0;
780 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
)) {
783 * Port change of an enabled port. We have to
784 * assume that this can have caused an stepping
787 etr_tolec
= get_clock();
788 eacr
.p1
= etr_port1_online
;
791 etr_port1_uptodate
= 0;
793 clear_bit(ETR_EVENT_UPDATE
, &etr_events
);
798 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
799 * one of the ports needs an update.
801 static void etr_set_tolec_timeout(unsigned long long now
)
803 unsigned long micros
;
805 if ((!etr_eacr
.p0
|| etr_port0_uptodate
) &&
806 (!etr_eacr
.p1
|| etr_port1_uptodate
))
808 micros
= (now
> etr_tolec
) ? ((now
- etr_tolec
) >> 12) : 0;
809 micros
= (micros
> 1600000) ? 0 : 1600000 - micros
;
810 mod_timer(&etr_timer
, jiffies
+ (micros
* HZ
) / 1000000 + 1);
814 * Set up a time that expires after 1/2 second.
816 static void etr_set_sync_timeout(void)
818 mod_timer(&etr_timer
, jiffies
+ HZ
/2);
822 * Update the aib information for one or both ports.
824 static struct etr_eacr
etr_handle_update(struct etr_aib
*aib
,
825 struct etr_eacr eacr
)
827 /* With both ports disabled the aib information is useless. */
828 if (!eacr
.e0
&& !eacr
.e1
)
831 /* Update port0 or port1 with aib stored in etr_work_fn. */
832 if (aib
->esw
.q
== 0) {
833 /* Information for port 0 stored. */
834 if (eacr
.p0
&& !etr_port0_uptodate
) {
836 if (etr_port0_online
)
837 etr_port0_uptodate
= 1;
840 /* Information for port 1 stored. */
841 if (eacr
.p1
&& !etr_port1_uptodate
) {
843 if (etr_port0_online
)
844 etr_port1_uptodate
= 1;
849 * Do not try to get the alternate port aib if the clock
850 * is not in sync yet.
852 if (!test_bit(CLOCK_SYNC_STP
, &clock_sync_flags
) && !eacr
.es
)
856 * If steai is available we can get the information about
857 * the other port immediately. If only stetr is available the
858 * data-port bit toggle has to be used.
860 if (etr_steai_available
) {
861 if (eacr
.p0
&& !etr_port0_uptodate
) {
862 etr_steai_cv(&etr_port0
, ETR_STEAI_PORT_0
);
863 etr_port0_uptodate
= 1;
865 if (eacr
.p1
&& !etr_port1_uptodate
) {
866 etr_steai_cv(&etr_port1
, ETR_STEAI_PORT_1
);
867 etr_port1_uptodate
= 1;
871 * One port was updated above, if the other
872 * port is not uptodate toggle dp bit.
874 if ((eacr
.p0
&& !etr_port0_uptodate
) ||
875 (eacr
.p1
&& !etr_port1_uptodate
))
884 * Write new etr control register if it differs from the current one.
885 * Return 1 if etr_tolec has been updated as well.
887 static void etr_update_eacr(struct etr_eacr eacr
)
891 if (memcmp(&etr_eacr
, &eacr
, sizeof(eacr
)) == 0)
892 /* No change, return. */
895 * The disable of an active port of the change of the data port
896 * bit can/will cause a change in the data port.
898 dp_changed
= etr_eacr
.e0
> eacr
.e0
|| etr_eacr
.e1
> eacr
.e1
||
899 (etr_eacr
.dp
^ eacr
.dp
) != 0;
903 etr_tolec
= get_clock();
907 * ETR tasklet. In this function you'll find the main logic. In
908 * particular this is the only function that calls etr_update_eacr(),
909 * it "controls" the etr control register.
911 static void etr_work_fn(struct work_struct
*work
)
913 unsigned long long now
;
914 struct etr_eacr eacr
;
918 /* Create working copy of etr_eacr. */
921 /* Check for the different events and their immediate effects. */
922 eacr
= etr_handle_events(eacr
);
924 /* Check if ETR is supposed to be active. */
925 eacr
.ea
= eacr
.p0
|| eacr
.p1
;
927 /* Both ports offline. Reset everything. */
928 eacr
.dp
= eacr
.es
= eacr
.sl
= 0;
929 on_each_cpu(disable_sync_clock
, NULL
, 1);
930 del_timer_sync(&etr_timer
);
931 etr_update_eacr(eacr
);
932 clear_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
936 /* Store aib to get the current ETR status word. */
937 BUG_ON(etr_stetr(&aib
) != 0);
938 etr_port0
.esw
= etr_port1
.esw
= aib
.esw
; /* Copy status word. */
942 * Update the port information if the last stepping port change
943 * or data port change is older than 1.6 seconds.
945 if (now
>= etr_tolec
+ (1600000 << 12))
946 eacr
= etr_handle_update(&aib
, eacr
);
949 * Select ports to enable. The prefered synchronization mode is PPS.
950 * If a port can be enabled depends on a number of things:
951 * 1) The port needs to be online and uptodate. A port is not
952 * disabled just because it is not uptodate, but it is only
953 * enabled if it is uptodate.
954 * 2) The port needs to have the same mode (pps / etr).
955 * 3) The port needs to be usable -> etr_port_valid() == 1
956 * 4) To enable the second port the clock needs to be in sync.
957 * 5) If both ports are useable and are ETR ports, the network id
958 * has to be the same.
959 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
961 if (eacr
.p0
&& aib
.esw
.psc0
== etr_lpsc_pps_mode
) {
964 if (!etr_mode_is_pps(etr_eacr
))
966 if (!eacr
.es
|| !eacr
.p1
|| aib
.esw
.psc1
!= etr_lpsc_pps_mode
)
968 // FIXME: uptodate checks ?
969 else if (etr_port0_uptodate
&& etr_port1_uptodate
)
971 sync_port
= (etr_port0_uptodate
&&
972 etr_port_valid(&etr_port0
, 0)) ? 0 : -1;
973 } else if (eacr
.p1
&& aib
.esw
.psc1
== etr_lpsc_pps_mode
) {
977 if (!etr_mode_is_pps(etr_eacr
))
979 sync_port
= (etr_port1_uptodate
&&
980 etr_port_valid(&etr_port1
, 1)) ? 1 : -1;
981 } else if (eacr
.p0
&& aib
.esw
.psc0
== etr_lpsc_operational_step
) {
984 if (!etr_mode_is_etr(etr_eacr
))
986 if (!eacr
.es
|| !eacr
.p1
||
987 aib
.esw
.psc1
!= etr_lpsc_operational_alt
)
989 else if (etr_port0_uptodate
&& etr_port1_uptodate
&&
990 etr_compare_network(&etr_port0
, &etr_port1
))
992 sync_port
= (etr_port0_uptodate
&&
993 etr_port_valid(&etr_port0
, 0)) ? 0 : -1;
994 } else if (eacr
.p1
&& aib
.esw
.psc1
== etr_lpsc_operational_step
) {
998 if (!etr_mode_is_etr(etr_eacr
))
1000 sync_port
= (etr_port1_uptodate
&&
1001 etr_port_valid(&etr_port1
, 1)) ? 1 : -1;
1003 /* Both ports not usable. */
1004 eacr
.es
= eacr
.sl
= 0;
1006 clear_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
1009 if (!test_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
))
1013 * If the clock is in sync just update the eacr and return.
1014 * If there is no valid sync port wait for a port update.
1016 if (test_bit(CLOCK_SYNC_STP
, &clock_sync_flags
) ||
1017 eacr
.es
|| sync_port
< 0) {
1018 etr_update_eacr(eacr
);
1019 etr_set_tolec_timeout(now
);
1024 * Prepare control register for clock syncing
1025 * (reset data port bit, set sync check control.
1031 * Update eacr and try to synchronize the clock. If the update
1032 * of eacr caused a stepping port switch (or if we have to
1033 * assume that a stepping port switch has occured) or the
1034 * clock syncing failed, reset the sync check control bit
1035 * and set up a timer to try again after 0.5 seconds
1037 etr_update_eacr(eacr
);
1038 set_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
1039 if (now
< etr_tolec
+ (1600000 << 12) ||
1040 etr_sync_clock(&aib
, sync_port
) != 0) {
1041 /* Sync failed. Try again in 1/2 second. */
1043 etr_update_eacr(eacr
);
1044 clear_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
1045 etr_set_sync_timeout();
1047 etr_set_tolec_timeout(now
);
1051 * Sysfs interface functions
1053 static struct sysdev_class etr_sysclass
= {
1057 static struct sys_device etr_port0_dev
= {
1059 .cls
= &etr_sysclass
,
1062 static struct sys_device etr_port1_dev
= {
1064 .cls
= &etr_sysclass
,
1068 * ETR class attributes
1070 static ssize_t
etr_stepping_port_show(struct sysdev_class
*class, char *buf
)
1072 return sprintf(buf
, "%i\n", etr_port0
.esw
.p
);
1075 static SYSDEV_CLASS_ATTR(stepping_port
, 0400, etr_stepping_port_show
, NULL
);
1077 static ssize_t
etr_stepping_mode_show(struct sysdev_class
*class, char *buf
)
1081 if (etr_mode_is_pps(etr_eacr
))
1083 else if (etr_mode_is_etr(etr_eacr
))
1087 return sprintf(buf
, "%s\n", mode_str
);
1090 static SYSDEV_CLASS_ATTR(stepping_mode
, 0400, etr_stepping_mode_show
, NULL
);
1093 * ETR port attributes
1095 static inline struct etr_aib
*etr_aib_from_dev(struct sys_device
*dev
)
1097 if (dev
== &etr_port0_dev
)
1098 return etr_port0_online
? &etr_port0
: NULL
;
1100 return etr_port1_online
? &etr_port1
: NULL
;
1103 static ssize_t
etr_online_show(struct sys_device
*dev
,
1104 struct sysdev_attribute
*attr
,
1107 unsigned int online
;
1109 online
= (dev
== &etr_port0_dev
) ? etr_port0_online
: etr_port1_online
;
1110 return sprintf(buf
, "%i\n", online
);
1113 static ssize_t
etr_online_store(struct sys_device
*dev
,
1114 struct sysdev_attribute
*attr
,
1115 const char *buf
, size_t count
)
1119 value
= simple_strtoul(buf
, NULL
, 0);
1120 if (value
!= 0 && value
!= 1)
1122 if (!test_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
))
1124 if (dev
== &etr_port0_dev
) {
1125 if (etr_port0_online
== value
)
1126 return count
; /* Nothing to do. */
1127 etr_port0_online
= value
;
1128 set_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
);
1129 schedule_work(&etr_work
);
1131 if (etr_port1_online
== value
)
1132 return count
; /* Nothing to do. */
1133 etr_port1_online
= value
;
1134 set_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
);
1135 schedule_work(&etr_work
);
1140 static SYSDEV_ATTR(online
, 0600, etr_online_show
, etr_online_store
);
1142 static ssize_t
etr_stepping_control_show(struct sys_device
*dev
,
1143 struct sysdev_attribute
*attr
,
1146 return sprintf(buf
, "%i\n", (dev
== &etr_port0_dev
) ?
1147 etr_eacr
.e0
: etr_eacr
.e1
);
1150 static SYSDEV_ATTR(stepping_control
, 0400, etr_stepping_control_show
, NULL
);
1152 static ssize_t
etr_mode_code_show(struct sys_device
*dev
,
1153 struct sysdev_attribute
*attr
, char *buf
)
1155 if (!etr_port0_online
&& !etr_port1_online
)
1156 /* Status word is not uptodate if both ports are offline. */
1158 return sprintf(buf
, "%i\n", (dev
== &etr_port0_dev
) ?
1159 etr_port0
.esw
.psc0
: etr_port0
.esw
.psc1
);
1162 static SYSDEV_ATTR(state_code
, 0400, etr_mode_code_show
, NULL
);
1164 static ssize_t
etr_untuned_show(struct sys_device
*dev
,
1165 struct sysdev_attribute
*attr
, char *buf
)
1167 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1169 if (!aib
|| !aib
->slsw
.v1
)
1171 return sprintf(buf
, "%i\n", aib
->edf1
.u
);
1174 static SYSDEV_ATTR(untuned
, 0400, etr_untuned_show
, NULL
);
1176 static ssize_t
etr_network_id_show(struct sys_device
*dev
,
1177 struct sysdev_attribute
*attr
, char *buf
)
1179 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1181 if (!aib
|| !aib
->slsw
.v1
)
1183 return sprintf(buf
, "%i\n", aib
->edf1
.net_id
);
1186 static SYSDEV_ATTR(network
, 0400, etr_network_id_show
, NULL
);
1188 static ssize_t
etr_id_show(struct sys_device
*dev
,
1189 struct sysdev_attribute
*attr
, char *buf
)
1191 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1193 if (!aib
|| !aib
->slsw
.v1
)
1195 return sprintf(buf
, "%i\n", aib
->edf1
.etr_id
);
1198 static SYSDEV_ATTR(id
, 0400, etr_id_show
, NULL
);
1200 static ssize_t
etr_port_number_show(struct sys_device
*dev
,
1201 struct sysdev_attribute
*attr
, char *buf
)
1203 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1205 if (!aib
|| !aib
->slsw
.v1
)
1207 return sprintf(buf
, "%i\n", aib
->edf1
.etr_pn
);
1210 static SYSDEV_ATTR(port
, 0400, etr_port_number_show
, NULL
);
1212 static ssize_t
etr_coupled_show(struct sys_device
*dev
,
1213 struct sysdev_attribute
*attr
, char *buf
)
1215 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1217 if (!aib
|| !aib
->slsw
.v3
)
1219 return sprintf(buf
, "%i\n", aib
->edf3
.c
);
1222 static SYSDEV_ATTR(coupled
, 0400, etr_coupled_show
, NULL
);
1224 static ssize_t
etr_local_time_show(struct sys_device
*dev
,
1225 struct sysdev_attribute
*attr
, char *buf
)
1227 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1229 if (!aib
|| !aib
->slsw
.v3
)
1231 return sprintf(buf
, "%i\n", aib
->edf3
.blto
);
1234 static SYSDEV_ATTR(local_time
, 0400, etr_local_time_show
, NULL
);
1236 static ssize_t
etr_utc_offset_show(struct sys_device
*dev
,
1237 struct sysdev_attribute
*attr
, char *buf
)
1239 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1241 if (!aib
|| !aib
->slsw
.v3
)
1243 return sprintf(buf
, "%i\n", aib
->edf3
.buo
);
1246 static SYSDEV_ATTR(utc_offset
, 0400, etr_utc_offset_show
, NULL
);
1248 static struct sysdev_attribute
*etr_port_attributes
[] = {
1250 &attr_stepping_control
,
1262 static int __init
etr_register_port(struct sys_device
*dev
)
1264 struct sysdev_attribute
**attr
;
1267 rc
= sysdev_register(dev
);
1270 for (attr
= etr_port_attributes
; *attr
; attr
++) {
1271 rc
= sysdev_create_file(dev
, *attr
);
1277 for (; attr
>= etr_port_attributes
; attr
--)
1278 sysdev_remove_file(dev
, *attr
);
1279 sysdev_unregister(dev
);
1284 static void __init
etr_unregister_port(struct sys_device
*dev
)
1286 struct sysdev_attribute
**attr
;
1288 for (attr
= etr_port_attributes
; *attr
; attr
++)
1289 sysdev_remove_file(dev
, *attr
);
1290 sysdev_unregister(dev
);
1293 static int __init
etr_init_sysfs(void)
1297 rc
= sysdev_class_register(&etr_sysclass
);
1300 rc
= sysdev_class_create_file(&etr_sysclass
, &attr_stepping_port
);
1302 goto out_unreg_class
;
1303 rc
= sysdev_class_create_file(&etr_sysclass
, &attr_stepping_mode
);
1305 goto out_remove_stepping_port
;
1306 rc
= etr_register_port(&etr_port0_dev
);
1308 goto out_remove_stepping_mode
;
1309 rc
= etr_register_port(&etr_port1_dev
);
1311 goto out_remove_port0
;
1315 etr_unregister_port(&etr_port0_dev
);
1316 out_remove_stepping_mode
:
1317 sysdev_class_remove_file(&etr_sysclass
, &attr_stepping_mode
);
1318 out_remove_stepping_port
:
1319 sysdev_class_remove_file(&etr_sysclass
, &attr_stepping_port
);
1321 sysdev_class_unregister(&etr_sysclass
);
1326 device_initcall(etr_init_sysfs
);
1329 * Server Time Protocol (STP) code.
1331 static int stp_online
;
1332 static struct stp_sstpi stp_info
;
1333 static void *stp_page
;
1335 static void stp_work_fn(struct work_struct
*work
);
1336 static DECLARE_WORK(stp_work
, stp_work_fn
);
1338 static int __init
early_parse_stp(char *p
)
1340 if (strncmp(p
, "off", 3) == 0)
1342 else if (strncmp(p
, "on", 2) == 0)
1346 early_param("stp", early_parse_stp
);
1349 * Reset STP attachment.
1351 static void stp_reset(void)
1355 stp_page
= alloc_bootmem_pages(PAGE_SIZE
);
1356 rc
= chsc_sstpc(stp_page
, STP_OP_CTRL
, 0x0000);
1358 set_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
);
1359 else if (stp_online
) {
1360 printk(KERN_WARNING
"Running on non STP capable machine.\n");
1361 free_bootmem((unsigned long) stp_page
, PAGE_SIZE
);
1367 static int __init
stp_init(void)
1369 if (test_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
) && stp_online
)
1370 schedule_work(&stp_work
);
1374 arch_initcall(stp_init
);
1377 * STP timing alert. There are three causes:
1378 * 1) timing status change
1379 * 2) link availability change
1380 * 3) time control parameter change
1381 * In all three cases we are only interested in the clock source state.
1382 * If a STP clock source is now available use it.
1384 static void stp_timing_alert(struct stp_irq_parm
*intparm
)
1386 if (intparm
->tsc
|| intparm
->lac
|| intparm
->tcpc
)
1387 schedule_work(&stp_work
);
1391 * STP sync check machine check. This is called when the timing state
1392 * changes from the synchronized state to the unsynchronized state.
1393 * After a STP sync check the clock is not in sync. The machine check
1394 * is broadcasted to all cpus at the same time.
1396 void stp_sync_check(void)
1398 if (!test_bit(CLOCK_SYNC_STP
, &clock_sync_flags
))
1400 disable_sync_clock(NULL
);
1401 schedule_work(&stp_work
);
1405 * STP island condition machine check. This is called when an attached
1406 * server attempts to communicate over an STP link and the servers
1407 * have matching CTN ids and have a valid stratum-1 configuration
1408 * but the configurations do not match.
1410 void stp_island_check(void)
1412 if (!test_bit(CLOCK_SYNC_STP
, &clock_sync_flags
))
1414 disable_sync_clock(NULL
);
1415 schedule_work(&stp_work
);
1419 * STP tasklet. Check for the STP state and take over the clock
1420 * synchronization if the STP clock source is usable.
1422 static void stp_work_fn(struct work_struct
*work
)
1424 struct clock_sync_data stp_sync
;
1425 unsigned long long old_clock
, delta
;
1429 chsc_sstpc(stp_page
, STP_OP_CTRL
, 0x0000);
1433 rc
= chsc_sstpc(stp_page
, STP_OP_CTRL
, 0xb0e0);
1437 rc
= chsc_sstpi(stp_page
, &stp_info
, sizeof(struct stp_sstpi
));
1438 if (rc
|| stp_info
.c
== 0)
1442 * Catch all other cpus and make them wait until we have
1443 * successfully synced the clock. smp_call_function will
1444 * return after all other cpus are in clock_sync_cpu_start.
1446 memset(&stp_sync
, 0, sizeof(stp_sync
));
1448 smp_call_function(clock_sync_cpu_start
, &stp_sync
, 0);
1449 local_irq_disable();
1450 enable_sync_clock();
1452 set_bit(CLOCK_SYNC_STP
, &clock_sync_flags
);
1453 if (test_and_clear_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
))
1454 schedule_work(&etr_work
);
1457 if (stp_info
.todoff
[0] || stp_info
.todoff
[1] ||
1458 stp_info
.todoff
[2] || stp_info
.todoff
[3] ||
1459 stp_info
.tmd
!= 2) {
1460 old_clock
= get_clock();
1461 rc
= chsc_sstpc(stp_page
, STP_OP_SYNC
, 0);
1463 delta
= adjust_time(old_clock
, get_clock(), 0);
1464 fixup_clock_comparator(delta
);
1465 rc
= chsc_sstpi(stp_page
, &stp_info
,
1466 sizeof(struct stp_sstpi
));
1467 if (rc
== 0 && stp_info
.tmd
!= 2)
1472 disable_sync_clock(NULL
);
1473 stp_sync
.in_sync
= -EAGAIN
;
1474 clear_bit(CLOCK_SYNC_STP
, &clock_sync_flags
);
1475 if (etr_port0_online
|| etr_port1_online
)
1476 schedule_work(&etr_work
);
1478 stp_sync
.in_sync
= 1;
1481 smp_call_function(clock_sync_cpu_end
, NULL
, 0);
1486 * STP class sysfs interface functions
1488 static struct sysdev_class stp_sysclass
= {
1492 static ssize_t
stp_ctn_id_show(struct sysdev_class
*class, char *buf
)
1496 return sprintf(buf
, "%016llx\n",
1497 *(unsigned long long *) stp_info
.ctnid
);
1500 static SYSDEV_CLASS_ATTR(ctn_id
, 0400, stp_ctn_id_show
, NULL
);
1502 static ssize_t
stp_ctn_type_show(struct sysdev_class
*class, char *buf
)
1506 return sprintf(buf
, "%i\n", stp_info
.ctn
);
1509 static SYSDEV_CLASS_ATTR(ctn_type
, 0400, stp_ctn_type_show
, NULL
);
1511 static ssize_t
stp_dst_offset_show(struct sysdev_class
*class, char *buf
)
1513 if (!stp_online
|| !(stp_info
.vbits
& 0x2000))
1515 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.dsto
);
1518 static SYSDEV_CLASS_ATTR(dst_offset
, 0400, stp_dst_offset_show
, NULL
);
1520 static ssize_t
stp_leap_seconds_show(struct sysdev_class
*class, char *buf
)
1522 if (!stp_online
|| !(stp_info
.vbits
& 0x8000))
1524 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.leaps
);
1527 static SYSDEV_CLASS_ATTR(leap_seconds
, 0400, stp_leap_seconds_show
, NULL
);
1529 static ssize_t
stp_stratum_show(struct sysdev_class
*class, char *buf
)
1533 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.stratum
);
1536 static SYSDEV_CLASS_ATTR(stratum
, 0400, stp_stratum_show
, NULL
);
1538 static ssize_t
stp_time_offset_show(struct sysdev_class
*class, char *buf
)
1540 if (!stp_online
|| !(stp_info
.vbits
& 0x0800))
1542 return sprintf(buf
, "%i\n", (int) stp_info
.tto
);
1545 static SYSDEV_CLASS_ATTR(time_offset
, 0400, stp_time_offset_show
, NULL
);
1547 static ssize_t
stp_time_zone_offset_show(struct sysdev_class
*class, char *buf
)
1549 if (!stp_online
|| !(stp_info
.vbits
& 0x4000))
1551 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.tzo
);
1554 static SYSDEV_CLASS_ATTR(time_zone_offset
, 0400,
1555 stp_time_zone_offset_show
, NULL
);
1557 static ssize_t
stp_timing_mode_show(struct sysdev_class
*class, char *buf
)
1561 return sprintf(buf
, "%i\n", stp_info
.tmd
);
1564 static SYSDEV_CLASS_ATTR(timing_mode
, 0400, stp_timing_mode_show
, NULL
);
1566 static ssize_t
stp_timing_state_show(struct sysdev_class
*class, char *buf
)
1570 return sprintf(buf
, "%i\n", stp_info
.tst
);
1573 static SYSDEV_CLASS_ATTR(timing_state
, 0400, stp_timing_state_show
, NULL
);
1575 static ssize_t
stp_online_show(struct sysdev_class
*class, char *buf
)
1577 return sprintf(buf
, "%i\n", stp_online
);
1580 static ssize_t
stp_online_store(struct sysdev_class
*class,
1581 const char *buf
, size_t count
)
1585 value
= simple_strtoul(buf
, NULL
, 0);
1586 if (value
!= 0 && value
!= 1)
1588 if (!test_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
))
1591 schedule_work(&stp_work
);
1596 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1597 * stp/online but attr_online already exists in this file ..
1599 static struct sysdev_class_attribute attr_stp_online
= {
1600 .attr
= { .name
= "online", .mode
= 0600 },
1601 .show
= stp_online_show
,
1602 .store
= stp_online_store
,
1605 static struct sysdev_class_attribute
*stp_attributes
[] = {
1613 &attr_time_zone_offset
,
1619 static int __init
stp_init_sysfs(void)
1621 struct sysdev_class_attribute
**attr
;
1624 rc
= sysdev_class_register(&stp_sysclass
);
1627 for (attr
= stp_attributes
; *attr
; attr
++) {
1628 rc
= sysdev_class_create_file(&stp_sysclass
, *attr
);
1634 for (; attr
>= stp_attributes
; attr
--)
1635 sysdev_class_remove_file(&stp_sysclass
, *attr
);
1636 sysdev_class_unregister(&stp_sysclass
);
1641 device_initcall(stp_init_sysfs
);