Merge branch 'master' into next
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / s390 / kernel / entry64.S
1 /*
2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2010
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12 #include <linux/linkage.h>
13 #include <linux/init.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
20 #include <asm/page.h>
21
22 /*
23 * Stack layout for the system_call stack entry.
24 * The first few entries are identical to the user_regs_struct.
25 */
26 SP_PTREGS = STACK_FRAME_OVERHEAD
27 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
28 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
29 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
30 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
31 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
32 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
33 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
34 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
35 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
36 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
37 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
38 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
39 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
40 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
41 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
42 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
43 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
44 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
45 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
47 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
48 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
49
50 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
52
53 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_PER_TRAP )
55 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING)
57 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
58 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
59
60 #define BASED(name) name-system_call(%r13)
61
62 .macro HANDLE_SIE_INTERCEPT
63 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
64 lg %r3,__LC_SIE_HOOK
65 ltgr %r3,%r3
66 jz 0f
67 basr %r14,%r3
68 0:
69 #endif
70 .endm
71
72 #ifdef CONFIG_TRACE_IRQFLAGS
73 .macro TRACE_IRQS_ON
74 basr %r2,%r0
75 brasl %r14,trace_hardirqs_on_caller
76 .endm
77
78 .macro TRACE_IRQS_OFF
79 basr %r2,%r0
80 brasl %r14,trace_hardirqs_off_caller
81 .endm
82 #else
83 #define TRACE_IRQS_ON
84 #define TRACE_IRQS_OFF
85 #endif
86
87 #ifdef CONFIG_LOCKDEP
88 .macro LOCKDEP_SYS_EXIT
89 tm SP_PSW+1(%r15),0x01 # returning to user ?
90 jz 0f
91 brasl %r14,lockdep_sys_exit
92 0:
93 .endm
94 #else
95 #define LOCKDEP_SYS_EXIT
96 #endif
97
98 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
99 lg %r10,\lc_from
100 slg %r10,\lc_to
101 alg %r10,\lc_sum
102 stg %r10,\lc_sum
103 .endm
104
105 /*
106 * Register usage in interrupt handlers:
107 * R9 - pointer to current task structure
108 * R13 - pointer to literal pool
109 * R14 - return register for function calls
110 * R15 - kernel stack pointer
111 */
112
113 .macro SAVE_ALL_SVC psworg,savearea
114 stmg %r11,%r15,\savearea
115 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
116 aghi %r15,-SP_SIZE # make room for registers & psw
117 lg %r11,__LC_LAST_BREAK
118 .endm
119
120 .macro SAVE_ALL_PGM psworg,savearea
121 stmg %r11,%r15,\savearea
122 tm \psworg+1,0x01 # test problem state bit
123 #ifdef CONFIG_CHECK_STACK
124 jnz 1f
125 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
126 jnz 2f
127 la %r12,\psworg
128 j stack_overflow
129 #else
130 jz 2f
131 #endif
132 1: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
133 2: aghi %r15,-SP_SIZE # make room for registers & psw
134 larl %r13,system_call
135 lg %r11,__LC_LAST_BREAK
136 .endm
137
138 .macro SAVE_ALL_ASYNC psworg,savearea
139 stmg %r11,%r15,\savearea
140 larl %r13,system_call
141 lg %r11,__LC_LAST_BREAK
142 la %r12,\psworg
143 tm \psworg+1,0x01 # test problem state bit
144 jnz 1f # from user -> load kernel stack
145 clc \psworg+8(8),BASED(.Lcritical_end)
146 jhe 0f
147 clc \psworg+8(8),BASED(.Lcritical_start)
148 jl 0f
149 brasl %r14,cleanup_critical
150 tm 1(%r12),0x01 # retest problem state after cleanup
151 jnz 1f
152 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
153 slgr %r14,%r15
154 srag %r14,%r14,STACK_SHIFT
155 #ifdef CONFIG_CHECK_STACK
156 jnz 1f
157 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
158 jnz 2f
159 j stack_overflow
160 #else
161 jz 2f
162 #endif
163 1: lg %r15,__LC_ASYNC_STACK # load async stack
164 2: aghi %r15,-SP_SIZE # make room for registers & psw
165 .endm
166
167 .macro CREATE_STACK_FRAME savearea
168 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
169 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
170 mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack
171 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
172 .endm
173
174 .macro RESTORE_ALL psworg,sync
175 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
176 .if !\sync
177 ni \psworg+1,0xfd # clear wait state bit
178 .endif
179 lg %r14,__LC_VDSO_PER_CPU
180 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
181 stpt __LC_EXIT_TIMER
182 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
183 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
184 lpswe \psworg # back to caller
185 .endm
186
187 .macro LAST_BREAK
188 srag %r10,%r11,23
189 jz 0f
190 stg %r11,__TI_last_break(%r12)
191 0:
192 .endm
193
194 .macro REENABLE_IRQS
195 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15)
196 ni __SF_EMPTY(%r15),0xbf
197 ssm __SF_EMPTY(%r15)
198 .endm
199
200 .section .kprobes.text, "ax"
201
202 /*
203 * Scheduler resume function, called by switch_to
204 * gpr2 = (task_struct *) prev
205 * gpr3 = (task_struct *) next
206 * Returns:
207 * gpr2 = prev
208 */
209 .globl __switch_to
210 __switch_to:
211 lg %r4,__THREAD_info(%r2) # get thread_info of prev
212 lg %r5,__THREAD_info(%r3) # get thread_info of next
213 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
214 jz 0f
215 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
216 oi __TI_flags+7(%r5),_TIF_MCCK_PENDING # set it in next
217 0: stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
218 stg %r15,__THREAD_ksp(%r2) # store kernel stack of prev
219 lg %r15,__THREAD_ksp(%r3) # load kernel stack of next
220 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
221 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
222 stg %r3,__LC_CURRENT # store task struct of next
223 stg %r5,__LC_THREAD_INFO # store thread info of next
224 aghi %r5,STACK_SIZE # end of kernel stack of next
225 stg %r5,__LC_KERNEL_STACK # store end of kernel stack
226 br %r14
227
228 __critical_start:
229 /*
230 * SVC interrupt handler routine. System calls are synchronous events and
231 * are executed with interrupts enabled.
232 */
233
234 .globl system_call
235 system_call:
236 stpt __LC_SYNC_ENTER_TIMER
237 sysc_saveall:
238 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
239 CREATE_STACK_FRAME __LC_SAVE_AREA
240 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
241 mvc SP_ILC(4,%r15),__LC_SVC_ILC
242 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
243 sysc_vtime:
244 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
245 sysc_stime:
246 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
247 sysc_update:
248 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
249 LAST_BREAK
250 sysc_do_svc:
251 llgh %r7,SP_SVCNR(%r15)
252 slag %r7,%r7,2 # shift and test for svc 0
253 jnz sysc_nr_ok
254 # svc 0: system call number in %r1
255 llgfr %r1,%r1 # clear high word in r1
256 cghi %r1,NR_syscalls
257 jnl sysc_nr_ok
258 sth %r1,SP_SVCNR(%r15)
259 slag %r7,%r1,2 # shift and test for svc 0
260 sysc_nr_ok:
261 larl %r10,sys_call_table
262 #ifdef CONFIG_COMPAT
263 tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ?
264 jno sysc_noemu
265 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
266 sysc_noemu:
267 #endif
268 tm __TI_flags+6(%r12),_TIF_SYSCALL
269 mvc SP_ARGS(8,%r15),SP_R7(%r15)
270 lgf %r8,0(%r7,%r10) # load address of system call routine
271 jnz sysc_tracesys
272 basr %r14,%r8 # call sys_xxxx
273 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
274
275 sysc_return:
276 LOCKDEP_SYS_EXIT
277 sysc_tif:
278 tm __TI_flags+7(%r12),_TIF_WORK_SVC
279 jnz sysc_work # there is work to do (signals etc.)
280 sysc_restore:
281 RESTORE_ALL __LC_RETURN_PSW,1
282 sysc_done:
283
284 #
285 # There is work to do, but first we need to check if we return to userspace.
286 #
287 sysc_work:
288 tm SP_PSW+1(%r15),0x01 # returning to user ?
289 jno sysc_restore
290
291 #
292 # One of the work bits is on. Find out which one.
293 #
294 sysc_work_tif:
295 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
296 jo sysc_mcck_pending
297 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
298 jo sysc_reschedule
299 tm __TI_flags+7(%r12),_TIF_SIGPENDING
300 jo sysc_sigpending
301 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
302 jo sysc_notify_resume
303 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
304 jo sysc_restart
305 tm __TI_flags+7(%r12),_TIF_PER_TRAP
306 jo sysc_singlestep
307 j sysc_return # beware of critical section cleanup
308
309 #
310 # _TIF_NEED_RESCHED is set, call schedule
311 #
312 sysc_reschedule:
313 larl %r14,sysc_return
314 jg schedule # return point is sysc_return
315
316 #
317 # _TIF_MCCK_PENDING is set, call handler
318 #
319 sysc_mcck_pending:
320 larl %r14,sysc_return
321 jg s390_handle_mcck # TIF bit will be cleared by handler
322
323 #
324 # _TIF_SIGPENDING is set, call do_signal
325 #
326 sysc_sigpending:
327 ni __TI_flags+7(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
328 la %r2,SP_PTREGS(%r15) # load pt_regs
329 brasl %r14,do_signal # call do_signal
330 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
331 jo sysc_restart
332 tm __TI_flags+7(%r12),_TIF_PER_TRAP
333 jo sysc_singlestep
334 j sysc_return
335
336 #
337 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
338 #
339 sysc_notify_resume:
340 la %r2,SP_PTREGS(%r15) # load pt_regs
341 larl %r14,sysc_return
342 jg do_notify_resume # call do_notify_resume
343
344 #
345 # _TIF_RESTART_SVC is set, set up registers and restart svc
346 #
347 sysc_restart:
348 ni __TI_flags+7(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
349 lg %r7,SP_R2(%r15) # load new svc number
350 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
351 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
352 sth %r7,SP_SVCNR(%r15)
353 slag %r7,%r7,2
354 j sysc_nr_ok # restart svc
355
356 #
357 # _TIF_PER_TRAP is set, call do_per_trap
358 #
359 sysc_singlestep:
360 ni __TI_flags+7(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
361 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
362 la %r2,SP_PTREGS(%r15) # address of register-save area
363 larl %r14,sysc_return # load adr. of system return
364 jg do_per_trap
365
366 #
367 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
368 # and after the system call
369 #
370 sysc_tracesys:
371 la %r2,SP_PTREGS(%r15) # load pt_regs
372 la %r3,0
373 llgh %r0,SP_SVCNR(%r15)
374 stg %r0,SP_R2(%r15)
375 brasl %r14,do_syscall_trace_enter
376 lghi %r0,NR_syscalls
377 clgr %r0,%r2
378 jnh sysc_tracenogo
379 sllg %r7,%r2,2 # svc number *4
380 lgf %r8,0(%r7,%r10)
381 sysc_tracego:
382 lmg %r3,%r6,SP_R3(%r15)
383 mvc SP_ARGS(8,%r15),SP_R7(%r15)
384 lg %r2,SP_ORIG_R2(%r15)
385 basr %r14,%r8 # call sys_xxx
386 stg %r2,SP_R2(%r15) # store return value
387 sysc_tracenogo:
388 tm __TI_flags+6(%r12),_TIF_SYSCALL
389 jz sysc_return
390 la %r2,SP_PTREGS(%r15) # load pt_regs
391 larl %r14,sysc_return # return point is sysc_return
392 jg do_syscall_trace_exit
393
394 #
395 # a new process exits the kernel with ret_from_fork
396 #
397 .globl ret_from_fork
398 ret_from_fork:
399 lg %r13,__LC_SVC_NEW_PSW+8
400 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
401 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
402 jo 0f
403 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
404 0: brasl %r14,schedule_tail
405 TRACE_IRQS_ON
406 stosm 24(%r15),0x03 # reenable interrupts
407 j sysc_tracenogo
408
409 #
410 # kernel_execve function needs to deal with pt_regs that is not
411 # at the usual place
412 #
413 .globl kernel_execve
414 kernel_execve:
415 stmg %r12,%r15,96(%r15)
416 lgr %r14,%r15
417 aghi %r15,-SP_SIZE
418 stg %r14,__SF_BACKCHAIN(%r15)
419 la %r12,SP_PTREGS(%r15)
420 xc 0(__PT_SIZE,%r12),0(%r12)
421 lgr %r5,%r12
422 brasl %r14,do_execve
423 ltgfr %r2,%r2
424 je 0f
425 aghi %r15,SP_SIZE
426 lmg %r12,%r15,96(%r15)
427 br %r14
428 # execve succeeded.
429 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
430 lg %r15,__LC_KERNEL_STACK # load ksp
431 aghi %r15,-SP_SIZE # make room for registers & psw
432 lg %r13,__LC_SVC_NEW_PSW+8
433 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
434 lg %r12,__LC_THREAD_INFO
435 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
436 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
437 brasl %r14,execve_tail
438 j sysc_return
439
440 /*
441 * Program check handler routine
442 */
443
444 .globl pgm_check_handler
445 pgm_check_handler:
446 /*
447 * First we need to check for a special case:
448 * Single stepping an instruction that disables the PER event mask will
449 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
450 * For a single stepped SVC the program check handler gets control after
451 * the SVC new PSW has been loaded. But we want to execute the SVC first and
452 * then handle the PER event. Therefore we update the SVC old PSW to point
453 * to the pgm_check_handler and branch to the SVC handler after we checked
454 * if we have to load the kernel stack register.
455 * For every other possible cause for PER event without the PER mask set
456 * we just ignore the PER event (FIXME: is there anything we have to do
457 * for LPSW?).
458 */
459 stpt __LC_SYNC_ENTER_TIMER
460 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
461 jnz pgm_per # got per exception -> special case
462 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
463 CREATE_STACK_FRAME __LC_SAVE_AREA
464 xc SP_ILC(4,%r15),SP_ILC(%r15)
465 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
466 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
467 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
468 jz pgm_no_vtime
469 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
470 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
471 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
472 LAST_BREAK
473 pgm_no_vtime:
474 HANDLE_SIE_INTERCEPT
475 stg %r11,SP_ARGS(%r15)
476 lgf %r3,__LC_PGM_ILC # load program interruption code
477 lg %r4,__LC_TRANS_EXC_CODE
478 REENABLE_IRQS
479 lghi %r8,0x7f
480 ngr %r8,%r3
481 sll %r8,3
482 larl %r1,pgm_check_table
483 lg %r1,0(%r8,%r1) # load address of handler routine
484 la %r2,SP_PTREGS(%r15) # address of register-save area
485 basr %r14,%r1 # branch to interrupt-handler
486 pgm_exit:
487 j sysc_return
488
489 #
490 # handle per exception
491 #
492 pgm_per:
493 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
494 jnz pgm_per_std # ok, normal per event from user space
495 # ok its one of the special cases, now we need to find out which one
496 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
497 je pgm_svcper
498 # no interesting special case, ignore PER event
499 lpswe __LC_PGM_OLD_PSW
500
501 #
502 # Normal per exception
503 #
504 pgm_per_std:
505 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
506 CREATE_STACK_FRAME __LC_SAVE_AREA
507 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
508 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
509 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
510 jz pgm_no_vtime2
511 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
512 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
513 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
514 LAST_BREAK
515 pgm_no_vtime2:
516 HANDLE_SIE_INTERCEPT
517 lg %r1,__TI_task(%r12)
518 tm SP_PSW+1(%r15),0x01 # kernel per event ?
519 jz kernel_per
520 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE
521 mvc __THREAD_per_address(8,%r1),__LC_PER_ADDRESS
522 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID
523 oi __TI_flags+7(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP
524 lgf %r3,__LC_PGM_ILC # load program interruption code
525 lg %r4,__LC_TRANS_EXC_CODE
526 REENABLE_IRQS
527 lghi %r8,0x7f
528 ngr %r8,%r3 # clear per-event-bit and ilc
529 je pgm_exit2
530 sll %r8,3
531 larl %r1,pgm_check_table
532 lg %r1,0(%r8,%r1) # load address of handler routine
533 la %r2,SP_PTREGS(%r15) # address of register-save area
534 basr %r14,%r1 # branch to interrupt-handler
535 pgm_exit2:
536 j sysc_return
537
538 #
539 # it was a single stepped SVC that is causing all the trouble
540 #
541 pgm_svcper:
542 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
543 CREATE_STACK_FRAME __LC_SAVE_AREA
544 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
545 mvc SP_ILC(4,%r15),__LC_SVC_ILC
546 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
547 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
548 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
549 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
550 LAST_BREAK
551 lg %r8,__TI_task(%r12)
552 mvc __THREAD_per_cause(2,%r8),__LC_PER_CAUSE
553 mvc __THREAD_per_address(8,%r8),__LC_PER_ADDRESS
554 mvc __THREAD_per_paid(1,%r8),__LC_PER_PAID
555 oi __TI_flags+7(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP
556 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
557 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
558 j sysc_do_svc
559
560 #
561 # per was called from kernel, must be kprobes
562 #
563 kernel_per:
564 REENABLE_IRQS
565 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
566 la %r2,SP_PTREGS(%r15) # address of register-save area
567 brasl %r14,do_per_trap
568 j pgm_exit
569
570 /*
571 * IO interrupt handler routine
572 */
573 .globl io_int_handler
574 io_int_handler:
575 stck __LC_INT_CLOCK
576 stpt __LC_ASYNC_ENTER_TIMER
577 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40
578 CREATE_STACK_FRAME __LC_SAVE_AREA+40
579 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
580 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
581 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
582 jz io_no_vtime
583 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
584 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
585 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
586 LAST_BREAK
587 io_no_vtime:
588 HANDLE_SIE_INTERCEPT
589 TRACE_IRQS_OFF
590 la %r2,SP_PTREGS(%r15) # address of register-save area
591 brasl %r14,do_IRQ # call standard irq handler
592 io_return:
593 LOCKDEP_SYS_EXIT
594 TRACE_IRQS_ON
595 io_tif:
596 tm __TI_flags+7(%r12),_TIF_WORK_INT
597 jnz io_work # there is work to do (signals etc.)
598 io_restore:
599 RESTORE_ALL __LC_RETURN_PSW,0
600 io_done:
601
602 #
603 # There is work todo, find out in which context we have been interrupted:
604 # 1) if we return to user space we can do all _TIF_WORK_INT work
605 # 2) if we return to kernel code and kvm is enabled check if we need to
606 # modify the psw to leave SIE
607 # 3) if we return to kernel code and preemptive scheduling is enabled check
608 # the preemption counter and if it is zero call preempt_schedule_irq
609 # Before any work can be done, a switch to the kernel stack is required.
610 #
611 io_work:
612 tm SP_PSW+1(%r15),0x01 # returning to user ?
613 jo io_work_user # yes -> do resched & signal
614 #ifdef CONFIG_PREEMPT
615 # check for preemptive scheduling
616 icm %r0,15,__TI_precount(%r12)
617 jnz io_restore # preemption is disabled
618 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
619 jno io_restore
620 # switch to kernel stack
621 lg %r1,SP_R15(%r15)
622 aghi %r1,-SP_SIZE
623 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
624 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
625 lgr %r15,%r1
626 # TRACE_IRQS_ON already done at io_return, call
627 # TRACE_IRQS_OFF to keep things symmetrical
628 TRACE_IRQS_OFF
629 brasl %r14,preempt_schedule_irq
630 j io_return
631 #else
632 j io_restore
633 #endif
634
635 #
636 # Need to do work before returning to userspace, switch to kernel stack
637 #
638 io_work_user:
639 lg %r1,__LC_KERNEL_STACK
640 aghi %r1,-SP_SIZE
641 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
642 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
643 lgr %r15,%r1
644
645 #
646 # One of the work bits is on. Find out which one.
647 # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
648 # and _TIF_MCCK_PENDING
649 #
650 io_work_tif:
651 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
652 jo io_mcck_pending
653 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
654 jo io_reschedule
655 tm __TI_flags+7(%r12),_TIF_SIGPENDING
656 jo io_sigpending
657 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
658 jo io_notify_resume
659 j io_return # beware of critical section cleanup
660
661 #
662 # _TIF_MCCK_PENDING is set, call handler
663 #
664 io_mcck_pending:
665 # TRACE_IRQS_ON already done at io_return
666 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
667 TRACE_IRQS_OFF
668 j io_return
669
670 #
671 # _TIF_NEED_RESCHED is set, call schedule
672 #
673 io_reschedule:
674 # TRACE_IRQS_ON already done at io_return
675 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
676 brasl %r14,schedule # call scheduler
677 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
678 TRACE_IRQS_OFF
679 j io_return
680
681 #
682 # _TIF_SIGPENDING or is set, call do_signal
683 #
684 io_sigpending:
685 # TRACE_IRQS_ON already done at io_return
686 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
687 la %r2,SP_PTREGS(%r15) # load pt_regs
688 brasl %r14,do_signal # call do_signal
689 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
690 TRACE_IRQS_OFF
691 j io_return
692
693 #
694 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
695 #
696 io_notify_resume:
697 # TRACE_IRQS_ON already done at io_return
698 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
699 la %r2,SP_PTREGS(%r15) # load pt_regs
700 brasl %r14,do_notify_resume # call do_notify_resume
701 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
702 TRACE_IRQS_OFF
703 j io_return
704
705 /*
706 * External interrupt handler routine
707 */
708 .globl ext_int_handler
709 ext_int_handler:
710 stck __LC_INT_CLOCK
711 stpt __LC_ASYNC_ENTER_TIMER
712 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40
713 CREATE_STACK_FRAME __LC_SAVE_AREA+40
714 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
715 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
716 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
717 jz ext_no_vtime
718 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
719 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
720 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
721 LAST_BREAK
722 ext_no_vtime:
723 HANDLE_SIE_INTERCEPT
724 TRACE_IRQS_OFF
725 lghi %r1,4096
726 la %r2,SP_PTREGS(%r15) # address of register-save area
727 llgf %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
728 llgf %r4,__LC_EXT_PARAMS # get external parameter
729 lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter
730 brasl %r14,do_extint
731 j io_return
732
733 __critical_end:
734
735 /*
736 * Machine check handler routines
737 */
738 .globl mcck_int_handler
739 mcck_int_handler:
740 stck __LC_MCCK_CLOCK
741 la %r1,4095 # revalidate r1
742 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
743 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
744 stmg %r11,%r15,__LC_SAVE_AREA+80
745 larl %r13,system_call
746 lg %r11,__LC_LAST_BREAK
747 la %r12,__LC_MCK_OLD_PSW
748 tm __LC_MCCK_CODE,0x80 # system damage?
749 jo mcck_int_main # yes -> rest of mcck code invalid
750 la %r14,4095
751 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
752 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
753 jo 1f
754 la %r14,__LC_SYNC_ENTER_TIMER
755 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
756 jl 0f
757 la %r14,__LC_ASYNC_ENTER_TIMER
758 0: clc 0(8,%r14),__LC_EXIT_TIMER
759 jl 0f
760 la %r14,__LC_EXIT_TIMER
761 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
762 jl 0f
763 la %r14,__LC_LAST_UPDATE_TIMER
764 0: spt 0(%r14)
765 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
766 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
767 jno mcck_int_main # no -> skip cleanup critical
768 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
769 jnz mcck_int_main # from user -> load kernel stack
770 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
771 jhe mcck_int_main
772 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
773 jl mcck_int_main
774 brasl %r14,cleanup_critical
775 mcck_int_main:
776 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
777 slgr %r14,%r15
778 srag %r14,%r14,PAGE_SHIFT
779 jz 0f
780 lg %r15,__LC_PANIC_STACK # load panic stack
781 0: aghi %r15,-SP_SIZE # make room for registers & psw
782 CREATE_STACK_FRAME __LC_SAVE_AREA+80
783 mvc SP_PSW(16,%r15),0(%r12)
784 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
785 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
786 jno mcck_no_vtime # no -> no timer update
787 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
788 jz mcck_no_vtime
789 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
790 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
791 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
792 LAST_BREAK
793 mcck_no_vtime:
794 la %r2,SP_PTREGS(%r15) # load pt_regs
795 brasl %r14,s390_do_machine_check
796 tm SP_PSW+1(%r15),0x01 # returning to user ?
797 jno mcck_return
798 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
799 aghi %r1,-SP_SIZE
800 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
801 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
802 lgr %r15,%r1
803 stosm __SF_EMPTY(%r15),0x04 # turn dat on
804 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
805 jno mcck_return
806 HANDLE_SIE_INTERCEPT
807 TRACE_IRQS_OFF
808 brasl %r14,s390_handle_mcck
809 TRACE_IRQS_ON
810 mcck_return:
811 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
812 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
813 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
814 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
815 jno 0f
816 stpt __LC_EXIT_TIMER
817 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
818 mcck_done:
819
820 /*
821 * Restart interruption handler, kick starter for additional CPUs
822 */
823 #ifdef CONFIG_SMP
824 __CPUINIT
825 .globl restart_int_handler
826 restart_int_handler:
827 basr %r1,0
828 restart_base:
829 spt restart_vtime-restart_base(%r1)
830 stck __LC_LAST_UPDATE_CLOCK
831 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
832 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
833 lg %r15,__LC_SAVE_AREA+120 # load ksp
834 lghi %r10,__LC_CREGS_SAVE_AREA
835 lctlg %c0,%c15,0(%r10) # get new ctl regs
836 lghi %r10,__LC_AREGS_SAVE_AREA
837 lam %a0,%a15,0(%r10)
838 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
839 lg %r1,__LC_THREAD_INFO
840 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
841 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
842 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
843 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
844 brasl %r14,start_secondary
845 .align 8
846 restart_vtime:
847 .long 0x7fffffff,0xffffffff
848 .previous
849 #else
850 /*
851 * If we do not run with SMP enabled, let the new CPU crash ...
852 */
853 .globl restart_int_handler
854 restart_int_handler:
855 basr %r1,0
856 restart_base:
857 lpswe restart_crash-restart_base(%r1)
858 .align 8
859 restart_crash:
860 .long 0x000a0000,0x00000000,0x00000000,0x00000000
861 restart_go:
862 #endif
863
864 .section .kprobes.text, "ax"
865
866 #ifdef CONFIG_CHECK_STACK
867 /*
868 * The synchronous or the asynchronous stack overflowed. We are dead.
869 * No need to properly save the registers, we are going to panic anyway.
870 * Setup a pt_regs so that show_trace can provide a good call trace.
871 */
872 stack_overflow:
873 lg %r15,__LC_PANIC_STACK # change to panic stack
874 aghi %r15,-SP_SIZE
875 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
876 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
877 la %r1,__LC_SAVE_AREA
878 chi %r12,__LC_SVC_OLD_PSW
879 je 0f
880 chi %r12,__LC_PGM_OLD_PSW
881 je 0f
882 la %r1,__LC_SAVE_AREA+40
883 0: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack
884 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
885 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
886 la %r2,SP_PTREGS(%r15) # load pt_regs
887 jg kernel_stack_overflow
888 #endif
889
890 cleanup_table_system_call:
891 .quad system_call, sysc_do_svc
892 cleanup_table_sysc_tif:
893 .quad sysc_tif, sysc_restore
894 cleanup_table_sysc_restore:
895 .quad sysc_restore, sysc_done
896 cleanup_table_io_tif:
897 .quad io_tif, io_restore
898 cleanup_table_io_restore:
899 .quad io_restore, io_done
900
901 cleanup_critical:
902 clc 8(8,%r12),BASED(cleanup_table_system_call)
903 jl 0f
904 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
905 jl cleanup_system_call
906 0:
907 clc 8(8,%r12),BASED(cleanup_table_sysc_tif)
908 jl 0f
909 clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8)
910 jl cleanup_sysc_tif
911 0:
912 clc 8(8,%r12),BASED(cleanup_table_sysc_restore)
913 jl 0f
914 clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8)
915 jl cleanup_sysc_restore
916 0:
917 clc 8(8,%r12),BASED(cleanup_table_io_tif)
918 jl 0f
919 clc 8(8,%r12),BASED(cleanup_table_io_tif+8)
920 jl cleanup_io_tif
921 0:
922 clc 8(8,%r12),BASED(cleanup_table_io_restore)
923 jl 0f
924 clc 8(8,%r12),BASED(cleanup_table_io_restore+8)
925 jl cleanup_io_restore
926 0:
927 br %r14
928
929 cleanup_system_call:
930 mvc __LC_RETURN_PSW(16),0(%r12)
931 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
932 jh 0f
933 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
934 cghi %r12,__LC_MCK_OLD_PSW
935 je 0f
936 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
937 0: cghi %r12,__LC_MCK_OLD_PSW
938 la %r12,__LC_SAVE_AREA+80
939 je 0f
940 la %r12,__LC_SAVE_AREA+40
941 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
942 jhe cleanup_vtime
943 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
944 jh 0f
945 mvc __LC_SAVE_AREA(40),0(%r12)
946 0: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
947 aghi %r15,-SP_SIZE # make room for registers & psw
948 stg %r15,32(%r12)
949 stg %r11,0(%r12)
950 CREATE_STACK_FRAME __LC_SAVE_AREA
951 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
952 mvc SP_ILC(4,%r15),__LC_SVC_ILC
953 mvc 8(8,%r12),__LC_THREAD_INFO
954 cleanup_vtime:
955 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
956 jhe cleanup_stime
957 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
958 cleanup_stime:
959 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
960 jh cleanup_update
961 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
962 cleanup_update:
963 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
964 srag %r12,%r11,23
965 lg %r12,__LC_THREAD_INFO
966 jz 0f
967 stg %r11,__TI_last_break(%r12)
968 0: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
969 la %r12,__LC_RETURN_PSW
970 br %r14
971 cleanup_system_call_insn:
972 .quad sysc_saveall
973 .quad system_call
974 .quad sysc_vtime
975 .quad sysc_stime
976 .quad sysc_update
977
978 cleanup_sysc_tif:
979 mvc __LC_RETURN_PSW(8),0(%r12)
980 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif)
981 la %r12,__LC_RETURN_PSW
982 br %r14
983
984 cleanup_sysc_restore:
985 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn)
986 je 2f
987 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8)
988 jhe 0f
989 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
990 cghi %r12,__LC_MCK_OLD_PSW
991 je 0f
992 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
993 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
994 cghi %r12,__LC_MCK_OLD_PSW
995 la %r12,__LC_SAVE_AREA+80
996 je 1f
997 la %r12,__LC_SAVE_AREA+40
998 1: mvc 0(40,%r12),SP_R11(%r15)
999 lmg %r0,%r10,SP_R0(%r15)
1000 lg %r15,SP_R15(%r15)
1001 2: la %r12,__LC_RETURN_PSW
1002 br %r14
1003 cleanup_sysc_restore_insn:
1004 .quad sysc_done - 4
1005 .quad sysc_done - 16
1006
1007 cleanup_io_tif:
1008 mvc __LC_RETURN_PSW(8),0(%r12)
1009 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif)
1010 la %r12,__LC_RETURN_PSW
1011 br %r14
1012
1013 cleanup_io_restore:
1014 clc 8(8,%r12),BASED(cleanup_io_restore_insn)
1015 je 1f
1016 clc 8(8,%r12),BASED(cleanup_io_restore_insn+8)
1017 jhe 0f
1018 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1019 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1020 mvc __LC_SAVE_AREA+80(40),SP_R11(%r15)
1021 lmg %r0,%r10,SP_R0(%r15)
1022 lg %r15,SP_R15(%r15)
1023 1: la %r12,__LC_RETURN_PSW
1024 br %r14
1025 cleanup_io_restore_insn:
1026 .quad io_done - 4
1027 .quad io_done - 16
1028
1029 /*
1030 * Integer constants
1031 */
1032 .align 4
1033 .Lcritical_start:
1034 .quad __critical_start
1035 .Lcritical_end:
1036 .quad __critical_end
1037
1038 .section .rodata, "a"
1039 #define SYSCALL(esa,esame,emu) .long esame
1040 .globl sys_call_table
1041 sys_call_table:
1042 #include "syscalls.S"
1043 #undef SYSCALL
1044
1045 #ifdef CONFIG_COMPAT
1046
1047 #define SYSCALL(esa,esame,emu) .long emu
1048 sys_call_table_emu:
1049 #include "syscalls.S"
1050 #undef SYSCALL
1051 #endif