2 * arch/ppc/platforms/85xx/mpc8540_ads.c
4 * MPC8540ADS board specific routines
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
8 * Copyright 2004 Freescale Semiconductor Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/config.h>
17 #include <linux/stddef.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/reboot.h>
22 #include <linux/pci.h>
23 #include <linux/kdev_t.h>
24 #include <linux/major.h>
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/seq_file.h>
28 #include <linux/root_dev.h>
29 #include <linux/serial.h>
30 #include <linux/tty.h> /* for linux/serial_core.h */
31 #include <linux/serial_core.h>
32 #include <linux/initrd.h>
33 #include <linux/module.h>
34 #include <linux/fsl_devices.h>
36 #include <asm/system.h>
37 #include <asm/pgtable.h>
39 #include <asm/atomic.h>
42 #include <asm/machdep.h>
43 #include <asm/open_pic.h>
44 #include <asm/bootinfo.h>
45 #include <asm/pci-bridge.h>
46 #include <asm/mpc85xx.h>
48 #include <asm/immap_85xx.h>
50 #include <asm/ppc_sys.h>
51 #include <mm/mmu_decl.h>
53 #include <syslib/ppc85xx_setup.h>
55 static const char *GFAR_PHY_0
= "phy0:0";
56 static const char *GFAR_PHY_1
= "phy0:1";
57 static const char *GFAR_PHY_3
= "phy0:3";
59 /* ************************************************************************
61 * Setup the architecture
65 mpc8540ads_setup_arch(void)
67 bd_t
*binfo
= (bd_t
*) __res
;
69 struct gianfar_platform_data
*pdata
;
70 struct gianfar_mdio_data
*mdata
;
72 /* get the core frequency */
73 freq
= binfo
->bi_intfreq
;
76 ppc_md
.progress("mpc8540ads_setup_arch()", 0);
78 /* Set loops_per_jiffy to a half-way reasonable value,
79 for use until calibrate_delay gets called. */
80 loops_per_jiffy
= freq
/ HZ
;
83 /* setup PCI host bridges */
87 #ifdef CONFIG_SERIAL_8250
88 mpc85xx_early_serial_map();
91 #ifdef CONFIG_SERIAL_TEXT_DEBUG
92 /* Invalidate the entry we stole earlier the serial ports
93 * should be properly mapped */
94 invalidate_tlbcam_entry(num_tlbcam_entries
- 1);
97 /* setup the board related info for the MDIO bus */
98 mdata
= (struct gianfar_mdio_data
*) ppc_sys_get_pdata(MPC85xx_MDIO
);
100 mdata
->irq
[0] = MPC85xx_IRQ_EXT5
;
101 mdata
->irq
[1] = MPC85xx_IRQ_EXT5
;
103 mdata
->irq
[3] = MPC85xx_IRQ_EXT5
;
105 mdata
->paddr
+= binfo
->bi_immr_base
;
107 /* setup the board related information for the enet controllers */
108 pdata
= (struct gianfar_platform_data
*) ppc_sys_get_pdata(MPC85xx_TSEC1
);
110 pdata
->board_flags
= FSL_GIANFAR_BRD_HAS_PHY_INTR
;
111 pdata
->bus_id
= GFAR_PHY_0
;
112 memcpy(pdata
->mac_addr
, binfo
->bi_enetaddr
, 6);
115 pdata
= (struct gianfar_platform_data
*) ppc_sys_get_pdata(MPC85xx_TSEC2
);
117 pdata
->board_flags
= FSL_GIANFAR_BRD_HAS_PHY_INTR
;
118 pdata
->bus_id
= GFAR_PHY_1
;
119 memcpy(pdata
->mac_addr
, binfo
->bi_enet1addr
, 6);
122 pdata
= (struct gianfar_platform_data
*) ppc_sys_get_pdata(MPC85xx_FEC
);
124 pdata
->board_flags
= 0;
125 pdata
->bus_id
= GFAR_PHY_3
;
126 memcpy(pdata
->mac_addr
, binfo
->bi_enet2addr
, 6);
129 #ifdef CONFIG_BLK_DEV_INITRD
131 ROOT_DEV
= Root_RAM0
;
134 #ifdef CONFIG_ROOT_NFS
137 ROOT_DEV
= Root_HDA1
;
141 /* ************************************************************************ */
143 platform_init(unsigned long r3
, unsigned long r4
, unsigned long r5
,
144 unsigned long r6
, unsigned long r7
)
146 /* parse_bootinfo must always be called first */
147 parse_bootinfo(find_bootinfo());
150 * If we were passed in a board information, copy it into the
151 * residual data area.
154 memcpy((void *) __res
, (void *) (r3
+ KERNELBASE
),
157 #ifdef CONFIG_SERIAL_TEXT_DEBUG
159 bd_t
*binfo
= (bd_t
*) __res
;
162 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
163 settlbcam(num_tlbcam_entries
- 1, binfo
->bi_immr_base
,
164 binfo
->bi_immr_base
, MPC85xx_CCSRBAR_SIZE
, _PAGE_IO
, 0);
166 memset(&p
, 0, sizeof (p
));
167 p
.iotype
= SERIAL_IO_MEM
;
168 p
.membase
= (void *) binfo
->bi_immr_base
+ MPC85xx_UART0_OFFSET
;
169 p
.uartclk
= binfo
->bi_busfreq
;
173 memset(&p
, 0, sizeof (p
));
174 p
.iotype
= SERIAL_IO_MEM
;
175 p
.membase
= (void *) binfo
->bi_immr_base
+ MPC85xx_UART1_OFFSET
;
176 p
.uartclk
= binfo
->bi_busfreq
;
182 #if defined(CONFIG_BLK_DEV_INITRD)
184 * If the init RAM disk has been configured in, and there's a valid
185 * starting address for it, set it up.
188 initrd_start
= r4
+ KERNELBASE
;
189 initrd_end
= r5
+ KERNELBASE
;
191 #endif /* CONFIG_BLK_DEV_INITRD */
193 /* Copy the kernel command line arguments to a safe place. */
196 *(char *) (r7
+ KERNELBASE
) = 0;
197 strcpy(cmd_line
, (char *) (r6
+ KERNELBASE
));
200 identify_ppc_sys_by_id(mfspr(SPRN_SVR
));
202 /* setup the PowerPC module struct */
203 ppc_md
.setup_arch
= mpc8540ads_setup_arch
;
204 ppc_md
.show_cpuinfo
= mpc85xx_ads_show_cpuinfo
;
206 ppc_md
.init_IRQ
= mpc85xx_ads_init_IRQ
;
207 ppc_md
.get_irq
= openpic_get_irq
;
209 ppc_md
.restart
= mpc85xx_restart
;
210 ppc_md
.power_off
= mpc85xx_power_off
;
211 ppc_md
.halt
= mpc85xx_halt
;
213 ppc_md
.find_end_of_memory
= mpc85xx_find_end_of_memory
;
215 ppc_md
.time_init
= NULL
;
216 ppc_md
.set_rtc_time
= NULL
;
217 ppc_md
.get_rtc_time
= NULL
;
218 ppc_md
.calibrate_decr
= mpc85xx_calibrate_decr
;
220 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
221 ppc_md
.progress
= gen550_progress
;
222 #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
223 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
224 ppc_md
.early_serial_map
= mpc85xx_early_serial_map
;
225 #endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
228 ppc_md
.progress("mpc8540ads_init(): exit", 0);