3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
77 #define EEH_MAX_FAILS 2100000
79 /* Time to wait for a PCI slot to report status, in milliseconds */
80 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
83 static int ibm_set_eeh_option
;
84 static int ibm_set_slot_reset
;
85 static int ibm_read_slot_reset_state
;
86 static int ibm_read_slot_reset_state2
;
87 static int ibm_slot_error_detail
;
88 static int ibm_get_config_addr_info
;
89 static int ibm_get_config_addr_info2
;
90 static int ibm_configure_bridge
;
92 int eeh_subsystem_enabled
;
93 EXPORT_SYMBOL(eeh_subsystem_enabled
);
95 /* Lock to avoid races due to multiple reports of an error */
96 static DEFINE_SPINLOCK(confirm_error_lock
);
98 /* Buffer for reporting slot-error-detail rtas calls. Its here
99 * in BSS, and not dynamically alloced, so that it ends up in
100 * RMO where RTAS can access it.
102 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
103 static DEFINE_SPINLOCK(slot_errbuf_lock
);
104 static int eeh_error_buf_size
;
106 /* Buffer for reporting pci register dumps. Its here in BSS, and
107 * not dynamically alloced, so that it ends up in RMO where RTAS
110 #define EEH_PCI_REGS_LOG_LEN 4096
111 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
113 /* System monitoring statistics */
114 static unsigned long no_device
;
115 static unsigned long no_dn
;
116 static unsigned long no_cfg_addr
;
117 static unsigned long ignored_check
;
118 static unsigned long total_mmio_ffs
;
119 static unsigned long false_positives
;
120 static unsigned long ignored_failures
;
121 static unsigned long slot_resets
;
123 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
125 /* --------------------------------------------------------------- */
126 /* Below lies the EEH event infrastructure */
128 static void rtas_slot_error_detail(struct pci_dn
*pdn
, int severity
,
129 char *driver_log
, size_t loglen
)
135 /* Log the error with the rtas logger */
136 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
137 memset(slot_errbuf
, 0, eeh_error_buf_size
);
139 /* Use PE configuration address, if present */
140 config_addr
= pdn
->eeh_config_addr
;
141 if (pdn
->eeh_pe_config_addr
)
142 config_addr
= pdn
->eeh_pe_config_addr
;
144 rc
= rtas_call(ibm_slot_error_detail
,
145 8, 1, NULL
, config_addr
,
146 BUID_HI(pdn
->phb
->buid
),
147 BUID_LO(pdn
->phb
->buid
),
148 virt_to_phys(driver_log
), loglen
,
149 virt_to_phys(slot_errbuf
),
154 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
155 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
159 * gather_pci_data - copy assorted PCI config space registers to buff
160 * @pdn: device to report data for
161 * @buf: point to buffer in which to log
162 * @len: amount of room in buffer
164 * This routine captures assorted PCI configuration space data,
165 * and puts them into a buffer for RTAS error logging.
167 static size_t gather_pci_data(struct pci_dn
*pdn
, char * buf
, size_t len
)
173 n
+= scnprintf(buf
+n
, len
-n
, "%s\n", pdn
->node
->full_name
);
174 printk(KERN_WARNING
"EEH: of node=%s\n", pdn
->node
->full_name
);
176 rtas_read_config(pdn
, PCI_VENDOR_ID
, 4, &cfg
);
177 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
178 printk(KERN_WARNING
"EEH: PCI device/vendor: %08x\n", cfg
);
180 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cfg
);
181 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
182 printk(KERN_WARNING
"EEH: PCI cmd/status register: %08x\n", cfg
);
184 /* Dump out the PCI-X command and status regs */
185 cap
= pci_find_capability(pdn
->pcidev
, PCI_CAP_ID_PCIX
);
187 rtas_read_config(pdn
, cap
, 4, &cfg
);
188 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
189 printk(KERN_WARNING
"EEH: PCI-X cmd: %08x\n", cfg
);
191 rtas_read_config(pdn
, cap
+4, 4, &cfg
);
192 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
193 printk(KERN_WARNING
"EEH: PCI-X status: %08x\n", cfg
);
196 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
197 cap
= pci_find_capability(pdn
->pcidev
, PCI_CAP_ID_EXP
);
199 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
201 "EEH: PCI-E capabilities and status follow:\n");
203 for (i
=0; i
<=8; i
++) {
204 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
205 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
206 printk(KERN_WARNING
"EEH: PCI-E %02x: %08x\n", i
, cfg
);
209 cap
= pci_find_ext_capability(pdn
->pcidev
,PCI_EXT_CAP_ID_ERR
);
211 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
213 "EEH: PCI-E AER capability register set follows:\n");
215 for (i
=0; i
<14; i
++) {
216 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
217 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
218 printk(KERN_WARNING
"EEH: PCI-E AER %02x: %08x\n", i
, cfg
);
225 void eeh_slot_error_detail(struct pci_dn
*pdn
, int severity
)
230 rtas_pci_enable(pdn
, EEH_THAW_MMIO
);
231 loglen
= gather_pci_data(pdn
, pci_regs_buf
, EEH_PCI_REGS_LOG_LEN
);
233 rtas_slot_error_detail(pdn
, severity
, pci_regs_buf
, loglen
);
237 * read_slot_reset_state - Read the reset state of a device node's slot
238 * @dn: device node to read
239 * @rets: array to return results in
241 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
246 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
247 token
= ibm_read_slot_reset_state2
;
250 token
= ibm_read_slot_reset_state
;
251 rets
[2] = 0; /* fake PE Unavailable info */
255 /* Use PE configuration address, if present */
256 config_addr
= pdn
->eeh_config_addr
;
257 if (pdn
->eeh_pe_config_addr
)
258 config_addr
= pdn
->eeh_pe_config_addr
;
260 return rtas_call(token
, 3, outputs
, rets
, config_addr
,
261 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
265 * eeh_wait_for_slot_status - returns error status of slot
266 * @pdn pci device node
267 * @max_wait_msecs maximum number to millisecs to wait
269 * Return negative value if a permanent error, else return
270 * Partition Endpoint (PE) status value.
272 * If @max_wait_msecs is positive, then this routine will
273 * sleep until a valid status can be obtained, or until
274 * the max allowed wait time is exceeded, in which case
278 eeh_wait_for_slot_status(struct pci_dn
*pdn
, int max_wait_msecs
)
285 rc
= read_slot_reset_state(pdn
, rets
);
287 if (rets
[1] == 0) return -1; /* EEH is not supported */
289 if (rets
[0] != 5) return rets
[0]; /* return actual status */
291 if (rets
[2] == 0) return -1; /* permanently unavailable */
293 if (max_wait_msecs
<= 0) return -1;
298 "EEH: Firmware returned bad wait value=%d\n", mwait
);
300 } else if (mwait
> 300*1000) {
302 "EEH: Firmware is taking too long, time=%d\n", mwait
);
305 max_wait_msecs
-= mwait
;
309 printk(KERN_WARNING
"EEH: Timed out waiting for slot status\n");
314 * eeh_token_to_phys - convert EEH address token to phys address
315 * @token i/o token, should be address in the form 0xA....
317 static inline unsigned long eeh_token_to_phys(unsigned long token
)
322 ptep
= find_linux_pte(init_mm
.pgd
, token
);
325 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
327 return pa
| (token
& (PAGE_SIZE
-1));
331 * Return the "partitionable endpoint" (pe) under which this device lies
333 struct device_node
* find_device_pe(struct device_node
*dn
)
335 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
336 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
342 /** Mark all devices that are peers of this device as failed.
343 * Mark the device driver too, so that it can see the failure
344 * immediately; this is critical, since some drivers poll
345 * status registers in interrupts ... If a driver is polling,
346 * and the slot is frozen, then the driver can deadlock in
347 * an interrupt context, which is bad.
350 static void __eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
354 /* Mark the pci device driver too */
355 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
357 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
359 if (dev
&& dev
->driver
)
360 dev
->error_state
= pci_channel_io_frozen
;
363 __eeh_mark_slot (dn
->child
, mode_flag
);
369 void eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
372 dn
= find_device_pe (dn
);
374 /* Back up one, since config addrs might be shared */
375 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
378 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
380 /* Mark the pci device too */
381 dev
= PCI_DN(dn
)->pcidev
;
383 dev
->error_state
= pci_channel_io_frozen
;
385 __eeh_mark_slot (dn
->child
, mode_flag
);
388 static void __eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
392 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
393 PCI_DN(dn
)->eeh_check_count
= 0;
395 __eeh_clear_slot (dn
->child
, mode_flag
);
401 void eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
404 spin_lock_irqsave(&confirm_error_lock
, flags
);
406 dn
= find_device_pe (dn
);
408 /* Back up one, since config addrs might be shared */
409 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
412 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
413 PCI_DN(dn
)->eeh_check_count
= 0;
414 __eeh_clear_slot (dn
->child
, mode_flag
);
415 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
419 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
421 * @dev pci device, if known
423 * Check for an EEH failure for the given device node. Call this
424 * routine if the result of a read was all 0xff's and you want to
425 * find out if this is due to an EEH slot freeze. This routine
426 * will query firmware for the EEH status.
428 * Returns 0 if there has not been an EEH error; otherwise returns
429 * a non-zero value and queues up a slot isolation event notification.
431 * It is safe to call this routine in an interrupt context.
433 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
443 if (!eeh_subsystem_enabled
)
452 /* Access to IO BARs might get this far and still not want checking. */
453 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
454 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
457 printk ("EEH:ignored check (%x) for %s %s\n",
458 pdn
->eeh_mode
, pci_name (dev
), dn
->full_name
);
463 if (!pdn
->eeh_config_addr
&& !pdn
->eeh_pe_config_addr
) {
468 /* If we already have a pending isolation event for this
469 * slot, we know it's bad already, we don't need to check.
470 * Do this checking under a lock; as multiple PCI devices
471 * in one slot might report errors simultaneously, and we
472 * only want one error recovery routine running.
474 spin_lock_irqsave(&confirm_error_lock
, flags
);
476 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
477 pdn
->eeh_check_count
++;
478 if (pdn
->eeh_check_count
>= EEH_MAX_FAILS
) {
479 printk (KERN_ERR
"EEH: Device driver ignored %d bad reads, panicing\n",
480 pdn
->eeh_check_count
);
484 /* re-read the slot reset state */
485 if (read_slot_reset_state(pdn
, rets
) != 0)
486 rets
[0] = -1; /* reset state unknown */
488 /* If we are here, then we hit an infinite loop. Stop. */
489 panic("EEH: MMIO halt (%d) on device:%s\n", rets
[0], pci_name(dev
));
495 * Now test for an EEH failure. This is VERY expensive.
496 * Note that the eeh_config_addr may be a parent device
497 * in the case of a device behind a bridge, or it may be
498 * function zero of a multi-function device.
499 * In any case they must share a common PHB.
501 ret
= read_slot_reset_state(pdn
, rets
);
503 /* If the call to firmware failed, punt */
505 printk(KERN_WARNING
"EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
512 /* Note that config-io to empty slots may fail;
513 * they are empty when they don't have children. */
514 if ((rets
[0] == 5) && (dn
->child
== NULL
)) {
520 /* If EEH is not supported on this device, punt. */
522 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
529 /* If not the kind of error we know about, punt. */
530 if (rets
[0] != 1 && rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
538 /* Avoid repeated reports of this failure, including problems
539 * with other functions on this device, and functions under
541 eeh_mark_slot (dn
, EEH_MODE_ISOLATED
);
542 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
544 eeh_send_failure_event (dn
, dev
);
546 /* Most EEH events are due to device driver bugs. Having
547 * a stack trace will help the device-driver authors figure
548 * out what happened. So print that out. */
553 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
557 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
560 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
561 * @token i/o token, should be address in the form 0xA....
562 * @val value, should be all 1's (XXX why do we need this arg??)
564 * Check for an EEH failure at the given token address. Call this
565 * routine if the result of a read was all 0xff's and you want to
566 * find out if this is due to an EEH slot freeze event. This routine
567 * will query firmware for the EEH status.
569 * Note this routine is safe to call in an interrupt context.
571 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
575 struct device_node
*dn
;
577 /* Finding the phys addr + pci device; this is pretty quick. */
578 addr
= eeh_token_to_phys((unsigned long __force
) token
);
579 dev
= pci_get_device_by_addr(addr
);
585 dn
= pci_device_to_OF_node(dev
);
586 eeh_dn_check_failure (dn
, dev
);
592 EXPORT_SYMBOL(eeh_check_failure
);
594 /* ------------------------------------------------------------- */
595 /* The code below deals with error recovery */
598 * rtas_pci_enable - enable MMIO or DMA transfers for this slot
599 * @pdn pci device node
603 rtas_pci_enable(struct pci_dn
*pdn
, int function
)
608 /* Use PE configuration address, if present */
609 config_addr
= pdn
->eeh_config_addr
;
610 if (pdn
->eeh_pe_config_addr
)
611 config_addr
= pdn
->eeh_pe_config_addr
;
613 rc
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
615 BUID_HI(pdn
->phb
->buid
),
616 BUID_LO(pdn
->phb
->buid
),
620 printk(KERN_WARNING
"EEH: Unexpected state change %d, err=%d dn=%s\n",
621 function
, rc
, pdn
->node
->full_name
);
623 rc
= eeh_wait_for_slot_status (pdn
, PCI_BUS_RESET_WAIT_MSEC
);
624 if ((rc
== 4) && (function
== EEH_THAW_MMIO
))
631 * rtas_pci_slot_reset - raises/lowers the pci #RST line
632 * @pdn pci device node
633 * @state: 1/0 to raise/lower the #RST
635 * Clear the EEH-frozen condition on a slot. This routine
636 * asserts the PCI #RST line if the 'state' argument is '1',
637 * and drops the #RST line if 'state is '0'. This routine is
638 * safe to call in an interrupt context.
643 rtas_pci_slot_reset(struct pci_dn
*pdn
, int state
)
651 printk (KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
652 pdn
->node
->full_name
);
656 /* Use PE configuration address, if present */
657 config_addr
= pdn
->eeh_config_addr
;
658 if (pdn
->eeh_pe_config_addr
)
659 config_addr
= pdn
->eeh_pe_config_addr
;
661 rc
= rtas_call(ibm_set_slot_reset
,4,1, NULL
,
663 BUID_HI(pdn
->phb
->buid
),
664 BUID_LO(pdn
->phb
->buid
),
667 printk (KERN_WARNING
"EEH: Unable to reset the failed slot,"
668 " (%d) #RST=%d dn=%s\n",
669 rc
, state
, pdn
->node
->full_name
);
673 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
674 * @dev: pci device struct
675 * @state: reset state to enter
680 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
682 struct device_node
*dn
= pci_device_to_OF_node(dev
);
683 struct pci_dn
*pdn
= PCI_DN(dn
);
686 case pcie_deassert_reset
:
687 rtas_pci_slot_reset(pdn
, 0);
690 rtas_pci_slot_reset(pdn
, 1);
692 case pcie_warm_reset
:
693 rtas_pci_slot_reset(pdn
, 3);
703 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
704 * @pdn: pci device node to be reset.
706 * Return 0 if success, else a non-zero value.
709 static void __rtas_set_slot_reset(struct pci_dn
*pdn
)
711 rtas_pci_slot_reset (pdn
, 1);
713 /* The PCI bus requires that the reset be held high for at least
714 * a 100 milliseconds. We wait a bit longer 'just in case'. */
716 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
717 msleep (PCI_BUS_RST_HOLD_TIME_MSEC
);
719 /* We might get hit with another EEH freeze as soon as the
720 * pci slot reset line is dropped. Make sure we don't miss
721 * these, and clear the flag now. */
722 eeh_clear_slot (pdn
->node
, EEH_MODE_ISOLATED
);
724 rtas_pci_slot_reset (pdn
, 0);
726 /* After a PCI slot has been reset, the PCI Express spec requires
727 * a 1.5 second idle time for the bus to stabilize, before starting
729 #define PCI_BUS_SETTLE_TIME_MSEC 1800
730 msleep (PCI_BUS_SETTLE_TIME_MSEC
);
733 int rtas_set_slot_reset(struct pci_dn
*pdn
)
737 /* Take three shots at resetting the bus */
738 for (i
=0; i
<3; i
++) {
739 __rtas_set_slot_reset(pdn
);
741 rc
= eeh_wait_for_slot_status(pdn
, PCI_BUS_RESET_WAIT_MSEC
);
746 printk (KERN_ERR
"EEH: unrecoverable slot failure %s\n",
747 pdn
->node
->full_name
);
750 printk (KERN_ERR
"EEH: bus reset %d failed on slot %s\n",
751 i
+1, pdn
->node
->full_name
);
757 /* ------------------------------------------------------- */
758 /** Save and restore of PCI BARs
760 * Although firmware will set up BARs during boot, it doesn't
761 * set up device BAR's after a device reset, although it will,
762 * if requested, set up bridge configuration. Thus, we need to
763 * configure the PCI devices ourselves.
767 * __restore_bars - Restore the Base Address Registers
768 * @pdn: pci device node
770 * Loads the PCI configuration space base address registers,
771 * the expansion ROM base address, the latency timer, and etc.
772 * from the saved values in the device node.
774 static inline void __restore_bars (struct pci_dn
*pdn
)
778 if (NULL
==pdn
->phb
) return;
779 for (i
=4; i
<10; i
++) {
780 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
783 /* 12 == Expansion ROM Address */
784 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
786 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
787 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
789 rtas_write_config (pdn
, PCI_CACHE_LINE_SIZE
, 1,
790 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
792 rtas_write_config (pdn
, PCI_LATENCY_TIMER
, 1,
793 SAVED_BYTE(PCI_LATENCY_TIMER
));
795 /* max latency, min grant, interrupt pin and line */
796 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
800 * eeh_restore_bars - restore the PCI config space info
802 * This routine performs a recursive walk to the children
803 * of this device as well.
805 void eeh_restore_bars(struct pci_dn
*pdn
)
807 struct device_node
*dn
;
811 if ((pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) && !IS_BRIDGE(pdn
->class_code
))
812 __restore_bars (pdn
);
814 dn
= pdn
->node
->child
;
816 eeh_restore_bars (PCI_DN(dn
));
822 * eeh_save_bars - save device bars
824 * Save the values of the device bars. Unlike the restore
825 * routine, this routine is *not* recursive. This is because
826 * PCI devices are added individuallly; but, for the restore,
827 * an entire slot is reset at a time.
829 static void eeh_save_bars(struct pci_dn
*pdn
)
836 for (i
= 0; i
< 16; i
++)
837 rtas_read_config(pdn
, i
* 4, 4, &pdn
->config_space
[i
]);
841 rtas_configure_bridge(struct pci_dn
*pdn
)
846 /* Use PE configuration address, if present */
847 config_addr
= pdn
->eeh_config_addr
;
848 if (pdn
->eeh_pe_config_addr
)
849 config_addr
= pdn
->eeh_pe_config_addr
;
851 rc
= rtas_call(ibm_configure_bridge
,3,1, NULL
,
853 BUID_HI(pdn
->phb
->buid
),
854 BUID_LO(pdn
->phb
->buid
));
856 printk (KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
857 rc
, pdn
->node
->full_name
);
861 /* ------------------------------------------------------------- */
862 /* The code below deals with enabling EEH for devices during the
863 * early boot sequence. EEH must be enabled before any PCI probing
869 struct eeh_early_enable_info
{
870 unsigned int buid_hi
;
871 unsigned int buid_lo
;
874 static int get_pe_addr (int config_addr
,
875 struct eeh_early_enable_info
*info
)
877 unsigned int rets
[3];
880 /* Use latest config-addr token on power6 */
881 if (ibm_get_config_addr_info2
!= RTAS_UNKNOWN_SERVICE
) {
882 /* Make sure we have a PE in hand */
883 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
884 config_addr
, info
->buid_hi
, info
->buid_lo
, 1);
885 if (ret
|| (rets
[0]==0))
888 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
889 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
895 /* Use older config-addr token on power5 */
896 if (ibm_get_config_addr_info
!= RTAS_UNKNOWN_SERVICE
) {
897 ret
= rtas_call (ibm_get_config_addr_info
, 4, 2, rets
,
898 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
906 /* Enable eeh for the given device node. */
907 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
909 unsigned int rets
[3];
910 struct eeh_early_enable_info
*info
= data
;
912 const char *status
= of_get_property(dn
, "status", NULL
);
913 const u32
*class_code
= of_get_property(dn
, "class-code", NULL
);
914 const u32
*vendor_id
= of_get_property(dn
, "vendor-id", NULL
);
915 const u32
*device_id
= of_get_property(dn
, "device-id", NULL
);
918 struct pci_dn
*pdn
= PCI_DN(dn
);
922 pdn
->eeh_check_count
= 0;
923 pdn
->eeh_freeze_count
= 0;
925 if (status
&& strcmp(status
, "ok") != 0)
926 return NULL
; /* ignore devices with bad status */
928 /* Ignore bad nodes. */
929 if (!class_code
|| !vendor_id
|| !device_id
)
932 /* There is nothing to check on PCI to ISA bridges */
933 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
934 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
937 pdn
->class_code
= *class_code
;
940 * Now decide if we are going to "Disable" EEH checking
941 * for this device. We still run with the EEH hardware active,
942 * but we won't be checking for ff's. This means a driver
943 * could return bad data (very bad!), an interrupt handler could
944 * hang waiting on status bits that won't change, etc.
945 * But there are a few cases like display devices that make sense.
947 enable
= 1; /* i.e. we will do checking */
949 if ((*class_code
>> 16) == PCI_BASE_CLASS_DISPLAY
)
954 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
956 /* Ok... see if this device supports EEH. Some do, some don't,
957 * and the only way to find out is to check each and every one. */
958 regs
= of_get_property(dn
, "reg", NULL
);
960 /* First register entry is addr (00BBSS00) */
961 /* Try to enable eeh */
962 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
963 regs
[0], info
->buid_hi
, info
->buid_lo
,
968 pdn
->eeh_config_addr
= regs
[0];
970 /* If the newer, better, ibm,get-config-addr-info is supported,
971 * then use that instead. */
972 pdn
->eeh_pe_config_addr
= get_pe_addr(pdn
->eeh_config_addr
, info
);
974 /* Some older systems (Power4) allow the
975 * ibm,set-eeh-option call to succeed even on nodes
976 * where EEH is not supported. Verify support
978 ret
= read_slot_reset_state(pdn
, rets
);
979 if ((ret
== 0) && (rets
[1] == 1))
984 eeh_subsystem_enabled
= 1;
985 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
988 printk(KERN_DEBUG
"EEH: %s: eeh enabled, config=%x pe_config=%x\n",
989 dn
->full_name
, pdn
->eeh_config_addr
, pdn
->eeh_pe_config_addr
);
993 /* This device doesn't support EEH, but it may have an
994 * EEH parent, in which case we mark it as supported. */
995 if (dn
->parent
&& PCI_DN(dn
->parent
)
996 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
997 /* Parent supports EEH. */
998 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
999 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
1004 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
1013 * Initialize EEH by trying to enable it for all of the adapters in the system.
1014 * As a side effect we can determine here if eeh is supported at all.
1015 * Note that we leave EEH on so failed config cycles won't cause a machine
1016 * check. If a user turns off EEH for a particular adapter they are really
1017 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
1018 * grant access to a slot if EEH isn't enabled, and so we always enable
1019 * EEH for all slots/all devices.
1021 * The eeh-force-off option disables EEH checking globally, for all slots.
1022 * Even if force-off is set, the EEH hardware is still enabled, so that
1023 * newer systems can boot.
1025 void __init
eeh_init(void)
1027 struct device_node
*phb
, *np
;
1028 struct eeh_early_enable_info info
;
1030 spin_lock_init(&confirm_error_lock
);
1031 spin_lock_init(&slot_errbuf_lock
);
1033 np
= of_find_node_by_path("/rtas");
1037 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
1038 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
1039 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
1040 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
1041 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
1042 ibm_get_config_addr_info
= rtas_token("ibm,get-config-addr-info");
1043 ibm_get_config_addr_info2
= rtas_token("ibm,get-config-addr-info2");
1044 ibm_configure_bridge
= rtas_token ("ibm,configure-bridge");
1046 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
1049 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
1050 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
1051 eeh_error_buf_size
= 1024;
1053 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
1054 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
1055 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
1056 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
1059 /* Enable EEH for all adapters. Note that eeh requires buid's */
1060 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
1061 phb
= of_find_node_by_name(phb
, "pci")) {
1064 buid
= get_phb_buid(phb
);
1065 if (buid
== 0 || PCI_DN(phb
) == NULL
)
1068 info
.buid_lo
= BUID_LO(buid
);
1069 info
.buid_hi
= BUID_HI(buid
);
1070 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
1073 if (eeh_subsystem_enabled
)
1074 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
1076 printk(KERN_WARNING
"EEH: No capable adapters found\n");
1080 * eeh_add_device_early - enable EEH for the indicated device_node
1081 * @dn: device node for which to set up EEH
1083 * This routine must be used to perform EEH initialization for PCI
1084 * devices that were added after system boot (e.g. hotplug, dlpar).
1085 * This routine must be called before any i/o is performed to the
1086 * adapter (inluding any config-space i/o).
1087 * Whether this actually enables EEH or not for this device depends
1088 * on the CEC architecture, type of the device, on earlier boot
1089 * command-line arguments & etc.
1091 static void eeh_add_device_early(struct device_node
*dn
)
1093 struct pci_controller
*phb
;
1094 struct eeh_early_enable_info info
;
1096 if (!dn
|| !PCI_DN(dn
))
1098 phb
= PCI_DN(dn
)->phb
;
1100 /* USB Bus children of PCI devices will not have BUID's */
1101 if (NULL
== phb
|| 0 == phb
->buid
)
1104 info
.buid_hi
= BUID_HI(phb
->buid
);
1105 info
.buid_lo
= BUID_LO(phb
->buid
);
1106 early_enable_eeh(dn
, &info
);
1109 void eeh_add_device_tree_early(struct device_node
*dn
)
1111 struct device_node
*sib
;
1112 for (sib
= dn
->child
; sib
; sib
= sib
->sibling
)
1113 eeh_add_device_tree_early(sib
);
1114 eeh_add_device_early(dn
);
1116 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1119 * eeh_add_device_late - perform EEH initialization for the indicated pci device
1120 * @dev: pci device for which to set up EEH
1122 * This routine must be used to complete EEH initialization for PCI
1123 * devices that were added after system boot (e.g. hotplug, dlpar).
1125 static void eeh_add_device_late(struct pci_dev
*dev
)
1127 struct device_node
*dn
;
1130 if (!dev
|| !eeh_subsystem_enabled
)
1134 printk(KERN_DEBUG
"EEH: adding device %s\n", pci_name(dev
));
1138 dn
= pci_device_to_OF_node(dev
);
1142 pci_addr_cache_insert_device (dev
);
1145 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1147 struct pci_dev
*dev
;
1149 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1150 eeh_add_device_late(dev
);
1151 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1152 struct pci_bus
*subbus
= dev
->subordinate
;
1154 eeh_add_device_tree_late(subbus
);
1158 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1161 * eeh_remove_device - undo EEH setup for the indicated pci device
1162 * @dev: pci device to be removed
1164 * This routine should be called when a device is removed from
1165 * a running system (e.g. by hotplug or dlpar). It unregisters
1166 * the PCI device from the EEH subsystem. I/O errors affecting
1167 * this device will no longer be detected after this call; thus,
1168 * i/o errors affecting this slot may leave this device unusable.
1170 static void eeh_remove_device(struct pci_dev
*dev
)
1172 struct device_node
*dn
;
1173 if (!dev
|| !eeh_subsystem_enabled
)
1176 /* Unregister the device with the EEH/PCI address search system */
1178 printk(KERN_DEBUG
"EEH: remove device %s\n", pci_name(dev
));
1180 pci_addr_cache_remove_device(dev
);
1182 dn
= pci_device_to_OF_node(dev
);
1183 if (PCI_DN(dn
)->pcidev
) {
1184 PCI_DN(dn
)->pcidev
= NULL
;
1189 void eeh_remove_bus_device(struct pci_dev
*dev
)
1191 struct pci_bus
*bus
= dev
->subordinate
;
1192 struct pci_dev
*child
, *tmp
;
1194 eeh_remove_device(dev
);
1196 if (bus
&& dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1197 list_for_each_entry_safe(child
, tmp
, &bus
->devices
, bus_list
)
1198 eeh_remove_bus_device(child
);
1201 EXPORT_SYMBOL_GPL(eeh_remove_bus_device
);
1203 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1205 if (0 == eeh_subsystem_enabled
) {
1206 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1207 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs
);
1209 seq_printf(m
, "EEH Subsystem is enabled\n");
1212 "no device node=%ld\n"
1213 "no config address=%ld\n"
1214 "check not wanted=%ld\n"
1215 "eeh_total_mmio_ffs=%ld\n"
1216 "eeh_false_positives=%ld\n"
1217 "eeh_ignored_failures=%ld\n"
1218 "eeh_slot_resets=%ld\n",
1219 no_device
, no_dn
, no_cfg_addr
,
1220 ignored_check
, total_mmio_ffs
,
1221 false_positives
, ignored_failures
,
1228 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1230 return single_open(file
, proc_eeh_show
, NULL
);
1233 static const struct file_operations proc_eeh_operations
= {
1234 .open
= proc_eeh_open
,
1236 .llseek
= seq_lseek
,
1237 .release
= single_release
,
1240 static int __init
eeh_init_proc(void)
1242 struct proc_dir_entry
*e
;
1244 if (machine_is(pseries
)) {
1245 e
= create_proc_entry("ppc64/eeh", 0, NULL
);
1247 e
->proc_fops
= &proc_eeh_operations
;
1252 __initcall(eeh_init_proc
);