arch/powerpc/platforms/powernv/smp.c

   1 /*
   2  * SMP support for PowerNV machines.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/smp.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/init.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/cpu.h>
  21
  22 #include <asm/irq.h>
  23 #include <asm/smp.h>
  24 #include <asm/paca.h>
  25 #include <asm/machdep.h>
  26 #include <asm/cputable.h>
  27 #include <asm/firmware.h>
  28 #include <asm/rtas.h>
  29 #include <asm/vdso_datapage.h>
  30 #include <asm/cputhreads.h>
  31 #include <asm/xics.h>
  32 #include <asm/opal.h>
  33
  34 #include "powernv.h"
  35
  36 #ifdef DEBUG
  37 #include <asm/udbg.h>
  38 #define DBG(fmt...) udbg_printf(fmt)
  39 #else
  40 #define DBG(fmt...)
  41 #endif
  42
  43 static void __cpuinit pnv_smp_setup_cpu(int cpu)
  44 {
  45         if (cpu != boot_cpuid)
  46                 xics_setup_cpu();
  47 }
  48
  49 static int pnv_smp_cpu_bootable(unsigned int nr)
  50 {
  51         /* Special case - we inhibit secondary thread startup
  52          * during boot if the user requests it.
  53          */
  54         if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
  55                 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
  56                         return 0;
  57                 if (smt_enabled_at_boot
  58                     && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
  59                         return 0;
  60         }
  61
  62         return 1;
  63 }
  64
  65 int pnv_smp_kick_cpu(int nr)
  66 {
  67         unsigned int pcpu = get_hard_smp_processor_id(nr);
  68         unsigned long start_here = __pa(*((unsigned long *)
  69                                           generic_secondary_smp_init));
  70         long rc;
  71
  72         BUG_ON(nr < 0 || nr >= NR_CPUS);
  73
  74         /*
  75          * If we already started or OPALv2 is not supported, we just
  76          * kick the CPU via the PACA
  77          */
  78         if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
  79                 goto kick;
  80
  81         /*
  82          * At this point, the CPU can either be spinning on the way in
  83          * from kexec or be inside OPAL waiting to be started for the
  84          * first time. OPAL v3 allows us to query OPAL to know if it
  85          * has the CPUs, so we do that
  86          */
  87         if (firmware_has_feature(FW_FEATURE_OPALv3)) {
  88                 uint8_t status;
  89
  90                 rc = opal_query_cpu_status(pcpu, &status);
  91                 if (rc != OPAL_SUCCESS) {
  92                         pr_warn("OPAL Error %ld querying CPU %d state\n",
  93                                 rc, nr);
  94                         return -ENODEV;
  95                 }
  96
  97                 /*
  98                  * Already started, just kick it, probably coming from
  99                  * kexec and spinning
 100                  */
 101                 if (status == OPAL_THREAD_STARTED)
 102                         goto kick;
 103
 104                 /*
 105                  * Available/inactive, let's kick it
 106                  */
 107                 if (status == OPAL_THREAD_INACTIVE) {
 108                         pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
 109                                  nr, pcpu);
 110                         rc = opal_start_cpu(pcpu, start_here);
 111                         if (rc != OPAL_SUCCESS) {
 112                                 pr_warn("OPAL Error %ld starting CPU %d\n",
 113                                         rc, nr);
 114                                 return -ENODEV;
 115                         }
 116                 } else {
 117                         /*
 118                          * An unavailable CPU (or any other unknown status)
 119                          * shouldn't be started. It should also
 120                          * not be in the possible map but currently it can
 121                          * happen
 122                          */
 123                         pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
 124                                  " (status %d)...\n", nr, pcpu, status);
 125                         return -ENODEV;
 126                 }
 127         } else {
 128                 /*
 129                  * On OPAL v2, we just kick it and hope for the best,
 130                  * we must not test the error from opal_start_cpu() or
 131                  * we would fail to get CPUs from kexec.
 132                  */
 133                 opal_start_cpu(pcpu, start_here);
 134         }
 135  kick:
 136         return smp_generic_kick_cpu(nr);
 137 }
 138
 139 #ifdef CONFIG_HOTPLUG_CPU
 140
 141 static int pnv_smp_cpu_disable(void)
 142 {
 143         int cpu = smp_processor_id();
 144
 145         /* This is identical to pSeries... might consolidate by
 146          * moving migrate_irqs_away to a ppc_md with default to
 147          * the generic fixup_irqs. --BenH.
 148          */
 149         set_cpu_online(cpu, false);
 150         vdso_data->processorCount--;
 151         if (cpu == boot_cpuid)
 152                 boot_cpuid = cpumask_any(cpu_online_mask);
 153         xics_migrate_irqs_away();
 154         return 0;
 155 }
 156
 157 static void pnv_smp_cpu_kill_self(void)
 158 {
 159         unsigned int cpu;
 160
 161         /* Standard hot unplug procedure */
 162         local_irq_disable();
 163         idle_task_exit();
 164         current->active_mm = NULL; /* for sanity */
 165         cpu = smp_processor_id();
 166         DBG("CPU%d offline\n", cpu);
 167         generic_set_cpu_dead(cpu);
 168         smp_wmb();
 169
 170         /* We don't want to take decrementer interrupts while we are offline,
 171          * so clear LPCR:PECE1. We keep PECE2 enabled.
 172          */
 173         mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
 174         while (!generic_check_cpu_restart(cpu)) {
 175                 power7_nap();
 176                 if (!generic_check_cpu_restart(cpu)) {
 177                         DBG("CPU%d Unexpected exit while offline !\n", cpu);
 178                         /* We may be getting an IPI, so we re-enable
 179                          * interrupts to process it, it will be ignored
 180                          * since we aren't online (hopefully)
 181                          */
 182                         local_irq_enable();
 183                         local_irq_disable();
 184                 }
 185         }
 186         mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
 187         DBG("CPU%d coming online...\n", cpu);
 188 }
 189
 190 #endif /* CONFIG_HOTPLUG_CPU */
 191
 192 static struct smp_ops_t pnv_smp_ops = {
 193         .message_pass   = smp_muxed_ipi_message_pass,
 194         .cause_ipi      = NULL, /* Filled at runtime by xics_smp_probe() */
 195         .probe          = xics_smp_probe,
 196         .kick_cpu       = pnv_smp_kick_cpu,
 197         .setup_cpu      = pnv_smp_setup_cpu,
 198         .cpu_bootable   = pnv_smp_cpu_bootable,
 199 #ifdef CONFIG_HOTPLUG_CPU
 200         .cpu_disable    = pnv_smp_cpu_disable,
 201         .cpu_die        = generic_cpu_die,
 202 #endif /* CONFIG_HOTPLUG_CPU */
 203 };
 204
 205 /* This is called very early during platform setup_arch */
 206 void __init pnv_smp_init(void)
 207 {
 208         smp_ops = &pnv_smp_ops;
 209
 210         /* XXX We don't yet have a proper entry point from HAL, for
 211          * now we rely on kexec-style entry from BML
 212          */
 213
 214 #ifdef CONFIG_PPC_RTAS
 215         /* Non-lpar has additional take/give timebase */
 216         if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
 217                 smp_ops->give_timebase = rtas_give_timebase;
 218                 smp_ops->take_timebase = rtas_take_timebase;
 219         }
 220 #endif /* CONFIG_PPC_RTAS */
 221
 222 #ifdef CONFIG_HOTPLUG_CPU
 223         ppc_md.cpu_die  = pnv_smp_cpu_kill_self;
 224 #endif
 225 }