1e9eba175ff0d0300b62bbb957132b8bae3ef00e
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / platforms / powermac / cpufreq_32.c
1 /*
2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * TODO: Need a big cleanup here. Basically, we need to have different
10 * cpufreq_driver structures for the different type of HW instead of the
11 * current mess. We also need to better deal with the detection of the
12 * type of machine.
13 *
14 */
15
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <linux/adb.h>
23 #include <linux/pmu.h>
24 #include <linux/cpufreq.h>
25 #include <linux/init.h>
26 #include <linux/sysdev.h>
27 #include <linux/hardirq.h>
28 #include <asm/prom.h>
29 #include <asm/machdep.h>
30 #include <asm/irq.h>
31 #include <asm/pmac_feature.h>
32 #include <asm/mmu_context.h>
33 #include <asm/sections.h>
34 #include <asm/cputable.h>
35 #include <asm/time.h>
36 #include <asm/system.h>
37 #include <asm/mpic.h>
38 #include <asm/keylargo.h>
39
40 /* WARNING !!! This will cause calibrate_delay() to be called,
41 * but this is an __init function ! So you MUST go edit
42 * init/main.c to make it non-init before enabling DEBUG_FREQ
43 */
44 #undef DEBUG_FREQ
45
46 extern void low_choose_7447a_dfs(int dfs);
47 extern void low_choose_750fx_pll(int pll);
48 extern void low_sleep_handler(void);
49
50 /*
51 * Currently, PowerMac cpufreq supports only high & low frequencies
52 * that are set by the firmware
53 */
54 static unsigned int low_freq;
55 static unsigned int hi_freq;
56 static unsigned int cur_freq;
57 static unsigned int sleep_freq;
58
59 /*
60 * Different models uses different mechanisms to switch the frequency
61 */
62 static int (*set_speed_proc)(int low_speed);
63 static unsigned int (*get_speed_proc)(void);
64
65 /*
66 * Some definitions used by the various speedprocs
67 */
68 static u32 voltage_gpio;
69 static u32 frequency_gpio;
70 static u32 slew_done_gpio;
71 static int no_schedule;
72 static int has_cpu_l2lve;
73 static int is_pmu_based;
74
75 /* There are only two frequency states for each processor. Values
76 * are in kHz for the time being.
77 */
78 #define CPUFREQ_HIGH 0
79 #define CPUFREQ_LOW 1
80
81 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
82 {CPUFREQ_HIGH, 0},
83 {CPUFREQ_LOW, 0},
84 {0, CPUFREQ_TABLE_END},
85 };
86
87 static struct freq_attr* pmac_cpu_freqs_attr[] = {
88 &cpufreq_freq_attr_scaling_available_freqs,
89 NULL,
90 };
91
92 static inline void local_delay(unsigned long ms)
93 {
94 if (no_schedule)
95 mdelay(ms);
96 else
97 msleep(ms);
98 }
99
100 #ifdef DEBUG_FREQ
101 static inline void debug_calc_bogomips(void)
102 {
103 /* This will cause a recalc of bogomips and display the
104 * result. We backup/restore the value to avoid affecting the
105 * core cpufreq framework's own calculation.
106 */
107 unsigned long save_lpj = loops_per_jiffy;
108 calibrate_delay();
109 loops_per_jiffy = save_lpj;
110 }
111 #endif /* DEBUG_FREQ */
112
113 /* Switch CPU speed under 750FX CPU control
114 */
115 static int cpu_750fx_cpu_speed(int low_speed)
116 {
117 u32 hid2;
118
119 if (low_speed == 0) {
120 /* ramping up, set voltage first */
121 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
122 /* Make sure we sleep for at least 1ms */
123 local_delay(10);
124
125 /* tweak L2 for high voltage */
126 if (has_cpu_l2lve) {
127 hid2 = mfspr(SPRN_HID2);
128 hid2 &= ~0x2000;
129 mtspr(SPRN_HID2, hid2);
130 }
131 }
132 #ifdef CONFIG_6xx
133 low_choose_750fx_pll(low_speed);
134 #endif
135 if (low_speed == 1) {
136 /* tweak L2 for low voltage */
137 if (has_cpu_l2lve) {
138 hid2 = mfspr(SPRN_HID2);
139 hid2 |= 0x2000;
140 mtspr(SPRN_HID2, hid2);
141 }
142
143 /* ramping down, set voltage last */
144 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
145 local_delay(10);
146 }
147
148 return 0;
149 }
150
151 static unsigned int cpu_750fx_get_cpu_speed(void)
152 {
153 if (mfspr(SPRN_HID1) & HID1_PS)
154 return low_freq;
155 else
156 return hi_freq;
157 }
158
159 /* Switch CPU speed using DFS */
160 static int dfs_set_cpu_speed(int low_speed)
161 {
162 if (low_speed == 0) {
163 /* ramping up, set voltage first */
164 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
165 /* Make sure we sleep for at least 1ms */
166 local_delay(1);
167 }
168
169 /* set frequency */
170 #ifdef CONFIG_6xx
171 low_choose_7447a_dfs(low_speed);
172 #endif
173 udelay(100);
174
175 if (low_speed == 1) {
176 /* ramping down, set voltage last */
177 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
178 local_delay(1);
179 }
180
181 return 0;
182 }
183
184 static unsigned int dfs_get_cpu_speed(void)
185 {
186 if (mfspr(SPRN_HID1) & HID1_DFS)
187 return low_freq;
188 else
189 return hi_freq;
190 }
191
192
193 /* Switch CPU speed using slewing GPIOs
194 */
195 static int gpios_set_cpu_speed(int low_speed)
196 {
197 int gpio, timeout = 0;
198
199 /* If ramping up, set voltage first */
200 if (low_speed == 0) {
201 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
202 /* Delay is way too big but it's ok, we schedule */
203 local_delay(10);
204 }
205
206 /* Set frequency */
207 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
208 if (low_speed == ((gpio & 0x01) == 0))
209 goto skip;
210
211 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
212 low_speed ? 0x04 : 0x05);
213 udelay(200);
214 do {
215 if (++timeout > 100)
216 break;
217 local_delay(1);
218 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
219 } while((gpio & 0x02) == 0);
220 skip:
221 /* If ramping down, set voltage last */
222 if (low_speed == 1) {
223 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
224 /* Delay is way too big but it's ok, we schedule */
225 local_delay(10);
226 }
227
228 #ifdef DEBUG_FREQ
229 debug_calc_bogomips();
230 #endif
231
232 return 0;
233 }
234
235 /* Switch CPU speed under PMU control
236 */
237 static int pmu_set_cpu_speed(int low_speed)
238 {
239 struct adb_request req;
240 unsigned long save_l2cr;
241 unsigned long save_l3cr;
242 unsigned int pic_prio;
243 unsigned long flags;
244
245 preempt_disable();
246
247 #ifdef DEBUG_FREQ
248 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
249 #endif
250 pmu_suspend();
251
252 /* Disable all interrupt sources on openpic */
253 pic_prio = mpic_cpu_get_priority();
254 mpic_cpu_set_priority(0xf);
255
256 /* Make sure the decrementer won't interrupt us */
257 asm volatile("mtdec %0" : : "r" (0x7fffffff));
258 /* Make sure any pending DEC interrupt occurring while we did
259 * the above didn't re-enable the DEC */
260 mb();
261 asm volatile("mtdec %0" : : "r" (0x7fffffff));
262
263 /* We can now disable MSR_EE */
264 local_irq_save(flags);
265
266 /* Giveup the FPU & vec */
267 enable_kernel_fp();
268
269 #ifdef CONFIG_ALTIVEC
270 if (cpu_has_feature(CPU_FTR_ALTIVEC))
271 enable_kernel_altivec();
272 #endif /* CONFIG_ALTIVEC */
273
274 /* Save & disable L2 and L3 caches */
275 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
276 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
277
278 /* Send the new speed command. My assumption is that this command
279 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
280 */
281 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
282 while (!req.complete)
283 pmu_poll();
284
285 /* Prepare the northbridge for the speed transition */
286 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
287
288 /* Call low level code to backup CPU state and recover from
289 * hardware reset
290 */
291 low_sleep_handler();
292
293 /* Restore the northbridge */
294 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
295
296 /* Restore L2 cache */
297 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
298 _set_L2CR(save_l2cr);
299 /* Restore L3 cache */
300 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
301 _set_L3CR(save_l3cr);
302
303 /* Restore userland MMU context */
304 switch_mmu_context(NULL, current->active_mm);
305
306 #ifdef DEBUG_FREQ
307 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
308 #endif
309
310 /* Restore low level PMU operations */
311 pmu_unlock();
312
313 /* Restore decrementer */
314 wakeup_decrementer();
315
316 /* Restore interrupts */
317 mpic_cpu_set_priority(pic_prio);
318
319 /* Let interrupts flow again ... */
320 local_irq_restore(flags);
321
322 #ifdef DEBUG_FREQ
323 debug_calc_bogomips();
324 #endif
325
326 pmu_resume();
327
328 preempt_enable();
329
330 return 0;
331 }
332
333 static int do_set_cpu_speed(int speed_mode, int notify)
334 {
335 struct cpufreq_freqs freqs;
336 unsigned long l3cr;
337 static unsigned long prev_l3cr;
338
339 freqs.old = cur_freq;
340 freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
341 freqs.cpu = smp_processor_id();
342
343 if (freqs.old == freqs.new)
344 return 0;
345
346 if (notify)
347 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
348 if (speed_mode == CPUFREQ_LOW &&
349 cpu_has_feature(CPU_FTR_L3CR)) {
350 l3cr = _get_L3CR();
351 if (l3cr & L3CR_L3E) {
352 prev_l3cr = l3cr;
353 _set_L3CR(0);
354 }
355 }
356 set_speed_proc(speed_mode == CPUFREQ_LOW);
357 if (speed_mode == CPUFREQ_HIGH &&
358 cpu_has_feature(CPU_FTR_L3CR)) {
359 l3cr = _get_L3CR();
360 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
361 _set_L3CR(prev_l3cr);
362 }
363 if (notify)
364 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
365 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
366
367 return 0;
368 }
369
370 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
371 {
372 return cur_freq;
373 }
374
375 static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
376 {
377 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
378 }
379
380 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
381 unsigned int target_freq,
382 unsigned int relation)
383 {
384 unsigned int newstate = 0;
385 int rc;
386
387 if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
388 target_freq, relation, &newstate))
389 return -EINVAL;
390
391 rc = do_set_cpu_speed(newstate, 1);
392
393 ppc_proc_freq = cur_freq * 1000ul;
394 return rc;
395 }
396
397 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
398 {
399 if (policy->cpu != 0)
400 return -ENODEV;
401
402 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
403 policy->cur = cur_freq;
404
405 cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
406 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
407 }
408
409 static u32 read_gpio(struct device_node *np)
410 {
411 const u32 *reg = of_get_property(np, "reg", NULL);
412 u32 offset;
413
414 if (reg == NULL)
415 return 0;
416 /* That works for all keylargos but shall be fixed properly
417 * some day... The problem is that it seems we can't rely
418 * on the "reg" property of the GPIO nodes, they are either
419 * relative to the base of KeyLargo or to the base of the
420 * GPIO space, and the device-tree doesn't help.
421 */
422 offset = *reg;
423 if (offset < KEYLARGO_GPIO_LEVELS0)
424 offset += KEYLARGO_GPIO_LEVELS0;
425 return offset;
426 }
427
428 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
429 {
430 /* Ok, this could be made a bit smarter, but let's be robust for now. We
431 * always force a speed change to high speed before sleep, to make sure
432 * we have appropriate voltage and/or bus speed for the wakeup process,
433 * and to make sure our loops_per_jiffies are "good enough", that is will
434 * not cause too short delays if we sleep in low speed and wake in high
435 * speed..
436 */
437 no_schedule = 1;
438 sleep_freq = cur_freq;
439 if (cur_freq == low_freq && !is_pmu_based)
440 do_set_cpu_speed(CPUFREQ_HIGH, 0);
441 return 0;
442 }
443
444 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
445 {
446 /* If we resume, first check if we have a get() function */
447 if (get_speed_proc)
448 cur_freq = get_speed_proc();
449 else
450 cur_freq = 0;
451
452 /* We don't, hrm... we don't really know our speed here, best
453 * is that we force a switch to whatever it was, which is
454 * probably high speed due to our suspend() routine
455 */
456 do_set_cpu_speed(sleep_freq == low_freq ?
457 CPUFREQ_LOW : CPUFREQ_HIGH, 0);
458
459 ppc_proc_freq = cur_freq * 1000ul;
460
461 no_schedule = 0;
462 return 0;
463 }
464
465 static struct cpufreq_driver pmac_cpufreq_driver = {
466 .verify = pmac_cpufreq_verify,
467 .target = pmac_cpufreq_target,
468 .get = pmac_cpufreq_get_speed,
469 .init = pmac_cpufreq_cpu_init,
470 .suspend = pmac_cpufreq_suspend,
471 .resume = pmac_cpufreq_resume,
472 .flags = CPUFREQ_PM_NO_WARN,
473 .attr = pmac_cpu_freqs_attr,
474 .name = "powermac",
475 .owner = THIS_MODULE,
476 };
477
478
479 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
480 {
481 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
482 "voltage-gpio");
483 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
484 "frequency-gpio");
485 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
486 "slewing-done");
487 const u32 *value;
488
489 /*
490 * Check to see if it's GPIO driven or PMU only
491 *
492 * The way we extract the GPIO address is slightly hackish, but it
493 * works well enough for now. We need to abstract the whole GPIO
494 * stuff sooner or later anyway
495 */
496
497 if (volt_gpio_np)
498 voltage_gpio = read_gpio(volt_gpio_np);
499 if (freq_gpio_np)
500 frequency_gpio = read_gpio(freq_gpio_np);
501 if (slew_done_gpio_np)
502 slew_done_gpio = read_gpio(slew_done_gpio_np);
503
504 /* If we use the frequency GPIOs, calculate the min/max speeds based
505 * on the bus frequencies
506 */
507 if (frequency_gpio && slew_done_gpio) {
508 int lenp, rc;
509 const u32 *freqs, *ratio;
510
511 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
512 lenp /= sizeof(u32);
513 if (freqs == NULL || lenp != 2) {
514 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
515 return 1;
516 }
517 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
518 NULL);
519 if (ratio == NULL) {
520 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
521 return 1;
522 }
523
524 /* Get the min/max bus frequencies */
525 low_freq = min(freqs[0], freqs[1]);
526 hi_freq = max(freqs[0], freqs[1]);
527
528 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
529 * frequency, it claims it to be around 84Mhz on some models while
530 * it appears to be approx. 101Mhz on all. Let's hack around here...
531 * fortunately, we don't need to be too precise
532 */
533 if (low_freq < 98000000)
534 low_freq = 101000000;
535
536 /* Convert those to CPU core clocks */
537 low_freq = (low_freq * (*ratio)) / 2000;
538 hi_freq = (hi_freq * (*ratio)) / 2000;
539
540 /* Now we get the frequencies, we read the GPIO to see what is out current
541 * speed
542 */
543 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
544 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
545
546 set_speed_proc = gpios_set_cpu_speed;
547 return 1;
548 }
549
550 /* If we use the PMU, look for the min & max frequencies in the
551 * device-tree
552 */
553 value = of_get_property(cpunode, "min-clock-frequency", NULL);
554 if (!value)
555 return 1;
556 low_freq = (*value) / 1000;
557 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
558 * here */
559 if (low_freq < 100000)
560 low_freq *= 10;
561
562 value = of_get_property(cpunode, "max-clock-frequency", NULL);
563 if (!value)
564 return 1;
565 hi_freq = (*value) / 1000;
566 set_speed_proc = pmu_set_cpu_speed;
567 is_pmu_based = 1;
568
569 return 0;
570 }
571
572 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
573 {
574 struct device_node *volt_gpio_np;
575
576 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
577 return 1;
578
579 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
580 if (volt_gpio_np)
581 voltage_gpio = read_gpio(volt_gpio_np);
582 if (!voltage_gpio){
583 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
584 return 1;
585 }
586
587 /* OF only reports the high frequency */
588 hi_freq = cur_freq;
589 low_freq = cur_freq/2;
590
591 /* Read actual frequency from CPU */
592 cur_freq = dfs_get_cpu_speed();
593 set_speed_proc = dfs_set_cpu_speed;
594 get_speed_proc = dfs_get_cpu_speed;
595
596 return 0;
597 }
598
599 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
600 {
601 struct device_node *volt_gpio_np;
602 u32 pvr;
603 const u32 *value;
604
605 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
606 return 1;
607
608 hi_freq = cur_freq;
609 value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
610 if (!value)
611 return 1;
612 low_freq = (*value) / 1000;
613
614 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
615 if (volt_gpio_np)
616 voltage_gpio = read_gpio(volt_gpio_np);
617
618 pvr = mfspr(SPRN_PVR);
619 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
620
621 set_speed_proc = cpu_750fx_cpu_speed;
622 get_speed_proc = cpu_750fx_get_cpu_speed;
623 cur_freq = cpu_750fx_get_cpu_speed();
624
625 return 0;
626 }
627
628 /* Currently, we support the following machines:
629 *
630 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
631 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
632 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
633 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
634 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
635 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
636 * - Recent MacRISC3 laptops
637 * - All new machines with 7447A CPUs
638 */
639 static int __init pmac_cpufreq_setup(void)
640 {
641 struct device_node *cpunode;
642 const u32 *value;
643
644 if (strstr(cmd_line, "nocpufreq"))
645 return 0;
646
647 /* Assume only one CPU */
648 cpunode = of_find_node_by_type(NULL, "cpu");
649 if (!cpunode)
650 goto out;
651
652 /* Get current cpu clock freq */
653 value = of_get_property(cpunode, "clock-frequency", NULL);
654 if (!value)
655 goto out;
656 cur_freq = (*value) / 1000;
657
658 /* Check for 7447A based MacRISC3 */
659 if (of_machine_is_compatible("MacRISC3") &&
660 of_get_property(cpunode, "dynamic-power-step", NULL) &&
661 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
662 pmac_cpufreq_init_7447A(cpunode);
663 /* Check for other MacRISC3 machines */
664 } else if (of_machine_is_compatible("PowerBook3,4") ||
665 of_machine_is_compatible("PowerBook3,5") ||
666 of_machine_is_compatible("MacRISC3")) {
667 pmac_cpufreq_init_MacRISC3(cpunode);
668 /* Else check for iBook2 500/600 */
669 } else if (of_machine_is_compatible("PowerBook4,1")) {
670 hi_freq = cur_freq;
671 low_freq = 400000;
672 set_speed_proc = pmu_set_cpu_speed;
673 is_pmu_based = 1;
674 }
675 /* Else check for TiPb 550 */
676 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
677 hi_freq = cur_freq;
678 low_freq = 500000;
679 set_speed_proc = pmu_set_cpu_speed;
680 is_pmu_based = 1;
681 }
682 /* Else check for TiPb 400 & 500 */
683 else if (of_machine_is_compatible("PowerBook3,2")) {
684 /* We only know about the 400 MHz and the 500Mhz model
685 * they both have 300 MHz as low frequency
686 */
687 if (cur_freq < 350000 || cur_freq > 550000)
688 goto out;
689 hi_freq = cur_freq;
690 low_freq = 300000;
691 set_speed_proc = pmu_set_cpu_speed;
692 is_pmu_based = 1;
693 }
694 /* Else check for 750FX */
695 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
696 pmac_cpufreq_init_750FX(cpunode);
697 out:
698 of_node_put(cpunode);
699 if (set_speed_proc == NULL)
700 return -ENODEV;
701
702 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
703 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
704 ppc_proc_freq = cur_freq * 1000ul;
705
706 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
707 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
708 low_freq/1000, hi_freq/1000, cur_freq/1000);
709
710 return cpufreq_register_driver(&pmac_cpufreq_driver);
711 }
712
713 module_init(pmac_cpufreq_setup);
714