ARM: 7630/1: mmc: mmci: Fixup and cleanup code for DMA handling
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / platforms / cell / smp.c
1 /*
2 * SMP support for BPA machines.
3 *
4 * Dave Engebretsen, Peter Bergner, and
5 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
6 *
7 * Plus various changes from other IBM teams...
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15 #undef DEBUG
16
17 #include <linux/kernel.h>
18 #include <linux/sched.h>
19 #include <linux/smp.h>
20 #include <linux/interrupt.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/cache.h>
25 #include <linux/err.h>
26 #include <linux/device.h>
27 #include <linux/cpu.h>
28
29 #include <asm/ptrace.h>
30 #include <linux/atomic.h>
31 #include <asm/irq.h>
32 #include <asm/page.h>
33 #include <asm/pgtable.h>
34 #include <asm/io.h>
35 #include <asm/prom.h>
36 #include <asm/smp.h>
37 #include <asm/paca.h>
38 #include <asm/machdep.h>
39 #include <asm/cputable.h>
40 #include <asm/firmware.h>
41 #include <asm/rtas.h>
42 #include <asm/cputhreads.h>
43
44 #include "interrupt.h"
45 #include <asm/udbg.h>
46
47 #ifdef DEBUG
48 #define DBG(fmt...) udbg_printf(fmt)
49 #else
50 #define DBG(fmt...)
51 #endif
52
53 /*
54 * The Primary thread of each non-boot processor was started from the OF client
55 * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop.
56 */
57 static cpumask_t of_spin_map;
58
59 /**
60 * smp_startup_cpu() - start the given cpu
61 *
62 * At boot time, there is nothing to do for primary threads which were
63 * started from Open Firmware. For anything else, call RTAS with the
64 * appropriate start location.
65 *
66 * Returns:
67 * 0 - failure
68 * 1 - success
69 */
70 static inline int __devinit smp_startup_cpu(unsigned int lcpu)
71 {
72 int status;
73 unsigned long start_here = __pa((u32)*((unsigned long *)
74 generic_secondary_smp_init));
75 unsigned int pcpu;
76 int start_cpu;
77
78 if (cpumask_test_cpu(lcpu, &of_spin_map))
79 /* Already started by OF and sitting in spin loop */
80 return 1;
81
82 pcpu = get_hard_smp_processor_id(lcpu);
83
84 /* Fixup atomic count: it exited inside IRQ handler. */
85 task_thread_info(paca[lcpu].__current)->preempt_count = 0;
86
87 /*
88 * If the RTAS start-cpu token does not exist then presume the
89 * cpu is already spinning.
90 */
91 start_cpu = rtas_token("start-cpu");
92 if (start_cpu == RTAS_UNKNOWN_SERVICE)
93 return 1;
94
95 status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu);
96 if (status != 0) {
97 printk(KERN_ERR "start-cpu failed: %i\n", status);
98 return 0;
99 }
100
101 return 1;
102 }
103
104 static int __init smp_iic_probe(void)
105 {
106 iic_request_IPIs();
107
108 return cpumask_weight(cpu_possible_mask);
109 }
110
111 static void __devinit smp_cell_setup_cpu(int cpu)
112 {
113 if (cpu != boot_cpuid)
114 iic_setup_cpu();
115
116 /*
117 * change default DABRX to allow user watchpoints
118 */
119 mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
120 }
121
122 static int __devinit smp_cell_kick_cpu(int nr)
123 {
124 BUG_ON(nr < 0 || nr >= NR_CPUS);
125
126 if (!smp_startup_cpu(nr))
127 return -ENOENT;
128
129 /*
130 * The processor is currently spinning, waiting for the
131 * cpu_start field to become non-zero After we set cpu_start,
132 * the processor will continue on to secondary_start
133 */
134 paca[nr].cpu_start = 1;
135
136 return 0;
137 }
138
139 static int smp_cell_cpu_bootable(unsigned int nr)
140 {
141 /* Special case - we inhibit secondary thread startup
142 * during boot if the user requests it. Odd-numbered
143 * cpus are assumed to be secondary threads.
144 */
145 if (system_state < SYSTEM_RUNNING &&
146 cpu_has_feature(CPU_FTR_SMT) &&
147 !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
148 return 0;
149
150 return 1;
151 }
152 static struct smp_ops_t bpa_iic_smp_ops = {
153 .message_pass = iic_message_pass,
154 .probe = smp_iic_probe,
155 .kick_cpu = smp_cell_kick_cpu,
156 .setup_cpu = smp_cell_setup_cpu,
157 .cpu_bootable = smp_cell_cpu_bootable,
158 };
159
160 /* This is called very early */
161 void __init smp_init_cell(void)
162 {
163 int i;
164
165 DBG(" -> smp_init_cell()\n");
166
167 smp_ops = &bpa_iic_smp_ops;
168
169 /* Mark threads which are still spinning in hold loops. */
170 if (cpu_has_feature(CPU_FTR_SMT)) {
171 for_each_present_cpu(i) {
172 if (cpu_thread_in_core(i) == 0)
173 cpumask_set_cpu(i, &of_spin_map);
174 }
175 } else
176 cpumask_copy(&of_spin_map, cpu_present_mask);
177
178 cpumask_clear_cpu(boot_cpuid, &of_spin_map);
179
180 /* Non-lpar has additional take/give timebase */
181 if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
182 smp_ops->give_timebase = rtas_give_timebase;
183 smp_ops->take_timebase = rtas_take_timebase;
184 }
185
186 DBG(" <- smp_init_cell()\n");
187 }