13d1345026daebff6f8e1eb55662157d93aee9f0
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / platforms / 40x / ep405.c
1 /*
2 * Architecture- / platform-specific boot-time initialization code for
3 * IBM PowerPC 4xx based boards. Adapted from original
4 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
5 * <dan@net4x.com>.
6 *
7 * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
8 *
9 * Rewritten and ported to the merged powerpc tree:
10 * Copyright 2007 IBM Corporation
11 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
12 *
13 * Adapted to EP405 by Ben. Herrenschmidt <benh@kernel.crashing.org>
14 *
15 * TODO: Wire up the PCI IRQ mux and the southbridge interrupts
16 *
17 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
18 * the terms of the GNU General Public License version 2. This program
19 * is licensed "as is" without any warranty of any kind, whether express
20 * or implied.
21 */
22
23 #include <linux/init.h>
24 #include <linux/of_platform.h>
25
26 #include <asm/machdep.h>
27 #include <asm/prom.h>
28 #include <asm/udbg.h>
29 #include <asm/time.h>
30 #include <asm/uic.h>
31 #include <asm/pci-bridge.h>
32
33 static struct device_node *bcsr_node;
34 static void __iomem *bcsr_regs;
35
36 /* BCSR registers */
37 #define BCSR_ID 0
38 #define BCSR_PCI_CTRL 1
39 #define BCSR_FLASH_NV_POR_CTRL 2
40 #define BCSR_FENET_UART_CTRL 3
41 #define BCSR_PCI_IRQ 4
42 #define BCSR_XIRQ_SELECT 5
43 #define BCSR_XIRQ_ROUTING 6
44 #define BCSR_XIRQ_STATUS 7
45 #define BCSR_XIRQ_STATUS2 8
46 #define BCSR_SW_STAT_LED_CTRL 9
47 #define BCSR_GPIO_IRQ_PAR_CTRL 10
48 /* there's more, can't be bothered typing them tho */
49
50
51 static __initdata struct of_device_id ep405_of_bus[] = {
52 { .compatible = "ibm,plb3", },
53 { .compatible = "ibm,opb", },
54 { .compatible = "ibm,ebc", },
55 {},
56 };
57
58 static int __init ep405_device_probe(void)
59 {
60 of_platform_bus_probe(NULL, ep405_of_bus, NULL);
61
62 return 0;
63 }
64 machine_device_initcall(ep405, ep405_device_probe);
65
66 static void __init ep405_init_bcsr(void)
67 {
68 const u8 *irq_routing;
69 int i;
70
71 /* Find the bloody thing & map it */
72 bcsr_node = of_find_compatible_node(NULL, NULL, "ep405-bcsr");
73 if (bcsr_node == NULL) {
74 printk(KERN_ERR "EP405 BCSR not found !\n");
75 return;
76 }
77 bcsr_regs = of_iomap(bcsr_node, 0);
78 if (bcsr_regs == NULL) {
79 printk(KERN_ERR "EP405 BCSR failed to map !\n");
80 return;
81 }
82
83 /* Get the irq-routing property and apply the routing to the CPLD */
84 irq_routing = of_get_property(bcsr_node, "irq-routing", NULL);
85 if (irq_routing == NULL)
86 return;
87 for (i = 0; i < 16; i++) {
88 u8 irq = irq_routing[i];
89 out_8(bcsr_regs + BCSR_XIRQ_SELECT, i);
90 out_8(bcsr_regs + BCSR_XIRQ_ROUTING, irq);
91 }
92 in_8(bcsr_regs + BCSR_XIRQ_SELECT);
93 mb();
94 out_8(bcsr_regs + BCSR_GPIO_IRQ_PAR_CTRL, 0xfe);
95 }
96
97 static void __init ep405_setup_arch(void)
98 {
99 /* Find & init the BCSR CPLD */
100 ep405_init_bcsr();
101
102 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
103 }
104
105 static int __init ep405_probe(void)
106 {
107 unsigned long root = of_get_flat_dt_root();
108
109 if (!of_flat_dt_is_compatible(root, "ep405"))
110 return 0;
111
112 return 1;
113 }
114
115 define_machine(ep405) {
116 .name = "EP405",
117 .probe = ep405_probe,
118 .setup_arch = ep405_setup_arch,
119 .progress = udbg_progress,
120 .init_IRQ = uic_init_tree,
121 .get_irq = uic_get_irq,
122 .calibrate_decr = generic_calibrate_decr,
123 };