Input: sur40 - skip all blobs that are not touches
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / arch / powerpc / kernel / setup-common.c
1 /*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #undef DEBUG
14
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/platform_device.h>
24 #include <linux/seq_file.h>
25 #include <linux/ioport.h>
26 #include <linux/console.h>
27 #include <linux/screen_info.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/percpu.h>
35 #include <linux/memblock.h>
36 #include <linux/of_platform.h>
37 #include <linux/hugetlb.h>
38 #include <asm/debugfs.h>
39 #include <asm/io.h>
40 #include <asm/paca.h>
41 #include <asm/prom.h>
42 #include <asm/processor.h>
43 #include <asm/vdso_datapage.h>
44 #include <asm/pgtable.h>
45 #include <asm/smp.h>
46 #include <asm/elf.h>
47 #include <asm/machdep.h>
48 #include <asm/time.h>
49 #include <asm/cputable.h>
50 #include <asm/sections.h>
51 #include <asm/firmware.h>
52 #include <asm/btext.h>
53 #include <asm/nvram.h>
54 #include <asm/setup.h>
55 #include <asm/rtas.h>
56 #include <asm/iommu.h>
57 #include <asm/serial.h>
58 #include <asm/cache.h>
59 #include <asm/page.h>
60 #include <asm/mmu.h>
61 #include <asm/xmon.h>
62 #include <asm/cputhreads.h>
63 #include <mm/mmu_decl.h>
64 #include <asm/fadump.h>
65 #include <asm/udbg.h>
66 #include <asm/hugetlb.h>
67 #include <asm/livepatch.h>
68 #include <asm/mmu_context.h>
69 #include <asm/cpu_has_feature.h>
70
71 #include "setup.h"
72
73 #ifdef DEBUG
74 #include <asm/udbg.h>
75 #define DBG(fmt...) udbg_printf(fmt)
76 #else
77 #define DBG(fmt...)
78 #endif
79
80 /* The main machine-dep calls structure
81 */
82 struct machdep_calls ppc_md;
83 EXPORT_SYMBOL(ppc_md);
84 struct machdep_calls *machine_id;
85 EXPORT_SYMBOL(machine_id);
86
87 int boot_cpuid = -1;
88 EXPORT_SYMBOL_GPL(boot_cpuid);
89
90 /*
91 * These are used in binfmt_elf.c to put aux entries on the stack
92 * for each elf executable being started.
93 */
94 int dcache_bsize;
95 int icache_bsize;
96 int ucache_bsize;
97
98
99 unsigned long klimit = (unsigned long) _end;
100
101 /*
102 * This still seems to be needed... -- paulus
103 */
104 struct screen_info screen_info = {
105 .orig_x = 0,
106 .orig_y = 25,
107 .orig_video_cols = 80,
108 .orig_video_lines = 25,
109 .orig_video_isVGA = 1,
110 .orig_video_points = 16
111 };
112 #if defined(CONFIG_FB_VGA16_MODULE)
113 EXPORT_SYMBOL(screen_info);
114 #endif
115
116 /* Variables required to store legacy IO irq routing */
117 int of_i8042_kbd_irq;
118 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
119 int of_i8042_aux_irq;
120 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
121
122 #ifdef __DO_IRQ_CANON
123 /* XXX should go elsewhere eventually */
124 int ppc_do_canonicalize_irqs;
125 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
126 #endif
127
128 #ifdef CONFIG_CRASH_CORE
129 /* This keeps a track of which one is the crashing cpu. */
130 int crashing_cpu = -1;
131 #endif
132
133 /* also used by kexec */
134 void machine_shutdown(void)
135 {
136 #ifdef CONFIG_FA_DUMP
137 /*
138 * if fadump is active, cleanup the fadump registration before we
139 * shutdown.
140 */
141 fadump_cleanup();
142 #endif
143
144 if (ppc_md.machine_shutdown)
145 ppc_md.machine_shutdown();
146 }
147
148 static void machine_hang(void)
149 {
150 pr_emerg("System Halted, OK to turn off power\n");
151 local_irq_disable();
152 while (1)
153 ;
154 }
155
156 void machine_restart(char *cmd)
157 {
158 machine_shutdown();
159 if (ppc_md.restart)
160 ppc_md.restart(cmd);
161
162 smp_send_stop();
163
164 do_kernel_restart(cmd);
165 mdelay(1000);
166
167 machine_hang();
168 }
169
170 void machine_power_off(void)
171 {
172 machine_shutdown();
173 if (pm_power_off)
174 pm_power_off();
175
176 smp_send_stop();
177 machine_hang();
178 }
179 /* Used by the G5 thermal driver */
180 EXPORT_SYMBOL_GPL(machine_power_off);
181
182 void (*pm_power_off)(void);
183 EXPORT_SYMBOL_GPL(pm_power_off);
184
185 void machine_halt(void)
186 {
187 machine_shutdown();
188 if (ppc_md.halt)
189 ppc_md.halt();
190
191 smp_send_stop();
192 machine_hang();
193 }
194
195
196 #ifdef CONFIG_TAU
197 extern u32 cpu_temp(unsigned long cpu);
198 extern u32 cpu_temp_both(unsigned long cpu);
199 #endif /* CONFIG_TAU */
200
201 #ifdef CONFIG_SMP
202 DEFINE_PER_CPU(unsigned int, cpu_pvr);
203 #endif
204
205 static void show_cpuinfo_summary(struct seq_file *m)
206 {
207 struct device_node *root;
208 const char *model = NULL;
209 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
210 unsigned long bogosum = 0;
211 int i;
212 for_each_online_cpu(i)
213 bogosum += loops_per_jiffy;
214 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
215 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
216 #endif /* CONFIG_SMP && CONFIG_PPC32 */
217 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
218 if (ppc_md.name)
219 seq_printf(m, "platform\t: %s\n", ppc_md.name);
220 root = of_find_node_by_path("/");
221 if (root)
222 model = of_get_property(root, "model", NULL);
223 if (model)
224 seq_printf(m, "model\t\t: %s\n", model);
225 of_node_put(root);
226
227 if (ppc_md.show_cpuinfo != NULL)
228 ppc_md.show_cpuinfo(m);
229
230 #ifdef CONFIG_PPC32
231 /* Display the amount of memory */
232 seq_printf(m, "Memory\t\t: %d MB\n",
233 (unsigned int)(total_memory / (1024 * 1024)));
234 #endif
235 }
236
237 static int show_cpuinfo(struct seq_file *m, void *v)
238 {
239 unsigned long cpu_id = (unsigned long)v - 1;
240 unsigned int pvr;
241 unsigned long proc_freq;
242 unsigned short maj;
243 unsigned short min;
244
245 /* We only show online cpus: disable preempt (overzealous, I
246 * knew) to prevent cpu going down. */
247 preempt_disable();
248 if (!cpu_online(cpu_id)) {
249 preempt_enable();
250 return 0;
251 }
252
253 #ifdef CONFIG_SMP
254 pvr = per_cpu(cpu_pvr, cpu_id);
255 #else
256 pvr = mfspr(SPRN_PVR);
257 #endif
258 maj = (pvr >> 8) & 0xFF;
259 min = pvr & 0xFF;
260
261 seq_printf(m, "processor\t: %lu\n", cpu_id);
262 seq_printf(m, "cpu\t\t: ");
263
264 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
265 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
266 else
267 seq_printf(m, "unknown (%08x)", pvr);
268
269 #ifdef CONFIG_ALTIVEC
270 if (cpu_has_feature(CPU_FTR_ALTIVEC))
271 seq_printf(m, ", altivec supported");
272 #endif /* CONFIG_ALTIVEC */
273
274 seq_printf(m, "\n");
275
276 #ifdef CONFIG_TAU
277 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
278 #ifdef CONFIG_TAU_AVERAGE
279 /* more straightforward, but potentially misleading */
280 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
281 cpu_temp(cpu_id));
282 #else
283 /* show the actual temp sensor range */
284 u32 temp;
285 temp = cpu_temp_both(cpu_id);
286 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
287 temp & 0xff, temp >> 16);
288 #endif
289 }
290 #endif /* CONFIG_TAU */
291
292 /*
293 * Platforms that have variable clock rates, should implement
294 * the method ppc_md.get_proc_freq() that reports the clock
295 * rate of a given cpu. The rest can use ppc_proc_freq to
296 * report the clock rate that is same across all cpus.
297 */
298 if (ppc_md.get_proc_freq)
299 proc_freq = ppc_md.get_proc_freq(cpu_id);
300 else
301 proc_freq = ppc_proc_freq;
302
303 if (proc_freq)
304 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
305 proc_freq / 1000000, proc_freq % 1000000);
306
307 if (ppc_md.show_percpuinfo != NULL)
308 ppc_md.show_percpuinfo(m, cpu_id);
309
310 /* If we are a Freescale core do a simple check so
311 * we dont have to keep adding cases in the future */
312 if (PVR_VER(pvr) & 0x8000) {
313 switch (PVR_VER(pvr)) {
314 case 0x8000: /* 7441/7450/7451, Voyager */
315 case 0x8001: /* 7445/7455, Apollo 6 */
316 case 0x8002: /* 7447/7457, Apollo 7 */
317 case 0x8003: /* 7447A, Apollo 7 PM */
318 case 0x8004: /* 7448, Apollo 8 */
319 case 0x800c: /* 7410, Nitro */
320 maj = ((pvr >> 8) & 0xF);
321 min = PVR_MIN(pvr);
322 break;
323 default: /* e500/book-e */
324 maj = PVR_MAJ(pvr);
325 min = PVR_MIN(pvr);
326 break;
327 }
328 } else {
329 switch (PVR_VER(pvr)) {
330 case 0x0020: /* 403 family */
331 maj = PVR_MAJ(pvr) + 1;
332 min = PVR_MIN(pvr);
333 break;
334 case 0x1008: /* 740P/750P ?? */
335 maj = ((pvr >> 8) & 0xFF) - 1;
336 min = pvr & 0xFF;
337 break;
338 default:
339 maj = (pvr >> 8) & 0xFF;
340 min = pvr & 0xFF;
341 break;
342 }
343 }
344
345 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
346 maj, min, PVR_VER(pvr), PVR_REV(pvr));
347
348 #ifdef CONFIG_PPC32
349 seq_printf(m, "bogomips\t: %lu.%02lu\n",
350 loops_per_jiffy / (500000/HZ),
351 (loops_per_jiffy / (5000/HZ)) % 100);
352 #endif
353
354 #ifdef CONFIG_SMP
355 seq_printf(m, "\n");
356 #endif
357
358 preempt_enable();
359
360 /* If this is the last cpu, print the summary */
361 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
362 show_cpuinfo_summary(m);
363
364 return 0;
365 }
366
367 static void *c_start(struct seq_file *m, loff_t *pos)
368 {
369 if (*pos == 0) /* just in case, cpu 0 is not the first */
370 *pos = cpumask_first(cpu_online_mask);
371 else
372 *pos = cpumask_next(*pos - 1, cpu_online_mask);
373 if ((*pos) < nr_cpu_ids)
374 return (void *)(unsigned long)(*pos + 1);
375 return NULL;
376 }
377
378 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
379 {
380 (*pos)++;
381 return c_start(m, pos);
382 }
383
384 static void c_stop(struct seq_file *m, void *v)
385 {
386 }
387
388 const struct seq_operations cpuinfo_op = {
389 .start =c_start,
390 .next = c_next,
391 .stop = c_stop,
392 .show = show_cpuinfo,
393 };
394
395 void __init check_for_initrd(void)
396 {
397 #ifdef CONFIG_BLK_DEV_INITRD
398 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
399 initrd_start, initrd_end);
400
401 /* If we were passed an initrd, set the ROOT_DEV properly if the values
402 * look sensible. If not, clear initrd reference.
403 */
404 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
405 initrd_end > initrd_start)
406 ROOT_DEV = Root_RAM0;
407 else
408 initrd_start = initrd_end = 0;
409
410 if (initrd_start)
411 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
412
413 DBG(" <- check_for_initrd()\n");
414 #endif /* CONFIG_BLK_DEV_INITRD */
415 }
416
417 #ifdef CONFIG_SMP
418
419 int threads_per_core, threads_per_subcore, threads_shift;
420 cpumask_t threads_core_mask;
421 EXPORT_SYMBOL_GPL(threads_per_core);
422 EXPORT_SYMBOL_GPL(threads_per_subcore);
423 EXPORT_SYMBOL_GPL(threads_shift);
424 EXPORT_SYMBOL_GPL(threads_core_mask);
425
426 static void __init cpu_init_thread_core_maps(int tpc)
427 {
428 int i;
429
430 threads_per_core = tpc;
431 threads_per_subcore = tpc;
432 cpumask_clear(&threads_core_mask);
433
434 /* This implementation only supports power of 2 number of threads
435 * for simplicity and performance
436 */
437 threads_shift = ilog2(tpc);
438 BUG_ON(tpc != (1 << threads_shift));
439
440 for (i = 0; i < tpc; i++)
441 cpumask_set_cpu(i, &threads_core_mask);
442
443 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
444 tpc, tpc > 1 ? "s" : "");
445 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
446 }
447
448
449 /**
450 * setup_cpu_maps - initialize the following cpu maps:
451 * cpu_possible_mask
452 * cpu_present_mask
453 *
454 * Having the possible map set up early allows us to restrict allocations
455 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
456 *
457 * We do not initialize the online map here; cpus set their own bits in
458 * cpu_online_mask as they come up.
459 *
460 * This function is valid only for Open Firmware systems. finish_device_tree
461 * must be called before using this.
462 *
463 * While we're here, we may as well set the "physical" cpu ids in the paca.
464 *
465 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
466 */
467 void __init smp_setup_cpu_maps(void)
468 {
469 struct device_node *dn = NULL;
470 int cpu = 0;
471 int nthreads = 1;
472
473 DBG("smp_setup_cpu_maps()\n");
474
475 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
476 const __be32 *intserv;
477 __be32 cpu_be;
478 int j, len;
479
480 DBG(" * %s...\n", dn->full_name);
481
482 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
483 &len);
484 if (intserv) {
485 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
486 nthreads);
487 } else {
488 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
489 intserv = of_get_property(dn, "reg", &len);
490 if (!intserv) {
491 cpu_be = cpu_to_be32(cpu);
492 intserv = &cpu_be; /* assume logical == phys */
493 len = 4;
494 }
495 }
496
497 nthreads = len / sizeof(int);
498
499 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
500 bool avail;
501
502 DBG(" thread %d -> cpu %d (hard id %d)\n",
503 j, cpu, be32_to_cpu(intserv[j]));
504
505 avail = of_device_is_available(dn);
506 if (!avail)
507 avail = !of_property_match_string(dn,
508 "enable-method", "spin-table");
509
510 set_cpu_present(cpu, avail);
511 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
512 set_cpu_possible(cpu, true);
513 cpu++;
514 }
515 }
516
517 /* If no SMT supported, nthreads is forced to 1 */
518 if (!cpu_has_feature(CPU_FTR_SMT)) {
519 DBG(" SMT disabled ! nthreads forced to 1\n");
520 nthreads = 1;
521 }
522
523 #ifdef CONFIG_PPC64
524 /*
525 * On pSeries LPAR, we need to know how many cpus
526 * could possibly be added to this partition.
527 */
528 if (firmware_has_feature(FW_FEATURE_LPAR) &&
529 (dn = of_find_node_by_path("/rtas"))) {
530 int num_addr_cell, num_size_cell, maxcpus;
531 const __be32 *ireg;
532
533 num_addr_cell = of_n_addr_cells(dn);
534 num_size_cell = of_n_size_cells(dn);
535
536 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
537
538 if (!ireg)
539 goto out;
540
541 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
542
543 /* Double maxcpus for processors which have SMT capability */
544 if (cpu_has_feature(CPU_FTR_SMT))
545 maxcpus *= nthreads;
546
547 if (maxcpus > nr_cpu_ids) {
548 printk(KERN_WARNING
549 "Partition configured for %d cpus, "
550 "operating system maximum is %d.\n",
551 maxcpus, nr_cpu_ids);
552 maxcpus = nr_cpu_ids;
553 } else
554 printk(KERN_INFO "Partition configured for %d cpus.\n",
555 maxcpus);
556
557 for (cpu = 0; cpu < maxcpus; cpu++)
558 set_cpu_possible(cpu, true);
559 out:
560 of_node_put(dn);
561 }
562 vdso_data->processorCount = num_present_cpus();
563 #endif /* CONFIG_PPC64 */
564
565 /* Initialize CPU <=> thread mapping/
566 *
567 * WARNING: We assume that the number of threads is the same for
568 * every CPU in the system. If that is not the case, then some code
569 * here will have to be reworked
570 */
571 cpu_init_thread_core_maps(nthreads);
572
573 /* Now that possible cpus are set, set nr_cpu_ids for later use */
574 setup_nr_cpu_ids();
575
576 free_unused_pacas();
577 }
578 #endif /* CONFIG_SMP */
579
580 #ifdef CONFIG_PCSPKR_PLATFORM
581 static __init int add_pcspkr(void)
582 {
583 struct device_node *np;
584 struct platform_device *pd;
585 int ret;
586
587 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
588 of_node_put(np);
589 if (!np)
590 return -ENODEV;
591
592 pd = platform_device_alloc("pcspkr", -1);
593 if (!pd)
594 return -ENOMEM;
595
596 ret = platform_device_add(pd);
597 if (ret)
598 platform_device_put(pd);
599
600 return ret;
601 }
602 device_initcall(add_pcspkr);
603 #endif /* CONFIG_PCSPKR_PLATFORM */
604
605 void probe_machine(void)
606 {
607 extern struct machdep_calls __machine_desc_start;
608 extern struct machdep_calls __machine_desc_end;
609 unsigned int i;
610
611 /*
612 * Iterate all ppc_md structures until we find the proper
613 * one for the current machine type
614 */
615 DBG("Probing machine type ...\n");
616
617 /*
618 * Check ppc_md is empty, if not we have a bug, ie, we setup an
619 * entry before probe_machine() which will be overwritten
620 */
621 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
622 if (((void **)&ppc_md)[i]) {
623 printk(KERN_ERR "Entry %d in ppc_md non empty before"
624 " machine probe !\n", i);
625 }
626 }
627
628 for (machine_id = &__machine_desc_start;
629 machine_id < &__machine_desc_end;
630 machine_id++) {
631 DBG(" %s ...", machine_id->name);
632 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
633 if (ppc_md.probe()) {
634 DBG(" match !\n");
635 break;
636 }
637 DBG("\n");
638 }
639 /* What can we do if we didn't find ? */
640 if (machine_id >= &__machine_desc_end) {
641 DBG("No suitable machine found !\n");
642 for (;;);
643 }
644
645 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
646 }
647
648 /* Match a class of boards, not a specific device configuration. */
649 int check_legacy_ioport(unsigned long base_port)
650 {
651 struct device_node *parent, *np = NULL;
652 int ret = -ENODEV;
653
654 switch(base_port) {
655 case I8042_DATA_REG:
656 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
657 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
658 if (np) {
659 parent = of_get_parent(np);
660
661 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
662 if (!of_i8042_kbd_irq)
663 of_i8042_kbd_irq = 1;
664
665 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
666 if (!of_i8042_aux_irq)
667 of_i8042_aux_irq = 12;
668
669 of_node_put(np);
670 np = parent;
671 break;
672 }
673 np = of_find_node_by_type(NULL, "8042");
674 /* Pegasos has no device_type on its 8042 node, look for the
675 * name instead */
676 if (!np)
677 np = of_find_node_by_name(NULL, "8042");
678 if (np) {
679 of_i8042_kbd_irq = 1;
680 of_i8042_aux_irq = 12;
681 }
682 break;
683 case FDC_BASE: /* FDC1 */
684 np = of_find_node_by_type(NULL, "fdc");
685 break;
686 default:
687 /* ipmi is supposed to fail here */
688 break;
689 }
690 if (!np)
691 return ret;
692 parent = of_get_parent(np);
693 if (parent) {
694 if (strcmp(parent->type, "isa") == 0)
695 ret = 0;
696 of_node_put(parent);
697 }
698 of_node_put(np);
699 return ret;
700 }
701 EXPORT_SYMBOL(check_legacy_ioport);
702
703 static int ppc_panic_event(struct notifier_block *this,
704 unsigned long event, void *ptr)
705 {
706 /*
707 * If firmware-assisted dump has been registered then trigger
708 * firmware-assisted dump and let firmware handle everything else.
709 */
710 crash_fadump(NULL, ptr);
711 ppc_md.panic(ptr); /* May not return */
712 return NOTIFY_DONE;
713 }
714
715 static struct notifier_block ppc_panic_block = {
716 .notifier_call = ppc_panic_event,
717 .priority = INT_MIN /* may not return; must be done last */
718 };
719
720 void __init setup_panic(void)
721 {
722 if (!ppc_md.panic)
723 return;
724 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
725 }
726
727 #ifdef CONFIG_CHECK_CACHE_COHERENCY
728 /*
729 * For platforms that have configurable cache-coherency. This function
730 * checks that the cache coherency setting of the kernel matches the setting
731 * left by the firmware, as indicated in the device tree. Since a mismatch
732 * will eventually result in DMA failures, we print * and error and call
733 * BUG() in that case.
734 */
735
736 #ifdef CONFIG_NOT_COHERENT_CACHE
737 #define KERNEL_COHERENCY 0
738 #else
739 #define KERNEL_COHERENCY 1
740 #endif
741
742 static int __init check_cache_coherency(void)
743 {
744 struct device_node *np;
745 const void *prop;
746 int devtree_coherency;
747
748 np = of_find_node_by_path("/");
749 prop = of_get_property(np, "coherency-off", NULL);
750 of_node_put(np);
751
752 devtree_coherency = prop ? 0 : 1;
753
754 if (devtree_coherency != KERNEL_COHERENCY) {
755 printk(KERN_ERR
756 "kernel coherency:%s != device tree_coherency:%s\n",
757 KERNEL_COHERENCY ? "on" : "off",
758 devtree_coherency ? "on" : "off");
759 BUG();
760 }
761
762 return 0;
763 }
764
765 late_initcall(check_cache_coherency);
766 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
767
768 #ifdef CONFIG_DEBUG_FS
769 struct dentry *powerpc_debugfs_root;
770 EXPORT_SYMBOL(powerpc_debugfs_root);
771
772 static int powerpc_debugfs_init(void)
773 {
774 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
775
776 return powerpc_debugfs_root == NULL;
777 }
778 arch_initcall(powerpc_debugfs_init);
779 #endif
780
781 void ppc_printk_progress(char *s, unsigned short hex)
782 {
783 pr_info("%s\n", s);
784 }
785
786 void arch_setup_pdev_archdata(struct platform_device *pdev)
787 {
788 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
789 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
790 set_dma_ops(&pdev->dev, &dma_direct_ops);
791 }
792
793 static __init void print_system_info(void)
794 {
795 pr_info("-----------------------------------------------------\n");
796 #ifdef CONFIG_PPC_STD_MMU_64
797 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
798 #endif
799 #ifdef CONFIG_PPC_STD_MMU_32
800 pr_info("Hash_size = 0x%lx\n", Hash_size);
801 #endif
802 pr_info("phys_mem_size = 0x%llx\n",
803 (unsigned long long)memblock_phys_mem_size());
804
805 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
806 pr_info("icache_bsize = 0x%x\n", icache_bsize);
807 if (ucache_bsize != 0)
808 pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
809
810 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
811 pr_info(" possible = 0x%016lx\n",
812 (unsigned long)CPU_FTRS_POSSIBLE);
813 pr_info(" always = 0x%016lx\n",
814 (unsigned long)CPU_FTRS_ALWAYS);
815 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
816 cur_cpu_spec->cpu_user_features,
817 cur_cpu_spec->cpu_user_features2);
818 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
819 #ifdef CONFIG_PPC64
820 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
821 #endif
822
823 #ifdef CONFIG_PPC_STD_MMU_64
824 if (htab_address)
825 pr_info("htab_address = 0x%p\n", htab_address);
826 if (htab_hash_mask)
827 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
828 #endif
829 #ifdef CONFIG_PPC_STD_MMU_32
830 if (Hash)
831 pr_info("Hash = 0x%p\n", Hash);
832 if (Hash_mask)
833 pr_info("Hash_mask = 0x%lx\n", Hash_mask);
834 #endif
835
836 if (PHYSICAL_START > 0)
837 pr_info("physical_start = 0x%llx\n",
838 (unsigned long long)PHYSICAL_START);
839 pr_info("-----------------------------------------------------\n");
840 }
841
842 /*
843 * Called into from start_kernel this initializes memblock, which is used
844 * to manage page allocation until mem_init is called.
845 */
846 void __init setup_arch(char **cmdline_p)
847 {
848 *cmdline_p = boot_command_line;
849
850 /* Set a half-reasonable default so udelay does something sensible */
851 loops_per_jiffy = 500000000 / HZ;
852
853 /* Unflatten the device-tree passed by prom_init or kexec */
854 unflatten_device_tree();
855
856 /*
857 * Initialize cache line/block info from device-tree (on ppc64) or
858 * just cputable (on ppc32).
859 */
860 initialize_cache_info();
861
862 /* Initialize RTAS if available. */
863 rtas_initialize();
864
865 /* Check if we have an initrd provided via the device-tree. */
866 check_for_initrd();
867
868 /* Probe the machine type, establish ppc_md. */
869 probe_machine();
870
871 /* Setup panic notifier if requested by the platform. */
872 setup_panic();
873
874 /*
875 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
876 * it from their respective probe() function.
877 */
878 setup_power_save();
879
880 /* Discover standard serial ports. */
881 find_legacy_serial_ports();
882
883 /* Register early console with the printk subsystem. */
884 register_early_udbg_console();
885
886 /* Setup the various CPU maps based on the device-tree. */
887 smp_setup_cpu_maps();
888
889 /* Initialize xmon. */
890 xmon_setup();
891
892 /* Check the SMT related command line arguments (ppc64). */
893 check_smt_enabled();
894
895 /* On BookE, setup per-core TLB data structures. */
896 setup_tlb_core_data();
897
898 /*
899 * Release secondary cpus out of their spinloops at 0x60 now that
900 * we can map physical -> logical CPU ids.
901 *
902 * Freescale Book3e parts spin in a loop provided by firmware,
903 * so smp_release_cpus() does nothing for them.
904 */
905 #ifdef CONFIG_SMP
906 smp_release_cpus();
907 #endif
908
909 /* Print various info about the machine that has been gathered so far. */
910 print_system_info();
911
912 /* Reserve large chunks of memory for use by CMA for KVM. */
913 kvm_cma_reserve();
914
915 /*
916 * Reserve any gigantic pages requested on the command line.
917 * memblock needs to have been initialized by the time this is
918 * called since this will reserve memory.
919 */
920 reserve_hugetlb_gpages();
921
922 klp_init_thread_info(&init_thread_info);
923
924 init_mm.start_code = (unsigned long)_stext;
925 init_mm.end_code = (unsigned long) _etext;
926 init_mm.end_data = (unsigned long) _edata;
927 init_mm.brk = klimit;
928
929 #ifdef CONFIG_PPC_MM_SLICES
930 #ifdef CONFIG_PPC64
931 init_mm.context.addr_limit = TASK_SIZE_128TB;
932 #else
933 #error "context.addr_limit not initialized."
934 #endif
935 #endif
936
937 #ifdef CONFIG_PPC_64K_PAGES
938 init_mm.context.pte_frag = NULL;
939 #endif
940 #ifdef CONFIG_SPAPR_TCE_IOMMU
941 mm_iommu_init(&init_mm);
942 #endif
943 irqstack_early_init();
944 exc_lvl_early_init();
945 emergency_stack_init();
946
947 initmem_init();
948
949 #ifdef CONFIG_DUMMY_CONSOLE
950 conswitchp = &dummy_con;
951 #endif
952 if (ppc_md.setup_arch)
953 ppc_md.setup_arch();
954
955 paging_init();
956
957 /* Initialize the MMU context management stuff. */
958 mmu_context_init();
959
960 #ifdef CONFIG_PPC64
961 /* Interrupt code needs to be 64K-aligned. */
962 if ((unsigned long)_stext & 0xffff)
963 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
964 (unsigned long)_stext);
965 #endif
966 }