3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
11 * and Paul Mackerras (paulus@samba.org).
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
21 #include <linux/smp.h>
22 #include <linux/errno.h>
23 #include <linux/ptrace.h>
24 #include <linux/regset.h>
25 #include <linux/tracehook.h>
26 #include <linux/elf.h>
27 #include <linux/user.h>
28 #include <linux/security.h>
29 #include <linux/signal.h>
30 #include <linux/seccomp.h>
31 #include <linux/audit.h>
33 #include <linux/module.h>
35 #include <linux/hw_breakpoint.h>
36 #include <linux/perf_event.h>
38 #include <asm/uaccess.h>
40 #include <asm/pgtable.h>
41 #include <asm/system.h>
44 * The parameter save area on the stack is used to store arguments being passed
45 * to callee function and is located at fixed offset from stack pointer.
48 #define PARAMETER_SAVE_AREA_OFFSET 24 /* bytes */
49 #else /* CONFIG_PPC32 */
50 #define PARAMETER_SAVE_AREA_OFFSET 48 /* bytes */
53 struct pt_regs_offset
{
58 #define STR(s) #s /* convert to string */
59 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
60 #define GPR_OFFSET_NAME(num) \
61 {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
62 #define REG_OFFSET_END {.name = NULL, .offset = 0}
64 static const struct pt_regs_offset regoffset_table
[] = {
100 REG_OFFSET_NAME(link
),
101 REG_OFFSET_NAME(xer
),
102 REG_OFFSET_NAME(ccr
),
104 REG_OFFSET_NAME(softe
),
108 REG_OFFSET_NAME(trap
),
109 REG_OFFSET_NAME(dar
),
110 REG_OFFSET_NAME(dsisr
),
115 * regs_query_register_offset() - query register offset from its name
116 * @name: the name of a register
118 * regs_query_register_offset() returns the offset of a register in struct
119 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
121 int regs_query_register_offset(const char *name
)
123 const struct pt_regs_offset
*roff
;
124 for (roff
= regoffset_table
; roff
->name
!= NULL
; roff
++)
125 if (!strcmp(roff
->name
, name
))
131 * regs_query_register_name() - query register name from its offset
132 * @offset: the offset of a register in struct pt_regs.
134 * regs_query_register_name() returns the name of a register from its
135 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
137 const char *regs_query_register_name(unsigned int offset
)
139 const struct pt_regs_offset
*roff
;
140 for (roff
= regoffset_table
; roff
->name
!= NULL
; roff
++)
141 if (roff
->offset
== offset
)
147 * does not yet catch signals sent when the child dies.
148 * in exit.c or in signal.c.
152 * Set of msr bits that gdb can change on behalf of a process.
154 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
155 #define MSR_DEBUGCHANGE 0
157 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
161 * Max register writeable via put_reg
164 #define PT_MAX_PUT_REG PT_MQ
166 #define PT_MAX_PUT_REG PT_CCR
169 static unsigned long get_user_msr(struct task_struct
*task
)
171 return task
->thread
.regs
->msr
| task
->thread
.fpexc_mode
;
174 static int set_user_msr(struct task_struct
*task
, unsigned long msr
)
176 task
->thread
.regs
->msr
&= ~MSR_DEBUGCHANGE
;
177 task
->thread
.regs
->msr
|= msr
& MSR_DEBUGCHANGE
;
182 * We prevent mucking around with the reserved area of trap
183 * which are used internally by the kernel.
185 static int set_user_trap(struct task_struct
*task
, unsigned long trap
)
187 task
->thread
.regs
->trap
= trap
& 0xfff0;
192 * Get contents of register REGNO in task TASK.
194 unsigned long ptrace_get_reg(struct task_struct
*task
, int regno
)
196 if (task
->thread
.regs
== NULL
)
200 return get_user_msr(task
);
202 if (regno
< (sizeof(struct pt_regs
) / sizeof(unsigned long)))
203 return ((unsigned long *)task
->thread
.regs
)[regno
];
209 * Write contents of register REGNO in task TASK.
211 int ptrace_put_reg(struct task_struct
*task
, int regno
, unsigned long data
)
213 if (task
->thread
.regs
== NULL
)
217 return set_user_msr(task
, data
);
218 if (regno
== PT_TRAP
)
219 return set_user_trap(task
, data
);
221 if (regno
<= PT_MAX_PUT_REG
) {
222 ((unsigned long *)task
->thread
.regs
)[regno
] = data
;
228 static int gpr_get(struct task_struct
*target
, const struct user_regset
*regset
,
229 unsigned int pos
, unsigned int count
,
230 void *kbuf
, void __user
*ubuf
)
234 if (target
->thread
.regs
== NULL
)
237 CHECK_FULL_REGS(target
->thread
.regs
);
239 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
241 0, offsetof(struct pt_regs
, msr
));
243 unsigned long msr
= get_user_msr(target
);
244 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, &msr
,
245 offsetof(struct pt_regs
, msr
),
246 offsetof(struct pt_regs
, msr
) +
250 BUILD_BUG_ON(offsetof(struct pt_regs
, orig_gpr3
) !=
251 offsetof(struct pt_regs
, msr
) + sizeof(long));
254 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
255 &target
->thread
.regs
->orig_gpr3
,
256 offsetof(struct pt_regs
, orig_gpr3
),
257 sizeof(struct pt_regs
));
259 ret
= user_regset_copyout_zero(&pos
, &count
, &kbuf
, &ubuf
,
260 sizeof(struct pt_regs
), -1);
265 static int gpr_set(struct task_struct
*target
, const struct user_regset
*regset
,
266 unsigned int pos
, unsigned int count
,
267 const void *kbuf
, const void __user
*ubuf
)
272 if (target
->thread
.regs
== NULL
)
275 CHECK_FULL_REGS(target
->thread
.regs
);
277 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
279 0, PT_MSR
* sizeof(reg
));
281 if (!ret
&& count
> 0) {
282 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, ®
,
283 PT_MSR
* sizeof(reg
),
284 (PT_MSR
+ 1) * sizeof(reg
));
286 ret
= set_user_msr(target
, reg
);
289 BUILD_BUG_ON(offsetof(struct pt_regs
, orig_gpr3
) !=
290 offsetof(struct pt_regs
, msr
) + sizeof(long));
293 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
294 &target
->thread
.regs
->orig_gpr3
,
295 PT_ORIG_R3
* sizeof(reg
),
296 (PT_MAX_PUT_REG
+ 1) * sizeof(reg
));
298 if (PT_MAX_PUT_REG
+ 1 < PT_TRAP
&& !ret
)
299 ret
= user_regset_copyin_ignore(
300 &pos
, &count
, &kbuf
, &ubuf
,
301 (PT_MAX_PUT_REG
+ 1) * sizeof(reg
),
302 PT_TRAP
* sizeof(reg
));
304 if (!ret
&& count
> 0) {
305 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, ®
,
306 PT_TRAP
* sizeof(reg
),
307 (PT_TRAP
+ 1) * sizeof(reg
));
309 ret
= set_user_trap(target
, reg
);
313 ret
= user_regset_copyin_ignore(
314 &pos
, &count
, &kbuf
, &ubuf
,
315 (PT_TRAP
+ 1) * sizeof(reg
), -1);
320 static int fpr_get(struct task_struct
*target
, const struct user_regset
*regset
,
321 unsigned int pos
, unsigned int count
,
322 void *kbuf
, void __user
*ubuf
)
328 flush_fp_to_thread(target
);
331 /* copy to local buffer then write that out */
332 for (i
= 0; i
< 32 ; i
++)
333 buf
[i
] = target
->thread
.TS_FPR(i
);
334 memcpy(&buf
[32], &target
->thread
.fpscr
, sizeof(double));
335 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, buf
, 0, -1);
338 BUILD_BUG_ON(offsetof(struct thread_struct
, fpscr
) !=
339 offsetof(struct thread_struct
, TS_FPR(32)));
341 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
342 &target
->thread
.fpr
, 0, -1);
346 static int fpr_set(struct task_struct
*target
, const struct user_regset
*regset
,
347 unsigned int pos
, unsigned int count
,
348 const void *kbuf
, const void __user
*ubuf
)
354 flush_fp_to_thread(target
);
357 /* copy to local buffer then write that out */
358 i
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, buf
, 0, -1);
361 for (i
= 0; i
< 32 ; i
++)
362 target
->thread
.TS_FPR(i
) = buf
[i
];
363 memcpy(&target
->thread
.fpscr
, &buf
[32], sizeof(double));
366 BUILD_BUG_ON(offsetof(struct thread_struct
, fpscr
) !=
367 offsetof(struct thread_struct
, TS_FPR(32)));
369 return user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
370 &target
->thread
.fpr
, 0, -1);
374 #ifdef CONFIG_ALTIVEC
376 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
377 * The transfer totals 34 quadword. Quadwords 0-31 contain the
378 * corresponding vector registers. Quadword 32 contains the vscr as the
379 * last word (offset 12) within that quadword. Quadword 33 contains the
380 * vrsave as the first word (offset 0) within the quadword.
382 * This definition of the VMX state is compatible with the current PPC32
383 * ptrace interface. This allows signal handling and ptrace to use the
384 * same structures. This also simplifies the implementation of a bi-arch
385 * (combined (32- and 64-bit) gdb.
388 static int vr_active(struct task_struct
*target
,
389 const struct user_regset
*regset
)
391 flush_altivec_to_thread(target
);
392 return target
->thread
.used_vr
? regset
->n
: 0;
395 static int vr_get(struct task_struct
*target
, const struct user_regset
*regset
,
396 unsigned int pos
, unsigned int count
,
397 void *kbuf
, void __user
*ubuf
)
401 flush_altivec_to_thread(target
);
403 BUILD_BUG_ON(offsetof(struct thread_struct
, vscr
) !=
404 offsetof(struct thread_struct
, vr
[32]));
406 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
407 &target
->thread
.vr
, 0,
408 33 * sizeof(vector128
));
411 * Copy out only the low-order word of vrsave.
417 memset(&vrsave
, 0, sizeof(vrsave
));
418 vrsave
.word
= target
->thread
.vrsave
;
419 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, &vrsave
,
420 33 * sizeof(vector128
), -1);
426 static int vr_set(struct task_struct
*target
, const struct user_regset
*regset
,
427 unsigned int pos
, unsigned int count
,
428 const void *kbuf
, const void __user
*ubuf
)
432 flush_altivec_to_thread(target
);
434 BUILD_BUG_ON(offsetof(struct thread_struct
, vscr
) !=
435 offsetof(struct thread_struct
, vr
[32]));
437 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
438 &target
->thread
.vr
, 0, 33 * sizeof(vector128
));
439 if (!ret
&& count
> 0) {
441 * We use only the first word of vrsave.
447 memset(&vrsave
, 0, sizeof(vrsave
));
448 vrsave
.word
= target
->thread
.vrsave
;
449 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, &vrsave
,
450 33 * sizeof(vector128
), -1);
452 target
->thread
.vrsave
= vrsave
.word
;
457 #endif /* CONFIG_ALTIVEC */
461 * Currently to set and and get all the vsx state, you need to call
462 * the fp and VMX calls aswell. This only get/sets the lower 32
463 * 128bit VSX registers.
466 static int vsr_active(struct task_struct
*target
,
467 const struct user_regset
*regset
)
469 flush_vsx_to_thread(target
);
470 return target
->thread
.used_vsr
? regset
->n
: 0;
473 static int vsr_get(struct task_struct
*target
, const struct user_regset
*regset
,
474 unsigned int pos
, unsigned int count
,
475 void *kbuf
, void __user
*ubuf
)
480 flush_vsx_to_thread(target
);
482 for (i
= 0; i
< 32 ; i
++)
483 buf
[i
] = target
->thread
.fpr
[i
][TS_VSRLOWOFFSET
];
484 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
485 buf
, 0, 32 * sizeof(double));
490 static int vsr_set(struct task_struct
*target
, const struct user_regset
*regset
,
491 unsigned int pos
, unsigned int count
,
492 const void *kbuf
, const void __user
*ubuf
)
497 flush_vsx_to_thread(target
);
499 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
500 buf
, 0, 32 * sizeof(double));
501 for (i
= 0; i
< 32 ; i
++)
502 target
->thread
.fpr
[i
][TS_VSRLOWOFFSET
] = buf
[i
];
507 #endif /* CONFIG_VSX */
512 * For get_evrregs/set_evrregs functions 'data' has the following layout:
521 static int evr_active(struct task_struct
*target
,
522 const struct user_regset
*regset
)
524 flush_spe_to_thread(target
);
525 return target
->thread
.used_spe
? regset
->n
: 0;
528 static int evr_get(struct task_struct
*target
, const struct user_regset
*regset
,
529 unsigned int pos
, unsigned int count
,
530 void *kbuf
, void __user
*ubuf
)
534 flush_spe_to_thread(target
);
536 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
538 0, sizeof(target
->thread
.evr
));
540 BUILD_BUG_ON(offsetof(struct thread_struct
, acc
) + sizeof(u64
) !=
541 offsetof(struct thread_struct
, spefscr
));
544 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
546 sizeof(target
->thread
.evr
), -1);
551 static int evr_set(struct task_struct
*target
, const struct user_regset
*regset
,
552 unsigned int pos
, unsigned int count
,
553 const void *kbuf
, const void __user
*ubuf
)
557 flush_spe_to_thread(target
);
559 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
561 0, sizeof(target
->thread
.evr
));
563 BUILD_BUG_ON(offsetof(struct thread_struct
, acc
) + sizeof(u64
) !=
564 offsetof(struct thread_struct
, spefscr
));
567 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
569 sizeof(target
->thread
.evr
), -1);
573 #endif /* CONFIG_SPE */
577 * These are our native regset flavors.
579 enum powerpc_regset
{
582 #ifdef CONFIG_ALTIVEC
593 static const struct user_regset native_regsets
[] = {
595 .core_note_type
= NT_PRSTATUS
, .n
= ELF_NGREG
,
596 .size
= sizeof(long), .align
= sizeof(long),
597 .get
= gpr_get
, .set
= gpr_set
600 .core_note_type
= NT_PRFPREG
, .n
= ELF_NFPREG
,
601 .size
= sizeof(double), .align
= sizeof(double),
602 .get
= fpr_get
, .set
= fpr_set
604 #ifdef CONFIG_ALTIVEC
606 .core_note_type
= NT_PPC_VMX
, .n
= 34,
607 .size
= sizeof(vector128
), .align
= sizeof(vector128
),
608 .active
= vr_active
, .get
= vr_get
, .set
= vr_set
613 .core_note_type
= NT_PPC_VSX
, .n
= 32,
614 .size
= sizeof(double), .align
= sizeof(double),
615 .active
= vsr_active
, .get
= vsr_get
, .set
= vsr_set
621 .size
= sizeof(u32
), .align
= sizeof(u32
),
622 .active
= evr_active
, .get
= evr_get
, .set
= evr_set
627 static const struct user_regset_view user_ppc_native_view
= {
628 .name
= UTS_MACHINE
, .e_machine
= ELF_ARCH
, .ei_osabi
= ELF_OSABI
,
629 .regsets
= native_regsets
, .n
= ARRAY_SIZE(native_regsets
)
633 #include <linux/compat.h>
635 static int gpr32_get(struct task_struct
*target
,
636 const struct user_regset
*regset
,
637 unsigned int pos
, unsigned int count
,
638 void *kbuf
, void __user
*ubuf
)
640 const unsigned long *regs
= &target
->thread
.regs
->gpr
[0];
641 compat_ulong_t
*k
= kbuf
;
642 compat_ulong_t __user
*u
= ubuf
;
645 if (target
->thread
.regs
== NULL
)
648 CHECK_FULL_REGS(target
->thread
.regs
);
651 count
/= sizeof(reg
);
654 for (; count
> 0 && pos
< PT_MSR
; --count
)
657 for (; count
> 0 && pos
< PT_MSR
; --count
)
658 if (__put_user((compat_ulong_t
) regs
[pos
++], u
++))
661 if (count
> 0 && pos
== PT_MSR
) {
662 reg
= get_user_msr(target
);
665 else if (__put_user(reg
, u
++))
672 for (; count
> 0 && pos
< PT_REGS_COUNT
; --count
)
675 for (; count
> 0 && pos
< PT_REGS_COUNT
; --count
)
676 if (__put_user((compat_ulong_t
) regs
[pos
++], u
++))
682 count
*= sizeof(reg
);
683 return user_regset_copyout_zero(&pos
, &count
, &kbuf
, &ubuf
,
684 PT_REGS_COUNT
* sizeof(reg
), -1);
687 static int gpr32_set(struct task_struct
*target
,
688 const struct user_regset
*regset
,
689 unsigned int pos
, unsigned int count
,
690 const void *kbuf
, const void __user
*ubuf
)
692 unsigned long *regs
= &target
->thread
.regs
->gpr
[0];
693 const compat_ulong_t
*k
= kbuf
;
694 const compat_ulong_t __user
*u
= ubuf
;
697 if (target
->thread
.regs
== NULL
)
700 CHECK_FULL_REGS(target
->thread
.regs
);
703 count
/= sizeof(reg
);
706 for (; count
> 0 && pos
< PT_MSR
; --count
)
709 for (; count
> 0 && pos
< PT_MSR
; --count
) {
710 if (__get_user(reg
, u
++))
716 if (count
> 0 && pos
== PT_MSR
) {
719 else if (__get_user(reg
, u
++))
721 set_user_msr(target
, reg
);
727 for (; count
> 0 && pos
<= PT_MAX_PUT_REG
; --count
)
729 for (; count
> 0 && pos
< PT_TRAP
; --count
, ++pos
)
732 for (; count
> 0 && pos
<= PT_MAX_PUT_REG
; --count
) {
733 if (__get_user(reg
, u
++))
737 for (; count
> 0 && pos
< PT_TRAP
; --count
, ++pos
)
738 if (__get_user(reg
, u
++))
742 if (count
> 0 && pos
== PT_TRAP
) {
745 else if (__get_user(reg
, u
++))
747 set_user_trap(target
, reg
);
755 count
*= sizeof(reg
);
756 return user_regset_copyin_ignore(&pos
, &count
, &kbuf
, &ubuf
,
757 (PT_TRAP
+ 1) * sizeof(reg
), -1);
761 * These are the regset flavors matching the CONFIG_PPC32 native set.
763 static const struct user_regset compat_regsets
[] = {
765 .core_note_type
= NT_PRSTATUS
, .n
= ELF_NGREG
,
766 .size
= sizeof(compat_long_t
), .align
= sizeof(compat_long_t
),
767 .get
= gpr32_get
, .set
= gpr32_set
770 .core_note_type
= NT_PRFPREG
, .n
= ELF_NFPREG
,
771 .size
= sizeof(double), .align
= sizeof(double),
772 .get
= fpr_get
, .set
= fpr_set
774 #ifdef CONFIG_ALTIVEC
776 .core_note_type
= NT_PPC_VMX
, .n
= 34,
777 .size
= sizeof(vector128
), .align
= sizeof(vector128
),
778 .active
= vr_active
, .get
= vr_get
, .set
= vr_set
783 .core_note_type
= NT_PPC_SPE
, .n
= 35,
784 .size
= sizeof(u32
), .align
= sizeof(u32
),
785 .active
= evr_active
, .get
= evr_get
, .set
= evr_set
790 static const struct user_regset_view user_ppc_compat_view
= {
791 .name
= "ppc", .e_machine
= EM_PPC
, .ei_osabi
= ELF_OSABI
,
792 .regsets
= compat_regsets
, .n
= ARRAY_SIZE(compat_regsets
)
794 #endif /* CONFIG_PPC64 */
796 const struct user_regset_view
*task_user_regset_view(struct task_struct
*task
)
799 if (test_tsk_thread_flag(task
, TIF_32BIT
))
800 return &user_ppc_compat_view
;
802 return &user_ppc_native_view
;
806 void user_enable_single_step(struct task_struct
*task
)
808 struct pt_regs
*regs
= task
->thread
.regs
;
811 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
812 task
->thread
.dbcr0
&= ~DBCR0_BT
;
813 task
->thread
.dbcr0
|= DBCR0_IDM
| DBCR0_IC
;
816 regs
->msr
&= ~MSR_BE
;
820 set_tsk_thread_flag(task
, TIF_SINGLESTEP
);
823 void user_enable_block_step(struct task_struct
*task
)
825 struct pt_regs
*regs
= task
->thread
.regs
;
828 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
829 task
->thread
.dbcr0
&= ~DBCR0_IC
;
830 task
->thread
.dbcr0
= DBCR0_IDM
| DBCR0_BT
;
833 regs
->msr
&= ~MSR_SE
;
837 set_tsk_thread_flag(task
, TIF_SINGLESTEP
);
840 void user_disable_single_step(struct task_struct
*task
)
842 struct pt_regs
*regs
= task
->thread
.regs
;
845 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
847 * The logic to disable single stepping should be as
848 * simple as turning off the Instruction Complete flag.
849 * And, after doing so, if all debug flags are off, turn
850 * off DBCR0(IDM) and MSR(DE) .... Torez
852 task
->thread
.dbcr0
&= ~DBCR0_IC
;
854 * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
856 if (!DBCR_ACTIVE_EVENTS(task
->thread
.dbcr0
,
857 task
->thread
.dbcr1
)) {
859 * All debug events were off.....
861 task
->thread
.dbcr0
&= ~DBCR0_IDM
;
862 regs
->msr
&= ~MSR_DE
;
865 regs
->msr
&= ~(MSR_SE
| MSR_BE
);
868 clear_tsk_thread_flag(task
, TIF_SINGLESTEP
);
871 #ifdef CONFIG_HAVE_HW_BREAKPOINT
872 void ptrace_triggered(struct perf_event
*bp
, int nmi
,
873 struct perf_sample_data
*data
, struct pt_regs
*regs
)
875 struct perf_event_attr attr
;
878 * Disable the breakpoint request here since ptrace has defined a
879 * one-shot behaviour for breakpoint exceptions in PPC64.
880 * The SIGTRAP signal is generated automatically for us in do_dabr().
881 * We don't have to do anything about that here
884 attr
.disabled
= true;
885 modify_user_hw_breakpoint(bp
, &attr
);
887 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
889 int ptrace_set_debugreg(struct task_struct
*task
, unsigned long addr
,
892 #ifdef CONFIG_HAVE_HW_BREAKPOINT
894 struct thread_struct
*thread
= &(task
->thread
);
895 struct perf_event
*bp
;
896 struct perf_event_attr attr
;
897 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
899 /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
900 * For embedded processors we support one DAC and no IAC's at the
906 /* The bottom 3 bits in dabr are flags */
907 if ((data
& ~0x7UL
) >= TASK_SIZE
)
910 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
911 /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
912 * It was assumed, on previous implementations, that 3 bits were
913 * passed together with the data address, fitting the design of the
914 * DABR register, as follows:
918 * bit 2: Breakpoint translation
920 * Thus, we use them here as so.
923 /* Ensure breakpoint translation bit is set */
924 if (data
&& !(data
& DABR_TRANSLATION
))
926 #ifdef CONFIG_HAVE_HW_BREAKPOINT
927 bp
= thread
->ptrace_bps
[0];
928 if ((!data
) || !(data
& (DABR_DATA_WRITE
| DABR_DATA_READ
))) {
930 unregister_hw_breakpoint(bp
);
931 thread
->ptrace_bps
[0] = NULL
;
937 attr
.bp_addr
= data
& ~HW_BREAKPOINT_ALIGN
;
938 arch_bp_generic_fields(data
&
939 (DABR_DATA_WRITE
| DABR_DATA_READ
),
941 ret
= modify_user_hw_breakpoint(bp
, &attr
);
944 thread
->ptrace_bps
[0] = bp
;
949 /* Create a new breakpoint request if one doesn't exist already */
950 hw_breakpoint_init(&attr
);
951 attr
.bp_addr
= data
& ~HW_BREAKPOINT_ALIGN
;
952 arch_bp_generic_fields(data
& (DABR_DATA_WRITE
| DABR_DATA_READ
),
955 thread
->ptrace_bps
[0] = bp
= register_user_hw_breakpoint(&attr
,
956 ptrace_triggered
, task
);
958 thread
->ptrace_bps
[0] = NULL
;
962 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
964 /* Move contents to the DABR register */
965 task
->thread
.dabr
= data
;
966 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
967 /* As described above, it was assumed 3 bits were passed with the data
968 * address, but we will assume only the mode bits will be passed
969 * as to not cause alignment restrictions for DAC-based processors.
972 /* DAC's hold the whole address without any mode flags */
973 task
->thread
.dac1
= data
& ~0x3UL
;
975 if (task
->thread
.dac1
== 0) {
976 dbcr_dac(task
) &= ~(DBCR_DAC1R
| DBCR_DAC1W
);
977 if (!DBCR_ACTIVE_EVENTS(task
->thread
.dbcr0
,
978 task
->thread
.dbcr1
)) {
979 task
->thread
.regs
->msr
&= ~MSR_DE
;
980 task
->thread
.dbcr0
&= ~DBCR0_IDM
;
985 /* Read or Write bits must be set */
990 /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
992 task
->thread
.dbcr0
|= DBCR0_IDM
;
994 /* Check for write and read flags and set DBCR0
996 dbcr_dac(task
) &= ~(DBCR_DAC1R
|DBCR_DAC1W
);
998 dbcr_dac(task
) |= DBCR_DAC1R
;
1000 dbcr_dac(task
) |= DBCR_DAC1W
;
1001 task
->thread
.regs
->msr
|= MSR_DE
;
1002 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1007 * Called by kernel/ptrace.c when detaching..
1009 * Make sure single step bits etc are not set.
1011 void ptrace_disable(struct task_struct
*child
)
1013 /* make sure the single step bit is not set. */
1014 user_disable_single_step(child
);
1017 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1018 static long set_intruction_bp(struct task_struct
*child
,
1019 struct ppc_hw_breakpoint
*bp_info
)
1022 int slot1_in_use
= ((child
->thread
.dbcr0
& DBCR0_IAC1
) != 0);
1023 int slot2_in_use
= ((child
->thread
.dbcr0
& DBCR0_IAC2
) != 0);
1024 int slot3_in_use
= ((child
->thread
.dbcr0
& DBCR0_IAC3
) != 0);
1025 int slot4_in_use
= ((child
->thread
.dbcr0
& DBCR0_IAC4
) != 0);
1027 if (dbcr_iac_range(child
) & DBCR_IAC12MODE
)
1029 if (dbcr_iac_range(child
) & DBCR_IAC34MODE
)
1032 if (bp_info
->addr
>= TASK_SIZE
)
1035 if (bp_info
->addr_mode
!= PPC_BREAKPOINT_MODE_EXACT
) {
1037 /* Make sure range is valid. */
1038 if (bp_info
->addr2
>= TASK_SIZE
)
1041 /* We need a pair of IAC regsisters */
1042 if ((!slot1_in_use
) && (!slot2_in_use
)) {
1044 child
->thread
.iac1
= bp_info
->addr
;
1045 child
->thread
.iac2
= bp_info
->addr2
;
1046 child
->thread
.dbcr0
|= DBCR0_IAC1
;
1047 if (bp_info
->addr_mode
==
1048 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE
)
1049 dbcr_iac_range(child
) |= DBCR_IAC12X
;
1051 dbcr_iac_range(child
) |= DBCR_IAC12I
;
1052 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1053 } else if ((!slot3_in_use
) && (!slot4_in_use
)) {
1055 child
->thread
.iac3
= bp_info
->addr
;
1056 child
->thread
.iac4
= bp_info
->addr2
;
1057 child
->thread
.dbcr0
|= DBCR0_IAC3
;
1058 if (bp_info
->addr_mode
==
1059 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE
)
1060 dbcr_iac_range(child
) |= DBCR_IAC34X
;
1062 dbcr_iac_range(child
) |= DBCR_IAC34I
;
1067 /* We only need one. If possible leave a pair free in
1068 * case a range is needed later
1070 if (!slot1_in_use
) {
1072 * Don't use iac1 if iac1-iac2 are free and either
1073 * iac3 or iac4 (but not both) are free
1075 if (slot2_in_use
|| (slot3_in_use
== slot4_in_use
)) {
1077 child
->thread
.iac1
= bp_info
->addr
;
1078 child
->thread
.dbcr0
|= DBCR0_IAC1
;
1082 if (!slot2_in_use
) {
1084 child
->thread
.iac2
= bp_info
->addr
;
1085 child
->thread
.dbcr0
|= DBCR0_IAC2
;
1086 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1087 } else if (!slot3_in_use
) {
1089 child
->thread
.iac3
= bp_info
->addr
;
1090 child
->thread
.dbcr0
|= DBCR0_IAC3
;
1091 } else if (!slot4_in_use
) {
1093 child
->thread
.iac4
= bp_info
->addr
;
1094 child
->thread
.dbcr0
|= DBCR0_IAC4
;
1100 child
->thread
.dbcr0
|= DBCR0_IDM
;
1101 child
->thread
.regs
->msr
|= MSR_DE
;
1106 static int del_instruction_bp(struct task_struct
*child
, int slot
)
1110 if ((child
->thread
.dbcr0
& DBCR0_IAC1
) == 0)
1113 if (dbcr_iac_range(child
) & DBCR_IAC12MODE
) {
1114 /* address range - clear slots 1 & 2 */
1115 child
->thread
.iac2
= 0;
1116 dbcr_iac_range(child
) &= ~DBCR_IAC12MODE
;
1118 child
->thread
.iac1
= 0;
1119 child
->thread
.dbcr0
&= ~DBCR0_IAC1
;
1122 if ((child
->thread
.dbcr0
& DBCR0_IAC2
) == 0)
1125 if (dbcr_iac_range(child
) & DBCR_IAC12MODE
)
1126 /* used in a range */
1128 child
->thread
.iac2
= 0;
1129 child
->thread
.dbcr0
&= ~DBCR0_IAC2
;
1131 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1133 if ((child
->thread
.dbcr0
& DBCR0_IAC3
) == 0)
1136 if (dbcr_iac_range(child
) & DBCR_IAC34MODE
) {
1137 /* address range - clear slots 3 & 4 */
1138 child
->thread
.iac4
= 0;
1139 dbcr_iac_range(child
) &= ~DBCR_IAC34MODE
;
1141 child
->thread
.iac3
= 0;
1142 child
->thread
.dbcr0
&= ~DBCR0_IAC3
;
1145 if ((child
->thread
.dbcr0
& DBCR0_IAC4
) == 0)
1148 if (dbcr_iac_range(child
) & DBCR_IAC34MODE
)
1149 /* Used in a range */
1151 child
->thread
.iac4
= 0;
1152 child
->thread
.dbcr0
&= ~DBCR0_IAC4
;
1161 static int set_dac(struct task_struct
*child
, struct ppc_hw_breakpoint
*bp_info
)
1164 (bp_info
->condition_mode
>> PPC_BREAKPOINT_CONDITION_BE_SHIFT
)
1166 int condition_mode
=
1167 bp_info
->condition_mode
& PPC_BREAKPOINT_CONDITION_MODE
;
1170 if (byte_enable
&& (condition_mode
== 0))
1173 if (bp_info
->addr
>= TASK_SIZE
)
1176 if ((dbcr_dac(child
) & (DBCR_DAC1R
| DBCR_DAC1W
)) == 0) {
1178 if (bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_READ
)
1179 dbcr_dac(child
) |= DBCR_DAC1R
;
1180 if (bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_WRITE
)
1181 dbcr_dac(child
) |= DBCR_DAC1W
;
1182 child
->thread
.dac1
= (unsigned long)bp_info
->addr
;
1183 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1185 child
->thread
.dvc1
=
1186 (unsigned long)bp_info
->condition_value
;
1187 child
->thread
.dbcr2
|=
1188 ((byte_enable
<< DBCR2_DVC1BE_SHIFT
) |
1189 (condition_mode
<< DBCR2_DVC1M_SHIFT
));
1192 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1193 } else if (child
->thread
.dbcr2
& DBCR2_DAC12MODE
) {
1194 /* Both dac1 and dac2 are part of a range */
1197 } else if ((dbcr_dac(child
) & (DBCR_DAC2R
| DBCR_DAC2W
)) == 0) {
1199 if (bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_READ
)
1200 dbcr_dac(child
) |= DBCR_DAC2R
;
1201 if (bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_WRITE
)
1202 dbcr_dac(child
) |= DBCR_DAC2W
;
1203 child
->thread
.dac2
= (unsigned long)bp_info
->addr
;
1204 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1206 child
->thread
.dvc2
=
1207 (unsigned long)bp_info
->condition_value
;
1208 child
->thread
.dbcr2
|=
1209 ((byte_enable
<< DBCR2_DVC2BE_SHIFT
) |
1210 (condition_mode
<< DBCR2_DVC2M_SHIFT
));
1215 child
->thread
.dbcr0
|= DBCR0_IDM
;
1216 child
->thread
.regs
->msr
|= MSR_DE
;
1221 static int del_dac(struct task_struct
*child
, int slot
)
1224 if ((dbcr_dac(child
) & (DBCR_DAC1R
| DBCR_DAC1W
)) == 0)
1227 child
->thread
.dac1
= 0;
1228 dbcr_dac(child
) &= ~(DBCR_DAC1R
| DBCR_DAC1W
);
1229 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1230 if (child
->thread
.dbcr2
& DBCR2_DAC12MODE
) {
1231 child
->thread
.dac2
= 0;
1232 child
->thread
.dbcr2
&= ~DBCR2_DAC12MODE
;
1234 child
->thread
.dbcr2
&= ~(DBCR2_DVC1M
| DBCR2_DVC1BE
);
1236 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1237 child
->thread
.dvc1
= 0;
1239 } else if (slot
== 2) {
1240 if ((dbcr_dac(child
) & (DBCR_DAC2R
| DBCR_DAC2W
)) == 0)
1243 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1244 if (child
->thread
.dbcr2
& DBCR2_DAC12MODE
)
1245 /* Part of a range */
1247 child
->thread
.dbcr2
&= ~(DBCR2_DVC2M
| DBCR2_DVC2BE
);
1249 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1250 child
->thread
.dvc2
= 0;
1252 child
->thread
.dac2
= 0;
1253 dbcr_dac(child
) &= ~(DBCR_DAC2R
| DBCR_DAC2W
);
1259 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1261 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1262 static int set_dac_range(struct task_struct
*child
,
1263 struct ppc_hw_breakpoint
*bp_info
)
1265 int mode
= bp_info
->addr_mode
& PPC_BREAKPOINT_MODE_MASK
;
1267 /* We don't allow range watchpoints to be used with DVC */
1268 if (bp_info
->condition_mode
)
1272 * Best effort to verify the address range. The user/supervisor bits
1273 * prevent trapping in kernel space, but let's fail on an obvious bad
1274 * range. The simple test on the mask is not fool-proof, and any
1275 * exclusive range will spill over into kernel space.
1277 if (bp_info
->addr
>= TASK_SIZE
)
1279 if (mode
== PPC_BREAKPOINT_MODE_MASK
) {
1281 * dac2 is a bitmask. Don't allow a mask that makes a
1282 * kernel space address from a valid dac1 value
1284 if (~((unsigned long)bp_info
->addr2
) >= TASK_SIZE
)
1288 * For range breakpoints, addr2 must also be a valid address
1290 if (bp_info
->addr2
>= TASK_SIZE
)
1294 if (child
->thread
.dbcr0
&
1295 (DBCR0_DAC1R
| DBCR0_DAC1W
| DBCR0_DAC2R
| DBCR0_DAC2W
))
1298 if (bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_READ
)
1299 child
->thread
.dbcr0
|= (DBCR0_DAC1R
| DBCR0_IDM
);
1300 if (bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_WRITE
)
1301 child
->thread
.dbcr0
|= (DBCR0_DAC1W
| DBCR0_IDM
);
1302 child
->thread
.dac1
= bp_info
->addr
;
1303 child
->thread
.dac2
= bp_info
->addr2
;
1304 if (mode
== PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
)
1305 child
->thread
.dbcr2
|= DBCR2_DAC12M
;
1306 else if (mode
== PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE
)
1307 child
->thread
.dbcr2
|= DBCR2_DAC12MX
;
1308 else /* PPC_BREAKPOINT_MODE_MASK */
1309 child
->thread
.dbcr2
|= DBCR2_DAC12MM
;
1310 child
->thread
.regs
->msr
|= MSR_DE
;
1314 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1316 static long ppc_set_hwdebug(struct task_struct
*child
,
1317 struct ppc_hw_breakpoint
*bp_info
)
1319 if (bp_info
->version
!= 1)
1321 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1323 * Check for invalid flags and combinations
1325 if ((bp_info
->trigger_type
== 0) ||
1326 (bp_info
->trigger_type
& ~(PPC_BREAKPOINT_TRIGGER_EXECUTE
|
1327 PPC_BREAKPOINT_TRIGGER_RW
)) ||
1328 (bp_info
->addr_mode
& ~PPC_BREAKPOINT_MODE_MASK
) ||
1329 (bp_info
->condition_mode
&
1330 ~(PPC_BREAKPOINT_CONDITION_MODE
|
1331 PPC_BREAKPOINT_CONDITION_BE_ALL
)))
1333 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1334 if (bp_info
->condition_mode
!= PPC_BREAKPOINT_CONDITION_NONE
)
1338 if (bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_EXECUTE
) {
1339 if ((bp_info
->trigger_type
!= PPC_BREAKPOINT_TRIGGER_EXECUTE
) ||
1340 (bp_info
->condition_mode
!= PPC_BREAKPOINT_CONDITION_NONE
))
1342 return set_intruction_bp(child
, bp_info
);
1344 if (bp_info
->addr_mode
== PPC_BREAKPOINT_MODE_EXACT
)
1345 return set_dac(child
, bp_info
);
1347 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1348 return set_dac_range(child
, bp_info
);
1352 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1354 * We only support one data breakpoint
1356 if (((bp_info
->trigger_type
& PPC_BREAKPOINT_TRIGGER_RW
) == 0) ||
1357 ((bp_info
->trigger_type
& ~PPC_BREAKPOINT_TRIGGER_RW
) != 0) ||
1358 (bp_info
->trigger_type
!= PPC_BREAKPOINT_TRIGGER_WRITE
) ||
1359 (bp_info
->addr_mode
!= PPC_BREAKPOINT_MODE_EXACT
) ||
1360 (bp_info
->condition_mode
!= PPC_BREAKPOINT_CONDITION_NONE
))
1363 if (child
->thread
.dabr
)
1366 if ((unsigned long)bp_info
->addr
>= TASK_SIZE
)
1369 child
->thread
.dabr
= (unsigned long)bp_info
->addr
;
1372 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1375 static long ppc_del_hwdebug(struct task_struct
*child
, long addr
, long data
)
1377 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1381 rc
= del_instruction_bp(child
, (int)data
);
1383 rc
= del_dac(child
, (int)data
- 4);
1386 if (!DBCR_ACTIVE_EVENTS(child
->thread
.dbcr0
,
1387 child
->thread
.dbcr1
)) {
1388 child
->thread
.dbcr0
&= ~DBCR0_IDM
;
1389 child
->thread
.regs
->msr
&= ~MSR_DE
;
1396 if (child
->thread
.dabr
== 0)
1399 child
->thread
.dabr
= 0;
1406 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
1407 * we mark them as obsolete now, they will be removed in a future version
1409 static long arch_ptrace_old(struct task_struct
*child
, long request
, long addr
,
1413 case PPC_PTRACE_GETREGS
: /* Get GPRs 0 - 31. */
1414 return copy_regset_to_user(child
, &user_ppc_native_view
,
1415 REGSET_GPR
, 0, 32 * sizeof(long),
1416 (void __user
*) data
);
1418 case PPC_PTRACE_SETREGS
: /* Set GPRs 0 - 31. */
1419 return copy_regset_from_user(child
, &user_ppc_native_view
,
1420 REGSET_GPR
, 0, 32 * sizeof(long),
1421 (const void __user
*) data
);
1423 case PPC_PTRACE_GETFPREGS
: /* Get FPRs 0 - 31. */
1424 return copy_regset_to_user(child
, &user_ppc_native_view
,
1425 REGSET_FPR
, 0, 32 * sizeof(double),
1426 (void __user
*) data
);
1428 case PPC_PTRACE_SETFPREGS
: /* Set FPRs 0 - 31. */
1429 return copy_regset_from_user(child
, &user_ppc_native_view
,
1430 REGSET_FPR
, 0, 32 * sizeof(double),
1431 (const void __user
*) data
);
1437 long arch_ptrace(struct task_struct
*child
, long request
, long addr
, long data
)
1442 /* read the word at location addr in the USER area. */
1443 case PTRACE_PEEKUSR
: {
1444 unsigned long index
, tmp
;
1447 /* convert to index and check */
1449 index
= (unsigned long) addr
>> 2;
1450 if ((addr
& 3) || (index
> PT_FPSCR
)
1451 || (child
->thread
.regs
== NULL
))
1453 index
= (unsigned long) addr
>> 3;
1454 if ((addr
& 7) || (index
> PT_FPSCR
))
1458 CHECK_FULL_REGS(child
->thread
.regs
);
1459 if (index
< PT_FPR0
) {
1460 tmp
= ptrace_get_reg(child
, (int) index
);
1462 flush_fp_to_thread(child
);
1463 tmp
= ((unsigned long *)child
->thread
.fpr
)
1464 [TS_FPRWIDTH
* (index
- PT_FPR0
)];
1466 ret
= put_user(tmp
,(unsigned long __user
*) data
);
1470 /* write the word at location addr in the USER area */
1471 case PTRACE_POKEUSR
: {
1472 unsigned long index
;
1475 /* convert to index and check */
1477 index
= (unsigned long) addr
>> 2;
1478 if ((addr
& 3) || (index
> PT_FPSCR
)
1479 || (child
->thread
.regs
== NULL
))
1481 index
= (unsigned long) addr
>> 3;
1482 if ((addr
& 7) || (index
> PT_FPSCR
))
1486 CHECK_FULL_REGS(child
->thread
.regs
);
1487 if (index
< PT_FPR0
) {
1488 ret
= ptrace_put_reg(child
, index
, data
);
1490 flush_fp_to_thread(child
);
1491 ((unsigned long *)child
->thread
.fpr
)
1492 [TS_FPRWIDTH
* (index
- PT_FPR0
)] = data
;
1498 case PPC_PTRACE_GETHWDBGINFO
: {
1499 struct ppc_debug_info dbginfo
;
1501 dbginfo
.version
= 1;
1502 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1503 dbginfo
.num_instruction_bps
= CONFIG_PPC_ADV_DEBUG_IACS
;
1504 dbginfo
.num_data_bps
= CONFIG_PPC_ADV_DEBUG_DACS
;
1505 dbginfo
.num_condition_regs
= CONFIG_PPC_ADV_DEBUG_DVCS
;
1506 dbginfo
.data_bp_alignment
= 4;
1507 dbginfo
.sizeof_condition
= 4;
1508 dbginfo
.features
= PPC_DEBUG_FEATURE_INSN_BP_RANGE
|
1509 PPC_DEBUG_FEATURE_INSN_BP_MASK
;
1510 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1512 PPC_DEBUG_FEATURE_DATA_BP_RANGE
|
1513 PPC_DEBUG_FEATURE_DATA_BP_MASK
;
1515 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1516 dbginfo
.num_instruction_bps
= 0;
1517 dbginfo
.num_data_bps
= 1;
1518 dbginfo
.num_condition_regs
= 0;
1520 dbginfo
.data_bp_alignment
= 8;
1522 dbginfo
.data_bp_alignment
= 4;
1524 dbginfo
.sizeof_condition
= 0;
1525 dbginfo
.features
= 0;
1526 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1528 if (!access_ok(VERIFY_WRITE
, data
,
1529 sizeof(struct ppc_debug_info
)))
1531 ret
= __copy_to_user((struct ppc_debug_info __user
*)data
,
1532 &dbginfo
, sizeof(struct ppc_debug_info
)) ?
1537 case PPC_PTRACE_SETHWDEBUG
: {
1538 struct ppc_hw_breakpoint bp_info
;
1540 if (!access_ok(VERIFY_READ
, data
,
1541 sizeof(struct ppc_hw_breakpoint
)))
1543 ret
= __copy_from_user(&bp_info
,
1544 (struct ppc_hw_breakpoint __user
*)data
,
1545 sizeof(struct ppc_hw_breakpoint
)) ?
1548 ret
= ppc_set_hwdebug(child
, &bp_info
);
1552 case PPC_PTRACE_DELHWDEBUG
: {
1553 ret
= ppc_del_hwdebug(child
, addr
, data
);
1557 case PTRACE_GET_DEBUGREG
: {
1559 /* We only support one DABR and no IABRS at the moment */
1562 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1563 ret
= put_user(child
->thread
.dac1
,
1564 (unsigned long __user
*)data
);
1566 ret
= put_user(child
->thread
.dabr
,
1567 (unsigned long __user
*)data
);
1572 case PTRACE_SET_DEBUGREG
:
1573 ret
= ptrace_set_debugreg(child
, addr
, data
);
1577 case PTRACE_GETREGS64
:
1579 case PTRACE_GETREGS
: /* Get all pt_regs from the child. */
1580 return copy_regset_to_user(child
, &user_ppc_native_view
,
1582 0, sizeof(struct pt_regs
),
1583 (void __user
*) data
);
1586 case PTRACE_SETREGS64
:
1588 case PTRACE_SETREGS
: /* Set all gp regs in the child. */
1589 return copy_regset_from_user(child
, &user_ppc_native_view
,
1591 0, sizeof(struct pt_regs
),
1592 (const void __user
*) data
);
1594 case PTRACE_GETFPREGS
: /* Get the child FPU state (FPR0...31 + FPSCR) */
1595 return copy_regset_to_user(child
, &user_ppc_native_view
,
1597 0, sizeof(elf_fpregset_t
),
1598 (void __user
*) data
);
1600 case PTRACE_SETFPREGS
: /* Set the child FPU state (FPR0...31 + FPSCR) */
1601 return copy_regset_from_user(child
, &user_ppc_native_view
,
1603 0, sizeof(elf_fpregset_t
),
1604 (const void __user
*) data
);
1606 #ifdef CONFIG_ALTIVEC
1607 case PTRACE_GETVRREGS
:
1608 return copy_regset_to_user(child
, &user_ppc_native_view
,
1610 0, (33 * sizeof(vector128
) +
1612 (void __user
*) data
);
1614 case PTRACE_SETVRREGS
:
1615 return copy_regset_from_user(child
, &user_ppc_native_view
,
1617 0, (33 * sizeof(vector128
) +
1619 (const void __user
*) data
);
1622 case PTRACE_GETVSRREGS
:
1623 return copy_regset_to_user(child
, &user_ppc_native_view
,
1625 0, 32 * sizeof(double),
1626 (void __user
*) data
);
1628 case PTRACE_SETVSRREGS
:
1629 return copy_regset_from_user(child
, &user_ppc_native_view
,
1631 0, 32 * sizeof(double),
1632 (const void __user
*) data
);
1635 case PTRACE_GETEVRREGS
:
1636 /* Get the child spe register state. */
1637 return copy_regset_to_user(child
, &user_ppc_native_view
,
1638 REGSET_SPE
, 0, 35 * sizeof(u32
),
1639 (void __user
*) data
);
1641 case PTRACE_SETEVRREGS
:
1642 /* Set the child spe register state. */
1643 return copy_regset_from_user(child
, &user_ppc_native_view
,
1644 REGSET_SPE
, 0, 35 * sizeof(u32
),
1645 (const void __user
*) data
);
1648 /* Old reverse args ptrace callss */
1649 case PPC_PTRACE_GETREGS
: /* Get GPRs 0 - 31. */
1650 case PPC_PTRACE_SETREGS
: /* Set GPRs 0 - 31. */
1651 case PPC_PTRACE_GETFPREGS
: /* Get FPRs 0 - 31. */
1652 case PPC_PTRACE_SETFPREGS
: /* Get FPRs 0 - 31. */
1653 ret
= arch_ptrace_old(child
, request
, addr
, data
);
1657 ret
= ptrace_request(child
, request
, addr
, data
);
1664 * We must return the syscall number to actually look up in the table.
1665 * This can be -1L to skip running any syscall at all.
1667 long do_syscall_trace_enter(struct pt_regs
*regs
)
1671 secure_computing(regs
->gpr
[0]);
1673 if (test_thread_flag(TIF_SYSCALL_TRACE
) &&
1674 tracehook_report_syscall_entry(regs
))
1676 * Tracing decided this syscall should not happen.
1677 * We'll return a bogus call number to get an ENOSYS
1678 * error, but leave the original number in regs->gpr[0].
1682 if (unlikely(current
->audit_context
)) {
1684 if (!test_thread_flag(TIF_32BIT
))
1685 audit_syscall_entry(AUDIT_ARCH_PPC64
,
1687 regs
->gpr
[3], regs
->gpr
[4],
1688 regs
->gpr
[5], regs
->gpr
[6]);
1691 audit_syscall_entry(AUDIT_ARCH_PPC
,
1693 regs
->gpr
[3] & 0xffffffff,
1694 regs
->gpr
[4] & 0xffffffff,
1695 regs
->gpr
[5] & 0xffffffff,
1696 regs
->gpr
[6] & 0xffffffff);
1699 return ret
?: regs
->gpr
[0];
1702 void do_syscall_trace_leave(struct pt_regs
*regs
)
1706 if (unlikely(current
->audit_context
))
1707 audit_syscall_exit((regs
->ccr
&0x10000000)?AUDITSC_FAILURE
:AUDITSC_SUCCESS
,
1710 step
= test_thread_flag(TIF_SINGLESTEP
);
1711 if (step
|| test_thread_flag(TIF_SYSCALL_TRACE
))
1712 tracehook_report_syscall_exit(regs
, step
);