arch/powerpc/kernel/head_64.S

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
   6  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
   7  *  Adapted for Power Macintosh by Paul Mackerras.
   8  *  Low-level exception handlers and MMU support
   9  *  rewritten by Paul Mackerras.
  10  *    Copyright (C) 1996 Paul Mackerras.
  11  *
  12  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  13  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  14  *
  15  *  This file contains the entry point for the 64-bit kernel along
  16  *  with some early initialization code common to all 64-bit powerpc
  17  *  variants.
  18  *
  19  *  This program is free software; you can redistribute it and/or
  20  *  modify it under the terms of the GNU General Public License
  21  *  as published by the Free Software Foundation; either version
  22  *  2 of the License, or (at your option) any later version.
  23  */
  24
  25 #include <linux/threads.h>
  26 #include <asm/reg.h>
  27 #include <asm/page.h>
  28 #include <asm/mmu.h>
  29 #include <asm/ppc_asm.h>
  30 #include <asm/asm-offsets.h>
  31 #include <asm/bug.h>
  32 #include <asm/cputable.h>
  33 #include <asm/setup.h>
  34 #include <asm/hvcall.h>
  35 #include <asm/thread_info.h>
  36 #include <asm/firmware.h>
  37 #include <asm/page_64.h>
  38 #include <asm/irqflags.h>
  39 #include <asm/kvm_book3s_asm.h>
  40 #include <asm/ptrace.h>
  41 #include <asm/hw_irq.h>
  42
  43 /* The physical memory is laid out such that the secondary processor
  44  * spin code sits at 0x0000...0x00ff. On server, the vectors follow
  45  * using the layout described in exceptions-64s.S
  46  */
  47
  48 /*
  49  * Entering into this code we make the following assumptions:
  50  *
  51  *  For pSeries or server processors:
  52  *   1. The MMU is off & open firmware is running in real mode.
  53  *   2. The kernel is entered at __start
  54  * -or- For OPAL entry:
  55  *   1. The MMU is off, processor in HV mode, primary CPU enters at 0
  56  *      with device-tree in gpr3. We also get OPAL base in r8 and
  57  *      entry in r9 for debugging purposes
  58  *   2. Secondary processors enter at 0x60 with PIR in gpr3
  59  *
  60  *  For Book3E processors:
  61  *   1. The MMU is on running in AS0 in a state defined in ePAPR
  62  *   2. The kernel is entered at __start
  63  */
  64
  65         .text
  66         .globl  _stext
  67 _stext:
  68 _GLOBAL(__start)
  69         /* NOP this out unconditionally */
  70 BEGIN_FTR_SECTION
  71         b       .__start_initialization_multiplatform
  72 END_FTR_SECTION(0, 1)
  73
  74         /* Catch branch to 0 in real mode */
  75         trap
  76
  77         /* Secondary processors spin on this value until it becomes nonzero.
  78          * When it does it contains the real address of the descriptor
  79          * of the function that the cpu should jump to to continue
  80          * initialization.
  81          */
  82         .globl  __secondary_hold_spinloop
  83 __secondary_hold_spinloop:
  84         .llong  0x0
  85
  86         /* Secondary processors write this value with their cpu # */
  87         /* after they enter the spin loop immediately below.      */
  88         .globl  __secondary_hold_acknowledge
  89 __secondary_hold_acknowledge:
  90         .llong  0x0
  91
  92 #ifdef CONFIG_RELOCATABLE
  93         /* This flag is set to 1 by a loader if the kernel should run
  94          * at the loaded address instead of the linked address.  This
  95          * is used by kexec-tools to keep the the kdump kernel in the
  96          * crash_kernel region.  The loader is responsible for
  97          * observing the alignment requirement.
  98          */
  99         /* Do not move this variable as kexec-tools knows about it. */
 100         . = 0x5c
 101         .globl  __run_at_load
 102 __run_at_load:
 103         .long   0x72756e30      /* "run0" -- relocate to 0 by default */
 104 #endif
 105
 106         . = 0x60
 107 /*
 108  * The following code is used to hold secondary processors
 109  * in a spin loop after they have entered the kernel, but
 110  * before the bulk of the kernel has been relocated.  This code
 111  * is relocated to physical address 0x60 before prom_init is run.
 112  * All of it must fit below the first exception vector at 0x100.
 113  * Use .globl here not _GLOBAL because we want __secondary_hold
 114  * to be the actual text address, not a descriptor.
 115  */
 116         .globl  __secondary_hold
 117 __secondary_hold:
 118 #ifndef CONFIG_PPC_BOOK3E
 119         mfmsr   r24
 120         ori     r24,r24,MSR_RI
 121         mtmsrd  r24                     /* RI on */
 122 #endif
 123         /* Grab our physical cpu number */
 124         mr      r24,r3
 125         /* stash r4 for book3e */
 126         mr      r25,r4
 127
 128         /* Tell the master cpu we're here */
 129         /* Relocation is off & we are located at an address less */
 130         /* than 0x100, so only need to grab low order offset.    */
 131         std     r24,__secondary_hold_acknowledge-_stext(0)
 132         sync
 133
 134         li      r26,0
 135 #ifdef CONFIG_PPC_BOOK3E
 136         tovirt(r26,r26)
 137 #endif
 138         /* All secondary cpus wait here until told to start. */
 139 100:    ld      r4,__secondary_hold_spinloop-_stext(r26)
 140         cmpdi   0,r4,0
 141         beq     100b
 142
 143 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
 144 #ifdef CONFIG_PPC_BOOK3E
 145         tovirt(r4,r4)
 146 #endif
 147         ld      r4,0(r4)                /* deref function descriptor */
 148         mtctr   r4
 149         mr      r3,r24
 150         /*
 151          * it may be the case that other platforms have r4 right to
 152          * begin with, this gives us some safety in case it is not
 153          */
 154 #ifdef CONFIG_PPC_BOOK3E
 155         mr      r4,r25
 156 #else
 157         li      r4,0
 158 #endif
 159         /* Make sure that patched code is visible */
 160         isync
 161         bctr
 162 #else
 163         BUG_OPCODE
 164 #endif
 165
 166 /* This value is used to mark exception frames on the stack. */
 167         .section ".toc","aw"
 168 exception_marker:
 169         .tc     ID_72656773_68657265[TC],0x7265677368657265
 170         .text
 171
 172 /*
 173  * On server, we include the exception vectors code here as it
 174  * relies on absolute addressing which is only possible within
 175  * this compilation unit
 176  */
 177 #ifdef CONFIG_PPC_BOOK3S
 178 #include "exceptions-64s.S"
 179 #endif
 180
 181 _GLOBAL(generic_secondary_thread_init)
 182         mr      r24,r3
 183
 184         /* turn on 64-bit mode */
 185         bl      .enable_64b_mode
 186
 187         /* get a valid TOC pointer, wherever we're mapped at */
 188         bl      .relative_toc
 189         tovirt(r2,r2)
 190
 191 #ifdef CONFIG_PPC_BOOK3E
 192         /* Book3E initialization */
 193         mr      r3,r24
 194         bl      .book3e_secondary_thread_init
 195 #endif
 196         b       generic_secondary_common_init
 197
 198 /*
 199  * On pSeries and most other platforms, secondary processors spin
 200  * in the following code.
 201  * At entry, r3 = this processor's number (physical cpu id)
 202  *
 203  * On Book3E, r4 = 1 to indicate that the initial TLB entry for
 204  * this core already exists (setup via some other mechanism such
 205  * as SCOM before entry).
 206  */
 207 _GLOBAL(generic_secondary_smp_init)
 208         mr      r24,r3
 209         mr      r25,r4
 210
 211         /* turn on 64-bit mode */
 212         bl      .enable_64b_mode
 213
 214         /* get a valid TOC pointer, wherever we're mapped at */
 215         bl      .relative_toc
 216         tovirt(r2,r2)
 217
 218 #ifdef CONFIG_PPC_BOOK3E
 219         /* Book3E initialization */
 220         mr      r3,r24
 221         mr      r4,r25
 222         bl      .book3e_secondary_core_init
 223 #endif
 224
 225 generic_secondary_common_init:
 226         /* Set up a paca value for this processor. Since we have the
 227          * physical cpu id in r24, we need to search the pacas to find
 228          * which logical id maps to our physical one.
 229          */
 230         LOAD_REG_ADDR(r13, paca)        /* Load paca pointer             */
 231         ld      r13,0(r13)              /* Get base vaddr of paca array  */
 232 #ifndef CONFIG_SMP
 233         addi    r13,r13,PACA_SIZE       /* know r13 if used accidentally */
 234         b       .kexec_wait             /* wait for next kernel if !SMP  */
 235 #else
 236         LOAD_REG_ADDR(r7, nr_cpu_ids)   /* Load nr_cpu_ids address       */
 237         lwz     r7,0(r7)                /* also the max paca allocated   */
 238         li      r5,0                    /* logical cpu id                */
 239 1:      lhz     r6,PACAHWCPUID(r13)     /* Load HW procid from paca      */
 240         cmpw    r6,r24                  /* Compare to our id             */
 241         beq     2f
 242         addi    r13,r13,PACA_SIZE       /* Loop to next PACA on miss     */
 243         addi    r5,r5,1
 244         cmpw    r5,r7                   /* Check if more pacas exist     */
 245         blt     1b
 246
 247         mr      r3,r24                  /* not found, copy phys to r3    */
 248         b       .kexec_wait             /* next kernel might do better   */
 249
 250 2:      SET_PACA(r13)
 251 #ifdef CONFIG_PPC_BOOK3E
 252         addi    r12,r13,PACA_EXTLB      /* and TLB exc frame in another  */
 253         mtspr   SPRN_SPRG_TLB_EXFRAME,r12
 254 #endif
 255
 256         /* From now on, r24 is expected to be logical cpuid */
 257         mr      r24,r5
 258
 259         /* See if we need to call a cpu state restore handler */
 260         LOAD_REG_ADDR(r23, cur_cpu_spec)
 261         ld      r23,0(r23)
 262         ld      r23,CPU_SPEC_RESTORE(r23)
 263         cmpdi   0,r23,0
 264         beq     3f
 265         ld      r23,0(r23)
 266         mtctr   r23
 267         bctrl
 268
 269 3:      LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
 270         lwarx   r4,0,r3
 271         subi    r4,r4,1
 272         stwcx.  r4,0,r3
 273         bne     3b
 274         isync
 275
 276 4:      HMT_LOW
 277         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor should */
 278                                         /* start.                        */
 279         cmpwi   0,r23,0
 280         beq     4b                      /* Loop until told to go         */
 281
 282         sync                            /* order paca.run and cur_cpu_spec */
 283         isync                           /* In case code patching happened */
 284
 285         /* Create a temp kernel stack for use before relocation is on.  */
 286         ld      r1,PACAEMERGSP(r13)
 287         subi    r1,r1,STACK_FRAME_OVERHEAD
 288
 289         b       __secondary_start
 290 #endif /* SMP */
 291
 292 /*
 293  * Turn the MMU off.
 294  * Assumes we're mapped EA == RA if the MMU is on.
 295  */
 296 #ifdef CONFIG_PPC_BOOK3S
 297 _STATIC(__mmu_off)
 298         mfmsr   r3
 299         andi.   r0,r3,MSR_IR|MSR_DR
 300         beqlr
 301         mflr    r4
 302         andc    r3,r3,r0
 303         mtspr   SPRN_SRR0,r4
 304         mtspr   SPRN_SRR1,r3
 305         sync
 306         rfid
 307         b       .       /* prevent speculative execution */
 308 #endif
 309
 310
 311 /*
 312  * Here is our main kernel entry point. We support currently 2 kind of entries
 313  * depending on the value of r5.
 314  *
 315  *   r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
 316  *                 in r3...r7
 317  *
 318  *   r5 == NULL -> kexec style entry. r3 is a physical pointer to the
 319  *                 DT block, r4 is a physical pointer to the kernel itself
 320  *
 321  */
 322 _GLOBAL(__start_initialization_multiplatform)
 323         /* Make sure we are running in 64 bits mode */
 324         bl      .enable_64b_mode
 325
 326         /* Get TOC pointer (current runtime address) */
 327         bl      .relative_toc
 328
 329         /* find out where we are now */
 330         bcl     20,31,$+4
 331 0:      mflr    r26                     /* r26 = runtime addr here */
 332         addis   r26,r26,(_stext - 0b)@ha
 333         addi    r26,r26,(_stext - 0b)@l /* current runtime base addr */
 334
 335         /*
 336          * Are we booted from a PROM Of-type client-interface ?
 337          */
 338         cmpldi  cr0,r5,0
 339         beq     1f
 340         b       .__boot_from_prom               /* yes -> prom */
 341 1:
 342         /* Save parameters */
 343         mr      r31,r3
 344         mr      r30,r4
 345 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
 346         /* Save OPAL entry */
 347         mr      r28,r8
 348         mr      r29,r9
 349 #endif
 350
 351 #ifdef CONFIG_PPC_BOOK3E
 352         bl      .start_initialization_book3e
 353         b       .__after_prom_start
 354 #else
 355         /* Setup some critical 970 SPRs before switching MMU off */
 356         mfspr   r0,SPRN_PVR
 357         srwi    r0,r0,16
 358         cmpwi   r0,0x39         /* 970 */
 359         beq     1f
 360         cmpwi   r0,0x3c         /* 970FX */
 361         beq     1f
 362         cmpwi   r0,0x44         /* 970MP */
 363         beq     1f
 364         cmpwi   r0,0x45         /* 970GX */
 365         bne     2f
 366 1:      bl      .__cpu_preinit_ppc970
 367 2:
 368
 369         /* Switch off MMU if not already off */
 370         bl      .__mmu_off
 371         b       .__after_prom_start
 372 #endif /* CONFIG_PPC_BOOK3E */
 373
 374 _INIT_STATIC(__boot_from_prom)
 375 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
 376         /* Save parameters */
 377         mr      r31,r3
 378         mr      r30,r4
 379         mr      r29,r5
 380         mr      r28,r6
 381         mr      r27,r7
 382
 383         /*
 384          * Align the stack to 16-byte boundary
 385          * Depending on the size and layout of the ELF sections in the initial
 386          * boot binary, the stack pointer may be unaligned on PowerMac
 387          */
 388         rldicr  r1,r1,0,59
 389
 390 #ifdef CONFIG_RELOCATABLE
 391         /* Relocate code for where we are now */
 392         mr      r3,r26
 393         bl      .relocate
 394 #endif
 395
 396         /* Restore parameters */
 397         mr      r3,r31
 398         mr      r4,r30
 399         mr      r5,r29
 400         mr      r6,r28
 401         mr      r7,r27
 402
 403         /* Do all of the interaction with OF client interface */
 404         mr      r8,r26
 405         bl      .prom_init
 406 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
 407
 408         /* We never return. We also hit that trap if trying to boot
 409          * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
 410         trap
 411
 412 _STATIC(__after_prom_start)
 413 #ifdef CONFIG_RELOCATABLE
 414         /* process relocations for the final address of the kernel */
 415         lis     r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
 416         sldi    r25,r25,32
 417         lwz     r7,__run_at_load-_stext(r26)
 418         cmplwi  cr0,r7,1        /* flagged to stay where we are ? */
 419         bne     1f
 420         add     r25,r25,r26
 421 1:      mr      r3,r25
 422         bl      .relocate
 423 #endif
 424
 425 /*
 426  * We need to run with _stext at physical address PHYSICAL_START.
 427  * This will leave some code in the first 256B of
 428  * real memory, which are reserved for software use.
 429  *
 430  * Note: This process overwrites the OF exception vectors.
 431  */
 432         li      r3,0                    /* target addr */
 433 #ifdef CONFIG_PPC_BOOK3E
 434         tovirt(r3,r3)                   /* on booke, we already run at PAGE_OFFSET */
 435 #endif
 436         mr.     r4,r26                  /* In some cases the loader may  */
 437         beq     9f                      /* have already put us at zero */
 438         li      r6,0x100                /* Start offset, the first 0x100 */
 439                                         /* bytes were copied earlier.    */
 440 #ifdef CONFIG_PPC_BOOK3E
 441         tovirt(r6,r6)                   /* on booke, we already run at PAGE_OFFSET */
 442 #endif
 443
 444 #ifdef CONFIG_RELOCATABLE
 445 /*
 446  * Check if the kernel has to be running as relocatable kernel based on the
 447  * variable __run_at_load, if it is set the kernel is treated as relocatable
 448  * kernel, otherwise it will be moved to PHYSICAL_START
 449  */
 450         lwz     r7,__run_at_load-_stext(r26)
 451         cmplwi  cr0,r7,1
 452         bne     3f
 453
 454         /* just copy interrupts */
 455         LOAD_REG_IMMEDIATE(r5, __end_interrupts - _stext)
 456         b       5f
 457 3:
 458 #endif
 459         lis     r5,(copy_to_here - _stext)@ha
 460         addi    r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
 461
 462         bl      .copy_and_flush         /* copy the first n bytes        */
 463                                         /* this includes the code being  */
 464                                         /* executed here.                */
 465         addis   r8,r3,(4f - _stext)@ha  /* Jump to the copy of this code */
 466         addi    r8,r8,(4f - _stext)@l   /* that we just made */
 467         mtctr   r8
 468         bctr
 469
 470 .balign 8
 471 p_end:  .llong  _end - _stext
 472
 473 4:      /* Now copy the rest of the kernel up to _end */
 474         addis   r5,r26,(p_end - _stext)@ha
 475         ld      r5,(p_end - _stext)@l(r5)       /* get _end */
 476 5:      bl      .copy_and_flush         /* copy the rest */
 477
 478 9:      b       .start_here_multiplatform
 479
 480 /*
 481  * Copy routine used to copy the kernel to start at physical address 0
 482  * and flush and invalidate the caches as needed.
 483  * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
 484  * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
 485  *
 486  * Note: this routine *only* clobbers r0, r6 and lr
 487  */
 488 _GLOBAL(copy_and_flush)
 489         addi    r5,r5,-8
 490         addi    r6,r6,-8
 491 4:      li      r0,8                    /* Use the smallest common      */
 492                                         /* denominator cache line       */
 493                                         /* size.  This results in       */
 494                                         /* extra cache line flushes     */
 495                                         /* but operation is correct.    */
 496                                         /* Can't get cache line size    */
 497                                         /* from NACA as it is being     */
 498                                         /* moved too.                   */
 499
 500         mtctr   r0                      /* put # words/line in ctr      */
 501 3:      addi    r6,r6,8                 /* copy a cache line            */
 502         ldx     r0,r6,r4
 503         stdx    r0,r6,r3
 504         bdnz    3b
 505         dcbst   r6,r3                   /* write it to memory           */
 506         sync
 507         icbi    r6,r3                   /* flush the icache line        */
 508         cmpld   0,r6,r5
 509         blt     4b
 510         sync
 511         addi    r5,r5,8
 512         addi    r6,r6,8
 513         isync
 514         blr
 515
 516 .align 8
 517 copy_to_here:
 518
 519 #ifdef CONFIG_SMP
 520 #ifdef CONFIG_PPC_PMAC
 521 /*
 522  * On PowerMac, secondary processors starts from the reset vector, which
 523  * is temporarily turned into a call to one of the functions below.
 524  */
 525         .section ".text";
 526         .align 2 ;
 527
 528         .globl  __secondary_start_pmac_0
 529 __secondary_start_pmac_0:
 530         /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
 531         li      r24,0
 532         b       1f
 533         li      r24,1
 534         b       1f
 535         li      r24,2
 536         b       1f
 537         li      r24,3
 538 1:
 539
 540 _GLOBAL(pmac_secondary_start)
 541         /* turn on 64-bit mode */
 542         bl      .enable_64b_mode
 543
 544         li      r0,0
 545         mfspr   r3,SPRN_HID4
 546         rldimi  r3,r0,40,23     /* clear bit 23 (rm_ci) */
 547         sync
 548         mtspr   SPRN_HID4,r3
 549         isync
 550         sync
 551         slbia
 552
 553         /* get TOC pointer (real address) */
 554         bl      .relative_toc
 555         tovirt(r2,r2)
 556
 557         /* Copy some CPU settings from CPU 0 */
 558         bl      .__restore_cpu_ppc970
 559
 560         /* pSeries do that early though I don't think we really need it */
 561         mfmsr   r3
 562         ori     r3,r3,MSR_RI
 563         mtmsrd  r3                      /* RI on */
 564
 565         /* Set up a paca value for this processor. */
 566         LOAD_REG_ADDR(r4,paca)          /* Load paca pointer            */
 567         ld      r4,0(r4)                /* Get base vaddr of paca array */
 568         mulli   r13,r24,PACA_SIZE       /* Calculate vaddr of right paca */
 569         add     r13,r13,r4              /* for this processor.          */
 570         SET_PACA(r13)                   /* Save vaddr of paca in an SPRG*/
 571
 572         /* Mark interrupts soft and hard disabled (they might be enabled
 573          * in the PACA when doing hotplug)
 574          */
 575         li      r0,0
 576         stb     r0,PACASOFTIRQEN(r13)
 577         li      r0,PACA_IRQ_HARD_DIS
 578         stb     r0,PACAIRQHAPPENED(r13)
 579
 580         /* Create a temp kernel stack for use before relocation is on.  */
 581         ld      r1,PACAEMERGSP(r13)
 582         subi    r1,r1,STACK_FRAME_OVERHEAD
 583
 584         b       __secondary_start
 585
 586 #endif /* CONFIG_PPC_PMAC */
 587
 588 /*
 589  * This function is called after the master CPU has released the
 590  * secondary processors.  The execution environment is relocation off.
 591  * The paca for this processor has the following fields initialized at
 592  * this point:
 593  *   1. Processor number
 594  *   2. Segment table pointer (virtual address)
 595  * On entry the following are set:
 596  *   r1        = stack pointer (real addr of temp stack)
 597  *   r24       = cpu# (in Linux terms)
 598  *   r13       = paca virtual address
 599  *   SPRG_PACA = paca virtual address
 600  */
 601         .section ".text";
 602         .align 2 ;
 603
 604         .globl  __secondary_start
 605 __secondary_start:
 606         /* Set thread priority to MEDIUM */
 607         HMT_MEDIUM
 608
 609         /* Initialize the kernel stack */
 610         LOAD_REG_ADDR(r3, current_set)
 611         sldi    r28,r24,3               /* get current_set[cpu#]         */
 612         ldx     r14,r3,r28
 613         addi    r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
 614         std     r14,PACAKSAVE(r13)
 615
 616         /* Do early setup for that CPU (stab, slb, hash table pointer) */
 617         bl      .early_setup_secondary
 618
 619         /*
 620          * setup the new stack pointer, but *don't* use this until
 621          * translation is on.
 622          */
 623         mr      r1, r14
 624
 625         /* Clear backchain so we get nice backtraces */
 626         li      r7,0
 627         mtlr    r7
 628
 629         /* Mark interrupts soft and hard disabled (they might be enabled
 630          * in the PACA when doing hotplug)
 631          */
 632         stb     r7,PACASOFTIRQEN(r13)
 633         li      r0,PACA_IRQ_HARD_DIS
 634         stb     r0,PACAIRQHAPPENED(r13)
 635
 636         /* enable MMU and jump to start_secondary */
 637         LOAD_REG_ADDR(r3, .start_secondary_prolog)
 638         LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
 639
 640         mtspr   SPRN_SRR0,r3
 641         mtspr   SPRN_SRR1,r4
 642         RFI
 643         b       .       /* prevent speculative execution */
 644
 645 /*
 646  * Running with relocation on at this point.  All we want to do is
 647  * zero the stack back-chain pointer and get the TOC virtual address
 648  * before going into C code.
 649  */
 650 _GLOBAL(start_secondary_prolog)
 651         ld      r2,PACATOC(r13)
 652         li      r3,0
 653         std     r3,0(r1)                /* Zero the stack frame pointer */
 654         bl      .start_secondary
 655         b       .
 656 /*
 657  * Reset stack pointer and call start_secondary
 658  * to continue with online operation when woken up
 659  * from cede in cpu offline.
 660  */
 661 _GLOBAL(start_secondary_resume)
 662         ld      r1,PACAKSAVE(r13)       /* Reload kernel stack pointer */
 663         li      r3,0
 664         std     r3,0(r1)                /* Zero the stack frame pointer */
 665         bl      .start_secondary
 666         b       .
 667 #endif
 668
 669 /*
 670  * This subroutine clobbers r11 and r12
 671  */
 672 _GLOBAL(enable_64b_mode)
 673         mfmsr   r11                     /* grab the current MSR */
 674 #ifdef CONFIG_PPC_BOOK3E
 675         oris    r11,r11,0x8000          /* CM bit set, we'll set ICM later */
 676         mtmsr   r11
 677 #else /* CONFIG_PPC_BOOK3E */
 678         li      r12,(MSR_64BIT | MSR_ISF)@highest
 679         sldi    r12,r12,48
 680         or      r11,r11,r12
 681         mtmsrd  r11
 682         isync
 683 #endif
 684         blr
 685
 686 /*
 687  * This puts the TOC pointer into r2, offset by 0x8000 (as expected
 688  * by the toolchain).  It computes the correct value for wherever we
 689  * are running at the moment, using position-independent code.
 690  *
 691  * Note: The compiler constructs pointers using offsets from the
 692  * TOC in -mcmodel=medium mode. After we relocate to 0 but before
 693  * the MMU is on we need our TOC to be a virtual address otherwise
 694  * these pointers will be real addresses which may get stored and
 695  * accessed later with the MMU on. We use tovirt() at the call
 696  * sites to handle this.
 697  */
 698 _GLOBAL(relative_toc)
 699         mflr    r0
 700         bcl     20,31,$+4
 701 0:      mflr    r11
 702         ld      r2,(p_toc - 0b)(r11)
 703         add     r2,r2,r11
 704         mtlr    r0
 705         blr
 706
 707 p_toc:  .llong  __toc_start + 0x8000 - 0b
 708
 709 /*
 710  * This is where the main kernel code starts.
 711  */
 712 _INIT_STATIC(start_here_multiplatform)
 713         /* set up the TOC */
 714         bl      .relative_toc
 715         tovirt(r2,r2)
 716
 717         /* Clear out the BSS. It may have been done in prom_init,
 718          * already but that's irrelevant since prom_init will soon
 719          * be detached from the kernel completely. Besides, we need
 720          * to clear it now for kexec-style entry.
 721          */
 722         LOAD_REG_ADDR(r11,__bss_stop)
 723         LOAD_REG_ADDR(r8,__bss_start)
 724         sub     r11,r11,r8              /* bss size                     */
 725         addi    r11,r11,7               /* round up to an even double word */
 726         srdi.   r11,r11,3               /* shift right by 3             */
 727         beq     4f
 728         addi    r8,r8,-8
 729         li      r0,0
 730         mtctr   r11                     /* zero this many doublewords   */
 731 3:      stdu    r0,8(r8)
 732         bdnz    3b
 733 4:
 734
 735 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
 736         /* Setup OPAL entry */
 737         LOAD_REG_ADDR(r11, opal)
 738         std     r28,0(r11);
 739         std     r29,8(r11);
 740 #endif
 741
 742 #ifndef CONFIG_PPC_BOOK3E
 743         mfmsr   r6
 744         ori     r6,r6,MSR_RI
 745         mtmsrd  r6                      /* RI on */
 746 #endif
 747
 748 #ifdef CONFIG_RELOCATABLE
 749         /* Save the physical address we're running at in kernstart_addr */
 750         LOAD_REG_ADDR(r4, kernstart_addr)
 751         clrldi  r0,r25,2
 752         std     r0,0(r4)
 753 #endif
 754
 755         /* The following gets the stack set up with the regs */
 756         /* pointing to the real addr of the kernel stack.  This is   */
 757         /* all done to support the C function call below which sets  */
 758         /* up the htab.  This is done because we have relocated the  */
 759         /* kernel but are still running in real mode. */
 760
 761         LOAD_REG_ADDR(r3,init_thread_union)
 762
 763         /* set up a stack pointer */
 764         addi    r1,r3,THREAD_SIZE
 765         li      r0,0
 766         stdu    r0,-STACK_FRAME_OVERHEAD(r1)
 767
 768         /* Do very early kernel initializations, including initial hash table,
 769          * stab and slb setup before we turn on relocation.     */
 770
 771         /* Restore parameters passed from prom_init/kexec */
 772         mr      r3,r31
 773         bl      .early_setup            /* also sets r13 and SPRG_PACA */
 774
 775         LOAD_REG_ADDR(r3, .start_here_common)
 776         ld      r4,PACAKMSR(r13)
 777         mtspr   SPRN_SRR0,r3
 778         mtspr   SPRN_SRR1,r4
 779         RFI
 780         b       .       /* prevent speculative execution */
 781
 782         /* This is where all platforms converge execution */
 783 _INIT_GLOBAL(start_here_common)
 784         /* relocation is on at this point */
 785         std     r1,PACAKSAVE(r13)
 786
 787         /* Load the TOC (virtual address) */
 788         ld      r2,PACATOC(r13)
 789
 790         /* Do more system initializations in virtual mode */
 791         bl      .setup_system
 792
 793         /* Mark interrupts soft and hard disabled (they might be enabled
 794          * in the PACA when doing hotplug)
 795          */
 796         li      r0,0
 797         stb     r0,PACASOFTIRQEN(r13)
 798         li      r0,PACA_IRQ_HARD_DIS
 799         stb     r0,PACAIRQHAPPENED(r13)
 800
 801         /* Generic kernel entry */
 802         bl      .start_kernel
 803
 804         /* Not reached */
 805         BUG_OPCODE
 806
 807 /*
 808  * We put a few things here that have to be page-aligned.
 809  * This stuff goes at the beginning of the bss, which is page-aligned.
 810  */
 811         .section ".bss"
 812
 813         .align  PAGE_SHIFT
 814
 815         .globl  empty_zero_page
 816 empty_zero_page:
 817         .space  PAGE_SIZE
 818
 819         .globl  swapper_pg_dir
 820 swapper_pg_dir:
 821         .space  PGD_TABLE_SIZE