arch/powerpc/kernel/fpu.S

   1 /*
   2  *  FPU support code, moved here from head.S so that it can be used
   3  *  by chips which use other head-whatever.S files.
   4  *
   5  *  This program is free software; you can redistribute it and/or
   6  *  modify it under the terms of the GNU General Public License
   7  *  as published by the Free Software Foundation; either version
   8  *  2 of the License, or (at your option) any later version.
   9  *
  10  */
  11
  12 #include <asm/reg.h>
  13 #include <asm/page.h>
  14 #include <asm/mmu.h>
  15 #include <asm/pgtable.h>
  16 #include <asm/cputable.h>
  17 #include <asm/cache.h>
  18 #include <asm/thread_info.h>
  19 #include <asm/ppc_asm.h>
  20 #include <asm/asm-offsets.h>
  21
  22 /*
  23  * This task wants to use the FPU now.
  24  * On UP, disable FP for the task which had the FPU previously,
  25  * and save its floating-point registers in its thread_struct.
  26  * Load up this task's FP registers from its thread_struct,
  27  * enable the FPU for the current task and return to the task.
  28  */
  29 _GLOBAL(load_up_fpu)
  30         mfmsr   r5
  31         ori     r5,r5,MSR_FP
  32         SYNC
  33         MTMSRD(r5)                      /* enable use of fpu now */
  34         isync
  35 /*
  36  * For SMP, we don't do lazy FPU switching because it just gets too
  37  * horrendously complex, especially when a task switches from one CPU
  38  * to another.  Instead we call giveup_fpu in switch_to.
  39  */
  40 #ifndef CONFIG_SMP
  41         LOAD_REG_ADDRBASE(r3, last_task_used_math)
  42         toreal(r3)
  43         PPC_LL  r4,ADDROFF(last_task_used_math)(r3)
  44         PPC_LCMPI       0,r4,0
  45         beq     1f
  46         toreal(r4)
  47         addi    r4,r4,THREAD            /* want last_task_used_math->thread */
  48         SAVE_32FPRS(0, r4)
  49         mffs    fr0
  50         stfd    fr0,THREAD_FPSCR(r4)
  51         PPC_LL  r5,PT_REGS(r4)
  52         toreal(r5)
  53         PPC_LL  r4,_MSR-STACK_FRAME_OVERHEAD(r5)
  54         li      r10,MSR_FP|MSR_FE0|MSR_FE1
  55         andc    r4,r4,r10               /* disable FP for previous task */
  56         PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
  57 1:
  58 #endif /* CONFIG_SMP */
  59         /* enable use of FP after return */
  60 #ifdef CONFIG_PPC32
  61         mfspr   r5,SPRN_SPRG3           /* current task's THREAD (phys) */
  62         lwz     r4,THREAD_FPEXC_MODE(r5)
  63         ori     r9,r9,MSR_FP            /* enable FP for current */
  64         or      r9,r9,r4
  65 #else
  66         ld      r4,PACACURRENT(r13)
  67         addi    r5,r4,THREAD            /* Get THREAD */
  68         lwz     r4,THREAD_FPEXC_MODE(r5)
  69         ori     r12,r12,MSR_FP
  70         or      r12,r12,r4
  71         std     r12,_MSR(r1)
  72 #endif
  73         lfd     fr0,THREAD_FPSCR(r5)
  74         MTFSF_L(fr0)
  75         REST_32FPRS(0, r5)
  76 #ifndef CONFIG_SMP
  77         subi    r4,r5,THREAD
  78         fromreal(r4)
  79         PPC_STL r4,ADDROFF(last_task_used_math)(r3)
  80 #endif /* CONFIG_SMP */
  81         /* restore registers and return */
  82         /* we haven't used ctr or xer or lr */
  83         b       fast_exception_return
  84
  85 /*
  86  * giveup_fpu(tsk)
  87  * Disable FP for the task given as the argument,
  88  * and save the floating-point registers in its thread_struct.
  89  * Enables the FPU for use in the kernel on return.
  90  */
  91 _GLOBAL(giveup_fpu)
  92         mfmsr   r5
  93         ori     r5,r5,MSR_FP
  94         SYNC_601
  95         ISYNC_601
  96         MTMSRD(r5)                      /* enable use of fpu now */
  97         SYNC_601
  98         isync
  99         PPC_LCMPI       0,r3,0
 100         beqlr-                          /* if no previous owner, done */
 101         addi    r3,r3,THREAD            /* want THREAD of task */
 102         PPC_LL  r5,PT_REGS(r3)
 103         PPC_LCMPI       0,r5,0
 104         SAVE_32FPRS(0, r3)
 105         mffs    fr0
 106         stfd    fr0,THREAD_FPSCR(r3)
 107         beq     1f
 108         PPC_LL  r4,_MSR-STACK_FRAME_OVERHEAD(r5)
 109         li      r3,MSR_FP|MSR_FE0|MSR_FE1
 110         andc    r4,r4,r3                /* disable FP for previous task */
 111         PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
 112 1:
 113 #ifndef CONFIG_SMP
 114         li      r5,0
 115         LOAD_REG_ADDRBASE(r4,last_task_used_math)
 116         PPC_STL r5,ADDROFF(last_task_used_math)(r4)
 117 #endif /* CONFIG_SMP */
 118         blr
 119
 120 /*
 121  * These are used in the alignment trap handler when emulating
 122  * single-precision loads and stores.
 123  * We restore and save the fpscr so the task gets the same result
 124  * and exceptions as if the cpu had performed the load or store.
 125  */
 126
 127 _GLOBAL(cvt_fd)
 128         lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
 129         MTFSF_L(0)
 130         lfs     0,0(r3)
 131         stfd    0,0(r4)
 132         mffs    0
 133         stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
 134         blr
 135
 136 _GLOBAL(cvt_df)
 137         lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
 138         MTFSF_L(0)
 139         lfd     0,0(r3)
 140         stfs    0,0(r4)
 141         mffs    0
 142         stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
 143         blr