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Merge branch 'merge'
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21
22 struct cpu_spec* cur_cpu_spec = NULL;
23 EXPORT_SYMBOL(cur_cpu_spec);
24
25 /* NOTE:
26 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
27 * the responsibility of the appropriate CPU save/restore functions to
28 * eventually copy these settings over. Those save/restore aren't yet
29 * part of the cputable though. That has to be fixed for both ppc32
30 * and ppc64
31 */
32 #ifdef CONFIG_PPC32
33 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
34 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
41 #endif /* CONFIG_PPC32 */
42 #ifdef CONFIG_PPC64
43 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
44 extern void __restore_cpu_ppc970(void);
45 #endif /* CONFIG_PPC64 */
46
47 /* This table only contains "desktop" CPUs, it need to be filled with embedded
48 * ones as well...
49 */
50 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
51 PPC_FEATURE_HAS_MMU)
52 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
53 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
54 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
55 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
56 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
60 PPC_FEATURE_TRUE_LE)
61 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
62 PPC_FEATURE_BOOKE)
63
64 /* We only set the spe features if the kernel was compiled with
65 * spe support
66 */
67 #ifdef CONFIG_SPE
68 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
69 #else
70 #define PPC_FEATURE_SPE_COMP 0
71 #endif
72
73 struct cpu_spec cpu_specs[] = {
74 #ifdef CONFIG_PPC64
75 { /* Power3 */
76 .pvr_mask = 0xffff0000,
77 .pvr_value = 0x00400000,
78 .cpu_name = "POWER3 (630)",
79 .cpu_features = CPU_FTRS_POWER3,
80 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
81 .icache_bsize = 128,
82 .dcache_bsize = 128,
83 .num_pmcs = 8,
84 .oprofile_cpu_type = "ppc64/power3",
85 .oprofile_type = PPC_OPROFILE_RS64,
86 .platform = "power3",
87 },
88 { /* Power3+ */
89 .pvr_mask = 0xffff0000,
90 .pvr_value = 0x00410000,
91 .cpu_name = "POWER3 (630+)",
92 .cpu_features = CPU_FTRS_POWER3,
93 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
94 .icache_bsize = 128,
95 .dcache_bsize = 128,
96 .num_pmcs = 8,
97 .oprofile_cpu_type = "ppc64/power3",
98 .oprofile_type = PPC_OPROFILE_RS64,
99 .platform = "power3",
100 },
101 { /* Northstar */
102 .pvr_mask = 0xffff0000,
103 .pvr_value = 0x00330000,
104 .cpu_name = "RS64-II (northstar)",
105 .cpu_features = CPU_FTRS_RS64,
106 .cpu_user_features = COMMON_USER_PPC64,
107 .icache_bsize = 128,
108 .dcache_bsize = 128,
109 .num_pmcs = 8,
110 .oprofile_cpu_type = "ppc64/rs64",
111 .oprofile_type = PPC_OPROFILE_RS64,
112 .platform = "rs64",
113 },
114 { /* Pulsar */
115 .pvr_mask = 0xffff0000,
116 .pvr_value = 0x00340000,
117 .cpu_name = "RS64-III (pulsar)",
118 .cpu_features = CPU_FTRS_RS64,
119 .cpu_user_features = COMMON_USER_PPC64,
120 .icache_bsize = 128,
121 .dcache_bsize = 128,
122 .num_pmcs = 8,
123 .oprofile_cpu_type = "ppc64/rs64",
124 .oprofile_type = PPC_OPROFILE_RS64,
125 .platform = "rs64",
126 },
127 { /* I-star */
128 .pvr_mask = 0xffff0000,
129 .pvr_value = 0x00360000,
130 .cpu_name = "RS64-III (icestar)",
131 .cpu_features = CPU_FTRS_RS64,
132 .cpu_user_features = COMMON_USER_PPC64,
133 .icache_bsize = 128,
134 .dcache_bsize = 128,
135 .num_pmcs = 8,
136 .oprofile_cpu_type = "ppc64/rs64",
137 .oprofile_type = PPC_OPROFILE_RS64,
138 .platform = "rs64",
139 },
140 { /* S-star */
141 .pvr_mask = 0xffff0000,
142 .pvr_value = 0x00370000,
143 .cpu_name = "RS64-IV (sstar)",
144 .cpu_features = CPU_FTRS_RS64,
145 .cpu_user_features = COMMON_USER_PPC64,
146 .icache_bsize = 128,
147 .dcache_bsize = 128,
148 .num_pmcs = 8,
149 .oprofile_cpu_type = "ppc64/rs64",
150 .oprofile_type = PPC_OPROFILE_RS64,
151 .platform = "rs64",
152 },
153 { /* Power4 */
154 .pvr_mask = 0xffff0000,
155 .pvr_value = 0x00350000,
156 .cpu_name = "POWER4 (gp)",
157 .cpu_features = CPU_FTRS_POWER4,
158 .cpu_user_features = COMMON_USER_POWER4,
159 .icache_bsize = 128,
160 .dcache_bsize = 128,
161 .num_pmcs = 8,
162 .oprofile_cpu_type = "ppc64/power4",
163 .oprofile_type = PPC_OPROFILE_POWER4,
164 .platform = "power4",
165 },
166 { /* Power4+ */
167 .pvr_mask = 0xffff0000,
168 .pvr_value = 0x00380000,
169 .cpu_name = "POWER4+ (gq)",
170 .cpu_features = CPU_FTRS_POWER4,
171 .cpu_user_features = COMMON_USER_POWER4,
172 .icache_bsize = 128,
173 .dcache_bsize = 128,
174 .num_pmcs = 8,
175 .oprofile_cpu_type = "ppc64/power4",
176 .oprofile_type = PPC_OPROFILE_POWER4,
177 .platform = "power4",
178 },
179 { /* PPC970 */
180 .pvr_mask = 0xffff0000,
181 .pvr_value = 0x00390000,
182 .cpu_name = "PPC970",
183 .cpu_features = CPU_FTRS_PPC970,
184 .cpu_user_features = COMMON_USER_POWER4 |
185 PPC_FEATURE_HAS_ALTIVEC_COMP,
186 .icache_bsize = 128,
187 .dcache_bsize = 128,
188 .num_pmcs = 8,
189 .cpu_setup = __setup_cpu_ppc970,
190 .cpu_restore = __restore_cpu_ppc970,
191 .oprofile_cpu_type = "ppc64/970",
192 .oprofile_type = PPC_OPROFILE_POWER4,
193 .platform = "ppc970",
194 },
195 { /* PPC970FX */
196 .pvr_mask = 0xffff0000,
197 .pvr_value = 0x003c0000,
198 .cpu_name = "PPC970FX",
199 .cpu_features = CPU_FTRS_PPC970,
200 .cpu_user_features = COMMON_USER_POWER4 |
201 PPC_FEATURE_HAS_ALTIVEC_COMP,
202 .icache_bsize = 128,
203 .dcache_bsize = 128,
204 .num_pmcs = 8,
205 .cpu_setup = __setup_cpu_ppc970,
206 .cpu_restore = __restore_cpu_ppc970,
207 .oprofile_cpu_type = "ppc64/970",
208 .oprofile_type = PPC_OPROFILE_POWER4,
209 .platform = "ppc970",
210 },
211 { /* PPC970MP */
212 .pvr_mask = 0xffff0000,
213 .pvr_value = 0x00440000,
214 .cpu_name = "PPC970MP",
215 .cpu_features = CPU_FTRS_PPC970,
216 .cpu_user_features = COMMON_USER_POWER4 |
217 PPC_FEATURE_HAS_ALTIVEC_COMP,
218 .icache_bsize = 128,
219 .dcache_bsize = 128,
220 .num_pmcs = 8,
221 .cpu_setup = __setup_cpu_ppc970,
222 .cpu_restore = __restore_cpu_ppc970,
223 .oprofile_cpu_type = "ppc64/970",
224 .oprofile_type = PPC_OPROFILE_POWER4,
225 .platform = "ppc970",
226 },
227 { /* Power5 GR */
228 .pvr_mask = 0xffff0000,
229 .pvr_value = 0x003a0000,
230 .cpu_name = "POWER5 (gr)",
231 .cpu_features = CPU_FTRS_POWER5,
232 .cpu_user_features = COMMON_USER_POWER5,
233 .icache_bsize = 128,
234 .dcache_bsize = 128,
235 .num_pmcs = 6,
236 .oprofile_cpu_type = "ppc64/power5",
237 .oprofile_type = PPC_OPROFILE_POWER4,
238 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
239 * and above but only works on POWER5 and above
240 */
241 .oprofile_mmcra_sihv = MMCRA_SIHV,
242 .oprofile_mmcra_sipr = MMCRA_SIPR,
243 .platform = "power5",
244 },
245 { /* Power5 GS */
246 .pvr_mask = 0xffff0000,
247 .pvr_value = 0x003b0000,
248 .cpu_name = "POWER5+ (gs)",
249 .cpu_features = CPU_FTRS_POWER5,
250 .cpu_user_features = COMMON_USER_POWER5_PLUS,
251 .icache_bsize = 128,
252 .dcache_bsize = 128,
253 .num_pmcs = 6,
254 .oprofile_cpu_type = "ppc64/power5+",
255 .oprofile_type = PPC_OPROFILE_POWER4,
256 .oprofile_mmcra_sihv = MMCRA_SIHV,
257 .oprofile_mmcra_sipr = MMCRA_SIPR,
258 .platform = "power5+",
259 },
260 { /* Power6 */
261 .pvr_mask = 0xffff0000,
262 .pvr_value = 0x003e0000,
263 .cpu_name = "POWER6",
264 .cpu_features = CPU_FTRS_POWER6,
265 .cpu_user_features = COMMON_USER_POWER6,
266 .icache_bsize = 128,
267 .dcache_bsize = 128,
268 .num_pmcs = 8,
269 .oprofile_cpu_type = "ppc64/power6",
270 .oprofile_type = PPC_OPROFILE_POWER4,
271 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
272 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
273 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
274 POWER6_MMCRA_OTHER,
275 .platform = "power6",
276 },
277 { /* Cell Broadband Engine */
278 .pvr_mask = 0xffff0000,
279 .pvr_value = 0x00700000,
280 .cpu_name = "Cell Broadband Engine",
281 .cpu_features = CPU_FTRS_CELL,
282 .cpu_user_features = COMMON_USER_PPC64 |
283 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
284 PPC_FEATURE_SMT,
285 .icache_bsize = 128,
286 .dcache_bsize = 128,
287 .platform = "ppc-cell-be",
288 },
289 { /* default match */
290 .pvr_mask = 0x00000000,
291 .pvr_value = 0x00000000,
292 .cpu_name = "POWER4 (compatible)",
293 .cpu_features = CPU_FTRS_COMPATIBLE,
294 .cpu_user_features = COMMON_USER_PPC64,
295 .icache_bsize = 128,
296 .dcache_bsize = 128,
297 .num_pmcs = 6,
298 .platform = "power4",
299 }
300 #endif /* CONFIG_PPC64 */
301 #ifdef CONFIG_PPC32
302 #if CLASSIC_PPC
303 { /* 601 */
304 .pvr_mask = 0xffff0000,
305 .pvr_value = 0x00010000,
306 .cpu_name = "601",
307 .cpu_features = CPU_FTRS_PPC601,
308 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
309 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
310 .icache_bsize = 32,
311 .dcache_bsize = 32,
312 .platform = "ppc601",
313 },
314 { /* 603 */
315 .pvr_mask = 0xffff0000,
316 .pvr_value = 0x00030000,
317 .cpu_name = "603",
318 .cpu_features = CPU_FTRS_603,
319 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
320 .icache_bsize = 32,
321 .dcache_bsize = 32,
322 .cpu_setup = __setup_cpu_603,
323 .platform = "ppc603",
324 },
325 { /* 603e */
326 .pvr_mask = 0xffff0000,
327 .pvr_value = 0x00060000,
328 .cpu_name = "603e",
329 .cpu_features = CPU_FTRS_603,
330 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
331 .icache_bsize = 32,
332 .dcache_bsize = 32,
333 .cpu_setup = __setup_cpu_603,
334 .platform = "ppc603",
335 },
336 { /* 603ev */
337 .pvr_mask = 0xffff0000,
338 .pvr_value = 0x00070000,
339 .cpu_name = "603ev",
340 .cpu_features = CPU_FTRS_603,
341 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
342 .icache_bsize = 32,
343 .dcache_bsize = 32,
344 .cpu_setup = __setup_cpu_603,
345 .platform = "ppc603",
346 },
347 { /* 604 */
348 .pvr_mask = 0xffff0000,
349 .pvr_value = 0x00040000,
350 .cpu_name = "604",
351 .cpu_features = CPU_FTRS_604,
352 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
353 .icache_bsize = 32,
354 .dcache_bsize = 32,
355 .num_pmcs = 2,
356 .cpu_setup = __setup_cpu_604,
357 .platform = "ppc604",
358 },
359 { /* 604e */
360 .pvr_mask = 0xfffff000,
361 .pvr_value = 0x00090000,
362 .cpu_name = "604e",
363 .cpu_features = CPU_FTRS_604,
364 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
365 .icache_bsize = 32,
366 .dcache_bsize = 32,
367 .num_pmcs = 4,
368 .cpu_setup = __setup_cpu_604,
369 .platform = "ppc604",
370 },
371 { /* 604r */
372 .pvr_mask = 0xffff0000,
373 .pvr_value = 0x00090000,
374 .cpu_name = "604r",
375 .cpu_features = CPU_FTRS_604,
376 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
377 .icache_bsize = 32,
378 .dcache_bsize = 32,
379 .num_pmcs = 4,
380 .cpu_setup = __setup_cpu_604,
381 .platform = "ppc604",
382 },
383 { /* 604ev */
384 .pvr_mask = 0xffff0000,
385 .pvr_value = 0x000a0000,
386 .cpu_name = "604ev",
387 .cpu_features = CPU_FTRS_604,
388 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
389 .icache_bsize = 32,
390 .dcache_bsize = 32,
391 .num_pmcs = 4,
392 .cpu_setup = __setup_cpu_604,
393 .platform = "ppc604",
394 },
395 { /* 740/750 (0x4202, don't support TAU ?) */
396 .pvr_mask = 0xffffffff,
397 .pvr_value = 0x00084202,
398 .cpu_name = "740/750",
399 .cpu_features = CPU_FTRS_740_NOTAU,
400 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
401 .icache_bsize = 32,
402 .dcache_bsize = 32,
403 .num_pmcs = 4,
404 .cpu_setup = __setup_cpu_750,
405 .platform = "ppc750",
406 },
407 { /* 750CX (80100 and 8010x?) */
408 .pvr_mask = 0xfffffff0,
409 .pvr_value = 0x00080100,
410 .cpu_name = "750CX",
411 .cpu_features = CPU_FTRS_750,
412 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
413 .icache_bsize = 32,
414 .dcache_bsize = 32,
415 .num_pmcs = 4,
416 .cpu_setup = __setup_cpu_750cx,
417 .platform = "ppc750",
418 },
419 { /* 750CX (82201 and 82202) */
420 .pvr_mask = 0xfffffff0,
421 .pvr_value = 0x00082200,
422 .cpu_name = "750CX",
423 .cpu_features = CPU_FTRS_750,
424 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
425 .icache_bsize = 32,
426 .dcache_bsize = 32,
427 .num_pmcs = 4,
428 .cpu_setup = __setup_cpu_750cx,
429 .platform = "ppc750",
430 },
431 { /* 750CXe (82214) */
432 .pvr_mask = 0xfffffff0,
433 .pvr_value = 0x00082210,
434 .cpu_name = "750CXe",
435 .cpu_features = CPU_FTRS_750,
436 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
437 .icache_bsize = 32,
438 .dcache_bsize = 32,
439 .num_pmcs = 4,
440 .cpu_setup = __setup_cpu_750cx,
441 .platform = "ppc750",
442 },
443 { /* 750CXe "Gekko" (83214) */
444 .pvr_mask = 0xffffffff,
445 .pvr_value = 0x00083214,
446 .cpu_name = "750CXe",
447 .cpu_features = CPU_FTRS_750,
448 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
449 .icache_bsize = 32,
450 .dcache_bsize = 32,
451 .num_pmcs = 4,
452 .cpu_setup = __setup_cpu_750cx,
453 .platform = "ppc750",
454 },
455 { /* 745/755 */
456 .pvr_mask = 0xfffff000,
457 .pvr_value = 0x00083000,
458 .cpu_name = "745/755",
459 .cpu_features = CPU_FTRS_750,
460 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
461 .icache_bsize = 32,
462 .dcache_bsize = 32,
463 .num_pmcs = 4,
464 .cpu_setup = __setup_cpu_750,
465 .platform = "ppc750",
466 },
467 { /* 750FX rev 1.x */
468 .pvr_mask = 0xffffff00,
469 .pvr_value = 0x70000100,
470 .cpu_name = "750FX",
471 .cpu_features = CPU_FTRS_750FX1,
472 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
473 .icache_bsize = 32,
474 .dcache_bsize = 32,
475 .num_pmcs = 4,
476 .cpu_setup = __setup_cpu_750,
477 .platform = "ppc750",
478 },
479 { /* 750FX rev 2.0 must disable HID0[DPM] */
480 .pvr_mask = 0xffffffff,
481 .pvr_value = 0x70000200,
482 .cpu_name = "750FX",
483 .cpu_features = CPU_FTRS_750FX2,
484 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
485 .icache_bsize = 32,
486 .dcache_bsize = 32,
487 .num_pmcs = 4,
488 .cpu_setup = __setup_cpu_750,
489 .platform = "ppc750",
490 },
491 { /* 750FX (All revs except 2.0) */
492 .pvr_mask = 0xffff0000,
493 .pvr_value = 0x70000000,
494 .cpu_name = "750FX",
495 .cpu_features = CPU_FTRS_750FX,
496 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
497 .icache_bsize = 32,
498 .dcache_bsize = 32,
499 .num_pmcs = 4,
500 .cpu_setup = __setup_cpu_750fx,
501 .platform = "ppc750",
502 },
503 { /* 750GX */
504 .pvr_mask = 0xffff0000,
505 .pvr_value = 0x70020000,
506 .cpu_name = "750GX",
507 .cpu_features = CPU_FTRS_750GX,
508 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
509 .icache_bsize = 32,
510 .dcache_bsize = 32,
511 .num_pmcs = 4,
512 .cpu_setup = __setup_cpu_750fx,
513 .platform = "ppc750",
514 },
515 { /* 740/750 (L2CR bit need fixup for 740) */
516 .pvr_mask = 0xffff0000,
517 .pvr_value = 0x00080000,
518 .cpu_name = "740/750",
519 .cpu_features = CPU_FTRS_740,
520 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
521 .icache_bsize = 32,
522 .dcache_bsize = 32,
523 .num_pmcs = 4,
524 .cpu_setup = __setup_cpu_750,
525 .platform = "ppc750",
526 },
527 { /* 7400 rev 1.1 ? (no TAU) */
528 .pvr_mask = 0xffffffff,
529 .pvr_value = 0x000c1101,
530 .cpu_name = "7400 (1.1)",
531 .cpu_features = CPU_FTRS_7400_NOTAU,
532 .cpu_user_features = COMMON_USER |
533 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
534 .icache_bsize = 32,
535 .dcache_bsize = 32,
536 .num_pmcs = 4,
537 .cpu_setup = __setup_cpu_7400,
538 .platform = "ppc7400",
539 },
540 { /* 7400 */
541 .pvr_mask = 0xffff0000,
542 .pvr_value = 0x000c0000,
543 .cpu_name = "7400",
544 .cpu_features = CPU_FTRS_7400,
545 .cpu_user_features = COMMON_USER |
546 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
547 .icache_bsize = 32,
548 .dcache_bsize = 32,
549 .num_pmcs = 4,
550 .cpu_setup = __setup_cpu_7400,
551 .platform = "ppc7400",
552 },
553 { /* 7410 */
554 .pvr_mask = 0xffff0000,
555 .pvr_value = 0x800c0000,
556 .cpu_name = "7410",
557 .cpu_features = CPU_FTRS_7400,
558 .cpu_user_features = COMMON_USER |
559 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
560 .icache_bsize = 32,
561 .dcache_bsize = 32,
562 .num_pmcs = 4,
563 .cpu_setup = __setup_cpu_7410,
564 .platform = "ppc7400",
565 },
566 { /* 7450 2.0 - no doze/nap */
567 .pvr_mask = 0xffffffff,
568 .pvr_value = 0x80000200,
569 .cpu_name = "7450",
570 .cpu_features = CPU_FTRS_7450_20,
571 .cpu_user_features = COMMON_USER |
572 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
573 .icache_bsize = 32,
574 .dcache_bsize = 32,
575 .num_pmcs = 6,
576 .cpu_setup = __setup_cpu_745x,
577 .oprofile_cpu_type = "ppc/7450",
578 .oprofile_type = PPC_OPROFILE_G4,
579 .platform = "ppc7450",
580 },
581 { /* 7450 2.1 */
582 .pvr_mask = 0xffffffff,
583 .pvr_value = 0x80000201,
584 .cpu_name = "7450",
585 .cpu_features = CPU_FTRS_7450_21,
586 .cpu_user_features = COMMON_USER |
587 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
588 .icache_bsize = 32,
589 .dcache_bsize = 32,
590 .num_pmcs = 6,
591 .cpu_setup = __setup_cpu_745x,
592 .oprofile_cpu_type = "ppc/7450",
593 .oprofile_type = PPC_OPROFILE_G4,
594 .platform = "ppc7450",
595 },
596 { /* 7450 2.3 and newer */
597 .pvr_mask = 0xffff0000,
598 .pvr_value = 0x80000000,
599 .cpu_name = "7450",
600 .cpu_features = CPU_FTRS_7450_23,
601 .cpu_user_features = COMMON_USER |
602 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
603 .icache_bsize = 32,
604 .dcache_bsize = 32,
605 .num_pmcs = 6,
606 .cpu_setup = __setup_cpu_745x,
607 .oprofile_cpu_type = "ppc/7450",
608 .oprofile_type = PPC_OPROFILE_G4,
609 .platform = "ppc7450",
610 },
611 { /* 7455 rev 1.x */
612 .pvr_mask = 0xffffff00,
613 .pvr_value = 0x80010100,
614 .cpu_name = "7455",
615 .cpu_features = CPU_FTRS_7455_1,
616 .cpu_user_features = COMMON_USER |
617 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
618 .icache_bsize = 32,
619 .dcache_bsize = 32,
620 .num_pmcs = 6,
621 .cpu_setup = __setup_cpu_745x,
622 .oprofile_cpu_type = "ppc/7450",
623 .oprofile_type = PPC_OPROFILE_G4,
624 .platform = "ppc7450",
625 },
626 { /* 7455 rev 2.0 */
627 .pvr_mask = 0xffffffff,
628 .pvr_value = 0x80010200,
629 .cpu_name = "7455",
630 .cpu_features = CPU_FTRS_7455_20,
631 .cpu_user_features = COMMON_USER |
632 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
633 .icache_bsize = 32,
634 .dcache_bsize = 32,
635 .num_pmcs = 6,
636 .cpu_setup = __setup_cpu_745x,
637 .oprofile_cpu_type = "ppc/7450",
638 .oprofile_type = PPC_OPROFILE_G4,
639 .platform = "ppc7450",
640 },
641 { /* 7455 others */
642 .pvr_mask = 0xffff0000,
643 .pvr_value = 0x80010000,
644 .cpu_name = "7455",
645 .cpu_features = CPU_FTRS_7455,
646 .cpu_user_features = COMMON_USER |
647 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
648 .icache_bsize = 32,
649 .dcache_bsize = 32,
650 .num_pmcs = 6,
651 .cpu_setup = __setup_cpu_745x,
652 .oprofile_cpu_type = "ppc/7450",
653 .oprofile_type = PPC_OPROFILE_G4,
654 .platform = "ppc7450",
655 },
656 { /* 7447/7457 Rev 1.0 */
657 .pvr_mask = 0xffffffff,
658 .pvr_value = 0x80020100,
659 .cpu_name = "7447/7457",
660 .cpu_features = CPU_FTRS_7447_10,
661 .cpu_user_features = COMMON_USER |
662 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
663 .icache_bsize = 32,
664 .dcache_bsize = 32,
665 .num_pmcs = 6,
666 .cpu_setup = __setup_cpu_745x,
667 .oprofile_cpu_type = "ppc/7450",
668 .oprofile_type = PPC_OPROFILE_G4,
669 .platform = "ppc7450",
670 },
671 { /* 7447/7457 Rev 1.1 */
672 .pvr_mask = 0xffffffff,
673 .pvr_value = 0x80020101,
674 .cpu_name = "7447/7457",
675 .cpu_features = CPU_FTRS_7447_10,
676 .cpu_user_features = COMMON_USER |
677 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
678 .icache_bsize = 32,
679 .dcache_bsize = 32,
680 .num_pmcs = 6,
681 .cpu_setup = __setup_cpu_745x,
682 .oprofile_cpu_type = "ppc/7450",
683 .oprofile_type = PPC_OPROFILE_G4,
684 .platform = "ppc7450",
685 },
686 { /* 7447/7457 Rev 1.2 and later */
687 .pvr_mask = 0xffff0000,
688 .pvr_value = 0x80020000,
689 .cpu_name = "7447/7457",
690 .cpu_features = CPU_FTRS_7447,
691 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
692 .icache_bsize = 32,
693 .dcache_bsize = 32,
694 .num_pmcs = 6,
695 .cpu_setup = __setup_cpu_745x,
696 .oprofile_cpu_type = "ppc/7450",
697 .oprofile_type = PPC_OPROFILE_G4,
698 .platform = "ppc7450",
699 },
700 { /* 7447A */
701 .pvr_mask = 0xffff0000,
702 .pvr_value = 0x80030000,
703 .cpu_name = "7447A",
704 .cpu_features = CPU_FTRS_7447A,
705 .cpu_user_features = COMMON_USER |
706 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
707 .icache_bsize = 32,
708 .dcache_bsize = 32,
709 .num_pmcs = 6,
710 .cpu_setup = __setup_cpu_745x,
711 .oprofile_cpu_type = "ppc/7450",
712 .oprofile_type = PPC_OPROFILE_G4,
713 .platform = "ppc7450",
714 },
715 { /* 7448 */
716 .pvr_mask = 0xffff0000,
717 .pvr_value = 0x80040000,
718 .cpu_name = "7448",
719 .cpu_features = CPU_FTRS_7447A,
720 .cpu_user_features = COMMON_USER |
721 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
722 .icache_bsize = 32,
723 .dcache_bsize = 32,
724 .num_pmcs = 6,
725 .cpu_setup = __setup_cpu_745x,
726 .oprofile_cpu_type = "ppc/7450",
727 .oprofile_type = PPC_OPROFILE_G4,
728 .platform = "ppc7450",
729 },
730 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
731 .pvr_mask = 0x7fff0000,
732 .pvr_value = 0x00810000,
733 .cpu_name = "82xx",
734 .cpu_features = CPU_FTRS_82XX,
735 .cpu_user_features = COMMON_USER,
736 .icache_bsize = 32,
737 .dcache_bsize = 32,
738 .cpu_setup = __setup_cpu_603,
739 .platform = "ppc603",
740 },
741 { /* All G2_LE (603e core, plus some) have the same pvr */
742 .pvr_mask = 0x7fff0000,
743 .pvr_value = 0x00820000,
744 .cpu_name = "G2_LE",
745 .cpu_features = CPU_FTRS_G2_LE,
746 .cpu_user_features = COMMON_USER,
747 .icache_bsize = 32,
748 .dcache_bsize = 32,
749 .cpu_setup = __setup_cpu_603,
750 .platform = "ppc603",
751 },
752 { /* e300 (a 603e core, plus some) on 83xx */
753 .pvr_mask = 0x7fff0000,
754 .pvr_value = 0x00830000,
755 .cpu_name = "e300",
756 .cpu_features = CPU_FTRS_E300,
757 .cpu_user_features = COMMON_USER,
758 .icache_bsize = 32,
759 .dcache_bsize = 32,
760 .cpu_setup = __setup_cpu_603,
761 .platform = "ppc603",
762 },
763 { /* default match, we assume split I/D cache & TB (non-601)... */
764 .pvr_mask = 0x00000000,
765 .pvr_value = 0x00000000,
766 .cpu_name = "(generic PPC)",
767 .cpu_features = CPU_FTRS_CLASSIC32,
768 .cpu_user_features = COMMON_USER,
769 .icache_bsize = 32,
770 .dcache_bsize = 32,
771 .platform = "ppc603",
772 },
773 #endif /* CLASSIC_PPC */
774 #ifdef CONFIG_8xx
775 { /* 8xx */
776 .pvr_mask = 0xffff0000,
777 .pvr_value = 0x00500000,
778 .cpu_name = "8xx",
779 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
780 * if the 8xx code is there.... */
781 .cpu_features = CPU_FTRS_8XX,
782 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
783 .icache_bsize = 16,
784 .dcache_bsize = 16,
785 .platform = "ppc823",
786 },
787 #endif /* CONFIG_8xx */
788 #ifdef CONFIG_40x
789 { /* 403GC */
790 .pvr_mask = 0xffffff00,
791 .pvr_value = 0x00200200,
792 .cpu_name = "403GC",
793 .cpu_features = CPU_FTRS_40X,
794 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
795 .icache_bsize = 16,
796 .dcache_bsize = 16,
797 .platform = "ppc403",
798 },
799 { /* 403GCX */
800 .pvr_mask = 0xffffff00,
801 .pvr_value = 0x00201400,
802 .cpu_name = "403GCX",
803 .cpu_features = CPU_FTRS_40X,
804 .cpu_user_features = PPC_FEATURE_32 |
805 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
806 .icache_bsize = 16,
807 .dcache_bsize = 16,
808 .platform = "ppc403",
809 },
810 { /* 403G ?? */
811 .pvr_mask = 0xffff0000,
812 .pvr_value = 0x00200000,
813 .cpu_name = "403G ??",
814 .cpu_features = CPU_FTRS_40X,
815 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
816 .icache_bsize = 16,
817 .dcache_bsize = 16,
818 .platform = "ppc403",
819 },
820 { /* 405GP */
821 .pvr_mask = 0xffff0000,
822 .pvr_value = 0x40110000,
823 .cpu_name = "405GP",
824 .cpu_features = CPU_FTRS_40X,
825 .cpu_user_features = PPC_FEATURE_32 |
826 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
827 .icache_bsize = 32,
828 .dcache_bsize = 32,
829 .platform = "ppc405",
830 },
831 { /* STB 03xxx */
832 .pvr_mask = 0xffff0000,
833 .pvr_value = 0x40130000,
834 .cpu_name = "STB03xxx",
835 .cpu_features = CPU_FTRS_40X,
836 .cpu_user_features = PPC_FEATURE_32 |
837 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
838 .icache_bsize = 32,
839 .dcache_bsize = 32,
840 .platform = "ppc405",
841 },
842 { /* STB 04xxx */
843 .pvr_mask = 0xffff0000,
844 .pvr_value = 0x41810000,
845 .cpu_name = "STB04xxx",
846 .cpu_features = CPU_FTRS_40X,
847 .cpu_user_features = PPC_FEATURE_32 |
848 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
849 .icache_bsize = 32,
850 .dcache_bsize = 32,
851 .platform = "ppc405",
852 },
853 { /* NP405L */
854 .pvr_mask = 0xffff0000,
855 .pvr_value = 0x41610000,
856 .cpu_name = "NP405L",
857 .cpu_features = CPU_FTRS_40X,
858 .cpu_user_features = PPC_FEATURE_32 |
859 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
860 .icache_bsize = 32,
861 .dcache_bsize = 32,
862 .platform = "ppc405",
863 },
864 { /* NP4GS3 */
865 .pvr_mask = 0xffff0000,
866 .pvr_value = 0x40B10000,
867 .cpu_name = "NP4GS3",
868 .cpu_features = CPU_FTRS_40X,
869 .cpu_user_features = PPC_FEATURE_32 |
870 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
871 .icache_bsize = 32,
872 .dcache_bsize = 32,
873 .platform = "ppc405",
874 },
875 { /* NP405H */
876 .pvr_mask = 0xffff0000,
877 .pvr_value = 0x41410000,
878 .cpu_name = "NP405H",
879 .cpu_features = CPU_FTRS_40X,
880 .cpu_user_features = PPC_FEATURE_32 |
881 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
882 .icache_bsize = 32,
883 .dcache_bsize = 32,
884 .platform = "ppc405",
885 },
886 { /* 405GPr */
887 .pvr_mask = 0xffff0000,
888 .pvr_value = 0x50910000,
889 .cpu_name = "405GPr",
890 .cpu_features = CPU_FTRS_40X,
891 .cpu_user_features = PPC_FEATURE_32 |
892 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
893 .icache_bsize = 32,
894 .dcache_bsize = 32,
895 .platform = "ppc405",
896 },
897 { /* STBx25xx */
898 .pvr_mask = 0xffff0000,
899 .pvr_value = 0x51510000,
900 .cpu_name = "STBx25xx",
901 .cpu_features = CPU_FTRS_40X,
902 .cpu_user_features = PPC_FEATURE_32 |
903 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
904 .icache_bsize = 32,
905 .dcache_bsize = 32,
906 .platform = "ppc405",
907 },
908 { /* 405LP */
909 .pvr_mask = 0xffff0000,
910 .pvr_value = 0x41F10000,
911 .cpu_name = "405LP",
912 .cpu_features = CPU_FTRS_40X,
913 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
914 .icache_bsize = 32,
915 .dcache_bsize = 32,
916 .platform = "ppc405",
917 },
918 { /* Xilinx Virtex-II Pro */
919 .pvr_mask = 0xfffff000,
920 .pvr_value = 0x20010000,
921 .cpu_name = "Virtex-II Pro",
922 .cpu_features = CPU_FTRS_40X,
923 .cpu_user_features = PPC_FEATURE_32 |
924 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
925 .icache_bsize = 32,
926 .dcache_bsize = 32,
927 .platform = "ppc405",
928 },
929 { /* Xilinx Virtex-4 FX */
930 .pvr_mask = 0xfffff000,
931 .pvr_value = 0x20011000,
932 .cpu_name = "Virtex-4 FX",
933 .cpu_features = CPU_FTRS_40X,
934 .cpu_user_features = PPC_FEATURE_32 |
935 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
936 .icache_bsize = 32,
937 .dcache_bsize = 32,
938 },
939 { /* 405EP */
940 .pvr_mask = 0xffff0000,
941 .pvr_value = 0x51210000,
942 .cpu_name = "405EP",
943 .cpu_features = CPU_FTRS_40X,
944 .cpu_user_features = PPC_FEATURE_32 |
945 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
946 .icache_bsize = 32,
947 .dcache_bsize = 32,
948 .platform = "ppc405",
949 },
950
951 #endif /* CONFIG_40x */
952 #ifdef CONFIG_44x
953 {
954 .pvr_mask = 0xf0000fff,
955 .pvr_value = 0x40000850,
956 .cpu_name = "440EP Rev. A",
957 .cpu_features = CPU_FTRS_44X,
958 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
959 .icache_bsize = 32,
960 .dcache_bsize = 32,
961 .platform = "ppc440",
962 },
963 {
964 .pvr_mask = 0xf0000fff,
965 .pvr_value = 0x400008d3,
966 .cpu_name = "440EP Rev. B",
967 .cpu_features = CPU_FTRS_44X,
968 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
969 .icache_bsize = 32,
970 .dcache_bsize = 32,
971 .platform = "ppc440",
972 },
973 { /* 440GP Rev. B */
974 .pvr_mask = 0xf0000fff,
975 .pvr_value = 0x40000440,
976 .cpu_name = "440GP Rev. B",
977 .cpu_features = CPU_FTRS_44X,
978 .cpu_user_features = COMMON_USER_BOOKE,
979 .icache_bsize = 32,
980 .dcache_bsize = 32,
981 .platform = "ppc440gp",
982 },
983 { /* 440GP Rev. C */
984 .pvr_mask = 0xf0000fff,
985 .pvr_value = 0x40000481,
986 .cpu_name = "440GP Rev. C",
987 .cpu_features = CPU_FTRS_44X,
988 .cpu_user_features = COMMON_USER_BOOKE,
989 .icache_bsize = 32,
990 .dcache_bsize = 32,
991 .platform = "ppc440gp",
992 },
993 { /* 440GX Rev. A */
994 .pvr_mask = 0xf0000fff,
995 .pvr_value = 0x50000850,
996 .cpu_name = "440GX Rev. A",
997 .cpu_features = CPU_FTRS_44X,
998 .cpu_user_features = COMMON_USER_BOOKE,
999 .icache_bsize = 32,
1000 .dcache_bsize = 32,
1001 .platform = "ppc440",
1002 },
1003 { /* 440GX Rev. B */
1004 .pvr_mask = 0xf0000fff,
1005 .pvr_value = 0x50000851,
1006 .cpu_name = "440GX Rev. B",
1007 .cpu_features = CPU_FTRS_44X,
1008 .cpu_user_features = COMMON_USER_BOOKE,
1009 .icache_bsize = 32,
1010 .dcache_bsize = 32,
1011 .platform = "ppc440",
1012 },
1013 { /* 440GX Rev. C */
1014 .pvr_mask = 0xf0000fff,
1015 .pvr_value = 0x50000892,
1016 .cpu_name = "440GX Rev. C",
1017 .cpu_features = CPU_FTRS_44X,
1018 .cpu_user_features = COMMON_USER_BOOKE,
1019 .icache_bsize = 32,
1020 .dcache_bsize = 32,
1021 .platform = "ppc440",
1022 },
1023 { /* 440GX Rev. F */
1024 .pvr_mask = 0xf0000fff,
1025 .pvr_value = 0x50000894,
1026 .cpu_name = "440GX Rev. F",
1027 .cpu_features = CPU_FTRS_44X,
1028 .cpu_user_features = COMMON_USER_BOOKE,
1029 .icache_bsize = 32,
1030 .dcache_bsize = 32,
1031 .platform = "ppc440",
1032 },
1033 { /* 440SP Rev. A */
1034 .pvr_mask = 0xff000fff,
1035 .pvr_value = 0x53000891,
1036 .cpu_name = "440SP Rev. A",
1037 .cpu_features = CPU_FTRS_44X,
1038 .cpu_user_features = COMMON_USER_BOOKE,
1039 .icache_bsize = 32,
1040 .dcache_bsize = 32,
1041 .platform = "ppc440",
1042 },
1043 { /* 440SPe Rev. A */
1044 .pvr_mask = 0xff000fff,
1045 .pvr_value = 0x53000890,
1046 .cpu_name = "440SPe Rev. A",
1047 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1048 CPU_FTR_USE_TB,
1049 .cpu_user_features = COMMON_USER_BOOKE,
1050 .icache_bsize = 32,
1051 .dcache_bsize = 32,
1052 .platform = "ppc440",
1053 },
1054 #endif /* CONFIG_44x */
1055 #ifdef CONFIG_FSL_BOOKE
1056 { /* e200z5 */
1057 .pvr_mask = 0xfff00000,
1058 .pvr_value = 0x81000000,
1059 .cpu_name = "e200z5",
1060 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1061 .cpu_features = CPU_FTRS_E200,
1062 .cpu_user_features = COMMON_USER_BOOKE |
1063 PPC_FEATURE_HAS_EFP_SINGLE |
1064 PPC_FEATURE_UNIFIED_CACHE,
1065 .dcache_bsize = 32,
1066 .platform = "ppc5554",
1067 },
1068 { /* e200z6 */
1069 .pvr_mask = 0xfff00000,
1070 .pvr_value = 0x81100000,
1071 .cpu_name = "e200z6",
1072 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1073 .cpu_features = CPU_FTRS_E200,
1074 .cpu_user_features = COMMON_USER_BOOKE |
1075 PPC_FEATURE_SPE_COMP |
1076 PPC_FEATURE_HAS_EFP_SINGLE |
1077 PPC_FEATURE_UNIFIED_CACHE,
1078 .dcache_bsize = 32,
1079 .platform = "ppc5554",
1080 },
1081 { /* e500 */
1082 .pvr_mask = 0xffff0000,
1083 .pvr_value = 0x80200000,
1084 .cpu_name = "e500",
1085 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1086 .cpu_features = CPU_FTRS_E500,
1087 .cpu_user_features = COMMON_USER_BOOKE |
1088 PPC_FEATURE_SPE_COMP |
1089 PPC_FEATURE_HAS_EFP_SINGLE,
1090 .icache_bsize = 32,
1091 .dcache_bsize = 32,
1092 .num_pmcs = 4,
1093 .oprofile_cpu_type = "ppc/e500",
1094 .oprofile_type = PPC_OPROFILE_BOOKE,
1095 .platform = "ppc8540",
1096 },
1097 { /* e500v2 */
1098 .pvr_mask = 0xffff0000,
1099 .pvr_value = 0x80210000,
1100 .cpu_name = "e500v2",
1101 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1102 .cpu_features = CPU_FTRS_E500_2,
1103 .cpu_user_features = COMMON_USER_BOOKE |
1104 PPC_FEATURE_SPE_COMP |
1105 PPC_FEATURE_HAS_EFP_SINGLE |
1106 PPC_FEATURE_HAS_EFP_DOUBLE,
1107 .icache_bsize = 32,
1108 .dcache_bsize = 32,
1109 .num_pmcs = 4,
1110 .oprofile_cpu_type = "ppc/e500",
1111 .oprofile_type = PPC_OPROFILE_BOOKE,
1112 .platform = "ppc8548",
1113 },
1114 #endif
1115 #if !CLASSIC_PPC
1116 { /* default match */
1117 .pvr_mask = 0x00000000,
1118 .pvr_value = 0x00000000,
1119 .cpu_name = "(generic PPC)",
1120 .cpu_features = CPU_FTRS_GENERIC_32,
1121 .cpu_user_features = PPC_FEATURE_32,
1122 .icache_bsize = 32,
1123 .dcache_bsize = 32,
1124 .platform = "powerpc",
1125 }
1126 #endif /* !CLASSIC_PPC */
1127 #endif /* CONFIG_PPC32 */
1128 };
kernel source for telekom puls (alcatel/mediatek)