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Merge git://git.infradead.org/mtd-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21
22 struct cpu_spec* cur_cpu_spec = NULL;
23 EXPORT_SYMBOL(cur_cpu_spec);
24
25 /* NOTE:
26 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
27 * the responsibility of the appropriate CPU save/restore functions to
28 * eventually copy these settings over. Those save/restore aren't yet
29 * part of the cputable though. That has to be fixed for both ppc32
30 * and ppc64
31 */
32 #ifdef CONFIG_PPC32
33 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
34 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
41 #endif /* CONFIG_PPC32 */
42 #ifdef CONFIG_PPC64
43 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
44 extern void __restore_cpu_ppc970(void);
45 #endif /* CONFIG_PPC64 */
46
47 /* This table only contains "desktop" CPUs, it need to be filled with embedded
48 * ones as well...
49 */
50 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
51 PPC_FEATURE_HAS_MMU)
52 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
53 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
54 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
55 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
56 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
60 PPC_FEATURE_TRUE_LE)
61 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
62 PPC_FEATURE_TRUE_LE | \
63 PPC_FEATURE_HAS_ALTIVEC_COMP)
64 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
65 PPC_FEATURE_BOOKE)
66
67 /* We only set the spe features if the kernel was compiled with
68 * spe support
69 */
70 #ifdef CONFIG_SPE
71 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
72 #else
73 #define PPC_FEATURE_SPE_COMP 0
74 #endif
75
76 struct cpu_spec cpu_specs[] = {
77 #ifdef CONFIG_PPC64
78 { /* Power3 */
79 .pvr_mask = 0xffff0000,
80 .pvr_value = 0x00400000,
81 .cpu_name = "POWER3 (630)",
82 .cpu_features = CPU_FTRS_POWER3,
83 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
84 .icache_bsize = 128,
85 .dcache_bsize = 128,
86 .num_pmcs = 8,
87 .oprofile_cpu_type = "ppc64/power3",
88 .oprofile_type = PPC_OPROFILE_RS64,
89 .platform = "power3",
90 },
91 { /* Power3+ */
92 .pvr_mask = 0xffff0000,
93 .pvr_value = 0x00410000,
94 .cpu_name = "POWER3 (630+)",
95 .cpu_features = CPU_FTRS_POWER3,
96 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
97 .icache_bsize = 128,
98 .dcache_bsize = 128,
99 .num_pmcs = 8,
100 .oprofile_cpu_type = "ppc64/power3",
101 .oprofile_type = PPC_OPROFILE_RS64,
102 .platform = "power3",
103 },
104 { /* Northstar */
105 .pvr_mask = 0xffff0000,
106 .pvr_value = 0x00330000,
107 .cpu_name = "RS64-II (northstar)",
108 .cpu_features = CPU_FTRS_RS64,
109 .cpu_user_features = COMMON_USER_PPC64,
110 .icache_bsize = 128,
111 .dcache_bsize = 128,
112 .num_pmcs = 8,
113 .oprofile_cpu_type = "ppc64/rs64",
114 .oprofile_type = PPC_OPROFILE_RS64,
115 .platform = "rs64",
116 },
117 { /* Pulsar */
118 .pvr_mask = 0xffff0000,
119 .pvr_value = 0x00340000,
120 .cpu_name = "RS64-III (pulsar)",
121 .cpu_features = CPU_FTRS_RS64,
122 .cpu_user_features = COMMON_USER_PPC64,
123 .icache_bsize = 128,
124 .dcache_bsize = 128,
125 .num_pmcs = 8,
126 .oprofile_cpu_type = "ppc64/rs64",
127 .oprofile_type = PPC_OPROFILE_RS64,
128 .platform = "rs64",
129 },
130 { /* I-star */
131 .pvr_mask = 0xffff0000,
132 .pvr_value = 0x00360000,
133 .cpu_name = "RS64-III (icestar)",
134 .cpu_features = CPU_FTRS_RS64,
135 .cpu_user_features = COMMON_USER_PPC64,
136 .icache_bsize = 128,
137 .dcache_bsize = 128,
138 .num_pmcs = 8,
139 .oprofile_cpu_type = "ppc64/rs64",
140 .oprofile_type = PPC_OPROFILE_RS64,
141 .platform = "rs64",
142 },
143 { /* S-star */
144 .pvr_mask = 0xffff0000,
145 .pvr_value = 0x00370000,
146 .cpu_name = "RS64-IV (sstar)",
147 .cpu_features = CPU_FTRS_RS64,
148 .cpu_user_features = COMMON_USER_PPC64,
149 .icache_bsize = 128,
150 .dcache_bsize = 128,
151 .num_pmcs = 8,
152 .oprofile_cpu_type = "ppc64/rs64",
153 .oprofile_type = PPC_OPROFILE_RS64,
154 .platform = "rs64",
155 },
156 { /* Power4 */
157 .pvr_mask = 0xffff0000,
158 .pvr_value = 0x00350000,
159 .cpu_name = "POWER4 (gp)",
160 .cpu_features = CPU_FTRS_POWER4,
161 .cpu_user_features = COMMON_USER_POWER4,
162 .icache_bsize = 128,
163 .dcache_bsize = 128,
164 .num_pmcs = 8,
165 .oprofile_cpu_type = "ppc64/power4",
166 .oprofile_type = PPC_OPROFILE_POWER4,
167 .platform = "power4",
168 },
169 { /* Power4+ */
170 .pvr_mask = 0xffff0000,
171 .pvr_value = 0x00380000,
172 .cpu_name = "POWER4+ (gq)",
173 .cpu_features = CPU_FTRS_POWER4,
174 .cpu_user_features = COMMON_USER_POWER4,
175 .icache_bsize = 128,
176 .dcache_bsize = 128,
177 .num_pmcs = 8,
178 .oprofile_cpu_type = "ppc64/power4",
179 .oprofile_type = PPC_OPROFILE_POWER4,
180 .platform = "power4",
181 },
182 { /* PPC970 */
183 .pvr_mask = 0xffff0000,
184 .pvr_value = 0x00390000,
185 .cpu_name = "PPC970",
186 .cpu_features = CPU_FTRS_PPC970,
187 .cpu_user_features = COMMON_USER_POWER4 |
188 PPC_FEATURE_HAS_ALTIVEC_COMP,
189 .icache_bsize = 128,
190 .dcache_bsize = 128,
191 .num_pmcs = 8,
192 .cpu_setup = __setup_cpu_ppc970,
193 .cpu_restore = __restore_cpu_ppc970,
194 .oprofile_cpu_type = "ppc64/970",
195 .oprofile_type = PPC_OPROFILE_POWER4,
196 .platform = "ppc970",
197 },
198 { /* PPC970FX */
199 .pvr_mask = 0xffff0000,
200 .pvr_value = 0x003c0000,
201 .cpu_name = "PPC970FX",
202 .cpu_features = CPU_FTRS_PPC970,
203 .cpu_user_features = COMMON_USER_POWER4 |
204 PPC_FEATURE_HAS_ALTIVEC_COMP,
205 .icache_bsize = 128,
206 .dcache_bsize = 128,
207 .num_pmcs = 8,
208 .cpu_setup = __setup_cpu_ppc970,
209 .cpu_restore = __restore_cpu_ppc970,
210 .oprofile_cpu_type = "ppc64/970",
211 .oprofile_type = PPC_OPROFILE_POWER4,
212 .platform = "ppc970",
213 },
214 { /* PPC970MP */
215 .pvr_mask = 0xffff0000,
216 .pvr_value = 0x00440000,
217 .cpu_name = "PPC970MP",
218 .cpu_features = CPU_FTRS_PPC970,
219 .cpu_user_features = COMMON_USER_POWER4 |
220 PPC_FEATURE_HAS_ALTIVEC_COMP,
221 .icache_bsize = 128,
222 .dcache_bsize = 128,
223 .num_pmcs = 8,
224 .cpu_setup = __setup_cpu_ppc970,
225 .cpu_restore = __restore_cpu_ppc970,
226 .oprofile_cpu_type = "ppc64/970",
227 .oprofile_type = PPC_OPROFILE_POWER4,
228 .platform = "ppc970",
229 },
230 { /* Power5 GR */
231 .pvr_mask = 0xffff0000,
232 .pvr_value = 0x003a0000,
233 .cpu_name = "POWER5 (gr)",
234 .cpu_features = CPU_FTRS_POWER5,
235 .cpu_user_features = COMMON_USER_POWER5,
236 .icache_bsize = 128,
237 .dcache_bsize = 128,
238 .num_pmcs = 6,
239 .oprofile_cpu_type = "ppc64/power5",
240 .oprofile_type = PPC_OPROFILE_POWER4,
241 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
242 * and above but only works on POWER5 and above
243 */
244 .oprofile_mmcra_sihv = MMCRA_SIHV,
245 .oprofile_mmcra_sipr = MMCRA_SIPR,
246 .platform = "power5",
247 },
248 { /* Power5 GS */
249 .pvr_mask = 0xffff0000,
250 .pvr_value = 0x003b0000,
251 .cpu_name = "POWER5+ (gs)",
252 .cpu_features = CPU_FTRS_POWER5,
253 .cpu_user_features = COMMON_USER_POWER5_PLUS,
254 .icache_bsize = 128,
255 .dcache_bsize = 128,
256 .num_pmcs = 6,
257 .oprofile_cpu_type = "ppc64/power5+",
258 .oprofile_type = PPC_OPROFILE_POWER4,
259 .oprofile_mmcra_sihv = MMCRA_SIHV,
260 .oprofile_mmcra_sipr = MMCRA_SIPR,
261 .platform = "power5+",
262 },
263 { /* Power6 */
264 .pvr_mask = 0xffff0000,
265 .pvr_value = 0x003e0000,
266 .cpu_name = "POWER6",
267 .cpu_features = CPU_FTRS_POWER6,
268 .cpu_user_features = COMMON_USER_POWER6,
269 .icache_bsize = 128,
270 .dcache_bsize = 128,
271 .num_pmcs = 8,
272 .oprofile_cpu_type = "ppc64/power6",
273 .oprofile_type = PPC_OPROFILE_POWER4,
274 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
275 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
276 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
277 POWER6_MMCRA_OTHER,
278 .platform = "power6",
279 },
280 { /* Cell Broadband Engine */
281 .pvr_mask = 0xffff0000,
282 .pvr_value = 0x00700000,
283 .cpu_name = "Cell Broadband Engine",
284 .cpu_features = CPU_FTRS_CELL,
285 .cpu_user_features = COMMON_USER_PPC64 |
286 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
287 PPC_FEATURE_SMT,
288 .icache_bsize = 128,
289 .dcache_bsize = 128,
290 .platform = "ppc-cell-be",
291 },
292 { /* PA Semi PA6T */
293 .pvr_mask = 0x7fff0000,
294 .pvr_value = 0x00900000,
295 .cpu_name = "PA6T",
296 .cpu_features = CPU_FTRS_PA6T,
297 .cpu_user_features = COMMON_USER_PA6T,
298 .icache_bsize = 64,
299 .dcache_bsize = 64,
300 .num_pmcs = 6,
301 .platform = "pa6t",
302 },
303 { /* default match */
304 .pvr_mask = 0x00000000,
305 .pvr_value = 0x00000000,
306 .cpu_name = "POWER4 (compatible)",
307 .cpu_features = CPU_FTRS_COMPATIBLE,
308 .cpu_user_features = COMMON_USER_PPC64,
309 .icache_bsize = 128,
310 .dcache_bsize = 128,
311 .num_pmcs = 6,
312 .platform = "power4",
313 }
314 #endif /* CONFIG_PPC64 */
315 #ifdef CONFIG_PPC32
316 #if CLASSIC_PPC
317 { /* 601 */
318 .pvr_mask = 0xffff0000,
319 .pvr_value = 0x00010000,
320 .cpu_name = "601",
321 .cpu_features = CPU_FTRS_PPC601,
322 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
323 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
324 .icache_bsize = 32,
325 .dcache_bsize = 32,
326 .platform = "ppc601",
327 },
328 { /* 603 */
329 .pvr_mask = 0xffff0000,
330 .pvr_value = 0x00030000,
331 .cpu_name = "603",
332 .cpu_features = CPU_FTRS_603,
333 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
334 .icache_bsize = 32,
335 .dcache_bsize = 32,
336 .cpu_setup = __setup_cpu_603,
337 .platform = "ppc603",
338 },
339 { /* 603e */
340 .pvr_mask = 0xffff0000,
341 .pvr_value = 0x00060000,
342 .cpu_name = "603e",
343 .cpu_features = CPU_FTRS_603,
344 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
345 .icache_bsize = 32,
346 .dcache_bsize = 32,
347 .cpu_setup = __setup_cpu_603,
348 .platform = "ppc603",
349 },
350 { /* 603ev */
351 .pvr_mask = 0xffff0000,
352 .pvr_value = 0x00070000,
353 .cpu_name = "603ev",
354 .cpu_features = CPU_FTRS_603,
355 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
356 .icache_bsize = 32,
357 .dcache_bsize = 32,
358 .cpu_setup = __setup_cpu_603,
359 .platform = "ppc603",
360 },
361 { /* 604 */
362 .pvr_mask = 0xffff0000,
363 .pvr_value = 0x00040000,
364 .cpu_name = "604",
365 .cpu_features = CPU_FTRS_604,
366 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
367 .icache_bsize = 32,
368 .dcache_bsize = 32,
369 .num_pmcs = 2,
370 .cpu_setup = __setup_cpu_604,
371 .platform = "ppc604",
372 },
373 { /* 604e */
374 .pvr_mask = 0xfffff000,
375 .pvr_value = 0x00090000,
376 .cpu_name = "604e",
377 .cpu_features = CPU_FTRS_604,
378 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
379 .icache_bsize = 32,
380 .dcache_bsize = 32,
381 .num_pmcs = 4,
382 .cpu_setup = __setup_cpu_604,
383 .platform = "ppc604",
384 },
385 { /* 604r */
386 .pvr_mask = 0xffff0000,
387 .pvr_value = 0x00090000,
388 .cpu_name = "604r",
389 .cpu_features = CPU_FTRS_604,
390 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
391 .icache_bsize = 32,
392 .dcache_bsize = 32,
393 .num_pmcs = 4,
394 .cpu_setup = __setup_cpu_604,
395 .platform = "ppc604",
396 },
397 { /* 604ev */
398 .pvr_mask = 0xffff0000,
399 .pvr_value = 0x000a0000,
400 .cpu_name = "604ev",
401 .cpu_features = CPU_FTRS_604,
402 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
403 .icache_bsize = 32,
404 .dcache_bsize = 32,
405 .num_pmcs = 4,
406 .cpu_setup = __setup_cpu_604,
407 .platform = "ppc604",
408 },
409 { /* 740/750 (0x4202, don't support TAU ?) */
410 .pvr_mask = 0xffffffff,
411 .pvr_value = 0x00084202,
412 .cpu_name = "740/750",
413 .cpu_features = CPU_FTRS_740_NOTAU,
414 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
415 .icache_bsize = 32,
416 .dcache_bsize = 32,
417 .num_pmcs = 4,
418 .cpu_setup = __setup_cpu_750,
419 .platform = "ppc750",
420 },
421 { /* 750CX (80100 and 8010x?) */
422 .pvr_mask = 0xfffffff0,
423 .pvr_value = 0x00080100,
424 .cpu_name = "750CX",
425 .cpu_features = CPU_FTRS_750,
426 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
427 .icache_bsize = 32,
428 .dcache_bsize = 32,
429 .num_pmcs = 4,
430 .cpu_setup = __setup_cpu_750cx,
431 .platform = "ppc750",
432 },
433 { /* 750CX (82201 and 82202) */
434 .pvr_mask = 0xfffffff0,
435 .pvr_value = 0x00082200,
436 .cpu_name = "750CX",
437 .cpu_features = CPU_FTRS_750,
438 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
439 .icache_bsize = 32,
440 .dcache_bsize = 32,
441 .num_pmcs = 4,
442 .cpu_setup = __setup_cpu_750cx,
443 .platform = "ppc750",
444 },
445 { /* 750CXe (82214) */
446 .pvr_mask = 0xfffffff0,
447 .pvr_value = 0x00082210,
448 .cpu_name = "750CXe",
449 .cpu_features = CPU_FTRS_750,
450 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
451 .icache_bsize = 32,
452 .dcache_bsize = 32,
453 .num_pmcs = 4,
454 .cpu_setup = __setup_cpu_750cx,
455 .platform = "ppc750",
456 },
457 { /* 750CXe "Gekko" (83214) */
458 .pvr_mask = 0xffffffff,
459 .pvr_value = 0x00083214,
460 .cpu_name = "750CXe",
461 .cpu_features = CPU_FTRS_750,
462 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
463 .icache_bsize = 32,
464 .dcache_bsize = 32,
465 .num_pmcs = 4,
466 .cpu_setup = __setup_cpu_750cx,
467 .platform = "ppc750",
468 },
469 { /* 745/755 */
470 .pvr_mask = 0xfffff000,
471 .pvr_value = 0x00083000,
472 .cpu_name = "745/755",
473 .cpu_features = CPU_FTRS_750,
474 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
475 .icache_bsize = 32,
476 .dcache_bsize = 32,
477 .num_pmcs = 4,
478 .cpu_setup = __setup_cpu_750,
479 .platform = "ppc750",
480 },
481 { /* 750FX rev 1.x */
482 .pvr_mask = 0xffffff00,
483 .pvr_value = 0x70000100,
484 .cpu_name = "750FX",
485 .cpu_features = CPU_FTRS_750FX1,
486 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
487 .icache_bsize = 32,
488 .dcache_bsize = 32,
489 .num_pmcs = 4,
490 .cpu_setup = __setup_cpu_750,
491 .platform = "ppc750",
492 },
493 { /* 750FX rev 2.0 must disable HID0[DPM] */
494 .pvr_mask = 0xffffffff,
495 .pvr_value = 0x70000200,
496 .cpu_name = "750FX",
497 .cpu_features = CPU_FTRS_750FX2,
498 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
499 .icache_bsize = 32,
500 .dcache_bsize = 32,
501 .num_pmcs = 4,
502 .cpu_setup = __setup_cpu_750,
503 .platform = "ppc750",
504 },
505 { /* 750FX (All revs except 2.0) */
506 .pvr_mask = 0xffff0000,
507 .pvr_value = 0x70000000,
508 .cpu_name = "750FX",
509 .cpu_features = CPU_FTRS_750FX,
510 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
511 .icache_bsize = 32,
512 .dcache_bsize = 32,
513 .num_pmcs = 4,
514 .cpu_setup = __setup_cpu_750fx,
515 .platform = "ppc750",
516 },
517 { /* 750GX */
518 .pvr_mask = 0xffff0000,
519 .pvr_value = 0x70020000,
520 .cpu_name = "750GX",
521 .cpu_features = CPU_FTRS_750GX,
522 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
523 .icache_bsize = 32,
524 .dcache_bsize = 32,
525 .num_pmcs = 4,
526 .cpu_setup = __setup_cpu_750fx,
527 .platform = "ppc750",
528 },
529 { /* 740/750 (L2CR bit need fixup for 740) */
530 .pvr_mask = 0xffff0000,
531 .pvr_value = 0x00080000,
532 .cpu_name = "740/750",
533 .cpu_features = CPU_FTRS_740,
534 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
535 .icache_bsize = 32,
536 .dcache_bsize = 32,
537 .num_pmcs = 4,
538 .cpu_setup = __setup_cpu_750,
539 .platform = "ppc750",
540 },
541 { /* 7400 rev 1.1 ? (no TAU) */
542 .pvr_mask = 0xffffffff,
543 .pvr_value = 0x000c1101,
544 .cpu_name = "7400 (1.1)",
545 .cpu_features = CPU_FTRS_7400_NOTAU,
546 .cpu_user_features = COMMON_USER |
547 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
548 .icache_bsize = 32,
549 .dcache_bsize = 32,
550 .num_pmcs = 4,
551 .cpu_setup = __setup_cpu_7400,
552 .platform = "ppc7400",
553 },
554 { /* 7400 */
555 .pvr_mask = 0xffff0000,
556 .pvr_value = 0x000c0000,
557 .cpu_name = "7400",
558 .cpu_features = CPU_FTRS_7400,
559 .cpu_user_features = COMMON_USER |
560 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
561 .icache_bsize = 32,
562 .dcache_bsize = 32,
563 .num_pmcs = 4,
564 .cpu_setup = __setup_cpu_7400,
565 .platform = "ppc7400",
566 },
567 { /* 7410 */
568 .pvr_mask = 0xffff0000,
569 .pvr_value = 0x800c0000,
570 .cpu_name = "7410",
571 .cpu_features = CPU_FTRS_7400,
572 .cpu_user_features = COMMON_USER |
573 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
574 .icache_bsize = 32,
575 .dcache_bsize = 32,
576 .num_pmcs = 4,
577 .cpu_setup = __setup_cpu_7410,
578 .platform = "ppc7400",
579 },
580 { /* 7450 2.0 - no doze/nap */
581 .pvr_mask = 0xffffffff,
582 .pvr_value = 0x80000200,
583 .cpu_name = "7450",
584 .cpu_features = CPU_FTRS_7450_20,
585 .cpu_user_features = COMMON_USER |
586 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
587 .icache_bsize = 32,
588 .dcache_bsize = 32,
589 .num_pmcs = 6,
590 .cpu_setup = __setup_cpu_745x,
591 .oprofile_cpu_type = "ppc/7450",
592 .oprofile_type = PPC_OPROFILE_G4,
593 .platform = "ppc7450",
594 },
595 { /* 7450 2.1 */
596 .pvr_mask = 0xffffffff,
597 .pvr_value = 0x80000201,
598 .cpu_name = "7450",
599 .cpu_features = CPU_FTRS_7450_21,
600 .cpu_user_features = COMMON_USER |
601 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
602 .icache_bsize = 32,
603 .dcache_bsize = 32,
604 .num_pmcs = 6,
605 .cpu_setup = __setup_cpu_745x,
606 .oprofile_cpu_type = "ppc/7450",
607 .oprofile_type = PPC_OPROFILE_G4,
608 .platform = "ppc7450",
609 },
610 { /* 7450 2.3 and newer */
611 .pvr_mask = 0xffff0000,
612 .pvr_value = 0x80000000,
613 .cpu_name = "7450",
614 .cpu_features = CPU_FTRS_7450_23,
615 .cpu_user_features = COMMON_USER |
616 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
617 .icache_bsize = 32,
618 .dcache_bsize = 32,
619 .num_pmcs = 6,
620 .cpu_setup = __setup_cpu_745x,
621 .oprofile_cpu_type = "ppc/7450",
622 .oprofile_type = PPC_OPROFILE_G4,
623 .platform = "ppc7450",
624 },
625 { /* 7455 rev 1.x */
626 .pvr_mask = 0xffffff00,
627 .pvr_value = 0x80010100,
628 .cpu_name = "7455",
629 .cpu_features = CPU_FTRS_7455_1,
630 .cpu_user_features = COMMON_USER |
631 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
632 .icache_bsize = 32,
633 .dcache_bsize = 32,
634 .num_pmcs = 6,
635 .cpu_setup = __setup_cpu_745x,
636 .oprofile_cpu_type = "ppc/7450",
637 .oprofile_type = PPC_OPROFILE_G4,
638 .platform = "ppc7450",
639 },
640 { /* 7455 rev 2.0 */
641 .pvr_mask = 0xffffffff,
642 .pvr_value = 0x80010200,
643 .cpu_name = "7455",
644 .cpu_features = CPU_FTRS_7455_20,
645 .cpu_user_features = COMMON_USER |
646 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
647 .icache_bsize = 32,
648 .dcache_bsize = 32,
649 .num_pmcs = 6,
650 .cpu_setup = __setup_cpu_745x,
651 .oprofile_cpu_type = "ppc/7450",
652 .oprofile_type = PPC_OPROFILE_G4,
653 .platform = "ppc7450",
654 },
655 { /* 7455 others */
656 .pvr_mask = 0xffff0000,
657 .pvr_value = 0x80010000,
658 .cpu_name = "7455",
659 .cpu_features = CPU_FTRS_7455,
660 .cpu_user_features = COMMON_USER |
661 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
662 .icache_bsize = 32,
663 .dcache_bsize = 32,
664 .num_pmcs = 6,
665 .cpu_setup = __setup_cpu_745x,
666 .oprofile_cpu_type = "ppc/7450",
667 .oprofile_type = PPC_OPROFILE_G4,
668 .platform = "ppc7450",
669 },
670 { /* 7447/7457 Rev 1.0 */
671 .pvr_mask = 0xffffffff,
672 .pvr_value = 0x80020100,
673 .cpu_name = "7447/7457",
674 .cpu_features = CPU_FTRS_7447_10,
675 .cpu_user_features = COMMON_USER |
676 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
677 .icache_bsize = 32,
678 .dcache_bsize = 32,
679 .num_pmcs = 6,
680 .cpu_setup = __setup_cpu_745x,
681 .oprofile_cpu_type = "ppc/7450",
682 .oprofile_type = PPC_OPROFILE_G4,
683 .platform = "ppc7450",
684 },
685 { /* 7447/7457 Rev 1.1 */
686 .pvr_mask = 0xffffffff,
687 .pvr_value = 0x80020101,
688 .cpu_name = "7447/7457",
689 .cpu_features = CPU_FTRS_7447_10,
690 .cpu_user_features = COMMON_USER |
691 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
692 .icache_bsize = 32,
693 .dcache_bsize = 32,
694 .num_pmcs = 6,
695 .cpu_setup = __setup_cpu_745x,
696 .oprofile_cpu_type = "ppc/7450",
697 .oprofile_type = PPC_OPROFILE_G4,
698 .platform = "ppc7450",
699 },
700 { /* 7447/7457 Rev 1.2 and later */
701 .pvr_mask = 0xffff0000,
702 .pvr_value = 0x80020000,
703 .cpu_name = "7447/7457",
704 .cpu_features = CPU_FTRS_7447,
705 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
706 .icache_bsize = 32,
707 .dcache_bsize = 32,
708 .num_pmcs = 6,
709 .cpu_setup = __setup_cpu_745x,
710 .oprofile_cpu_type = "ppc/7450",
711 .oprofile_type = PPC_OPROFILE_G4,
712 .platform = "ppc7450",
713 },
714 { /* 7447A */
715 .pvr_mask = 0xffff0000,
716 .pvr_value = 0x80030000,
717 .cpu_name = "7447A",
718 .cpu_features = CPU_FTRS_7447A,
719 .cpu_user_features = COMMON_USER |
720 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
721 .icache_bsize = 32,
722 .dcache_bsize = 32,
723 .num_pmcs = 6,
724 .cpu_setup = __setup_cpu_745x,
725 .oprofile_cpu_type = "ppc/7450",
726 .oprofile_type = PPC_OPROFILE_G4,
727 .platform = "ppc7450",
728 },
729 { /* 7448 */
730 .pvr_mask = 0xffff0000,
731 .pvr_value = 0x80040000,
732 .cpu_name = "7448",
733 .cpu_features = CPU_FTRS_7447A,
734 .cpu_user_features = COMMON_USER |
735 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
736 .icache_bsize = 32,
737 .dcache_bsize = 32,
738 .num_pmcs = 6,
739 .cpu_setup = __setup_cpu_745x,
740 .oprofile_cpu_type = "ppc/7450",
741 .oprofile_type = PPC_OPROFILE_G4,
742 .platform = "ppc7450",
743 },
744 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
745 .pvr_mask = 0x7fff0000,
746 .pvr_value = 0x00810000,
747 .cpu_name = "82xx",
748 .cpu_features = CPU_FTRS_82XX,
749 .cpu_user_features = COMMON_USER,
750 .icache_bsize = 32,
751 .dcache_bsize = 32,
752 .cpu_setup = __setup_cpu_603,
753 .platform = "ppc603",
754 },
755 { /* All G2_LE (603e core, plus some) have the same pvr */
756 .pvr_mask = 0x7fff0000,
757 .pvr_value = 0x00820000,
758 .cpu_name = "G2_LE",
759 .cpu_features = CPU_FTRS_G2_LE,
760 .cpu_user_features = COMMON_USER,
761 .icache_bsize = 32,
762 .dcache_bsize = 32,
763 .cpu_setup = __setup_cpu_603,
764 .platform = "ppc603",
765 },
766 { /* e300 (a 603e core, plus some) on 83xx */
767 .pvr_mask = 0x7fff0000,
768 .pvr_value = 0x00830000,
769 .cpu_name = "e300",
770 .cpu_features = CPU_FTRS_E300,
771 .cpu_user_features = COMMON_USER,
772 .icache_bsize = 32,
773 .dcache_bsize = 32,
774 .cpu_setup = __setup_cpu_603,
775 .platform = "ppc603",
776 },
777 { /* default match, we assume split I/D cache & TB (non-601)... */
778 .pvr_mask = 0x00000000,
779 .pvr_value = 0x00000000,
780 .cpu_name = "(generic PPC)",
781 .cpu_features = CPU_FTRS_CLASSIC32,
782 .cpu_user_features = COMMON_USER,
783 .icache_bsize = 32,
784 .dcache_bsize = 32,
785 .platform = "ppc603",
786 },
787 #endif /* CLASSIC_PPC */
788 #ifdef CONFIG_8xx
789 { /* 8xx */
790 .pvr_mask = 0xffff0000,
791 .pvr_value = 0x00500000,
792 .cpu_name = "8xx",
793 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
794 * if the 8xx code is there.... */
795 .cpu_features = CPU_FTRS_8XX,
796 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
797 .icache_bsize = 16,
798 .dcache_bsize = 16,
799 .platform = "ppc823",
800 },
801 #endif /* CONFIG_8xx */
802 #ifdef CONFIG_40x
803 { /* 403GC */
804 .pvr_mask = 0xffffff00,
805 .pvr_value = 0x00200200,
806 .cpu_name = "403GC",
807 .cpu_features = CPU_FTRS_40X,
808 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
809 .icache_bsize = 16,
810 .dcache_bsize = 16,
811 .platform = "ppc403",
812 },
813 { /* 403GCX */
814 .pvr_mask = 0xffffff00,
815 .pvr_value = 0x00201400,
816 .cpu_name = "403GCX",
817 .cpu_features = CPU_FTRS_40X,
818 .cpu_user_features = PPC_FEATURE_32 |
819 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
820 .icache_bsize = 16,
821 .dcache_bsize = 16,
822 .platform = "ppc403",
823 },
824 { /* 403G ?? */
825 .pvr_mask = 0xffff0000,
826 .pvr_value = 0x00200000,
827 .cpu_name = "403G ??",
828 .cpu_features = CPU_FTRS_40X,
829 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
830 .icache_bsize = 16,
831 .dcache_bsize = 16,
832 .platform = "ppc403",
833 },
834 { /* 405GP */
835 .pvr_mask = 0xffff0000,
836 .pvr_value = 0x40110000,
837 .cpu_name = "405GP",
838 .cpu_features = CPU_FTRS_40X,
839 .cpu_user_features = PPC_FEATURE_32 |
840 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
841 .icache_bsize = 32,
842 .dcache_bsize = 32,
843 .platform = "ppc405",
844 },
845 { /* STB 03xxx */
846 .pvr_mask = 0xffff0000,
847 .pvr_value = 0x40130000,
848 .cpu_name = "STB03xxx",
849 .cpu_features = CPU_FTRS_40X,
850 .cpu_user_features = PPC_FEATURE_32 |
851 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
852 .icache_bsize = 32,
853 .dcache_bsize = 32,
854 .platform = "ppc405",
855 },
856 { /* STB 04xxx */
857 .pvr_mask = 0xffff0000,
858 .pvr_value = 0x41810000,
859 .cpu_name = "STB04xxx",
860 .cpu_features = CPU_FTRS_40X,
861 .cpu_user_features = PPC_FEATURE_32 |
862 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
863 .icache_bsize = 32,
864 .dcache_bsize = 32,
865 .platform = "ppc405",
866 },
867 { /* NP405L */
868 .pvr_mask = 0xffff0000,
869 .pvr_value = 0x41610000,
870 .cpu_name = "NP405L",
871 .cpu_features = CPU_FTRS_40X,
872 .cpu_user_features = PPC_FEATURE_32 |
873 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
874 .icache_bsize = 32,
875 .dcache_bsize = 32,
876 .platform = "ppc405",
877 },
878 { /* NP4GS3 */
879 .pvr_mask = 0xffff0000,
880 .pvr_value = 0x40B10000,
881 .cpu_name = "NP4GS3",
882 .cpu_features = CPU_FTRS_40X,
883 .cpu_user_features = PPC_FEATURE_32 |
884 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
885 .icache_bsize = 32,
886 .dcache_bsize = 32,
887 .platform = "ppc405",
888 },
889 { /* NP405H */
890 .pvr_mask = 0xffff0000,
891 .pvr_value = 0x41410000,
892 .cpu_name = "NP405H",
893 .cpu_features = CPU_FTRS_40X,
894 .cpu_user_features = PPC_FEATURE_32 |
895 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
896 .icache_bsize = 32,
897 .dcache_bsize = 32,
898 .platform = "ppc405",
899 },
900 { /* 405GPr */
901 .pvr_mask = 0xffff0000,
902 .pvr_value = 0x50910000,
903 .cpu_name = "405GPr",
904 .cpu_features = CPU_FTRS_40X,
905 .cpu_user_features = PPC_FEATURE_32 |
906 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
907 .icache_bsize = 32,
908 .dcache_bsize = 32,
909 .platform = "ppc405",
910 },
911 { /* STBx25xx */
912 .pvr_mask = 0xffff0000,
913 .pvr_value = 0x51510000,
914 .cpu_name = "STBx25xx",
915 .cpu_features = CPU_FTRS_40X,
916 .cpu_user_features = PPC_FEATURE_32 |
917 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
918 .icache_bsize = 32,
919 .dcache_bsize = 32,
920 .platform = "ppc405",
921 },
922 { /* 405LP */
923 .pvr_mask = 0xffff0000,
924 .pvr_value = 0x41F10000,
925 .cpu_name = "405LP",
926 .cpu_features = CPU_FTRS_40X,
927 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
928 .icache_bsize = 32,
929 .dcache_bsize = 32,
930 .platform = "ppc405",
931 },
932 { /* Xilinx Virtex-II Pro */
933 .pvr_mask = 0xfffff000,
934 .pvr_value = 0x20010000,
935 .cpu_name = "Virtex-II Pro",
936 .cpu_features = CPU_FTRS_40X,
937 .cpu_user_features = PPC_FEATURE_32 |
938 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
939 .icache_bsize = 32,
940 .dcache_bsize = 32,
941 .platform = "ppc405",
942 },
943 { /* Xilinx Virtex-4 FX */
944 .pvr_mask = 0xfffff000,
945 .pvr_value = 0x20011000,
946 .cpu_name = "Virtex-4 FX",
947 .cpu_features = CPU_FTRS_40X,
948 .cpu_user_features = PPC_FEATURE_32 |
949 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
950 .icache_bsize = 32,
951 .dcache_bsize = 32,
952 .platform = "ppc405",
953 },
954 { /* 405EP */
955 .pvr_mask = 0xffff0000,
956 .pvr_value = 0x51210000,
957 .cpu_name = "405EP",
958 .cpu_features = CPU_FTRS_40X,
959 .cpu_user_features = PPC_FEATURE_32 |
960 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
961 .icache_bsize = 32,
962 .dcache_bsize = 32,
963 .platform = "ppc405",
964 },
965
966 #endif /* CONFIG_40x */
967 #ifdef CONFIG_44x
968 {
969 .pvr_mask = 0xf0000fff,
970 .pvr_value = 0x40000850,
971 .cpu_name = "440EP Rev. A",
972 .cpu_features = CPU_FTRS_44X,
973 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
974 .icache_bsize = 32,
975 .dcache_bsize = 32,
976 .platform = "ppc440",
977 },
978 {
979 .pvr_mask = 0xf0000fff,
980 .pvr_value = 0x400008d3,
981 .cpu_name = "440EP Rev. B",
982 .cpu_features = CPU_FTRS_44X,
983 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
984 .icache_bsize = 32,
985 .dcache_bsize = 32,
986 .platform = "ppc440",
987 },
988 { /* 440GP Rev. B */
989 .pvr_mask = 0xf0000fff,
990 .pvr_value = 0x40000440,
991 .cpu_name = "440GP Rev. B",
992 .cpu_features = CPU_FTRS_44X,
993 .cpu_user_features = COMMON_USER_BOOKE,
994 .icache_bsize = 32,
995 .dcache_bsize = 32,
996 .platform = "ppc440gp",
997 },
998 { /* 440GP Rev. C */
999 .pvr_mask = 0xf0000fff,
1000 .pvr_value = 0x40000481,
1001 .cpu_name = "440GP Rev. C",
1002 .cpu_features = CPU_FTRS_44X,
1003 .cpu_user_features = COMMON_USER_BOOKE,
1004 .icache_bsize = 32,
1005 .dcache_bsize = 32,
1006 .platform = "ppc440gp",
1007 },
1008 { /* 440GX Rev. A */
1009 .pvr_mask = 0xf0000fff,
1010 .pvr_value = 0x50000850,
1011 .cpu_name = "440GX Rev. A",
1012 .cpu_features = CPU_FTRS_44X,
1013 .cpu_user_features = COMMON_USER_BOOKE,
1014 .icache_bsize = 32,
1015 .dcache_bsize = 32,
1016 .platform = "ppc440",
1017 },
1018 { /* 440GX Rev. B */
1019 .pvr_mask = 0xf0000fff,
1020 .pvr_value = 0x50000851,
1021 .cpu_name = "440GX Rev. B",
1022 .cpu_features = CPU_FTRS_44X,
1023 .cpu_user_features = COMMON_USER_BOOKE,
1024 .icache_bsize = 32,
1025 .dcache_bsize = 32,
1026 .platform = "ppc440",
1027 },
1028 { /* 440GX Rev. C */
1029 .pvr_mask = 0xf0000fff,
1030 .pvr_value = 0x50000892,
1031 .cpu_name = "440GX Rev. C",
1032 .cpu_features = CPU_FTRS_44X,
1033 .cpu_user_features = COMMON_USER_BOOKE,
1034 .icache_bsize = 32,
1035 .dcache_bsize = 32,
1036 .platform = "ppc440",
1037 },
1038 { /* 440GX Rev. F */
1039 .pvr_mask = 0xf0000fff,
1040 .pvr_value = 0x50000894,
1041 .cpu_name = "440GX Rev. F",
1042 .cpu_features = CPU_FTRS_44X,
1043 .cpu_user_features = COMMON_USER_BOOKE,
1044 .icache_bsize = 32,
1045 .dcache_bsize = 32,
1046 .platform = "ppc440",
1047 },
1048 { /* 440SP Rev. A */
1049 .pvr_mask = 0xff000fff,
1050 .pvr_value = 0x53000891,
1051 .cpu_name = "440SP Rev. A",
1052 .cpu_features = CPU_FTRS_44X,
1053 .cpu_user_features = COMMON_USER_BOOKE,
1054 .icache_bsize = 32,
1055 .dcache_bsize = 32,
1056 .platform = "ppc440",
1057 },
1058 { /* 440SPe Rev. A */
1059 .pvr_mask = 0xff000fff,
1060 .pvr_value = 0x53000890,
1061 .cpu_name = "440SPe Rev. A",
1062 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1063 CPU_FTR_USE_TB,
1064 .cpu_user_features = COMMON_USER_BOOKE,
1065 .icache_bsize = 32,
1066 .dcache_bsize = 32,
1067 .platform = "ppc440",
1068 },
1069 #endif /* CONFIG_44x */
1070 #ifdef CONFIG_FSL_BOOKE
1071 { /* e200z5 */
1072 .pvr_mask = 0xfff00000,
1073 .pvr_value = 0x81000000,
1074 .cpu_name = "e200z5",
1075 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1076 .cpu_features = CPU_FTRS_E200,
1077 .cpu_user_features = COMMON_USER_BOOKE |
1078 PPC_FEATURE_HAS_EFP_SINGLE |
1079 PPC_FEATURE_UNIFIED_CACHE,
1080 .dcache_bsize = 32,
1081 .platform = "ppc5554",
1082 },
1083 { /* e200z6 */
1084 .pvr_mask = 0xfff00000,
1085 .pvr_value = 0x81100000,
1086 .cpu_name = "e200z6",
1087 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1088 .cpu_features = CPU_FTRS_E200,
1089 .cpu_user_features = COMMON_USER_BOOKE |
1090 PPC_FEATURE_SPE_COMP |
1091 PPC_FEATURE_HAS_EFP_SINGLE |
1092 PPC_FEATURE_UNIFIED_CACHE,
1093 .dcache_bsize = 32,
1094 .platform = "ppc5554",
1095 },
1096 { /* e500 */
1097 .pvr_mask = 0xffff0000,
1098 .pvr_value = 0x80200000,
1099 .cpu_name = "e500",
1100 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1101 .cpu_features = CPU_FTRS_E500,
1102 .cpu_user_features = COMMON_USER_BOOKE |
1103 PPC_FEATURE_SPE_COMP |
1104 PPC_FEATURE_HAS_EFP_SINGLE,
1105 .icache_bsize = 32,
1106 .dcache_bsize = 32,
1107 .num_pmcs = 4,
1108 .oprofile_cpu_type = "ppc/e500",
1109 .oprofile_type = PPC_OPROFILE_BOOKE,
1110 .platform = "ppc8540",
1111 },
1112 { /* e500v2 */
1113 .pvr_mask = 0xffff0000,
1114 .pvr_value = 0x80210000,
1115 .cpu_name = "e500v2",
1116 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1117 .cpu_features = CPU_FTRS_E500_2,
1118 .cpu_user_features = COMMON_USER_BOOKE |
1119 PPC_FEATURE_SPE_COMP |
1120 PPC_FEATURE_HAS_EFP_SINGLE |
1121 PPC_FEATURE_HAS_EFP_DOUBLE,
1122 .icache_bsize = 32,
1123 .dcache_bsize = 32,
1124 .num_pmcs = 4,
1125 .oprofile_cpu_type = "ppc/e500",
1126 .oprofile_type = PPC_OPROFILE_BOOKE,
1127 .platform = "ppc8548",
1128 },
1129 #endif
1130 #if !CLASSIC_PPC
1131 { /* default match */
1132 .pvr_mask = 0x00000000,
1133 .pvr_value = 0x00000000,
1134 .cpu_name = "(generic PPC)",
1135 .cpu_features = CPU_FTRS_GENERIC_32,
1136 .cpu_user_features = PPC_FEATURE_32,
1137 .icache_bsize = 32,
1138 .dcache_bsize = 32,
1139 .platform = "powerpc",
1140 }
1141 #endif /* !CLASSIC_PPC */
1142 #endif /* CONFIG_PPC32 */
1143 };
kernel source for telekom puls (alcatel/mediatek)