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[POWERPC] 4xx: Introduce cpu_setup functionality to 44x platform
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 #ifdef CONFIG_PPC64
44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
47 extern void __restore_cpu_pa6t(void);
48 extern void __restore_cpu_ppc970(void);
49 #endif /* CONFIG_PPC64 */
50
51 /* This table only contains "desktop" CPUs, it need to be filled with embedded
52 * ones as well...
53 */
54 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
55 PPC_FEATURE_HAS_MMU)
56 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
57 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
58 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
62 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
63 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
64 PPC_FEATURE_TRUE_LE)
65 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
66 PPC_FEATURE_TRUE_LE | \
67 PPC_FEATURE_HAS_ALTIVEC_COMP)
68 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
69 PPC_FEATURE_BOOKE)
70
71 static struct cpu_spec cpu_specs[] = {
72 #ifdef CONFIG_PPC64
73 { /* Power3 */
74 .pvr_mask = 0xffff0000,
75 .pvr_value = 0x00400000,
76 .cpu_name = "POWER3 (630)",
77 .cpu_features = CPU_FTRS_POWER3,
78 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
79 .icache_bsize = 128,
80 .dcache_bsize = 128,
81 .num_pmcs = 8,
82 .pmc_type = PPC_PMC_IBM,
83 .oprofile_cpu_type = "ppc64/power3",
84 .oprofile_type = PPC_OPROFILE_RS64,
85 .platform = "power3",
86 },
87 { /* Power3+ */
88 .pvr_mask = 0xffff0000,
89 .pvr_value = 0x00410000,
90 .cpu_name = "POWER3 (630+)",
91 .cpu_features = CPU_FTRS_POWER3,
92 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
93 .icache_bsize = 128,
94 .dcache_bsize = 128,
95 .num_pmcs = 8,
96 .pmc_type = PPC_PMC_IBM,
97 .oprofile_cpu_type = "ppc64/power3",
98 .oprofile_type = PPC_OPROFILE_RS64,
99 .platform = "power3",
100 },
101 { /* Northstar */
102 .pvr_mask = 0xffff0000,
103 .pvr_value = 0x00330000,
104 .cpu_name = "RS64-II (northstar)",
105 .cpu_features = CPU_FTRS_RS64,
106 .cpu_user_features = COMMON_USER_PPC64,
107 .icache_bsize = 128,
108 .dcache_bsize = 128,
109 .num_pmcs = 8,
110 .pmc_type = PPC_PMC_IBM,
111 .oprofile_cpu_type = "ppc64/rs64",
112 .oprofile_type = PPC_OPROFILE_RS64,
113 .platform = "rs64",
114 },
115 { /* Pulsar */
116 .pvr_mask = 0xffff0000,
117 .pvr_value = 0x00340000,
118 .cpu_name = "RS64-III (pulsar)",
119 .cpu_features = CPU_FTRS_RS64,
120 .cpu_user_features = COMMON_USER_PPC64,
121 .icache_bsize = 128,
122 .dcache_bsize = 128,
123 .num_pmcs = 8,
124 .pmc_type = PPC_PMC_IBM,
125 .oprofile_cpu_type = "ppc64/rs64",
126 .oprofile_type = PPC_OPROFILE_RS64,
127 .platform = "rs64",
128 },
129 { /* I-star */
130 .pvr_mask = 0xffff0000,
131 .pvr_value = 0x00360000,
132 .cpu_name = "RS64-III (icestar)",
133 .cpu_features = CPU_FTRS_RS64,
134 .cpu_user_features = COMMON_USER_PPC64,
135 .icache_bsize = 128,
136 .dcache_bsize = 128,
137 .num_pmcs = 8,
138 .pmc_type = PPC_PMC_IBM,
139 .oprofile_cpu_type = "ppc64/rs64",
140 .oprofile_type = PPC_OPROFILE_RS64,
141 .platform = "rs64",
142 },
143 { /* S-star */
144 .pvr_mask = 0xffff0000,
145 .pvr_value = 0x00370000,
146 .cpu_name = "RS64-IV (sstar)",
147 .cpu_features = CPU_FTRS_RS64,
148 .cpu_user_features = COMMON_USER_PPC64,
149 .icache_bsize = 128,
150 .dcache_bsize = 128,
151 .num_pmcs = 8,
152 .pmc_type = PPC_PMC_IBM,
153 .oprofile_cpu_type = "ppc64/rs64",
154 .oprofile_type = PPC_OPROFILE_RS64,
155 .platform = "rs64",
156 },
157 { /* Power4 */
158 .pvr_mask = 0xffff0000,
159 .pvr_value = 0x00350000,
160 .cpu_name = "POWER4 (gp)",
161 .cpu_features = CPU_FTRS_POWER4,
162 .cpu_user_features = COMMON_USER_POWER4,
163 .icache_bsize = 128,
164 .dcache_bsize = 128,
165 .num_pmcs = 8,
166 .pmc_type = PPC_PMC_IBM,
167 .oprofile_cpu_type = "ppc64/power4",
168 .oprofile_type = PPC_OPROFILE_POWER4,
169 .platform = "power4",
170 },
171 { /* Power4+ */
172 .pvr_mask = 0xffff0000,
173 .pvr_value = 0x00380000,
174 .cpu_name = "POWER4+ (gq)",
175 .cpu_features = CPU_FTRS_POWER4,
176 .cpu_user_features = COMMON_USER_POWER4,
177 .icache_bsize = 128,
178 .dcache_bsize = 128,
179 .num_pmcs = 8,
180 .pmc_type = PPC_PMC_IBM,
181 .oprofile_cpu_type = "ppc64/power4",
182 .oprofile_type = PPC_OPROFILE_POWER4,
183 .platform = "power4",
184 },
185 { /* PPC970 */
186 .pvr_mask = 0xffff0000,
187 .pvr_value = 0x00390000,
188 .cpu_name = "PPC970",
189 .cpu_features = CPU_FTRS_PPC970,
190 .cpu_user_features = COMMON_USER_POWER4 |
191 PPC_FEATURE_HAS_ALTIVEC_COMP,
192 .icache_bsize = 128,
193 .dcache_bsize = 128,
194 .num_pmcs = 8,
195 .pmc_type = PPC_PMC_IBM,
196 .cpu_setup = __setup_cpu_ppc970,
197 .cpu_restore = __restore_cpu_ppc970,
198 .oprofile_cpu_type = "ppc64/970",
199 .oprofile_type = PPC_OPROFILE_POWER4,
200 .platform = "ppc970",
201 },
202 { /* PPC970FX */
203 .pvr_mask = 0xffff0000,
204 .pvr_value = 0x003c0000,
205 .cpu_name = "PPC970FX",
206 .cpu_features = CPU_FTRS_PPC970,
207 .cpu_user_features = COMMON_USER_POWER4 |
208 PPC_FEATURE_HAS_ALTIVEC_COMP,
209 .icache_bsize = 128,
210 .dcache_bsize = 128,
211 .num_pmcs = 8,
212 .pmc_type = PPC_PMC_IBM,
213 .cpu_setup = __setup_cpu_ppc970,
214 .cpu_restore = __restore_cpu_ppc970,
215 .oprofile_cpu_type = "ppc64/970",
216 .oprofile_type = PPC_OPROFILE_POWER4,
217 .platform = "ppc970",
218 },
219 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
220 .pvr_mask = 0xffffffff,
221 .pvr_value = 0x00440100,
222 .cpu_name = "PPC970MP",
223 .cpu_features = CPU_FTRS_PPC970,
224 .cpu_user_features = COMMON_USER_POWER4 |
225 PPC_FEATURE_HAS_ALTIVEC_COMP,
226 .icache_bsize = 128,
227 .dcache_bsize = 128,
228 .num_pmcs = 8,
229 .pmc_type = PPC_PMC_IBM,
230 .cpu_setup = __setup_cpu_ppc970,
231 .cpu_restore = __restore_cpu_ppc970,
232 .oprofile_cpu_type = "ppc64/970MP",
233 .oprofile_type = PPC_OPROFILE_POWER4,
234 .platform = "ppc970",
235 },
236 { /* PPC970MP */
237 .pvr_mask = 0xffff0000,
238 .pvr_value = 0x00440000,
239 .cpu_name = "PPC970MP",
240 .cpu_features = CPU_FTRS_PPC970,
241 .cpu_user_features = COMMON_USER_POWER4 |
242 PPC_FEATURE_HAS_ALTIVEC_COMP,
243 .icache_bsize = 128,
244 .dcache_bsize = 128,
245 .num_pmcs = 8,
246 .pmc_type = PPC_PMC_IBM,
247 .cpu_setup = __setup_cpu_ppc970MP,
248 .cpu_restore = __restore_cpu_ppc970,
249 .oprofile_cpu_type = "ppc64/970MP",
250 .oprofile_type = PPC_OPROFILE_POWER4,
251 .platform = "ppc970",
252 },
253 { /* PPC970GX */
254 .pvr_mask = 0xffff0000,
255 .pvr_value = 0x00450000,
256 .cpu_name = "PPC970GX",
257 .cpu_features = CPU_FTRS_PPC970,
258 .cpu_user_features = COMMON_USER_POWER4 |
259 PPC_FEATURE_HAS_ALTIVEC_COMP,
260 .icache_bsize = 128,
261 .dcache_bsize = 128,
262 .num_pmcs = 8,
263 .pmc_type = PPC_PMC_IBM,
264 .cpu_setup = __setup_cpu_ppc970,
265 .oprofile_cpu_type = "ppc64/970",
266 .oprofile_type = PPC_OPROFILE_POWER4,
267 .platform = "ppc970",
268 },
269 { /* Power5 GR */
270 .pvr_mask = 0xffff0000,
271 .pvr_value = 0x003a0000,
272 .cpu_name = "POWER5 (gr)",
273 .cpu_features = CPU_FTRS_POWER5,
274 .cpu_user_features = COMMON_USER_POWER5,
275 .icache_bsize = 128,
276 .dcache_bsize = 128,
277 .num_pmcs = 6,
278 .pmc_type = PPC_PMC_IBM,
279 .oprofile_cpu_type = "ppc64/power5",
280 .oprofile_type = PPC_OPROFILE_POWER4,
281 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
282 * and above but only works on POWER5 and above
283 */
284 .oprofile_mmcra_sihv = MMCRA_SIHV,
285 .oprofile_mmcra_sipr = MMCRA_SIPR,
286 .platform = "power5",
287 },
288 { /* Power5++ */
289 .pvr_mask = 0xffffff00,
290 .pvr_value = 0x003b0300,
291 .cpu_name = "POWER5+ (gs)",
292 .cpu_features = CPU_FTRS_POWER5,
293 .cpu_user_features = COMMON_USER_POWER5_PLUS,
294 .icache_bsize = 128,
295 .dcache_bsize = 128,
296 .num_pmcs = 6,
297 .oprofile_cpu_type = "ppc64/power5++",
298 .oprofile_type = PPC_OPROFILE_POWER4,
299 .oprofile_mmcra_sihv = MMCRA_SIHV,
300 .oprofile_mmcra_sipr = MMCRA_SIPR,
301 .platform = "power5+",
302 },
303 { /* Power5 GS */
304 .pvr_mask = 0xffff0000,
305 .pvr_value = 0x003b0000,
306 .cpu_name = "POWER5+ (gs)",
307 .cpu_features = CPU_FTRS_POWER5,
308 .cpu_user_features = COMMON_USER_POWER5_PLUS,
309 .icache_bsize = 128,
310 .dcache_bsize = 128,
311 .num_pmcs = 6,
312 .pmc_type = PPC_PMC_IBM,
313 .oprofile_cpu_type = "ppc64/power5+",
314 .oprofile_type = PPC_OPROFILE_POWER4,
315 .oprofile_mmcra_sihv = MMCRA_SIHV,
316 .oprofile_mmcra_sipr = MMCRA_SIPR,
317 .platform = "power5+",
318 },
319 { /* POWER6 in P5+ mode; 2.04-compliant processor */
320 .pvr_mask = 0xffffffff,
321 .pvr_value = 0x0f000001,
322 .cpu_name = "POWER5+",
323 .cpu_features = CPU_FTRS_POWER5,
324 .cpu_user_features = COMMON_USER_POWER5_PLUS,
325 .icache_bsize = 128,
326 .dcache_bsize = 128,
327 .num_pmcs = 6,
328 .pmc_type = PPC_PMC_IBM,
329 .oprofile_cpu_type = "ppc64/power6",
330 .oprofile_type = PPC_OPROFILE_POWER4,
331 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
332 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
333 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
334 POWER6_MMCRA_OTHER,
335 .platform = "power5+",
336 },
337 { /* Power6 */
338 .pvr_mask = 0xffff0000,
339 .pvr_value = 0x003e0000,
340 .cpu_name = "POWER6 (raw)",
341 .cpu_features = CPU_FTRS_POWER6,
342 .cpu_user_features = COMMON_USER_POWER6 |
343 PPC_FEATURE_POWER6_EXT,
344 .icache_bsize = 128,
345 .dcache_bsize = 128,
346 .num_pmcs = 6,
347 .pmc_type = PPC_PMC_IBM,
348 .oprofile_cpu_type = "ppc64/power6",
349 .oprofile_type = PPC_OPROFILE_POWER4,
350 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
351 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
352 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
353 POWER6_MMCRA_OTHER,
354 .platform = "power6x",
355 },
356 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
357 .pvr_mask = 0xffffffff,
358 .pvr_value = 0x0f000002,
359 .cpu_name = "POWER6 (architected)",
360 .cpu_features = CPU_FTRS_POWER6,
361 .cpu_user_features = COMMON_USER_POWER6,
362 .icache_bsize = 128,
363 .dcache_bsize = 128,
364 .num_pmcs = 6,
365 .pmc_type = PPC_PMC_IBM,
366 .oprofile_cpu_type = "ppc64/power6",
367 .oprofile_type = PPC_OPROFILE_POWER4,
368 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
369 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
370 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
371 POWER6_MMCRA_OTHER,
372 .platform = "power6",
373 },
374 { /* Cell Broadband Engine */
375 .pvr_mask = 0xffff0000,
376 .pvr_value = 0x00700000,
377 .cpu_name = "Cell Broadband Engine",
378 .cpu_features = CPU_FTRS_CELL,
379 .cpu_user_features = COMMON_USER_PPC64 |
380 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
381 PPC_FEATURE_SMT,
382 .icache_bsize = 128,
383 .dcache_bsize = 128,
384 .num_pmcs = 4,
385 .pmc_type = PPC_PMC_IBM,
386 .oprofile_cpu_type = "ppc64/cell-be",
387 .oprofile_type = PPC_OPROFILE_CELL,
388 .platform = "ppc-cell-be",
389 },
390 { /* PA Semi PA6T */
391 .pvr_mask = 0x7fff0000,
392 .pvr_value = 0x00900000,
393 .cpu_name = "PA6T",
394 .cpu_features = CPU_FTRS_PA6T,
395 .cpu_user_features = COMMON_USER_PA6T,
396 .icache_bsize = 64,
397 .dcache_bsize = 64,
398 .num_pmcs = 6,
399 .pmc_type = PPC_PMC_PA6T,
400 .cpu_setup = __setup_cpu_pa6t,
401 .cpu_restore = __restore_cpu_pa6t,
402 .oprofile_cpu_type = "ppc64/pa6t",
403 .oprofile_type = PPC_OPROFILE_PA6T,
404 .platform = "pa6t",
405 },
406 { /* default match */
407 .pvr_mask = 0x00000000,
408 .pvr_value = 0x00000000,
409 .cpu_name = "POWER4 (compatible)",
410 .cpu_features = CPU_FTRS_COMPATIBLE,
411 .cpu_user_features = COMMON_USER_PPC64,
412 .icache_bsize = 128,
413 .dcache_bsize = 128,
414 .num_pmcs = 6,
415 .pmc_type = PPC_PMC_IBM,
416 .platform = "power4",
417 }
418 #endif /* CONFIG_PPC64 */
419 #ifdef CONFIG_PPC32
420 #if CLASSIC_PPC
421 { /* 601 */
422 .pvr_mask = 0xffff0000,
423 .pvr_value = 0x00010000,
424 .cpu_name = "601",
425 .cpu_features = CPU_FTRS_PPC601,
426 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
427 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
428 .icache_bsize = 32,
429 .dcache_bsize = 32,
430 .platform = "ppc601",
431 },
432 { /* 603 */
433 .pvr_mask = 0xffff0000,
434 .pvr_value = 0x00030000,
435 .cpu_name = "603",
436 .cpu_features = CPU_FTRS_603,
437 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
438 .icache_bsize = 32,
439 .dcache_bsize = 32,
440 .cpu_setup = __setup_cpu_603,
441 .platform = "ppc603",
442 },
443 { /* 603e */
444 .pvr_mask = 0xffff0000,
445 .pvr_value = 0x00060000,
446 .cpu_name = "603e",
447 .cpu_features = CPU_FTRS_603,
448 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
449 .icache_bsize = 32,
450 .dcache_bsize = 32,
451 .cpu_setup = __setup_cpu_603,
452 .platform = "ppc603",
453 },
454 { /* 603ev */
455 .pvr_mask = 0xffff0000,
456 .pvr_value = 0x00070000,
457 .cpu_name = "603ev",
458 .cpu_features = CPU_FTRS_603,
459 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
460 .icache_bsize = 32,
461 .dcache_bsize = 32,
462 .cpu_setup = __setup_cpu_603,
463 .platform = "ppc603",
464 },
465 { /* 604 */
466 .pvr_mask = 0xffff0000,
467 .pvr_value = 0x00040000,
468 .cpu_name = "604",
469 .cpu_features = CPU_FTRS_604,
470 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
471 .icache_bsize = 32,
472 .dcache_bsize = 32,
473 .num_pmcs = 2,
474 .cpu_setup = __setup_cpu_604,
475 .platform = "ppc604",
476 },
477 { /* 604e */
478 .pvr_mask = 0xfffff000,
479 .pvr_value = 0x00090000,
480 .cpu_name = "604e",
481 .cpu_features = CPU_FTRS_604,
482 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
483 .icache_bsize = 32,
484 .dcache_bsize = 32,
485 .num_pmcs = 4,
486 .cpu_setup = __setup_cpu_604,
487 .platform = "ppc604",
488 },
489 { /* 604r */
490 .pvr_mask = 0xffff0000,
491 .pvr_value = 0x00090000,
492 .cpu_name = "604r",
493 .cpu_features = CPU_FTRS_604,
494 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
495 .icache_bsize = 32,
496 .dcache_bsize = 32,
497 .num_pmcs = 4,
498 .cpu_setup = __setup_cpu_604,
499 .platform = "ppc604",
500 },
501 { /* 604ev */
502 .pvr_mask = 0xffff0000,
503 .pvr_value = 0x000a0000,
504 .cpu_name = "604ev",
505 .cpu_features = CPU_FTRS_604,
506 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
507 .icache_bsize = 32,
508 .dcache_bsize = 32,
509 .num_pmcs = 4,
510 .cpu_setup = __setup_cpu_604,
511 .platform = "ppc604",
512 },
513 { /* 740/750 (0x4202, don't support TAU ?) */
514 .pvr_mask = 0xffffffff,
515 .pvr_value = 0x00084202,
516 .cpu_name = "740/750",
517 .cpu_features = CPU_FTRS_740_NOTAU,
518 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
519 .icache_bsize = 32,
520 .dcache_bsize = 32,
521 .num_pmcs = 4,
522 .cpu_setup = __setup_cpu_750,
523 .platform = "ppc750",
524 },
525 { /* 750CX (80100 and 8010x?) */
526 .pvr_mask = 0xfffffff0,
527 .pvr_value = 0x00080100,
528 .cpu_name = "750CX",
529 .cpu_features = CPU_FTRS_750,
530 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
531 .icache_bsize = 32,
532 .dcache_bsize = 32,
533 .num_pmcs = 4,
534 .cpu_setup = __setup_cpu_750cx,
535 .platform = "ppc750",
536 },
537 { /* 750CX (82201 and 82202) */
538 .pvr_mask = 0xfffffff0,
539 .pvr_value = 0x00082200,
540 .cpu_name = "750CX",
541 .cpu_features = CPU_FTRS_750,
542 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
543 .icache_bsize = 32,
544 .dcache_bsize = 32,
545 .num_pmcs = 4,
546 .cpu_setup = __setup_cpu_750cx,
547 .platform = "ppc750",
548 },
549 { /* 750CXe (82214) */
550 .pvr_mask = 0xfffffff0,
551 .pvr_value = 0x00082210,
552 .cpu_name = "750CXe",
553 .cpu_features = CPU_FTRS_750,
554 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
555 .icache_bsize = 32,
556 .dcache_bsize = 32,
557 .num_pmcs = 4,
558 .cpu_setup = __setup_cpu_750cx,
559 .platform = "ppc750",
560 },
561 { /* 750CXe "Gekko" (83214) */
562 .pvr_mask = 0xffffffff,
563 .pvr_value = 0x00083214,
564 .cpu_name = "750CXe",
565 .cpu_features = CPU_FTRS_750,
566 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
567 .icache_bsize = 32,
568 .dcache_bsize = 32,
569 .num_pmcs = 4,
570 .cpu_setup = __setup_cpu_750cx,
571 .platform = "ppc750",
572 },
573 { /* 750CL */
574 .pvr_mask = 0xfffff0f0,
575 .pvr_value = 0x00087010,
576 .cpu_name = "750CL",
577 .cpu_features = CPU_FTRS_750CL,
578 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
579 .icache_bsize = 32,
580 .dcache_bsize = 32,
581 .num_pmcs = 4,
582 .cpu_setup = __setup_cpu_750,
583 .platform = "ppc750",
584 },
585 { /* 745/755 */
586 .pvr_mask = 0xfffff000,
587 .pvr_value = 0x00083000,
588 .cpu_name = "745/755",
589 .cpu_features = CPU_FTRS_750,
590 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
591 .icache_bsize = 32,
592 .dcache_bsize = 32,
593 .num_pmcs = 4,
594 .cpu_setup = __setup_cpu_750,
595 .platform = "ppc750",
596 },
597 { /* 750FX rev 1.x */
598 .pvr_mask = 0xffffff00,
599 .pvr_value = 0x70000100,
600 .cpu_name = "750FX",
601 .cpu_features = CPU_FTRS_750FX1,
602 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
603 .icache_bsize = 32,
604 .dcache_bsize = 32,
605 .num_pmcs = 4,
606 .cpu_setup = __setup_cpu_750,
607 .platform = "ppc750",
608 },
609 { /* 750FX rev 2.0 must disable HID0[DPM] */
610 .pvr_mask = 0xffffffff,
611 .pvr_value = 0x70000200,
612 .cpu_name = "750FX",
613 .cpu_features = CPU_FTRS_750FX2,
614 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
615 .icache_bsize = 32,
616 .dcache_bsize = 32,
617 .num_pmcs = 4,
618 .cpu_setup = __setup_cpu_750,
619 .platform = "ppc750",
620 },
621 { /* 750FX (All revs except 2.0) */
622 .pvr_mask = 0xffff0000,
623 .pvr_value = 0x70000000,
624 .cpu_name = "750FX",
625 .cpu_features = CPU_FTRS_750FX,
626 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
627 .icache_bsize = 32,
628 .dcache_bsize = 32,
629 .num_pmcs = 4,
630 .cpu_setup = __setup_cpu_750fx,
631 .platform = "ppc750",
632 },
633 { /* 750GX */
634 .pvr_mask = 0xffff0000,
635 .pvr_value = 0x70020000,
636 .cpu_name = "750GX",
637 .cpu_features = CPU_FTRS_750GX,
638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
639 .icache_bsize = 32,
640 .dcache_bsize = 32,
641 .num_pmcs = 4,
642 .cpu_setup = __setup_cpu_750fx,
643 .platform = "ppc750",
644 },
645 { /* 740/750 (L2CR bit need fixup for 740) */
646 .pvr_mask = 0xffff0000,
647 .pvr_value = 0x00080000,
648 .cpu_name = "740/750",
649 .cpu_features = CPU_FTRS_740,
650 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
651 .icache_bsize = 32,
652 .dcache_bsize = 32,
653 .num_pmcs = 4,
654 .cpu_setup = __setup_cpu_750,
655 .platform = "ppc750",
656 },
657 { /* 7400 rev 1.1 ? (no TAU) */
658 .pvr_mask = 0xffffffff,
659 .pvr_value = 0x000c1101,
660 .cpu_name = "7400 (1.1)",
661 .cpu_features = CPU_FTRS_7400_NOTAU,
662 .cpu_user_features = COMMON_USER |
663 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
664 .icache_bsize = 32,
665 .dcache_bsize = 32,
666 .num_pmcs = 4,
667 .cpu_setup = __setup_cpu_7400,
668 .platform = "ppc7400",
669 },
670 { /* 7400 */
671 .pvr_mask = 0xffff0000,
672 .pvr_value = 0x000c0000,
673 .cpu_name = "7400",
674 .cpu_features = CPU_FTRS_7400,
675 .cpu_user_features = COMMON_USER |
676 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
677 .icache_bsize = 32,
678 .dcache_bsize = 32,
679 .num_pmcs = 4,
680 .cpu_setup = __setup_cpu_7400,
681 .platform = "ppc7400",
682 },
683 { /* 7410 */
684 .pvr_mask = 0xffff0000,
685 .pvr_value = 0x800c0000,
686 .cpu_name = "7410",
687 .cpu_features = CPU_FTRS_7400,
688 .cpu_user_features = COMMON_USER |
689 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
690 .icache_bsize = 32,
691 .dcache_bsize = 32,
692 .num_pmcs = 4,
693 .cpu_setup = __setup_cpu_7410,
694 .platform = "ppc7400",
695 },
696 { /* 7450 2.0 - no doze/nap */
697 .pvr_mask = 0xffffffff,
698 .pvr_value = 0x80000200,
699 .cpu_name = "7450",
700 .cpu_features = CPU_FTRS_7450_20,
701 .cpu_user_features = COMMON_USER |
702 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
703 .icache_bsize = 32,
704 .dcache_bsize = 32,
705 .num_pmcs = 6,
706 .cpu_setup = __setup_cpu_745x,
707 .oprofile_cpu_type = "ppc/7450",
708 .oprofile_type = PPC_OPROFILE_G4,
709 .platform = "ppc7450",
710 },
711 { /* 7450 2.1 */
712 .pvr_mask = 0xffffffff,
713 .pvr_value = 0x80000201,
714 .cpu_name = "7450",
715 .cpu_features = CPU_FTRS_7450_21,
716 .cpu_user_features = COMMON_USER |
717 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
718 .icache_bsize = 32,
719 .dcache_bsize = 32,
720 .num_pmcs = 6,
721 .cpu_setup = __setup_cpu_745x,
722 .oprofile_cpu_type = "ppc/7450",
723 .oprofile_type = PPC_OPROFILE_G4,
724 .platform = "ppc7450",
725 },
726 { /* 7450 2.3 and newer */
727 .pvr_mask = 0xffff0000,
728 .pvr_value = 0x80000000,
729 .cpu_name = "7450",
730 .cpu_features = CPU_FTRS_7450_23,
731 .cpu_user_features = COMMON_USER |
732 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
733 .icache_bsize = 32,
734 .dcache_bsize = 32,
735 .num_pmcs = 6,
736 .cpu_setup = __setup_cpu_745x,
737 .oprofile_cpu_type = "ppc/7450",
738 .oprofile_type = PPC_OPROFILE_G4,
739 .platform = "ppc7450",
740 },
741 { /* 7455 rev 1.x */
742 .pvr_mask = 0xffffff00,
743 .pvr_value = 0x80010100,
744 .cpu_name = "7455",
745 .cpu_features = CPU_FTRS_7455_1,
746 .cpu_user_features = COMMON_USER |
747 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
748 .icache_bsize = 32,
749 .dcache_bsize = 32,
750 .num_pmcs = 6,
751 .cpu_setup = __setup_cpu_745x,
752 .oprofile_cpu_type = "ppc/7450",
753 .oprofile_type = PPC_OPROFILE_G4,
754 .platform = "ppc7450",
755 },
756 { /* 7455 rev 2.0 */
757 .pvr_mask = 0xffffffff,
758 .pvr_value = 0x80010200,
759 .cpu_name = "7455",
760 .cpu_features = CPU_FTRS_7455_20,
761 .cpu_user_features = COMMON_USER |
762 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
763 .icache_bsize = 32,
764 .dcache_bsize = 32,
765 .num_pmcs = 6,
766 .cpu_setup = __setup_cpu_745x,
767 .oprofile_cpu_type = "ppc/7450",
768 .oprofile_type = PPC_OPROFILE_G4,
769 .platform = "ppc7450",
770 },
771 { /* 7455 others */
772 .pvr_mask = 0xffff0000,
773 .pvr_value = 0x80010000,
774 .cpu_name = "7455",
775 .cpu_features = CPU_FTRS_7455,
776 .cpu_user_features = COMMON_USER |
777 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
778 .icache_bsize = 32,
779 .dcache_bsize = 32,
780 .num_pmcs = 6,
781 .cpu_setup = __setup_cpu_745x,
782 .oprofile_cpu_type = "ppc/7450",
783 .oprofile_type = PPC_OPROFILE_G4,
784 .platform = "ppc7450",
785 },
786 { /* 7447/7457 Rev 1.0 */
787 .pvr_mask = 0xffffffff,
788 .pvr_value = 0x80020100,
789 .cpu_name = "7447/7457",
790 .cpu_features = CPU_FTRS_7447_10,
791 .cpu_user_features = COMMON_USER |
792 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
793 .icache_bsize = 32,
794 .dcache_bsize = 32,
795 .num_pmcs = 6,
796 .cpu_setup = __setup_cpu_745x,
797 .oprofile_cpu_type = "ppc/7450",
798 .oprofile_type = PPC_OPROFILE_G4,
799 .platform = "ppc7450",
800 },
801 { /* 7447/7457 Rev 1.1 */
802 .pvr_mask = 0xffffffff,
803 .pvr_value = 0x80020101,
804 .cpu_name = "7447/7457",
805 .cpu_features = CPU_FTRS_7447_10,
806 .cpu_user_features = COMMON_USER |
807 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
808 .icache_bsize = 32,
809 .dcache_bsize = 32,
810 .num_pmcs = 6,
811 .cpu_setup = __setup_cpu_745x,
812 .oprofile_cpu_type = "ppc/7450",
813 .oprofile_type = PPC_OPROFILE_G4,
814 .platform = "ppc7450",
815 },
816 { /* 7447/7457 Rev 1.2 and later */
817 .pvr_mask = 0xffff0000,
818 .pvr_value = 0x80020000,
819 .cpu_name = "7447/7457",
820 .cpu_features = CPU_FTRS_7447,
821 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
822 .icache_bsize = 32,
823 .dcache_bsize = 32,
824 .num_pmcs = 6,
825 .cpu_setup = __setup_cpu_745x,
826 .oprofile_cpu_type = "ppc/7450",
827 .oprofile_type = PPC_OPROFILE_G4,
828 .platform = "ppc7450",
829 },
830 { /* 7447A */
831 .pvr_mask = 0xffff0000,
832 .pvr_value = 0x80030000,
833 .cpu_name = "7447A",
834 .cpu_features = CPU_FTRS_7447A,
835 .cpu_user_features = COMMON_USER |
836 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
837 .icache_bsize = 32,
838 .dcache_bsize = 32,
839 .num_pmcs = 6,
840 .cpu_setup = __setup_cpu_745x,
841 .oprofile_cpu_type = "ppc/7450",
842 .oprofile_type = PPC_OPROFILE_G4,
843 .platform = "ppc7450",
844 },
845 { /* 7448 */
846 .pvr_mask = 0xffff0000,
847 .pvr_value = 0x80040000,
848 .cpu_name = "7448",
849 .cpu_features = CPU_FTRS_7448,
850 .cpu_user_features = COMMON_USER |
851 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
852 .icache_bsize = 32,
853 .dcache_bsize = 32,
854 .num_pmcs = 6,
855 .cpu_setup = __setup_cpu_745x,
856 .oprofile_cpu_type = "ppc/7450",
857 .oprofile_type = PPC_OPROFILE_G4,
858 .platform = "ppc7450",
859 },
860 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
861 .pvr_mask = 0x7fff0000,
862 .pvr_value = 0x00810000,
863 .cpu_name = "82xx",
864 .cpu_features = CPU_FTRS_82XX,
865 .cpu_user_features = COMMON_USER,
866 .icache_bsize = 32,
867 .dcache_bsize = 32,
868 .cpu_setup = __setup_cpu_603,
869 .platform = "ppc603",
870 },
871 { /* All G2_LE (603e core, plus some) have the same pvr */
872 .pvr_mask = 0x7fff0000,
873 .pvr_value = 0x00820000,
874 .cpu_name = "G2_LE",
875 .cpu_features = CPU_FTRS_G2_LE,
876 .cpu_user_features = COMMON_USER,
877 .icache_bsize = 32,
878 .dcache_bsize = 32,
879 .cpu_setup = __setup_cpu_603,
880 .platform = "ppc603",
881 },
882 { /* e300c1 (a 603e core, plus some) on 83xx */
883 .pvr_mask = 0x7fff0000,
884 .pvr_value = 0x00830000,
885 .cpu_name = "e300c1",
886 .cpu_features = CPU_FTRS_E300,
887 .cpu_user_features = COMMON_USER,
888 .icache_bsize = 32,
889 .dcache_bsize = 32,
890 .cpu_setup = __setup_cpu_603,
891 .platform = "ppc603",
892 },
893 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
894 .pvr_mask = 0x7fff0000,
895 .pvr_value = 0x00840000,
896 .cpu_name = "e300c2",
897 .cpu_features = CPU_FTRS_E300C2,
898 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
899 .icache_bsize = 32,
900 .dcache_bsize = 32,
901 .cpu_setup = __setup_cpu_603,
902 .platform = "ppc603",
903 },
904 { /* e300c3 on 83xx */
905 .pvr_mask = 0x7fff0000,
906 .pvr_value = 0x00850000,
907 .cpu_name = "e300c3",
908 .cpu_features = CPU_FTRS_E300,
909 .cpu_user_features = COMMON_USER,
910 .icache_bsize = 32,
911 .dcache_bsize = 32,
912 .cpu_setup = __setup_cpu_603,
913 .platform = "ppc603",
914 },
915 { /* default match, we assume split I/D cache & TB (non-601)... */
916 .pvr_mask = 0x00000000,
917 .pvr_value = 0x00000000,
918 .cpu_name = "(generic PPC)",
919 .cpu_features = CPU_FTRS_CLASSIC32,
920 .cpu_user_features = COMMON_USER,
921 .icache_bsize = 32,
922 .dcache_bsize = 32,
923 .platform = "ppc603",
924 },
925 #endif /* CLASSIC_PPC */
926 #ifdef CONFIG_8xx
927 { /* 8xx */
928 .pvr_mask = 0xffff0000,
929 .pvr_value = 0x00500000,
930 .cpu_name = "8xx",
931 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
932 * if the 8xx code is there.... */
933 .cpu_features = CPU_FTRS_8XX,
934 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
935 .icache_bsize = 16,
936 .dcache_bsize = 16,
937 .platform = "ppc823",
938 },
939 #endif /* CONFIG_8xx */
940 #ifdef CONFIG_40x
941 { /* 403GC */
942 .pvr_mask = 0xffffff00,
943 .pvr_value = 0x00200200,
944 .cpu_name = "403GC",
945 .cpu_features = CPU_FTRS_40X,
946 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
947 .icache_bsize = 16,
948 .dcache_bsize = 16,
949 .platform = "ppc403",
950 },
951 { /* 403GCX */
952 .pvr_mask = 0xffffff00,
953 .pvr_value = 0x00201400,
954 .cpu_name = "403GCX",
955 .cpu_features = CPU_FTRS_40X,
956 .cpu_user_features = PPC_FEATURE_32 |
957 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
958 .icache_bsize = 16,
959 .dcache_bsize = 16,
960 .platform = "ppc403",
961 },
962 { /* 403G ?? */
963 .pvr_mask = 0xffff0000,
964 .pvr_value = 0x00200000,
965 .cpu_name = "403G ??",
966 .cpu_features = CPU_FTRS_40X,
967 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
968 .icache_bsize = 16,
969 .dcache_bsize = 16,
970 .platform = "ppc403",
971 },
972 { /* 405GP */
973 .pvr_mask = 0xffff0000,
974 .pvr_value = 0x40110000,
975 .cpu_name = "405GP",
976 .cpu_features = CPU_FTRS_40X,
977 .cpu_user_features = PPC_FEATURE_32 |
978 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
979 .icache_bsize = 32,
980 .dcache_bsize = 32,
981 .platform = "ppc405",
982 },
983 { /* STB 03xxx */
984 .pvr_mask = 0xffff0000,
985 .pvr_value = 0x40130000,
986 .cpu_name = "STB03xxx",
987 .cpu_features = CPU_FTRS_40X,
988 .cpu_user_features = PPC_FEATURE_32 |
989 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
990 .icache_bsize = 32,
991 .dcache_bsize = 32,
992 .platform = "ppc405",
993 },
994 { /* STB 04xxx */
995 .pvr_mask = 0xffff0000,
996 .pvr_value = 0x41810000,
997 .cpu_name = "STB04xxx",
998 .cpu_features = CPU_FTRS_40X,
999 .cpu_user_features = PPC_FEATURE_32 |
1000 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1001 .icache_bsize = 32,
1002 .dcache_bsize = 32,
1003 .platform = "ppc405",
1004 },
1005 { /* NP405L */
1006 .pvr_mask = 0xffff0000,
1007 .pvr_value = 0x41610000,
1008 .cpu_name = "NP405L",
1009 .cpu_features = CPU_FTRS_40X,
1010 .cpu_user_features = PPC_FEATURE_32 |
1011 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1012 .icache_bsize = 32,
1013 .dcache_bsize = 32,
1014 .platform = "ppc405",
1015 },
1016 { /* NP4GS3 */
1017 .pvr_mask = 0xffff0000,
1018 .pvr_value = 0x40B10000,
1019 .cpu_name = "NP4GS3",
1020 .cpu_features = CPU_FTRS_40X,
1021 .cpu_user_features = PPC_FEATURE_32 |
1022 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1023 .icache_bsize = 32,
1024 .dcache_bsize = 32,
1025 .platform = "ppc405",
1026 },
1027 { /* NP405H */
1028 .pvr_mask = 0xffff0000,
1029 .pvr_value = 0x41410000,
1030 .cpu_name = "NP405H",
1031 .cpu_features = CPU_FTRS_40X,
1032 .cpu_user_features = PPC_FEATURE_32 |
1033 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1034 .icache_bsize = 32,
1035 .dcache_bsize = 32,
1036 .platform = "ppc405",
1037 },
1038 { /* 405GPr */
1039 .pvr_mask = 0xffff0000,
1040 .pvr_value = 0x50910000,
1041 .cpu_name = "405GPr",
1042 .cpu_features = CPU_FTRS_40X,
1043 .cpu_user_features = PPC_FEATURE_32 |
1044 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1045 .icache_bsize = 32,
1046 .dcache_bsize = 32,
1047 .platform = "ppc405",
1048 },
1049 { /* STBx25xx */
1050 .pvr_mask = 0xffff0000,
1051 .pvr_value = 0x51510000,
1052 .cpu_name = "STBx25xx",
1053 .cpu_features = CPU_FTRS_40X,
1054 .cpu_user_features = PPC_FEATURE_32 |
1055 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1056 .icache_bsize = 32,
1057 .dcache_bsize = 32,
1058 .platform = "ppc405",
1059 },
1060 { /* 405LP */
1061 .pvr_mask = 0xffff0000,
1062 .pvr_value = 0x41F10000,
1063 .cpu_name = "405LP",
1064 .cpu_features = CPU_FTRS_40X,
1065 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1066 .icache_bsize = 32,
1067 .dcache_bsize = 32,
1068 .platform = "ppc405",
1069 },
1070 { /* Xilinx Virtex-II Pro */
1071 .pvr_mask = 0xfffff000,
1072 .pvr_value = 0x20010000,
1073 .cpu_name = "Virtex-II Pro",
1074 .cpu_features = CPU_FTRS_40X,
1075 .cpu_user_features = PPC_FEATURE_32 |
1076 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1077 .icache_bsize = 32,
1078 .dcache_bsize = 32,
1079 .platform = "ppc405",
1080 },
1081 { /* Xilinx Virtex-4 FX */
1082 .pvr_mask = 0xfffff000,
1083 .pvr_value = 0x20011000,
1084 .cpu_name = "Virtex-4 FX",
1085 .cpu_features = CPU_FTRS_40X,
1086 .cpu_user_features = PPC_FEATURE_32 |
1087 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1088 .icache_bsize = 32,
1089 .dcache_bsize = 32,
1090 .platform = "ppc405",
1091 },
1092 { /* 405EP */
1093 .pvr_mask = 0xffff0000,
1094 .pvr_value = 0x51210000,
1095 .cpu_name = "405EP",
1096 .cpu_features = CPU_FTRS_40X,
1097 .cpu_user_features = PPC_FEATURE_32 |
1098 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1099 .icache_bsize = 32,
1100 .dcache_bsize = 32,
1101 .platform = "ppc405",
1102 },
1103
1104 #endif /* CONFIG_40x */
1105 #ifdef CONFIG_44x
1106 {
1107 .pvr_mask = 0xf0000fff,
1108 .pvr_value = 0x40000850,
1109 .cpu_name = "440EP Rev. A",
1110 .cpu_features = CPU_FTRS_44X,
1111 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1112 .icache_bsize = 32,
1113 .dcache_bsize = 32,
1114 .platform = "ppc440",
1115 },
1116 {
1117 .pvr_mask = 0xf0000fff,
1118 .pvr_value = 0x400008d3,
1119 .cpu_name = "440EP Rev. B",
1120 .cpu_features = CPU_FTRS_44X,
1121 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1122 .icache_bsize = 32,
1123 .dcache_bsize = 32,
1124 .platform = "ppc440",
1125 },
1126 { /* 440EPX */
1127 .pvr_mask = 0xf0000ffb,
1128 .pvr_value = 0x200008D0,
1129 .cpu_name = "440EPX",
1130 .cpu_features = CPU_FTRS_44X,
1131 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1132 .icache_bsize = 32,
1133 .dcache_bsize = 32,
1134 },
1135 { /* 440GRX */
1136 .pvr_mask = 0xf0000ffb,
1137 .pvr_value = 0x200008D8,
1138 .cpu_name = "440GRX",
1139 .cpu_features = CPU_FTRS_44X,
1140 .cpu_user_features = COMMON_USER_BOOKE,
1141 .icache_bsize = 32,
1142 .dcache_bsize = 32,
1143 },
1144 { /* 440GP Rev. B */
1145 .pvr_mask = 0xf0000fff,
1146 .pvr_value = 0x40000440,
1147 .cpu_name = "440GP Rev. B",
1148 .cpu_features = CPU_FTRS_44X,
1149 .cpu_user_features = COMMON_USER_BOOKE,
1150 .icache_bsize = 32,
1151 .dcache_bsize = 32,
1152 .platform = "ppc440gp",
1153 },
1154 { /* 440GP Rev. C */
1155 .pvr_mask = 0xf0000fff,
1156 .pvr_value = 0x40000481,
1157 .cpu_name = "440GP Rev. C",
1158 .cpu_features = CPU_FTRS_44X,
1159 .cpu_user_features = COMMON_USER_BOOKE,
1160 .icache_bsize = 32,
1161 .dcache_bsize = 32,
1162 .platform = "ppc440gp",
1163 },
1164 { /* 440GX Rev. A */
1165 .pvr_mask = 0xf0000fff,
1166 .pvr_value = 0x50000850,
1167 .cpu_name = "440GX Rev. A",
1168 .cpu_features = CPU_FTRS_44X,
1169 .cpu_user_features = COMMON_USER_BOOKE,
1170 .icache_bsize = 32,
1171 .dcache_bsize = 32,
1172 .platform = "ppc440",
1173 },
1174 { /* 440GX Rev. B */
1175 .pvr_mask = 0xf0000fff,
1176 .pvr_value = 0x50000851,
1177 .cpu_name = "440GX Rev. B",
1178 .cpu_features = CPU_FTRS_44X,
1179 .cpu_user_features = COMMON_USER_BOOKE,
1180 .icache_bsize = 32,
1181 .dcache_bsize = 32,
1182 .platform = "ppc440",
1183 },
1184 { /* 440GX Rev. C */
1185 .pvr_mask = 0xf0000fff,
1186 .pvr_value = 0x50000892,
1187 .cpu_name = "440GX Rev. C",
1188 .cpu_features = CPU_FTRS_44X,
1189 .cpu_user_features = COMMON_USER_BOOKE,
1190 .icache_bsize = 32,
1191 .dcache_bsize = 32,
1192 .platform = "ppc440",
1193 },
1194 { /* 440GX Rev. F */
1195 .pvr_mask = 0xf0000fff,
1196 .pvr_value = 0x50000894,
1197 .cpu_name = "440GX Rev. F",
1198 .cpu_features = CPU_FTRS_44X,
1199 .cpu_user_features = COMMON_USER_BOOKE,
1200 .icache_bsize = 32,
1201 .dcache_bsize = 32,
1202 .platform = "ppc440",
1203 },
1204 { /* 440SP Rev. A */
1205 .pvr_mask = 0xfff00fff,
1206 .pvr_value = 0x53200891,
1207 .cpu_name = "440SP Rev. A",
1208 .cpu_features = CPU_FTRS_44X,
1209 .cpu_user_features = COMMON_USER_BOOKE,
1210 .icache_bsize = 32,
1211 .dcache_bsize = 32,
1212 .platform = "ppc440",
1213 },
1214 { /* 440SPe Rev. A */
1215 .pvr_mask = 0xfff00fff,
1216 .pvr_value = 0x53400890,
1217 .cpu_name = "440SPe Rev. A",
1218 .cpu_features = CPU_FTRS_44X,
1219 .cpu_user_features = COMMON_USER_BOOKE,
1220 .icache_bsize = 32,
1221 .dcache_bsize = 32,
1222 .platform = "ppc440",
1223 },
1224 { /* 440SPe Rev. B */
1225 .pvr_mask = 0xfff00fff,
1226 .pvr_value = 0x53400891,
1227 .cpu_name = "440SPe Rev. B",
1228 .cpu_features = CPU_FTRS_44X,
1229 .cpu_user_features = COMMON_USER_BOOKE,
1230 .icache_bsize = 32,
1231 .dcache_bsize = 32,
1232 .platform = "ppc440",
1233 },
1234 #endif /* CONFIG_44x */
1235 #ifdef CONFIG_FSL_BOOKE
1236 { /* e200z5 */
1237 .pvr_mask = 0xfff00000,
1238 .pvr_value = 0x81000000,
1239 .cpu_name = "e200z5",
1240 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1241 .cpu_features = CPU_FTRS_E200,
1242 .cpu_user_features = COMMON_USER_BOOKE |
1243 PPC_FEATURE_HAS_EFP_SINGLE |
1244 PPC_FEATURE_UNIFIED_CACHE,
1245 .dcache_bsize = 32,
1246 .platform = "ppc5554",
1247 },
1248 { /* e200z6 */
1249 .pvr_mask = 0xfff00000,
1250 .pvr_value = 0x81100000,
1251 .cpu_name = "e200z6",
1252 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1253 .cpu_features = CPU_FTRS_E200,
1254 .cpu_user_features = COMMON_USER_BOOKE |
1255 PPC_FEATURE_HAS_SPE_COMP |
1256 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1257 PPC_FEATURE_UNIFIED_CACHE,
1258 .dcache_bsize = 32,
1259 .platform = "ppc5554",
1260 },
1261 { /* e500 */
1262 .pvr_mask = 0xffff0000,
1263 .pvr_value = 0x80200000,
1264 .cpu_name = "e500",
1265 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1266 .cpu_features = CPU_FTRS_E500,
1267 .cpu_user_features = COMMON_USER_BOOKE |
1268 PPC_FEATURE_HAS_SPE_COMP |
1269 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1270 .icache_bsize = 32,
1271 .dcache_bsize = 32,
1272 .num_pmcs = 4,
1273 .oprofile_cpu_type = "ppc/e500",
1274 .oprofile_type = PPC_OPROFILE_BOOKE,
1275 .platform = "ppc8540",
1276 },
1277 { /* e500v2 */
1278 .pvr_mask = 0xffff0000,
1279 .pvr_value = 0x80210000,
1280 .cpu_name = "e500v2",
1281 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1282 .cpu_features = CPU_FTRS_E500_2,
1283 .cpu_user_features = COMMON_USER_BOOKE |
1284 PPC_FEATURE_HAS_SPE_COMP |
1285 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1286 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1287 .icache_bsize = 32,
1288 .dcache_bsize = 32,
1289 .num_pmcs = 4,
1290 .oprofile_cpu_type = "ppc/e500",
1291 .oprofile_type = PPC_OPROFILE_BOOKE,
1292 .platform = "ppc8548",
1293 },
1294 #endif
1295 #if !CLASSIC_PPC
1296 { /* default match */
1297 .pvr_mask = 0x00000000,
1298 .pvr_value = 0x00000000,
1299 .cpu_name = "(generic PPC)",
1300 .cpu_features = CPU_FTRS_GENERIC_32,
1301 .cpu_user_features = PPC_FEATURE_32,
1302 .icache_bsize = 32,
1303 .dcache_bsize = 32,
1304 .platform = "powerpc",
1305 }
1306 #endif /* !CLASSIC_PPC */
1307 #endif /* CONFIG_PPC32 */
1308 };
1309
1310 struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
1311 {
1312 struct cpu_spec *s = cpu_specs;
1313 struct cpu_spec **cur = &cur_cpu_spec;
1314 int i;
1315
1316 s = PTRRELOC(s);
1317 cur = PTRRELOC(cur);
1318
1319 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1320 if ((pvr & s->pvr_mask) == s->pvr_value) {
1321 *cur = cpu_specs + i;
1322 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
1323 /* ppc64 and booke expect identify_cpu to also call
1324 * setup_cpu for that processor. I will consolidate
1325 * that at a later time, for now, just use #ifdef.
1326 * we also don't need to PTRRELOC the function pointer
1327 * on ppc64 and booke as we are running at 0 in real
1328 * mode on ppc64 and reloc_offset is always 0 on booke.
1329 */
1330 if (s->cpu_setup) {
1331 s->cpu_setup(offset, s);
1332 }
1333 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
1334 return s;
1335 }
1336 BUG();
1337 return NULL;
1338 }
1339
1340 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1341 {
1342 struct fixup_entry {
1343 unsigned long mask;
1344 unsigned long value;
1345 long start_off;
1346 long end_off;
1347 } *fcur, *fend;
1348
1349 fcur = fixup_start;
1350 fend = fixup_end;
1351
1352 for (; fcur < fend; fcur++) {
1353 unsigned int *pstart, *pend, *p;
1354
1355 if ((value & fcur->mask) == fcur->value)
1356 continue;
1357
1358 /* These PTRRELOCs will disappear once the new scheme for
1359 * modules and vdso is implemented
1360 */
1361 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1362 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1363
1364 for (p = pstart; p < pend; p++) {
1365 *p = 0x60000000u;
1366 asm volatile ("dcbst 0, %0" : : "r" (p));
1367 }
1368 asm volatile ("sync" : : : "memory");
1369 for (p = pstart; p < pend; p++)
1370 asm volatile ("icbi 0,%0" : : "r" (p));
1371 asm volatile ("sync; isync" : : : "memory");
1372 }
1373 }
kernel source for telekom puls (alcatel/mediatek)