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Merge branch 'linux-2.6' into for-linus
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 #ifdef CONFIG_PPC64
44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
46 extern void __restore_cpu_ppc970(void);
47 #endif /* CONFIG_PPC64 */
48
49 /* This table only contains "desktop" CPUs, it need to be filled with embedded
50 * ones as well...
51 */
52 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
53 PPC_FEATURE_HAS_MMU)
54 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
55 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
56 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
62 PPC_FEATURE_TRUE_LE)
63 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
64 PPC_FEATURE_TRUE_LE | \
65 PPC_FEATURE_HAS_ALTIVEC_COMP)
66 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
67 PPC_FEATURE_BOOKE)
68
69 /* We only set the spe features if the kernel was compiled with
70 * spe support
71 */
72 #ifdef CONFIG_SPE
73 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
74 #else
75 #define PPC_FEATURE_SPE_COMP 0
76 #endif
77
78 static struct cpu_spec cpu_specs[] = {
79 #ifdef CONFIG_PPC64
80 { /* Power3 */
81 .pvr_mask = 0xffff0000,
82 .pvr_value = 0x00400000,
83 .cpu_name = "POWER3 (630)",
84 .cpu_features = CPU_FTRS_POWER3,
85 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
86 .icache_bsize = 128,
87 .dcache_bsize = 128,
88 .num_pmcs = 8,
89 .oprofile_cpu_type = "ppc64/power3",
90 .oprofile_type = PPC_OPROFILE_RS64,
91 .platform = "power3",
92 },
93 { /* Power3+ */
94 .pvr_mask = 0xffff0000,
95 .pvr_value = 0x00410000,
96 .cpu_name = "POWER3 (630+)",
97 .cpu_features = CPU_FTRS_POWER3,
98 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
99 .icache_bsize = 128,
100 .dcache_bsize = 128,
101 .num_pmcs = 8,
102 .oprofile_cpu_type = "ppc64/power3",
103 .oprofile_type = PPC_OPROFILE_RS64,
104 .platform = "power3",
105 },
106 { /* Northstar */
107 .pvr_mask = 0xffff0000,
108 .pvr_value = 0x00330000,
109 .cpu_name = "RS64-II (northstar)",
110 .cpu_features = CPU_FTRS_RS64,
111 .cpu_user_features = COMMON_USER_PPC64,
112 .icache_bsize = 128,
113 .dcache_bsize = 128,
114 .num_pmcs = 8,
115 .oprofile_cpu_type = "ppc64/rs64",
116 .oprofile_type = PPC_OPROFILE_RS64,
117 .platform = "rs64",
118 },
119 { /* Pulsar */
120 .pvr_mask = 0xffff0000,
121 .pvr_value = 0x00340000,
122 .cpu_name = "RS64-III (pulsar)",
123 .cpu_features = CPU_FTRS_RS64,
124 .cpu_user_features = COMMON_USER_PPC64,
125 .icache_bsize = 128,
126 .dcache_bsize = 128,
127 .num_pmcs = 8,
128 .oprofile_cpu_type = "ppc64/rs64",
129 .oprofile_type = PPC_OPROFILE_RS64,
130 .platform = "rs64",
131 },
132 { /* I-star */
133 .pvr_mask = 0xffff0000,
134 .pvr_value = 0x00360000,
135 .cpu_name = "RS64-III (icestar)",
136 .cpu_features = CPU_FTRS_RS64,
137 .cpu_user_features = COMMON_USER_PPC64,
138 .icache_bsize = 128,
139 .dcache_bsize = 128,
140 .num_pmcs = 8,
141 .oprofile_cpu_type = "ppc64/rs64",
142 .oprofile_type = PPC_OPROFILE_RS64,
143 .platform = "rs64",
144 },
145 { /* S-star */
146 .pvr_mask = 0xffff0000,
147 .pvr_value = 0x00370000,
148 .cpu_name = "RS64-IV (sstar)",
149 .cpu_features = CPU_FTRS_RS64,
150 .cpu_user_features = COMMON_USER_PPC64,
151 .icache_bsize = 128,
152 .dcache_bsize = 128,
153 .num_pmcs = 8,
154 .oprofile_cpu_type = "ppc64/rs64",
155 .oprofile_type = PPC_OPROFILE_RS64,
156 .platform = "rs64",
157 },
158 { /* Power4 */
159 .pvr_mask = 0xffff0000,
160 .pvr_value = 0x00350000,
161 .cpu_name = "POWER4 (gp)",
162 .cpu_features = CPU_FTRS_POWER4,
163 .cpu_user_features = COMMON_USER_POWER4,
164 .icache_bsize = 128,
165 .dcache_bsize = 128,
166 .num_pmcs = 8,
167 .oprofile_cpu_type = "ppc64/power4",
168 .oprofile_type = PPC_OPROFILE_POWER4,
169 .platform = "power4",
170 },
171 { /* Power4+ */
172 .pvr_mask = 0xffff0000,
173 .pvr_value = 0x00380000,
174 .cpu_name = "POWER4+ (gq)",
175 .cpu_features = CPU_FTRS_POWER4,
176 .cpu_user_features = COMMON_USER_POWER4,
177 .icache_bsize = 128,
178 .dcache_bsize = 128,
179 .num_pmcs = 8,
180 .oprofile_cpu_type = "ppc64/power4",
181 .oprofile_type = PPC_OPROFILE_POWER4,
182 .platform = "power4",
183 },
184 { /* PPC970 */
185 .pvr_mask = 0xffff0000,
186 .pvr_value = 0x00390000,
187 .cpu_name = "PPC970",
188 .cpu_features = CPU_FTRS_PPC970,
189 .cpu_user_features = COMMON_USER_POWER4 |
190 PPC_FEATURE_HAS_ALTIVEC_COMP,
191 .icache_bsize = 128,
192 .dcache_bsize = 128,
193 .num_pmcs = 8,
194 .cpu_setup = __setup_cpu_ppc970,
195 .cpu_restore = __restore_cpu_ppc970,
196 .oprofile_cpu_type = "ppc64/970",
197 .oprofile_type = PPC_OPROFILE_POWER4,
198 .platform = "ppc970",
199 },
200 { /* PPC970FX */
201 .pvr_mask = 0xffff0000,
202 .pvr_value = 0x003c0000,
203 .cpu_name = "PPC970FX",
204 .cpu_features = CPU_FTRS_PPC970,
205 .cpu_user_features = COMMON_USER_POWER4 |
206 PPC_FEATURE_HAS_ALTIVEC_COMP,
207 .icache_bsize = 128,
208 .dcache_bsize = 128,
209 .num_pmcs = 8,
210 .cpu_setup = __setup_cpu_ppc970,
211 .cpu_restore = __restore_cpu_ppc970,
212 .oprofile_cpu_type = "ppc64/970",
213 .oprofile_type = PPC_OPROFILE_POWER4,
214 .platform = "ppc970",
215 },
216 { /* PPC970MP */
217 .pvr_mask = 0xffff0000,
218 .pvr_value = 0x00440000,
219 .cpu_name = "PPC970MP",
220 .cpu_features = CPU_FTRS_PPC970,
221 .cpu_user_features = COMMON_USER_POWER4 |
222 PPC_FEATURE_HAS_ALTIVEC_COMP,
223 .icache_bsize = 128,
224 .dcache_bsize = 128,
225 .num_pmcs = 8,
226 .cpu_setup = __setup_cpu_ppc970MP,
227 .cpu_restore = __restore_cpu_ppc970,
228 .oprofile_cpu_type = "ppc64/970",
229 .oprofile_type = PPC_OPROFILE_POWER4,
230 .platform = "ppc970",
231 },
232 { /* PPC970GX */
233 .pvr_mask = 0xffff0000,
234 .pvr_value = 0x00450000,
235 .cpu_name = "PPC970GX",
236 .cpu_features = CPU_FTRS_PPC970,
237 .cpu_user_features = COMMON_USER_POWER4 |
238 PPC_FEATURE_HAS_ALTIVEC_COMP,
239 .icache_bsize = 128,
240 .dcache_bsize = 128,
241 .num_pmcs = 8,
242 .cpu_setup = __setup_cpu_ppc970,
243 .oprofile_cpu_type = "ppc64/970",
244 .oprofile_type = PPC_OPROFILE_POWER4,
245 .platform = "ppc970",
246 },
247 { /* Power5 GR */
248 .pvr_mask = 0xffff0000,
249 .pvr_value = 0x003a0000,
250 .cpu_name = "POWER5 (gr)",
251 .cpu_features = CPU_FTRS_POWER5,
252 .cpu_user_features = COMMON_USER_POWER5,
253 .icache_bsize = 128,
254 .dcache_bsize = 128,
255 .num_pmcs = 6,
256 .oprofile_cpu_type = "ppc64/power5",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
259 * and above but only works on POWER5 and above
260 */
261 .oprofile_mmcra_sihv = MMCRA_SIHV,
262 .oprofile_mmcra_sipr = MMCRA_SIPR,
263 .platform = "power5",
264 },
265 { /* Power5 GS */
266 .pvr_mask = 0xffff0000,
267 .pvr_value = 0x003b0000,
268 .cpu_name = "POWER5+ (gs)",
269 .cpu_features = CPU_FTRS_POWER5,
270 .cpu_user_features = COMMON_USER_POWER5_PLUS,
271 .icache_bsize = 128,
272 .dcache_bsize = 128,
273 .num_pmcs = 6,
274 .oprofile_cpu_type = "ppc64/power5+",
275 .oprofile_type = PPC_OPROFILE_POWER4,
276 .oprofile_mmcra_sihv = MMCRA_SIHV,
277 .oprofile_mmcra_sipr = MMCRA_SIPR,
278 .platform = "power5+",
279 },
280 { /* Power6 */
281 .pvr_mask = 0xffff0000,
282 .pvr_value = 0x003e0000,
283 .cpu_name = "POWER6",
284 .cpu_features = CPU_FTRS_POWER6,
285 .cpu_user_features = COMMON_USER_POWER6,
286 .icache_bsize = 128,
287 .dcache_bsize = 128,
288 .num_pmcs = 6,
289 .oprofile_cpu_type = "ppc64/power6",
290 .oprofile_type = PPC_OPROFILE_POWER4,
291 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
292 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
293 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
294 POWER6_MMCRA_OTHER,
295 .platform = "power6",
296 },
297 { /* Cell Broadband Engine */
298 .pvr_mask = 0xffff0000,
299 .pvr_value = 0x00700000,
300 .cpu_name = "Cell Broadband Engine",
301 .cpu_features = CPU_FTRS_CELL,
302 .cpu_user_features = COMMON_USER_PPC64 |
303 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
304 PPC_FEATURE_SMT,
305 .icache_bsize = 128,
306 .dcache_bsize = 128,
307 .platform = "ppc-cell-be",
308 },
309 { /* PA Semi PA6T */
310 .pvr_mask = 0x7fff0000,
311 .pvr_value = 0x00900000,
312 .cpu_name = "PA6T",
313 .cpu_features = CPU_FTRS_PA6T,
314 .cpu_user_features = COMMON_USER_PA6T,
315 .icache_bsize = 64,
316 .dcache_bsize = 64,
317 .num_pmcs = 6,
318 .platform = "pa6t",
319 },
320 { /* default match */
321 .pvr_mask = 0x00000000,
322 .pvr_value = 0x00000000,
323 .cpu_name = "POWER4 (compatible)",
324 .cpu_features = CPU_FTRS_COMPATIBLE,
325 .cpu_user_features = COMMON_USER_PPC64,
326 .icache_bsize = 128,
327 .dcache_bsize = 128,
328 .num_pmcs = 6,
329 .platform = "power4",
330 }
331 #endif /* CONFIG_PPC64 */
332 #ifdef CONFIG_PPC32
333 #if CLASSIC_PPC
334 { /* 601 */
335 .pvr_mask = 0xffff0000,
336 .pvr_value = 0x00010000,
337 .cpu_name = "601",
338 .cpu_features = CPU_FTRS_PPC601,
339 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
340 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
341 .icache_bsize = 32,
342 .dcache_bsize = 32,
343 .platform = "ppc601",
344 },
345 { /* 603 */
346 .pvr_mask = 0xffff0000,
347 .pvr_value = 0x00030000,
348 .cpu_name = "603",
349 .cpu_features = CPU_FTRS_603,
350 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
351 .icache_bsize = 32,
352 .dcache_bsize = 32,
353 .cpu_setup = __setup_cpu_603,
354 .platform = "ppc603",
355 },
356 { /* 603e */
357 .pvr_mask = 0xffff0000,
358 .pvr_value = 0x00060000,
359 .cpu_name = "603e",
360 .cpu_features = CPU_FTRS_603,
361 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
362 .icache_bsize = 32,
363 .dcache_bsize = 32,
364 .cpu_setup = __setup_cpu_603,
365 .platform = "ppc603",
366 },
367 { /* 603ev */
368 .pvr_mask = 0xffff0000,
369 .pvr_value = 0x00070000,
370 .cpu_name = "603ev",
371 .cpu_features = CPU_FTRS_603,
372 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
373 .icache_bsize = 32,
374 .dcache_bsize = 32,
375 .cpu_setup = __setup_cpu_603,
376 .platform = "ppc603",
377 },
378 { /* 604 */
379 .pvr_mask = 0xffff0000,
380 .pvr_value = 0x00040000,
381 .cpu_name = "604",
382 .cpu_features = CPU_FTRS_604,
383 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
384 .icache_bsize = 32,
385 .dcache_bsize = 32,
386 .num_pmcs = 2,
387 .cpu_setup = __setup_cpu_604,
388 .platform = "ppc604",
389 },
390 { /* 604e */
391 .pvr_mask = 0xfffff000,
392 .pvr_value = 0x00090000,
393 .cpu_name = "604e",
394 .cpu_features = CPU_FTRS_604,
395 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
396 .icache_bsize = 32,
397 .dcache_bsize = 32,
398 .num_pmcs = 4,
399 .cpu_setup = __setup_cpu_604,
400 .platform = "ppc604",
401 },
402 { /* 604r */
403 .pvr_mask = 0xffff0000,
404 .pvr_value = 0x00090000,
405 .cpu_name = "604r",
406 .cpu_features = CPU_FTRS_604,
407 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
408 .icache_bsize = 32,
409 .dcache_bsize = 32,
410 .num_pmcs = 4,
411 .cpu_setup = __setup_cpu_604,
412 .platform = "ppc604",
413 },
414 { /* 604ev */
415 .pvr_mask = 0xffff0000,
416 .pvr_value = 0x000a0000,
417 .cpu_name = "604ev",
418 .cpu_features = CPU_FTRS_604,
419 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
420 .icache_bsize = 32,
421 .dcache_bsize = 32,
422 .num_pmcs = 4,
423 .cpu_setup = __setup_cpu_604,
424 .platform = "ppc604",
425 },
426 { /* 740/750 (0x4202, don't support TAU ?) */
427 .pvr_mask = 0xffffffff,
428 .pvr_value = 0x00084202,
429 .cpu_name = "740/750",
430 .cpu_features = CPU_FTRS_740_NOTAU,
431 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
432 .icache_bsize = 32,
433 .dcache_bsize = 32,
434 .num_pmcs = 4,
435 .cpu_setup = __setup_cpu_750,
436 .platform = "ppc750",
437 },
438 { /* 750CX (80100 and 8010x?) */
439 .pvr_mask = 0xfffffff0,
440 .pvr_value = 0x00080100,
441 .cpu_name = "750CX",
442 .cpu_features = CPU_FTRS_750,
443 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
444 .icache_bsize = 32,
445 .dcache_bsize = 32,
446 .num_pmcs = 4,
447 .cpu_setup = __setup_cpu_750cx,
448 .platform = "ppc750",
449 },
450 { /* 750CX (82201 and 82202) */
451 .pvr_mask = 0xfffffff0,
452 .pvr_value = 0x00082200,
453 .cpu_name = "750CX",
454 .cpu_features = CPU_FTRS_750,
455 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
456 .icache_bsize = 32,
457 .dcache_bsize = 32,
458 .num_pmcs = 4,
459 .cpu_setup = __setup_cpu_750cx,
460 .platform = "ppc750",
461 },
462 { /* 750CXe (82214) */
463 .pvr_mask = 0xfffffff0,
464 .pvr_value = 0x00082210,
465 .cpu_name = "750CXe",
466 .cpu_features = CPU_FTRS_750,
467 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
468 .icache_bsize = 32,
469 .dcache_bsize = 32,
470 .num_pmcs = 4,
471 .cpu_setup = __setup_cpu_750cx,
472 .platform = "ppc750",
473 },
474 { /* 750CXe "Gekko" (83214) */
475 .pvr_mask = 0xffffffff,
476 .pvr_value = 0x00083214,
477 .cpu_name = "750CXe",
478 .cpu_features = CPU_FTRS_750,
479 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
480 .icache_bsize = 32,
481 .dcache_bsize = 32,
482 .num_pmcs = 4,
483 .cpu_setup = __setup_cpu_750cx,
484 .platform = "ppc750",
485 },
486 { /* 745/755 */
487 .pvr_mask = 0xfffff000,
488 .pvr_value = 0x00083000,
489 .cpu_name = "745/755",
490 .cpu_features = CPU_FTRS_750,
491 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
492 .icache_bsize = 32,
493 .dcache_bsize = 32,
494 .num_pmcs = 4,
495 .cpu_setup = __setup_cpu_750,
496 .platform = "ppc750",
497 },
498 { /* 750FX rev 1.x */
499 .pvr_mask = 0xffffff00,
500 .pvr_value = 0x70000100,
501 .cpu_name = "750FX",
502 .cpu_features = CPU_FTRS_750FX1,
503 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
504 .icache_bsize = 32,
505 .dcache_bsize = 32,
506 .num_pmcs = 4,
507 .cpu_setup = __setup_cpu_750,
508 .platform = "ppc750",
509 },
510 { /* 750FX rev 2.0 must disable HID0[DPM] */
511 .pvr_mask = 0xffffffff,
512 .pvr_value = 0x70000200,
513 .cpu_name = "750FX",
514 .cpu_features = CPU_FTRS_750FX2,
515 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
516 .icache_bsize = 32,
517 .dcache_bsize = 32,
518 .num_pmcs = 4,
519 .cpu_setup = __setup_cpu_750,
520 .platform = "ppc750",
521 },
522 { /* 750FX (All revs except 2.0) */
523 .pvr_mask = 0xffff0000,
524 .pvr_value = 0x70000000,
525 .cpu_name = "750FX",
526 .cpu_features = CPU_FTRS_750FX,
527 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
528 .icache_bsize = 32,
529 .dcache_bsize = 32,
530 .num_pmcs = 4,
531 .cpu_setup = __setup_cpu_750fx,
532 .platform = "ppc750",
533 },
534 { /* 750GX */
535 .pvr_mask = 0xffff0000,
536 .pvr_value = 0x70020000,
537 .cpu_name = "750GX",
538 .cpu_features = CPU_FTRS_750GX,
539 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
540 .icache_bsize = 32,
541 .dcache_bsize = 32,
542 .num_pmcs = 4,
543 .cpu_setup = __setup_cpu_750fx,
544 .platform = "ppc750",
545 },
546 { /* 740/750 (L2CR bit need fixup for 740) */
547 .pvr_mask = 0xffff0000,
548 .pvr_value = 0x00080000,
549 .cpu_name = "740/750",
550 .cpu_features = CPU_FTRS_740,
551 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
552 .icache_bsize = 32,
553 .dcache_bsize = 32,
554 .num_pmcs = 4,
555 .cpu_setup = __setup_cpu_750,
556 .platform = "ppc750",
557 },
558 { /* 7400 rev 1.1 ? (no TAU) */
559 .pvr_mask = 0xffffffff,
560 .pvr_value = 0x000c1101,
561 .cpu_name = "7400 (1.1)",
562 .cpu_features = CPU_FTRS_7400_NOTAU,
563 .cpu_user_features = COMMON_USER |
564 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
565 .icache_bsize = 32,
566 .dcache_bsize = 32,
567 .num_pmcs = 4,
568 .cpu_setup = __setup_cpu_7400,
569 .platform = "ppc7400",
570 },
571 { /* 7400 */
572 .pvr_mask = 0xffff0000,
573 .pvr_value = 0x000c0000,
574 .cpu_name = "7400",
575 .cpu_features = CPU_FTRS_7400,
576 .cpu_user_features = COMMON_USER |
577 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
578 .icache_bsize = 32,
579 .dcache_bsize = 32,
580 .num_pmcs = 4,
581 .cpu_setup = __setup_cpu_7400,
582 .platform = "ppc7400",
583 },
584 { /* 7410 */
585 .pvr_mask = 0xffff0000,
586 .pvr_value = 0x800c0000,
587 .cpu_name = "7410",
588 .cpu_features = CPU_FTRS_7400,
589 .cpu_user_features = COMMON_USER |
590 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
591 .icache_bsize = 32,
592 .dcache_bsize = 32,
593 .num_pmcs = 4,
594 .cpu_setup = __setup_cpu_7410,
595 .platform = "ppc7400",
596 },
597 { /* 7450 2.0 - no doze/nap */
598 .pvr_mask = 0xffffffff,
599 .pvr_value = 0x80000200,
600 .cpu_name = "7450",
601 .cpu_features = CPU_FTRS_7450_20,
602 .cpu_user_features = COMMON_USER |
603 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
604 .icache_bsize = 32,
605 .dcache_bsize = 32,
606 .num_pmcs = 6,
607 .cpu_setup = __setup_cpu_745x,
608 .oprofile_cpu_type = "ppc/7450",
609 .oprofile_type = PPC_OPROFILE_G4,
610 .platform = "ppc7450",
611 },
612 { /* 7450 2.1 */
613 .pvr_mask = 0xffffffff,
614 .pvr_value = 0x80000201,
615 .cpu_name = "7450",
616 .cpu_features = CPU_FTRS_7450_21,
617 .cpu_user_features = COMMON_USER |
618 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
619 .icache_bsize = 32,
620 .dcache_bsize = 32,
621 .num_pmcs = 6,
622 .cpu_setup = __setup_cpu_745x,
623 .oprofile_cpu_type = "ppc/7450",
624 .oprofile_type = PPC_OPROFILE_G4,
625 .platform = "ppc7450",
626 },
627 { /* 7450 2.3 and newer */
628 .pvr_mask = 0xffff0000,
629 .pvr_value = 0x80000000,
630 .cpu_name = "7450",
631 .cpu_features = CPU_FTRS_7450_23,
632 .cpu_user_features = COMMON_USER |
633 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
634 .icache_bsize = 32,
635 .dcache_bsize = 32,
636 .num_pmcs = 6,
637 .cpu_setup = __setup_cpu_745x,
638 .oprofile_cpu_type = "ppc/7450",
639 .oprofile_type = PPC_OPROFILE_G4,
640 .platform = "ppc7450",
641 },
642 { /* 7455 rev 1.x */
643 .pvr_mask = 0xffffff00,
644 .pvr_value = 0x80010100,
645 .cpu_name = "7455",
646 .cpu_features = CPU_FTRS_7455_1,
647 .cpu_user_features = COMMON_USER |
648 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
649 .icache_bsize = 32,
650 .dcache_bsize = 32,
651 .num_pmcs = 6,
652 .cpu_setup = __setup_cpu_745x,
653 .oprofile_cpu_type = "ppc/7450",
654 .oprofile_type = PPC_OPROFILE_G4,
655 .platform = "ppc7450",
656 },
657 { /* 7455 rev 2.0 */
658 .pvr_mask = 0xffffffff,
659 .pvr_value = 0x80010200,
660 .cpu_name = "7455",
661 .cpu_features = CPU_FTRS_7455_20,
662 .cpu_user_features = COMMON_USER |
663 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
664 .icache_bsize = 32,
665 .dcache_bsize = 32,
666 .num_pmcs = 6,
667 .cpu_setup = __setup_cpu_745x,
668 .oprofile_cpu_type = "ppc/7450",
669 .oprofile_type = PPC_OPROFILE_G4,
670 .platform = "ppc7450",
671 },
672 { /* 7455 others */
673 .pvr_mask = 0xffff0000,
674 .pvr_value = 0x80010000,
675 .cpu_name = "7455",
676 .cpu_features = CPU_FTRS_7455,
677 .cpu_user_features = COMMON_USER |
678 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
679 .icache_bsize = 32,
680 .dcache_bsize = 32,
681 .num_pmcs = 6,
682 .cpu_setup = __setup_cpu_745x,
683 .oprofile_cpu_type = "ppc/7450",
684 .oprofile_type = PPC_OPROFILE_G4,
685 .platform = "ppc7450",
686 },
687 { /* 7447/7457 Rev 1.0 */
688 .pvr_mask = 0xffffffff,
689 .pvr_value = 0x80020100,
690 .cpu_name = "7447/7457",
691 .cpu_features = CPU_FTRS_7447_10,
692 .cpu_user_features = COMMON_USER |
693 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
694 .icache_bsize = 32,
695 .dcache_bsize = 32,
696 .num_pmcs = 6,
697 .cpu_setup = __setup_cpu_745x,
698 .oprofile_cpu_type = "ppc/7450",
699 .oprofile_type = PPC_OPROFILE_G4,
700 .platform = "ppc7450",
701 },
702 { /* 7447/7457 Rev 1.1 */
703 .pvr_mask = 0xffffffff,
704 .pvr_value = 0x80020101,
705 .cpu_name = "7447/7457",
706 .cpu_features = CPU_FTRS_7447_10,
707 .cpu_user_features = COMMON_USER |
708 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
709 .icache_bsize = 32,
710 .dcache_bsize = 32,
711 .num_pmcs = 6,
712 .cpu_setup = __setup_cpu_745x,
713 .oprofile_cpu_type = "ppc/7450",
714 .oprofile_type = PPC_OPROFILE_G4,
715 .platform = "ppc7450",
716 },
717 { /* 7447/7457 Rev 1.2 and later */
718 .pvr_mask = 0xffff0000,
719 .pvr_value = 0x80020000,
720 .cpu_name = "7447/7457",
721 .cpu_features = CPU_FTRS_7447,
722 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
723 .icache_bsize = 32,
724 .dcache_bsize = 32,
725 .num_pmcs = 6,
726 .cpu_setup = __setup_cpu_745x,
727 .oprofile_cpu_type = "ppc/7450",
728 .oprofile_type = PPC_OPROFILE_G4,
729 .platform = "ppc7450",
730 },
731 { /* 7447A */
732 .pvr_mask = 0xffff0000,
733 .pvr_value = 0x80030000,
734 .cpu_name = "7447A",
735 .cpu_features = CPU_FTRS_7447A,
736 .cpu_user_features = COMMON_USER |
737 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
738 .icache_bsize = 32,
739 .dcache_bsize = 32,
740 .num_pmcs = 6,
741 .cpu_setup = __setup_cpu_745x,
742 .oprofile_cpu_type = "ppc/7450",
743 .oprofile_type = PPC_OPROFILE_G4,
744 .platform = "ppc7450",
745 },
746 { /* 7448 */
747 .pvr_mask = 0xffff0000,
748 .pvr_value = 0x80040000,
749 .cpu_name = "7448",
750 .cpu_features = CPU_FTRS_7447A,
751 .cpu_user_features = COMMON_USER |
752 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
753 .icache_bsize = 32,
754 .dcache_bsize = 32,
755 .num_pmcs = 6,
756 .cpu_setup = __setup_cpu_745x,
757 .oprofile_cpu_type = "ppc/7450",
758 .oprofile_type = PPC_OPROFILE_G4,
759 .platform = "ppc7450",
760 },
761 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
762 .pvr_mask = 0x7fff0000,
763 .pvr_value = 0x00810000,
764 .cpu_name = "82xx",
765 .cpu_features = CPU_FTRS_82XX,
766 .cpu_user_features = COMMON_USER,
767 .icache_bsize = 32,
768 .dcache_bsize = 32,
769 .cpu_setup = __setup_cpu_603,
770 .platform = "ppc603",
771 },
772 { /* All G2_LE (603e core, plus some) have the same pvr */
773 .pvr_mask = 0x7fff0000,
774 .pvr_value = 0x00820000,
775 .cpu_name = "G2_LE",
776 .cpu_features = CPU_FTRS_G2_LE,
777 .cpu_user_features = COMMON_USER,
778 .icache_bsize = 32,
779 .dcache_bsize = 32,
780 .cpu_setup = __setup_cpu_603,
781 .platform = "ppc603",
782 },
783 { /* e300c1 (a 603e core, plus some) on 83xx */
784 .pvr_mask = 0x7fff0000,
785 .pvr_value = 0x00830000,
786 .cpu_name = "e300c1",
787 .cpu_features = CPU_FTRS_E300,
788 .cpu_user_features = COMMON_USER,
789 .icache_bsize = 32,
790 .dcache_bsize = 32,
791 .cpu_setup = __setup_cpu_603,
792 .platform = "ppc603",
793 },
794 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
795 .pvr_mask = 0x7fff0000,
796 .pvr_value = 0x00840000,
797 .cpu_name = "e300c2",
798 .cpu_features = CPU_FTRS_E300,
799 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
800 .icache_bsize = 32,
801 .dcache_bsize = 32,
802 .cpu_setup = __setup_cpu_603,
803 .platform = "ppc603",
804 },
805 { /* default match, we assume split I/D cache & TB (non-601)... */
806 .pvr_mask = 0x00000000,
807 .pvr_value = 0x00000000,
808 .cpu_name = "(generic PPC)",
809 .cpu_features = CPU_FTRS_CLASSIC32,
810 .cpu_user_features = COMMON_USER,
811 .icache_bsize = 32,
812 .dcache_bsize = 32,
813 .platform = "ppc603",
814 },
815 #endif /* CLASSIC_PPC */
816 #ifdef CONFIG_8xx
817 { /* 8xx */
818 .pvr_mask = 0xffff0000,
819 .pvr_value = 0x00500000,
820 .cpu_name = "8xx",
821 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
822 * if the 8xx code is there.... */
823 .cpu_features = CPU_FTRS_8XX,
824 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
825 .icache_bsize = 16,
826 .dcache_bsize = 16,
827 .platform = "ppc823",
828 },
829 #endif /* CONFIG_8xx */
830 #ifdef CONFIG_40x
831 { /* 403GC */
832 .pvr_mask = 0xffffff00,
833 .pvr_value = 0x00200200,
834 .cpu_name = "403GC",
835 .cpu_features = CPU_FTRS_40X,
836 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
837 .icache_bsize = 16,
838 .dcache_bsize = 16,
839 .platform = "ppc403",
840 },
841 { /* 403GCX */
842 .pvr_mask = 0xffffff00,
843 .pvr_value = 0x00201400,
844 .cpu_name = "403GCX",
845 .cpu_features = CPU_FTRS_40X,
846 .cpu_user_features = PPC_FEATURE_32 |
847 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
848 .icache_bsize = 16,
849 .dcache_bsize = 16,
850 .platform = "ppc403",
851 },
852 { /* 403G ?? */
853 .pvr_mask = 0xffff0000,
854 .pvr_value = 0x00200000,
855 .cpu_name = "403G ??",
856 .cpu_features = CPU_FTRS_40X,
857 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
858 .icache_bsize = 16,
859 .dcache_bsize = 16,
860 .platform = "ppc403",
861 },
862 { /* 405GP */
863 .pvr_mask = 0xffff0000,
864 .pvr_value = 0x40110000,
865 .cpu_name = "405GP",
866 .cpu_features = CPU_FTRS_40X,
867 .cpu_user_features = PPC_FEATURE_32 |
868 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
869 .icache_bsize = 32,
870 .dcache_bsize = 32,
871 .platform = "ppc405",
872 },
873 { /* STB 03xxx */
874 .pvr_mask = 0xffff0000,
875 .pvr_value = 0x40130000,
876 .cpu_name = "STB03xxx",
877 .cpu_features = CPU_FTRS_40X,
878 .cpu_user_features = PPC_FEATURE_32 |
879 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
880 .icache_bsize = 32,
881 .dcache_bsize = 32,
882 .platform = "ppc405",
883 },
884 { /* STB 04xxx */
885 .pvr_mask = 0xffff0000,
886 .pvr_value = 0x41810000,
887 .cpu_name = "STB04xxx",
888 .cpu_features = CPU_FTRS_40X,
889 .cpu_user_features = PPC_FEATURE_32 |
890 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
891 .icache_bsize = 32,
892 .dcache_bsize = 32,
893 .platform = "ppc405",
894 },
895 { /* NP405L */
896 .pvr_mask = 0xffff0000,
897 .pvr_value = 0x41610000,
898 .cpu_name = "NP405L",
899 .cpu_features = CPU_FTRS_40X,
900 .cpu_user_features = PPC_FEATURE_32 |
901 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
902 .icache_bsize = 32,
903 .dcache_bsize = 32,
904 .platform = "ppc405",
905 },
906 { /* NP4GS3 */
907 .pvr_mask = 0xffff0000,
908 .pvr_value = 0x40B10000,
909 .cpu_name = "NP4GS3",
910 .cpu_features = CPU_FTRS_40X,
911 .cpu_user_features = PPC_FEATURE_32 |
912 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
913 .icache_bsize = 32,
914 .dcache_bsize = 32,
915 .platform = "ppc405",
916 },
917 { /* NP405H */
918 .pvr_mask = 0xffff0000,
919 .pvr_value = 0x41410000,
920 .cpu_name = "NP405H",
921 .cpu_features = CPU_FTRS_40X,
922 .cpu_user_features = PPC_FEATURE_32 |
923 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
924 .icache_bsize = 32,
925 .dcache_bsize = 32,
926 .platform = "ppc405",
927 },
928 { /* 405GPr */
929 .pvr_mask = 0xffff0000,
930 .pvr_value = 0x50910000,
931 .cpu_name = "405GPr",
932 .cpu_features = CPU_FTRS_40X,
933 .cpu_user_features = PPC_FEATURE_32 |
934 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
935 .icache_bsize = 32,
936 .dcache_bsize = 32,
937 .platform = "ppc405",
938 },
939 { /* STBx25xx */
940 .pvr_mask = 0xffff0000,
941 .pvr_value = 0x51510000,
942 .cpu_name = "STBx25xx",
943 .cpu_features = CPU_FTRS_40X,
944 .cpu_user_features = PPC_FEATURE_32 |
945 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
946 .icache_bsize = 32,
947 .dcache_bsize = 32,
948 .platform = "ppc405",
949 },
950 { /* 405LP */
951 .pvr_mask = 0xffff0000,
952 .pvr_value = 0x41F10000,
953 .cpu_name = "405LP",
954 .cpu_features = CPU_FTRS_40X,
955 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
956 .icache_bsize = 32,
957 .dcache_bsize = 32,
958 .platform = "ppc405",
959 },
960 { /* Xilinx Virtex-II Pro */
961 .pvr_mask = 0xfffff000,
962 .pvr_value = 0x20010000,
963 .cpu_name = "Virtex-II Pro",
964 .cpu_features = CPU_FTRS_40X,
965 .cpu_user_features = PPC_FEATURE_32 |
966 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
967 .icache_bsize = 32,
968 .dcache_bsize = 32,
969 .platform = "ppc405",
970 },
971 { /* Xilinx Virtex-4 FX */
972 .pvr_mask = 0xfffff000,
973 .pvr_value = 0x20011000,
974 .cpu_name = "Virtex-4 FX",
975 .cpu_features = CPU_FTRS_40X,
976 .cpu_user_features = PPC_FEATURE_32 |
977 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
978 .icache_bsize = 32,
979 .dcache_bsize = 32,
980 .platform = "ppc405",
981 },
982 { /* 405EP */
983 .pvr_mask = 0xffff0000,
984 .pvr_value = 0x51210000,
985 .cpu_name = "405EP",
986 .cpu_features = CPU_FTRS_40X,
987 .cpu_user_features = PPC_FEATURE_32 |
988 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
989 .icache_bsize = 32,
990 .dcache_bsize = 32,
991 .platform = "ppc405",
992 },
993
994 #endif /* CONFIG_40x */
995 #ifdef CONFIG_44x
996 {
997 .pvr_mask = 0xf0000fff,
998 .pvr_value = 0x40000850,
999 .cpu_name = "440EP Rev. A",
1000 .cpu_features = CPU_FTRS_44X,
1001 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1002 .icache_bsize = 32,
1003 .dcache_bsize = 32,
1004 .platform = "ppc440",
1005 },
1006 {
1007 .pvr_mask = 0xf0000fff,
1008 .pvr_value = 0x400008d3,
1009 .cpu_name = "440EP Rev. B",
1010 .cpu_features = CPU_FTRS_44X,
1011 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1012 .icache_bsize = 32,
1013 .dcache_bsize = 32,
1014 .platform = "ppc440",
1015 },
1016 { /* 440GP Rev. B */
1017 .pvr_mask = 0xf0000fff,
1018 .pvr_value = 0x40000440,
1019 .cpu_name = "440GP Rev. B",
1020 .cpu_features = CPU_FTRS_44X,
1021 .cpu_user_features = COMMON_USER_BOOKE,
1022 .icache_bsize = 32,
1023 .dcache_bsize = 32,
1024 .platform = "ppc440gp",
1025 },
1026 { /* 440GP Rev. C */
1027 .pvr_mask = 0xf0000fff,
1028 .pvr_value = 0x40000481,
1029 .cpu_name = "440GP Rev. C",
1030 .cpu_features = CPU_FTRS_44X,
1031 .cpu_user_features = COMMON_USER_BOOKE,
1032 .icache_bsize = 32,
1033 .dcache_bsize = 32,
1034 .platform = "ppc440gp",
1035 },
1036 { /* 440GX Rev. A */
1037 .pvr_mask = 0xf0000fff,
1038 .pvr_value = 0x50000850,
1039 .cpu_name = "440GX Rev. A",
1040 .cpu_features = CPU_FTRS_44X,
1041 .cpu_user_features = COMMON_USER_BOOKE,
1042 .icache_bsize = 32,
1043 .dcache_bsize = 32,
1044 .platform = "ppc440",
1045 },
1046 { /* 440GX Rev. B */
1047 .pvr_mask = 0xf0000fff,
1048 .pvr_value = 0x50000851,
1049 .cpu_name = "440GX Rev. B",
1050 .cpu_features = CPU_FTRS_44X,
1051 .cpu_user_features = COMMON_USER_BOOKE,
1052 .icache_bsize = 32,
1053 .dcache_bsize = 32,
1054 .platform = "ppc440",
1055 },
1056 { /* 440GX Rev. C */
1057 .pvr_mask = 0xf0000fff,
1058 .pvr_value = 0x50000892,
1059 .cpu_name = "440GX Rev. C",
1060 .cpu_features = CPU_FTRS_44X,
1061 .cpu_user_features = COMMON_USER_BOOKE,
1062 .icache_bsize = 32,
1063 .dcache_bsize = 32,
1064 .platform = "ppc440",
1065 },
1066 { /* 440GX Rev. F */
1067 .pvr_mask = 0xf0000fff,
1068 .pvr_value = 0x50000894,
1069 .cpu_name = "440GX Rev. F",
1070 .cpu_features = CPU_FTRS_44X,
1071 .cpu_user_features = COMMON_USER_BOOKE,
1072 .icache_bsize = 32,
1073 .dcache_bsize = 32,
1074 .platform = "ppc440",
1075 },
1076 { /* 440SP Rev. A */
1077 .pvr_mask = 0xff000fff,
1078 .pvr_value = 0x53000891,
1079 .cpu_name = "440SP Rev. A",
1080 .cpu_features = CPU_FTRS_44X,
1081 .cpu_user_features = COMMON_USER_BOOKE,
1082 .icache_bsize = 32,
1083 .dcache_bsize = 32,
1084 .platform = "ppc440",
1085 },
1086 { /* 440SPe Rev. A */
1087 .pvr_mask = 0xff000fff,
1088 .pvr_value = 0x53000890,
1089 .cpu_name = "440SPe Rev. A",
1090 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1091 CPU_FTR_USE_TB,
1092 .cpu_user_features = COMMON_USER_BOOKE,
1093 .icache_bsize = 32,
1094 .dcache_bsize = 32,
1095 .platform = "ppc440",
1096 },
1097 #endif /* CONFIG_44x */
1098 #ifdef CONFIG_FSL_BOOKE
1099 { /* e200z5 */
1100 .pvr_mask = 0xfff00000,
1101 .pvr_value = 0x81000000,
1102 .cpu_name = "e200z5",
1103 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1104 .cpu_features = CPU_FTRS_E200,
1105 .cpu_user_features = COMMON_USER_BOOKE |
1106 PPC_FEATURE_HAS_EFP_SINGLE |
1107 PPC_FEATURE_UNIFIED_CACHE,
1108 .dcache_bsize = 32,
1109 .platform = "ppc5554",
1110 },
1111 { /* e200z6 */
1112 .pvr_mask = 0xfff00000,
1113 .pvr_value = 0x81100000,
1114 .cpu_name = "e200z6",
1115 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1116 .cpu_features = CPU_FTRS_E200,
1117 .cpu_user_features = COMMON_USER_BOOKE |
1118 PPC_FEATURE_SPE_COMP |
1119 PPC_FEATURE_HAS_EFP_SINGLE |
1120 PPC_FEATURE_UNIFIED_CACHE,
1121 .dcache_bsize = 32,
1122 .platform = "ppc5554",
1123 },
1124 { /* e500 */
1125 .pvr_mask = 0xffff0000,
1126 .pvr_value = 0x80200000,
1127 .cpu_name = "e500",
1128 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1129 .cpu_features = CPU_FTRS_E500,
1130 .cpu_user_features = COMMON_USER_BOOKE |
1131 PPC_FEATURE_SPE_COMP |
1132 PPC_FEATURE_HAS_EFP_SINGLE,
1133 .icache_bsize = 32,
1134 .dcache_bsize = 32,
1135 .num_pmcs = 4,
1136 .oprofile_cpu_type = "ppc/e500",
1137 .oprofile_type = PPC_OPROFILE_BOOKE,
1138 .platform = "ppc8540",
1139 },
1140 { /* e500v2 */
1141 .pvr_mask = 0xffff0000,
1142 .pvr_value = 0x80210000,
1143 .cpu_name = "e500v2",
1144 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1145 .cpu_features = CPU_FTRS_E500_2,
1146 .cpu_user_features = COMMON_USER_BOOKE |
1147 PPC_FEATURE_SPE_COMP |
1148 PPC_FEATURE_HAS_EFP_SINGLE |
1149 PPC_FEATURE_HAS_EFP_DOUBLE,
1150 .icache_bsize = 32,
1151 .dcache_bsize = 32,
1152 .num_pmcs = 4,
1153 .oprofile_cpu_type = "ppc/e500",
1154 .oprofile_type = PPC_OPROFILE_BOOKE,
1155 .platform = "ppc8548",
1156 },
1157 #endif
1158 #if !CLASSIC_PPC
1159 { /* default match */
1160 .pvr_mask = 0x00000000,
1161 .pvr_value = 0x00000000,
1162 .cpu_name = "(generic PPC)",
1163 .cpu_features = CPU_FTRS_GENERIC_32,
1164 .cpu_user_features = PPC_FEATURE_32,
1165 .icache_bsize = 32,
1166 .dcache_bsize = 32,
1167 .platform = "powerpc",
1168 }
1169 #endif /* !CLASSIC_PPC */
1170 #endif /* CONFIG_PPC32 */
1171 };
1172
1173 struct cpu_spec *identify_cpu(unsigned long offset)
1174 {
1175 struct cpu_spec *s = cpu_specs;
1176 struct cpu_spec **cur = &cur_cpu_spec;
1177 unsigned int pvr = mfspr(SPRN_PVR);
1178 int i;
1179
1180 s = PTRRELOC(s);
1181 cur = PTRRELOC(cur);
1182
1183 if (*cur != NULL)
1184 return PTRRELOC(*cur);
1185
1186 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1187 if ((pvr & s->pvr_mask) == s->pvr_value) {
1188 *cur = cpu_specs + i;
1189 #ifdef CONFIG_PPC64
1190 /* ppc64 expects identify_cpu to also call setup_cpu
1191 * for that processor. I will consolidate that at a
1192 * later time, for now, just use our friend #ifdef.
1193 * we also don't need to PTRRELOC the function pointer
1194 * on ppc64 as we are running at 0 in real mode.
1195 */
1196 if (s->cpu_setup) {
1197 s->cpu_setup(offset, s);
1198 }
1199 #endif /* CONFIG_PPC64 */
1200 return s;
1201 }
1202 BUG();
1203 return NULL;
1204 }
1205
1206 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1207 {
1208 struct fixup_entry {
1209 unsigned long mask;
1210 unsigned long value;
1211 long start_off;
1212 long end_off;
1213 } *fcur, *fend;
1214
1215 fcur = fixup_start;
1216 fend = fixup_end;
1217
1218 for (; fcur < fend; fcur++) {
1219 unsigned int *pstart, *pend, *p;
1220
1221 if ((value & fcur->mask) == fcur->value)
1222 continue;
1223
1224 /* These PTRRELOCs will disappear once the new scheme for
1225 * modules and vdso is implemented
1226 */
1227 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1228 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1229
1230 for (p = pstart; p < pend; p++) {
1231 *p = 0x60000000u;
1232 asm volatile ("dcbst 0, %0" : : "r" (p));
1233 }
1234 asm volatile ("sync" : : : "memory");
1235 for (p = pstart; p < pend; p++)
1236 asm volatile ("icbi 0,%0" : : "r" (p));
1237 asm volatile ("sync; isync" : : : "memory");
1238 }
1239 }
kernel source for telekom puls (alcatel/mediatek)