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Merge branch 'master' of /home/sam/kernel/linux-2.6/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21
22 struct cpu_spec* cur_cpu_spec = NULL;
23 EXPORT_SYMBOL(cur_cpu_spec);
24
25 /* NOTE:
26 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
27 * the responsibility of the appropriate CPU save/restore functions to
28 * eventually copy these settings over. Those save/restore aren't yet
29 * part of the cputable though. That has to be fixed for both ppc32
30 * and ppc64
31 */
32 #ifdef CONFIG_PPC32
33 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
34 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
41 #endif /* CONFIG_PPC32 */
42 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
43
44 /* This table only contains "desktop" CPUs, it need to be filled with embedded
45 * ones as well...
46 */
47 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
48 PPC_FEATURE_HAS_MMU)
49 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
50 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
51 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
52 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
53 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
54 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
55 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
56 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
57 PPC_FEATURE_TRUE_LE)
58 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
59 PPC_FEATURE_BOOKE)
60
61 /* We only set the spe features if the kernel was compiled with
62 * spe support
63 */
64 #ifdef CONFIG_SPE
65 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
66 #else
67 #define PPC_FEATURE_SPE_COMP 0
68 #endif
69
70 struct cpu_spec cpu_specs[] = {
71 #ifdef CONFIG_PPC64
72 { /* Power3 */
73 .pvr_mask = 0xffff0000,
74 .pvr_value = 0x00400000,
75 .cpu_name = "POWER3 (630)",
76 .cpu_features = CPU_FTRS_POWER3,
77 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
78 .icache_bsize = 128,
79 .dcache_bsize = 128,
80 .num_pmcs = 8,
81 .oprofile_cpu_type = "ppc64/power3",
82 .oprofile_type = PPC_OPROFILE_RS64,
83 .platform = "power3",
84 },
85 { /* Power3+ */
86 .pvr_mask = 0xffff0000,
87 .pvr_value = 0x00410000,
88 .cpu_name = "POWER3 (630+)",
89 .cpu_features = CPU_FTRS_POWER3,
90 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
91 .icache_bsize = 128,
92 .dcache_bsize = 128,
93 .num_pmcs = 8,
94 .oprofile_cpu_type = "ppc64/power3",
95 .oprofile_type = PPC_OPROFILE_RS64,
96 .platform = "power3",
97 },
98 { /* Northstar */
99 .pvr_mask = 0xffff0000,
100 .pvr_value = 0x00330000,
101 .cpu_name = "RS64-II (northstar)",
102 .cpu_features = CPU_FTRS_RS64,
103 .cpu_user_features = COMMON_USER_PPC64,
104 .icache_bsize = 128,
105 .dcache_bsize = 128,
106 .num_pmcs = 8,
107 .oprofile_cpu_type = "ppc64/rs64",
108 .oprofile_type = PPC_OPROFILE_RS64,
109 .platform = "rs64",
110 },
111 { /* Pulsar */
112 .pvr_mask = 0xffff0000,
113 .pvr_value = 0x00340000,
114 .cpu_name = "RS64-III (pulsar)",
115 .cpu_features = CPU_FTRS_RS64,
116 .cpu_user_features = COMMON_USER_PPC64,
117 .icache_bsize = 128,
118 .dcache_bsize = 128,
119 .num_pmcs = 8,
120 .oprofile_cpu_type = "ppc64/rs64",
121 .oprofile_type = PPC_OPROFILE_RS64,
122 .platform = "rs64",
123 },
124 { /* I-star */
125 .pvr_mask = 0xffff0000,
126 .pvr_value = 0x00360000,
127 .cpu_name = "RS64-III (icestar)",
128 .cpu_features = CPU_FTRS_RS64,
129 .cpu_user_features = COMMON_USER_PPC64,
130 .icache_bsize = 128,
131 .dcache_bsize = 128,
132 .num_pmcs = 8,
133 .oprofile_cpu_type = "ppc64/rs64",
134 .oprofile_type = PPC_OPROFILE_RS64,
135 .platform = "rs64",
136 },
137 { /* S-star */
138 .pvr_mask = 0xffff0000,
139 .pvr_value = 0x00370000,
140 .cpu_name = "RS64-IV (sstar)",
141 .cpu_features = CPU_FTRS_RS64,
142 .cpu_user_features = COMMON_USER_PPC64,
143 .icache_bsize = 128,
144 .dcache_bsize = 128,
145 .num_pmcs = 8,
146 .oprofile_cpu_type = "ppc64/rs64",
147 .oprofile_type = PPC_OPROFILE_RS64,
148 .platform = "rs64",
149 },
150 { /* Power4 */
151 .pvr_mask = 0xffff0000,
152 .pvr_value = 0x00350000,
153 .cpu_name = "POWER4 (gp)",
154 .cpu_features = CPU_FTRS_POWER4,
155 .cpu_user_features = COMMON_USER_POWER4,
156 .icache_bsize = 128,
157 .dcache_bsize = 128,
158 .num_pmcs = 8,
159 .oprofile_cpu_type = "ppc64/power4",
160 .oprofile_type = PPC_OPROFILE_POWER4,
161 .platform = "power4",
162 },
163 { /* Power4+ */
164 .pvr_mask = 0xffff0000,
165 .pvr_value = 0x00380000,
166 .cpu_name = "POWER4+ (gq)",
167 .cpu_features = CPU_FTRS_POWER4,
168 .cpu_user_features = COMMON_USER_POWER4,
169 .icache_bsize = 128,
170 .dcache_bsize = 128,
171 .num_pmcs = 8,
172 .oprofile_cpu_type = "ppc64/power4",
173 .oprofile_type = PPC_OPROFILE_POWER4,
174 .platform = "power4",
175 },
176 { /* PPC970 */
177 .pvr_mask = 0xffff0000,
178 .pvr_value = 0x00390000,
179 .cpu_name = "PPC970",
180 .cpu_features = CPU_FTRS_PPC970,
181 .cpu_user_features = COMMON_USER_POWER4 |
182 PPC_FEATURE_HAS_ALTIVEC_COMP,
183 .icache_bsize = 128,
184 .dcache_bsize = 128,
185 .num_pmcs = 8,
186 .cpu_setup = __setup_cpu_ppc970,
187 .oprofile_cpu_type = "ppc64/970",
188 .oprofile_type = PPC_OPROFILE_POWER4,
189 .platform = "ppc970",
190 },
191 { /* PPC970FX */
192 .pvr_mask = 0xffff0000,
193 .pvr_value = 0x003c0000,
194 .cpu_name = "PPC970FX",
195 .cpu_features = CPU_FTRS_PPC970,
196 .cpu_user_features = COMMON_USER_POWER4 |
197 PPC_FEATURE_HAS_ALTIVEC_COMP,
198 .icache_bsize = 128,
199 .dcache_bsize = 128,
200 .num_pmcs = 8,
201 .cpu_setup = __setup_cpu_ppc970,
202 .oprofile_cpu_type = "ppc64/970",
203 .oprofile_type = PPC_OPROFILE_POWER4,
204 .platform = "ppc970",
205 },
206 { /* PPC970MP */
207 .pvr_mask = 0xffff0000,
208 .pvr_value = 0x00440000,
209 .cpu_name = "PPC970MP",
210 .cpu_features = CPU_FTRS_PPC970,
211 .cpu_user_features = COMMON_USER_POWER4 |
212 PPC_FEATURE_HAS_ALTIVEC_COMP,
213 .icache_bsize = 128,
214 .dcache_bsize = 128,
215 .num_pmcs = 8,
216 .cpu_setup = __setup_cpu_ppc970,
217 .oprofile_cpu_type = "ppc64/970",
218 .oprofile_type = PPC_OPROFILE_POWER4,
219 .platform = "ppc970",
220 },
221 { /* Power5 GR */
222 .pvr_mask = 0xffff0000,
223 .pvr_value = 0x003a0000,
224 .cpu_name = "POWER5 (gr)",
225 .cpu_features = CPU_FTRS_POWER5,
226 .cpu_user_features = COMMON_USER_POWER5,
227 .icache_bsize = 128,
228 .dcache_bsize = 128,
229 .num_pmcs = 6,
230 .oprofile_cpu_type = "ppc64/power5",
231 .oprofile_type = PPC_OPROFILE_POWER4,
232 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
233 * and above but only works on POWER5 and above
234 */
235 .oprofile_mmcra_sihv = MMCRA_SIHV,
236 .oprofile_mmcra_sipr = MMCRA_SIPR,
237 .platform = "power5",
238 },
239 { /* Power5 GS */
240 .pvr_mask = 0xffff0000,
241 .pvr_value = 0x003b0000,
242 .cpu_name = "POWER5+ (gs)",
243 .cpu_features = CPU_FTRS_POWER5,
244 .cpu_user_features = COMMON_USER_POWER5_PLUS,
245 .icache_bsize = 128,
246 .dcache_bsize = 128,
247 .num_pmcs = 6,
248 .oprofile_cpu_type = "ppc64/power5+",
249 .oprofile_type = PPC_OPROFILE_POWER4,
250 .oprofile_mmcra_sihv = MMCRA_SIHV,
251 .oprofile_mmcra_sipr = MMCRA_SIPR,
252 .platform = "power5+",
253 },
254 { /* Power6 */
255 .pvr_mask = 0xffff0000,
256 .pvr_value = 0x003e0000,
257 .cpu_name = "POWER6",
258 .cpu_features = CPU_FTRS_POWER6,
259 .cpu_user_features = COMMON_USER_POWER6,
260 .icache_bsize = 128,
261 .dcache_bsize = 128,
262 .num_pmcs = 8,
263 .oprofile_cpu_type = "ppc64/power6",
264 .oprofile_type = PPC_OPROFILE_POWER4,
265 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
266 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
267 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
268 POWER6_MMCRA_OTHER,
269 .platform = "power6",
270 },
271 { /* Cell Broadband Engine */
272 .pvr_mask = 0xffff0000,
273 .pvr_value = 0x00700000,
274 .cpu_name = "Cell Broadband Engine",
275 .cpu_features = CPU_FTRS_CELL,
276 .cpu_user_features = COMMON_USER_PPC64 |
277 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
278 PPC_FEATURE_SMT,
279 .icache_bsize = 128,
280 .dcache_bsize = 128,
281 .platform = "ppc-cell-be",
282 },
283 { /* default match */
284 .pvr_mask = 0x00000000,
285 .pvr_value = 0x00000000,
286 .cpu_name = "POWER4 (compatible)",
287 .cpu_features = CPU_FTRS_COMPATIBLE,
288 .cpu_user_features = COMMON_USER_PPC64,
289 .icache_bsize = 128,
290 .dcache_bsize = 128,
291 .num_pmcs = 6,
292 .platform = "power4",
293 }
294 #endif /* CONFIG_PPC64 */
295 #ifdef CONFIG_PPC32
296 #if CLASSIC_PPC
297 { /* 601 */
298 .pvr_mask = 0xffff0000,
299 .pvr_value = 0x00010000,
300 .cpu_name = "601",
301 .cpu_features = CPU_FTRS_PPC601,
302 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
303 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
304 .icache_bsize = 32,
305 .dcache_bsize = 32,
306 .platform = "ppc601",
307 },
308 { /* 603 */
309 .pvr_mask = 0xffff0000,
310 .pvr_value = 0x00030000,
311 .cpu_name = "603",
312 .cpu_features = CPU_FTRS_603,
313 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
314 .icache_bsize = 32,
315 .dcache_bsize = 32,
316 .cpu_setup = __setup_cpu_603,
317 .platform = "ppc603",
318 },
319 { /* 603e */
320 .pvr_mask = 0xffff0000,
321 .pvr_value = 0x00060000,
322 .cpu_name = "603e",
323 .cpu_features = CPU_FTRS_603,
324 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
325 .icache_bsize = 32,
326 .dcache_bsize = 32,
327 .cpu_setup = __setup_cpu_603,
328 .platform = "ppc603",
329 },
330 { /* 603ev */
331 .pvr_mask = 0xffff0000,
332 .pvr_value = 0x00070000,
333 .cpu_name = "603ev",
334 .cpu_features = CPU_FTRS_603,
335 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
336 .icache_bsize = 32,
337 .dcache_bsize = 32,
338 .cpu_setup = __setup_cpu_603,
339 .platform = "ppc603",
340 },
341 { /* 604 */
342 .pvr_mask = 0xffff0000,
343 .pvr_value = 0x00040000,
344 .cpu_name = "604",
345 .cpu_features = CPU_FTRS_604,
346 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
347 .icache_bsize = 32,
348 .dcache_bsize = 32,
349 .num_pmcs = 2,
350 .cpu_setup = __setup_cpu_604,
351 .platform = "ppc604",
352 },
353 { /* 604e */
354 .pvr_mask = 0xfffff000,
355 .pvr_value = 0x00090000,
356 .cpu_name = "604e",
357 .cpu_features = CPU_FTRS_604,
358 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
359 .icache_bsize = 32,
360 .dcache_bsize = 32,
361 .num_pmcs = 4,
362 .cpu_setup = __setup_cpu_604,
363 .platform = "ppc604",
364 },
365 { /* 604r */
366 .pvr_mask = 0xffff0000,
367 .pvr_value = 0x00090000,
368 .cpu_name = "604r",
369 .cpu_features = CPU_FTRS_604,
370 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
371 .icache_bsize = 32,
372 .dcache_bsize = 32,
373 .num_pmcs = 4,
374 .cpu_setup = __setup_cpu_604,
375 .platform = "ppc604",
376 },
377 { /* 604ev */
378 .pvr_mask = 0xffff0000,
379 .pvr_value = 0x000a0000,
380 .cpu_name = "604ev",
381 .cpu_features = CPU_FTRS_604,
382 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
383 .icache_bsize = 32,
384 .dcache_bsize = 32,
385 .num_pmcs = 4,
386 .cpu_setup = __setup_cpu_604,
387 .platform = "ppc604",
388 },
389 { /* 740/750 (0x4202, don't support TAU ?) */
390 .pvr_mask = 0xffffffff,
391 .pvr_value = 0x00084202,
392 .cpu_name = "740/750",
393 .cpu_features = CPU_FTRS_740_NOTAU,
394 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
395 .icache_bsize = 32,
396 .dcache_bsize = 32,
397 .num_pmcs = 4,
398 .cpu_setup = __setup_cpu_750,
399 .platform = "ppc750",
400 },
401 { /* 750CX (80100 and 8010x?) */
402 .pvr_mask = 0xfffffff0,
403 .pvr_value = 0x00080100,
404 .cpu_name = "750CX",
405 .cpu_features = CPU_FTRS_750,
406 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
407 .icache_bsize = 32,
408 .dcache_bsize = 32,
409 .num_pmcs = 4,
410 .cpu_setup = __setup_cpu_750cx,
411 .platform = "ppc750",
412 },
413 { /* 750CX (82201 and 82202) */
414 .pvr_mask = 0xfffffff0,
415 .pvr_value = 0x00082200,
416 .cpu_name = "750CX",
417 .cpu_features = CPU_FTRS_750,
418 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
419 .icache_bsize = 32,
420 .dcache_bsize = 32,
421 .num_pmcs = 4,
422 .cpu_setup = __setup_cpu_750cx,
423 .platform = "ppc750",
424 },
425 { /* 750CXe (82214) */
426 .pvr_mask = 0xfffffff0,
427 .pvr_value = 0x00082210,
428 .cpu_name = "750CXe",
429 .cpu_features = CPU_FTRS_750,
430 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
431 .icache_bsize = 32,
432 .dcache_bsize = 32,
433 .num_pmcs = 4,
434 .cpu_setup = __setup_cpu_750cx,
435 .platform = "ppc750",
436 },
437 { /* 750CXe "Gekko" (83214) */
438 .pvr_mask = 0xffffffff,
439 .pvr_value = 0x00083214,
440 .cpu_name = "750CXe",
441 .cpu_features = CPU_FTRS_750,
442 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
443 .icache_bsize = 32,
444 .dcache_bsize = 32,
445 .num_pmcs = 4,
446 .cpu_setup = __setup_cpu_750cx,
447 .platform = "ppc750",
448 },
449 { /* 745/755 */
450 .pvr_mask = 0xfffff000,
451 .pvr_value = 0x00083000,
452 .cpu_name = "745/755",
453 .cpu_features = CPU_FTRS_750,
454 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
455 .icache_bsize = 32,
456 .dcache_bsize = 32,
457 .num_pmcs = 4,
458 .cpu_setup = __setup_cpu_750,
459 .platform = "ppc750",
460 },
461 { /* 750FX rev 1.x */
462 .pvr_mask = 0xffffff00,
463 .pvr_value = 0x70000100,
464 .cpu_name = "750FX",
465 .cpu_features = CPU_FTRS_750FX1,
466 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
467 .icache_bsize = 32,
468 .dcache_bsize = 32,
469 .num_pmcs = 4,
470 .cpu_setup = __setup_cpu_750,
471 .platform = "ppc750",
472 },
473 { /* 750FX rev 2.0 must disable HID0[DPM] */
474 .pvr_mask = 0xffffffff,
475 .pvr_value = 0x70000200,
476 .cpu_name = "750FX",
477 .cpu_features = CPU_FTRS_750FX2,
478 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
479 .icache_bsize = 32,
480 .dcache_bsize = 32,
481 .num_pmcs = 4,
482 .cpu_setup = __setup_cpu_750,
483 .platform = "ppc750",
484 },
485 { /* 750FX (All revs except 2.0) */
486 .pvr_mask = 0xffff0000,
487 .pvr_value = 0x70000000,
488 .cpu_name = "750FX",
489 .cpu_features = CPU_FTRS_750FX,
490 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
491 .icache_bsize = 32,
492 .dcache_bsize = 32,
493 .num_pmcs = 4,
494 .cpu_setup = __setup_cpu_750fx,
495 .platform = "ppc750",
496 },
497 { /* 750GX */
498 .pvr_mask = 0xffff0000,
499 .pvr_value = 0x70020000,
500 .cpu_name = "750GX",
501 .cpu_features = CPU_FTRS_750GX,
502 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
503 .icache_bsize = 32,
504 .dcache_bsize = 32,
505 .num_pmcs = 4,
506 .cpu_setup = __setup_cpu_750fx,
507 .platform = "ppc750",
508 },
509 { /* 740/750 (L2CR bit need fixup for 740) */
510 .pvr_mask = 0xffff0000,
511 .pvr_value = 0x00080000,
512 .cpu_name = "740/750",
513 .cpu_features = CPU_FTRS_740,
514 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
515 .icache_bsize = 32,
516 .dcache_bsize = 32,
517 .num_pmcs = 4,
518 .cpu_setup = __setup_cpu_750,
519 .platform = "ppc750",
520 },
521 { /* 7400 rev 1.1 ? (no TAU) */
522 .pvr_mask = 0xffffffff,
523 .pvr_value = 0x000c1101,
524 .cpu_name = "7400 (1.1)",
525 .cpu_features = CPU_FTRS_7400_NOTAU,
526 .cpu_user_features = COMMON_USER |
527 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
528 .icache_bsize = 32,
529 .dcache_bsize = 32,
530 .num_pmcs = 4,
531 .cpu_setup = __setup_cpu_7400,
532 .platform = "ppc7400",
533 },
534 { /* 7400 */
535 .pvr_mask = 0xffff0000,
536 .pvr_value = 0x000c0000,
537 .cpu_name = "7400",
538 .cpu_features = CPU_FTRS_7400,
539 .cpu_user_features = COMMON_USER |
540 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
541 .icache_bsize = 32,
542 .dcache_bsize = 32,
543 .num_pmcs = 4,
544 .cpu_setup = __setup_cpu_7400,
545 .platform = "ppc7400",
546 },
547 { /* 7410 */
548 .pvr_mask = 0xffff0000,
549 .pvr_value = 0x800c0000,
550 .cpu_name = "7410",
551 .cpu_features = CPU_FTRS_7400,
552 .cpu_user_features = COMMON_USER |
553 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
554 .icache_bsize = 32,
555 .dcache_bsize = 32,
556 .num_pmcs = 4,
557 .cpu_setup = __setup_cpu_7410,
558 .platform = "ppc7400",
559 },
560 { /* 7450 2.0 - no doze/nap */
561 .pvr_mask = 0xffffffff,
562 .pvr_value = 0x80000200,
563 .cpu_name = "7450",
564 .cpu_features = CPU_FTRS_7450_20,
565 .cpu_user_features = COMMON_USER |
566 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
567 .icache_bsize = 32,
568 .dcache_bsize = 32,
569 .num_pmcs = 6,
570 .cpu_setup = __setup_cpu_745x,
571 .oprofile_cpu_type = "ppc/7450",
572 .oprofile_type = PPC_OPROFILE_G4,
573 .platform = "ppc7450",
574 },
575 { /* 7450 2.1 */
576 .pvr_mask = 0xffffffff,
577 .pvr_value = 0x80000201,
578 .cpu_name = "7450",
579 .cpu_features = CPU_FTRS_7450_21,
580 .cpu_user_features = COMMON_USER |
581 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
582 .icache_bsize = 32,
583 .dcache_bsize = 32,
584 .num_pmcs = 6,
585 .cpu_setup = __setup_cpu_745x,
586 .oprofile_cpu_type = "ppc/7450",
587 .oprofile_type = PPC_OPROFILE_G4,
588 .platform = "ppc7450",
589 },
590 { /* 7450 2.3 and newer */
591 .pvr_mask = 0xffff0000,
592 .pvr_value = 0x80000000,
593 .cpu_name = "7450",
594 .cpu_features = CPU_FTRS_7450_23,
595 .cpu_user_features = COMMON_USER |
596 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
597 .icache_bsize = 32,
598 .dcache_bsize = 32,
599 .num_pmcs = 6,
600 .cpu_setup = __setup_cpu_745x,
601 .oprofile_cpu_type = "ppc/7450",
602 .oprofile_type = PPC_OPROFILE_G4,
603 .platform = "ppc7450",
604 },
605 { /* 7455 rev 1.x */
606 .pvr_mask = 0xffffff00,
607 .pvr_value = 0x80010100,
608 .cpu_name = "7455",
609 .cpu_features = CPU_FTRS_7455_1,
610 .cpu_user_features = COMMON_USER |
611 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
612 .icache_bsize = 32,
613 .dcache_bsize = 32,
614 .num_pmcs = 6,
615 .cpu_setup = __setup_cpu_745x,
616 .oprofile_cpu_type = "ppc/7450",
617 .oprofile_type = PPC_OPROFILE_G4,
618 .platform = "ppc7450",
619 },
620 { /* 7455 rev 2.0 */
621 .pvr_mask = 0xffffffff,
622 .pvr_value = 0x80010200,
623 .cpu_name = "7455",
624 .cpu_features = CPU_FTRS_7455_20,
625 .cpu_user_features = COMMON_USER |
626 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
627 .icache_bsize = 32,
628 .dcache_bsize = 32,
629 .num_pmcs = 6,
630 .cpu_setup = __setup_cpu_745x,
631 .oprofile_cpu_type = "ppc/7450",
632 .oprofile_type = PPC_OPROFILE_G4,
633 .platform = "ppc7450",
634 },
635 { /* 7455 others */
636 .pvr_mask = 0xffff0000,
637 .pvr_value = 0x80010000,
638 .cpu_name = "7455",
639 .cpu_features = CPU_FTRS_7455,
640 .cpu_user_features = COMMON_USER |
641 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
642 .icache_bsize = 32,
643 .dcache_bsize = 32,
644 .num_pmcs = 6,
645 .cpu_setup = __setup_cpu_745x,
646 .oprofile_cpu_type = "ppc/7450",
647 .oprofile_type = PPC_OPROFILE_G4,
648 .platform = "ppc7450",
649 },
650 { /* 7447/7457 Rev 1.0 */
651 .pvr_mask = 0xffffffff,
652 .pvr_value = 0x80020100,
653 .cpu_name = "7447/7457",
654 .cpu_features = CPU_FTRS_7447_10,
655 .cpu_user_features = COMMON_USER |
656 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
657 .icache_bsize = 32,
658 .dcache_bsize = 32,
659 .num_pmcs = 6,
660 .cpu_setup = __setup_cpu_745x,
661 .oprofile_cpu_type = "ppc/7450",
662 .oprofile_type = PPC_OPROFILE_G4,
663 .platform = "ppc7450",
664 },
665 { /* 7447/7457 Rev 1.1 */
666 .pvr_mask = 0xffffffff,
667 .pvr_value = 0x80020101,
668 .cpu_name = "7447/7457",
669 .cpu_features = CPU_FTRS_7447_10,
670 .cpu_user_features = COMMON_USER |
671 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
672 .icache_bsize = 32,
673 .dcache_bsize = 32,
674 .num_pmcs = 6,
675 .cpu_setup = __setup_cpu_745x,
676 .oprofile_cpu_type = "ppc/7450",
677 .oprofile_type = PPC_OPROFILE_G4,
678 .platform = "ppc7450",
679 },
680 { /* 7447/7457 Rev 1.2 and later */
681 .pvr_mask = 0xffff0000,
682 .pvr_value = 0x80020000,
683 .cpu_name = "7447/7457",
684 .cpu_features = CPU_FTRS_7447,
685 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
686 .icache_bsize = 32,
687 .dcache_bsize = 32,
688 .num_pmcs = 6,
689 .cpu_setup = __setup_cpu_745x,
690 .oprofile_cpu_type = "ppc/7450",
691 .oprofile_type = PPC_OPROFILE_G4,
692 .platform = "ppc7450",
693 },
694 { /* 7447A */
695 .pvr_mask = 0xffff0000,
696 .pvr_value = 0x80030000,
697 .cpu_name = "7447A",
698 .cpu_features = CPU_FTRS_7447A,
699 .cpu_user_features = COMMON_USER |
700 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
701 .icache_bsize = 32,
702 .dcache_bsize = 32,
703 .num_pmcs = 6,
704 .cpu_setup = __setup_cpu_745x,
705 .oprofile_cpu_type = "ppc/7450",
706 .oprofile_type = PPC_OPROFILE_G4,
707 .platform = "ppc7450",
708 },
709 { /* 7448 */
710 .pvr_mask = 0xffff0000,
711 .pvr_value = 0x80040000,
712 .cpu_name = "7448",
713 .cpu_features = CPU_FTRS_7447A,
714 .cpu_user_features = COMMON_USER |
715 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
716 .icache_bsize = 32,
717 .dcache_bsize = 32,
718 .num_pmcs = 6,
719 .cpu_setup = __setup_cpu_745x,
720 .oprofile_cpu_type = "ppc/7450",
721 .oprofile_type = PPC_OPROFILE_G4,
722 .platform = "ppc7450",
723 },
724 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
725 .pvr_mask = 0x7fff0000,
726 .pvr_value = 0x00810000,
727 .cpu_name = "82xx",
728 .cpu_features = CPU_FTRS_82XX,
729 .cpu_user_features = COMMON_USER,
730 .icache_bsize = 32,
731 .dcache_bsize = 32,
732 .cpu_setup = __setup_cpu_603,
733 .platform = "ppc603",
734 },
735 { /* All G2_LE (603e core, plus some) have the same pvr */
736 .pvr_mask = 0x7fff0000,
737 .pvr_value = 0x00820000,
738 .cpu_name = "G2_LE",
739 .cpu_features = CPU_FTRS_G2_LE,
740 .cpu_user_features = COMMON_USER,
741 .icache_bsize = 32,
742 .dcache_bsize = 32,
743 .cpu_setup = __setup_cpu_603,
744 .platform = "ppc603",
745 },
746 { /* e300 (a 603e core, plus some) on 83xx */
747 .pvr_mask = 0x7fff0000,
748 .pvr_value = 0x00830000,
749 .cpu_name = "e300",
750 .cpu_features = CPU_FTRS_E300,
751 .cpu_user_features = COMMON_USER,
752 .icache_bsize = 32,
753 .dcache_bsize = 32,
754 .cpu_setup = __setup_cpu_603,
755 .platform = "ppc603",
756 },
757 { /* default match, we assume split I/D cache & TB (non-601)... */
758 .pvr_mask = 0x00000000,
759 .pvr_value = 0x00000000,
760 .cpu_name = "(generic PPC)",
761 .cpu_features = CPU_FTRS_CLASSIC32,
762 .cpu_user_features = COMMON_USER,
763 .icache_bsize = 32,
764 .dcache_bsize = 32,
765 .platform = "ppc603",
766 },
767 #endif /* CLASSIC_PPC */
768 #ifdef CONFIG_8xx
769 { /* 8xx */
770 .pvr_mask = 0xffff0000,
771 .pvr_value = 0x00500000,
772 .cpu_name = "8xx",
773 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
774 * if the 8xx code is there.... */
775 .cpu_features = CPU_FTRS_8XX,
776 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
777 .icache_bsize = 16,
778 .dcache_bsize = 16,
779 .platform = "ppc823",
780 },
781 #endif /* CONFIG_8xx */
782 #ifdef CONFIG_40x
783 { /* 403GC */
784 .pvr_mask = 0xffffff00,
785 .pvr_value = 0x00200200,
786 .cpu_name = "403GC",
787 .cpu_features = CPU_FTRS_40X,
788 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
789 .icache_bsize = 16,
790 .dcache_bsize = 16,
791 .platform = "ppc403",
792 },
793 { /* 403GCX */
794 .pvr_mask = 0xffffff00,
795 .pvr_value = 0x00201400,
796 .cpu_name = "403GCX",
797 .cpu_features = CPU_FTRS_40X,
798 .cpu_user_features = PPC_FEATURE_32 |
799 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
800 .icache_bsize = 16,
801 .dcache_bsize = 16,
802 .platform = "ppc403",
803 },
804 { /* 403G ?? */
805 .pvr_mask = 0xffff0000,
806 .pvr_value = 0x00200000,
807 .cpu_name = "403G ??",
808 .cpu_features = CPU_FTRS_40X,
809 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
810 .icache_bsize = 16,
811 .dcache_bsize = 16,
812 .platform = "ppc403",
813 },
814 { /* 405GP */
815 .pvr_mask = 0xffff0000,
816 .pvr_value = 0x40110000,
817 .cpu_name = "405GP",
818 .cpu_features = CPU_FTRS_40X,
819 .cpu_user_features = PPC_FEATURE_32 |
820 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
821 .icache_bsize = 32,
822 .dcache_bsize = 32,
823 .platform = "ppc405",
824 },
825 { /* STB 03xxx */
826 .pvr_mask = 0xffff0000,
827 .pvr_value = 0x40130000,
828 .cpu_name = "STB03xxx",
829 .cpu_features = CPU_FTRS_40X,
830 .cpu_user_features = PPC_FEATURE_32 |
831 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
832 .icache_bsize = 32,
833 .dcache_bsize = 32,
834 .platform = "ppc405",
835 },
836 { /* STB 04xxx */
837 .pvr_mask = 0xffff0000,
838 .pvr_value = 0x41810000,
839 .cpu_name = "STB04xxx",
840 .cpu_features = CPU_FTRS_40X,
841 .cpu_user_features = PPC_FEATURE_32 |
842 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
843 .icache_bsize = 32,
844 .dcache_bsize = 32,
845 .platform = "ppc405",
846 },
847 { /* NP405L */
848 .pvr_mask = 0xffff0000,
849 .pvr_value = 0x41610000,
850 .cpu_name = "NP405L",
851 .cpu_features = CPU_FTRS_40X,
852 .cpu_user_features = PPC_FEATURE_32 |
853 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
854 .icache_bsize = 32,
855 .dcache_bsize = 32,
856 .platform = "ppc405",
857 },
858 { /* NP4GS3 */
859 .pvr_mask = 0xffff0000,
860 .pvr_value = 0x40B10000,
861 .cpu_name = "NP4GS3",
862 .cpu_features = CPU_FTRS_40X,
863 .cpu_user_features = PPC_FEATURE_32 |
864 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
865 .icache_bsize = 32,
866 .dcache_bsize = 32,
867 .platform = "ppc405",
868 },
869 { /* NP405H */
870 .pvr_mask = 0xffff0000,
871 .pvr_value = 0x41410000,
872 .cpu_name = "NP405H",
873 .cpu_features = CPU_FTRS_40X,
874 .cpu_user_features = PPC_FEATURE_32 |
875 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
876 .icache_bsize = 32,
877 .dcache_bsize = 32,
878 .platform = "ppc405",
879 },
880 { /* 405GPr */
881 .pvr_mask = 0xffff0000,
882 .pvr_value = 0x50910000,
883 .cpu_name = "405GPr",
884 .cpu_features = CPU_FTRS_40X,
885 .cpu_user_features = PPC_FEATURE_32 |
886 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
887 .icache_bsize = 32,
888 .dcache_bsize = 32,
889 .platform = "ppc405",
890 },
891 { /* STBx25xx */
892 .pvr_mask = 0xffff0000,
893 .pvr_value = 0x51510000,
894 .cpu_name = "STBx25xx",
895 .cpu_features = CPU_FTRS_40X,
896 .cpu_user_features = PPC_FEATURE_32 |
897 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
898 .icache_bsize = 32,
899 .dcache_bsize = 32,
900 .platform = "ppc405",
901 },
902 { /* 405LP */
903 .pvr_mask = 0xffff0000,
904 .pvr_value = 0x41F10000,
905 .cpu_name = "405LP",
906 .cpu_features = CPU_FTRS_40X,
907 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
908 .icache_bsize = 32,
909 .dcache_bsize = 32,
910 .platform = "ppc405",
911 },
912 { /* Xilinx Virtex-II Pro */
913 .pvr_mask = 0xfffff000,
914 .pvr_value = 0x20010000,
915 .cpu_name = "Virtex-II Pro",
916 .cpu_features = CPU_FTRS_40X,
917 .cpu_user_features = PPC_FEATURE_32 |
918 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
919 .icache_bsize = 32,
920 .dcache_bsize = 32,
921 .platform = "ppc405",
922 },
923 { /* Xilinx Virtex-4 FX */
924 .pvr_mask = 0xfffff000,
925 .pvr_value = 0x20011000,
926 .cpu_name = "Virtex-4 FX",
927 .cpu_features = CPU_FTRS_40X,
928 .cpu_user_features = PPC_FEATURE_32 |
929 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
930 .icache_bsize = 32,
931 .dcache_bsize = 32,
932 },
933 { /* 405EP */
934 .pvr_mask = 0xffff0000,
935 .pvr_value = 0x51210000,
936 .cpu_name = "405EP",
937 .cpu_features = CPU_FTRS_40X,
938 .cpu_user_features = PPC_FEATURE_32 |
939 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
940 .icache_bsize = 32,
941 .dcache_bsize = 32,
942 .platform = "ppc405",
943 },
944
945 #endif /* CONFIG_40x */
946 #ifdef CONFIG_44x
947 {
948 .pvr_mask = 0xf0000fff,
949 .pvr_value = 0x40000850,
950 .cpu_name = "440EP Rev. A",
951 .cpu_features = CPU_FTRS_44X,
952 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
953 .icache_bsize = 32,
954 .dcache_bsize = 32,
955 .platform = "ppc440",
956 },
957 {
958 .pvr_mask = 0xf0000fff,
959 .pvr_value = 0x400008d3,
960 .cpu_name = "440EP Rev. B",
961 .cpu_features = CPU_FTRS_44X,
962 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
963 .icache_bsize = 32,
964 .dcache_bsize = 32,
965 .platform = "ppc440",
966 },
967 { /* 440GP Rev. B */
968 .pvr_mask = 0xf0000fff,
969 .pvr_value = 0x40000440,
970 .cpu_name = "440GP Rev. B",
971 .cpu_features = CPU_FTRS_44X,
972 .cpu_user_features = COMMON_USER_BOOKE,
973 .icache_bsize = 32,
974 .dcache_bsize = 32,
975 .platform = "ppc440gp",
976 },
977 { /* 440GP Rev. C */
978 .pvr_mask = 0xf0000fff,
979 .pvr_value = 0x40000481,
980 .cpu_name = "440GP Rev. C",
981 .cpu_features = CPU_FTRS_44X,
982 .cpu_user_features = COMMON_USER_BOOKE,
983 .icache_bsize = 32,
984 .dcache_bsize = 32,
985 .platform = "ppc440gp",
986 },
987 { /* 440GX Rev. A */
988 .pvr_mask = 0xf0000fff,
989 .pvr_value = 0x50000850,
990 .cpu_name = "440GX Rev. A",
991 .cpu_features = CPU_FTRS_44X,
992 .cpu_user_features = COMMON_USER_BOOKE,
993 .icache_bsize = 32,
994 .dcache_bsize = 32,
995 .platform = "ppc440",
996 },
997 { /* 440GX Rev. B */
998 .pvr_mask = 0xf0000fff,
999 .pvr_value = 0x50000851,
1000 .cpu_name = "440GX Rev. B",
1001 .cpu_features = CPU_FTRS_44X,
1002 .cpu_user_features = COMMON_USER_BOOKE,
1003 .icache_bsize = 32,
1004 .dcache_bsize = 32,
1005 .platform = "ppc440",
1006 },
1007 { /* 440GX Rev. C */
1008 .pvr_mask = 0xf0000fff,
1009 .pvr_value = 0x50000892,
1010 .cpu_name = "440GX Rev. C",
1011 .cpu_features = CPU_FTRS_44X,
1012 .cpu_user_features = COMMON_USER_BOOKE,
1013 .icache_bsize = 32,
1014 .dcache_bsize = 32,
1015 .platform = "ppc440",
1016 },
1017 { /* 440GX Rev. F */
1018 .pvr_mask = 0xf0000fff,
1019 .pvr_value = 0x50000894,
1020 .cpu_name = "440GX Rev. F",
1021 .cpu_features = CPU_FTRS_44X,
1022 .cpu_user_features = COMMON_USER_BOOKE,
1023 .icache_bsize = 32,
1024 .dcache_bsize = 32,
1025 .platform = "ppc440",
1026 },
1027 { /* 440SP Rev. A */
1028 .pvr_mask = 0xff000fff,
1029 .pvr_value = 0x53000891,
1030 .cpu_name = "440SP Rev. A",
1031 .cpu_features = CPU_FTRS_44X,
1032 .cpu_user_features = COMMON_USER_BOOKE,
1033 .icache_bsize = 32,
1034 .dcache_bsize = 32,
1035 .platform = "ppc440",
1036 },
1037 { /* 440SPe Rev. A */
1038 .pvr_mask = 0xff000fff,
1039 .pvr_value = 0x53000890,
1040 .cpu_name = "440SPe Rev. A",
1041 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1042 CPU_FTR_USE_TB,
1043 .cpu_user_features = COMMON_USER_BOOKE,
1044 .icache_bsize = 32,
1045 .dcache_bsize = 32,
1046 .platform = "ppc440",
1047 },
1048 #endif /* CONFIG_44x */
1049 #ifdef CONFIG_FSL_BOOKE
1050 { /* e200z5 */
1051 .pvr_mask = 0xfff00000,
1052 .pvr_value = 0x81000000,
1053 .cpu_name = "e200z5",
1054 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1055 .cpu_features = CPU_FTRS_E200,
1056 .cpu_user_features = COMMON_USER_BOOKE |
1057 PPC_FEATURE_HAS_EFP_SINGLE |
1058 PPC_FEATURE_UNIFIED_CACHE,
1059 .dcache_bsize = 32,
1060 .platform = "ppc5554",
1061 },
1062 { /* e200z6 */
1063 .pvr_mask = 0xfff00000,
1064 .pvr_value = 0x81100000,
1065 .cpu_name = "e200z6",
1066 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1067 .cpu_features = CPU_FTRS_E200,
1068 .cpu_user_features = COMMON_USER_BOOKE |
1069 PPC_FEATURE_SPE_COMP |
1070 PPC_FEATURE_HAS_EFP_SINGLE |
1071 PPC_FEATURE_UNIFIED_CACHE,
1072 .dcache_bsize = 32,
1073 .platform = "ppc5554",
1074 },
1075 { /* e500 */
1076 .pvr_mask = 0xffff0000,
1077 .pvr_value = 0x80200000,
1078 .cpu_name = "e500",
1079 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1080 .cpu_features = CPU_FTRS_E500,
1081 .cpu_user_features = COMMON_USER_BOOKE |
1082 PPC_FEATURE_SPE_COMP |
1083 PPC_FEATURE_HAS_EFP_SINGLE,
1084 .icache_bsize = 32,
1085 .dcache_bsize = 32,
1086 .num_pmcs = 4,
1087 .oprofile_cpu_type = "ppc/e500",
1088 .oprofile_type = PPC_OPROFILE_BOOKE,
1089 .platform = "ppc8540",
1090 },
1091 { /* e500v2 */
1092 .pvr_mask = 0xffff0000,
1093 .pvr_value = 0x80210000,
1094 .cpu_name = "e500v2",
1095 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1096 .cpu_features = CPU_FTRS_E500_2,
1097 .cpu_user_features = COMMON_USER_BOOKE |
1098 PPC_FEATURE_SPE_COMP |
1099 PPC_FEATURE_HAS_EFP_SINGLE |
1100 PPC_FEATURE_HAS_EFP_DOUBLE,
1101 .icache_bsize = 32,
1102 .dcache_bsize = 32,
1103 .num_pmcs = 4,
1104 .oprofile_cpu_type = "ppc/e500",
1105 .oprofile_type = PPC_OPROFILE_BOOKE,
1106 .platform = "ppc8548",
1107 },
1108 #endif
1109 #if !CLASSIC_PPC
1110 { /* default match */
1111 .pvr_mask = 0x00000000,
1112 .pvr_value = 0x00000000,
1113 .cpu_name = "(generic PPC)",
1114 .cpu_features = CPU_FTRS_GENERIC_32,
1115 .cpu_user_features = PPC_FEATURE_32,
1116 .icache_bsize = 32,
1117 .dcache_bsize = 32,
1118 .platform = "powerpc",
1119 }
1120 #endif /* !CLASSIC_PPC */
1121 #endif /* CONFIG_PPC32 */
1122 };
kernel source for telekom puls (alcatel/mediatek)