0706a4a13b9f7979cf69499364f3fe644190a4ae
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / boot / dts / taishan.dts
1 /*
2 * Device Tree Source for IBM/AMCC Taishan
3 *
4 * Copyright 2007 IBM Corp.
5 * Hugh Blemings <hugh@au.ibm.com> based off code by
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without
10 * any warranty of any kind, whether express or implied.
11 */
12
13 / {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,taishan";
17 compatible = "amcc,taishan";
18 dcr-parent = <&/cpus/cpu@0>;
19
20 aliases {
21 ethernet0 = &EMAC2;
22 ethernet1 = &EMAC3;
23 serial0 = &UART0;
24 serial1 = &UART1;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 cpu@0 {
32 device_type = "cpu";
33 model = "PowerPC,440GX";
34 reg = <0>;
35 clock-frequency = <2FAF0800>; // 800MHz
36 timebase-frequency = <0>; // Filled in by zImage
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 i-cache-size = <8000>; /* 32 kB */
40 d-cache-size = <8000>; /* 32 kB */
41 dcr-controller;
42 dcr-access-method = "native";
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0 0 0>; // Filled in by zImage
49 };
50
51
52 UICB0: interrupt-controller-base {
53 compatible = "ibm,uic-440gx", "ibm,uic";
54 interrupt-controller;
55 cell-index = <3>;
56 dcr-reg = <200 009>;
57 #address-cells = <0>;
58 #size-cells = <0>;
59 #interrupt-cells = <2>;
60 };
61
62
63 UIC0: interrupt-controller0 {
64 compatible = "ibm,uic-440gx", "ibm,uic";
65 interrupt-controller;
66 cell-index = <0>;
67 dcr-reg = <0c0 009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
71 interrupts = <01 4 00 4>; /* cascade - first non-critical */
72 interrupt-parent = <&UICB0>;
73
74 };
75
76 UIC1: interrupt-controller1 {
77 compatible = "ibm,uic-440gx", "ibm,uic";
78 interrupt-controller;
79 cell-index = <1>;
80 dcr-reg = <0d0 009>;
81 #address-cells = <0>;
82 #size-cells = <0>;
83 #interrupt-cells = <2>;
84 interrupts = <03 4 02 4>; /* cascade */
85 interrupt-parent = <&UICB0>;
86 };
87
88 UIC2: interrupt-controller2 {
89 compatible = "ibm,uic-440gx", "ibm,uic";
90 interrupt-controller;
91 cell-index = <2>; /* was 1 */
92 dcr-reg = <210 009>;
93 #address-cells = <0>;
94 #size-cells = <0>;
95 #interrupt-cells = <2>;
96 interrupts = <05 4 04 4>; /* cascade */
97 interrupt-parent = <&UICB0>;
98 };
99
100
101 CPC0: cpc {
102 compatible = "ibm,cpc-440gp";
103 dcr-reg = <0b0 003 0e0 010>;
104 // FIXME: anything else?
105 };
106
107 plb {
108 compatible = "ibm,plb-440gx", "ibm,plb4";
109 #address-cells = <2>;
110 #size-cells = <1>;
111 ranges;
112 clock-frequency = <9896800>; // 160MHz
113
114 SDRAM0: memory-controller {
115 compatible = "ibm,sdram-440gp";
116 dcr-reg = <010 2>;
117 // FIXME: anything else?
118 };
119
120 SRAM0: sram {
121 compatible = "ibm,sram-440gp";
122 dcr-reg = <020 8 00a 1>;
123 };
124
125 DMA0: dma {
126 // FIXME: ???
127 compatible = "ibm,dma-440gp";
128 dcr-reg = <100 027>;
129 };
130
131 MAL0: mcmal {
132 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
133 dcr-reg = <180 62>;
134 num-tx-chans = <4>;
135 num-rx-chans = <4>;
136 interrupt-parent = <&MAL0>;
137 interrupts = <0 1 2 3 4>;
138 #interrupt-cells = <1>;
139 #address-cells = <0>;
140 #size-cells = <0>;
141 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
142 /*RXEOB*/ 1 &UIC0 b 4
143 /*SERR*/ 2 &UIC1 0 4
144 /*TXDE*/ 3 &UIC1 1 4
145 /*RXDE*/ 4 &UIC1 2 4>;
146 interrupt-map-mask = <ffffffff>;
147 };
148
149 POB0: opb {
150 compatible = "ibm,opb-440gx", "ibm,opb";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 /* Wish there was a nicer way of specifying a full 32-bit
154 range */
155 ranges = <00000000 1 00000000 80000000
156 80000000 1 80000000 80000000>;
157 dcr-reg = <090 00b>;
158 interrupt-parent = <&UIC1>;
159 interrupts = <7 4>;
160 clock-frequency = <4C4B400>; // 80MHz
161
162
163 EBC0: ebc {
164 compatible = "ibm,ebc-440gx", "ibm,ebc";
165 dcr-reg = <012 2>;
166 #address-cells = <2>;
167 #size-cells = <1>;
168 clock-frequency = <4C4B400>; // 80MHz
169
170 /* ranges property is supplied by zImage
171 * based on firmware's configuration of the
172 * EBC bridge */
173
174 interrupts = <5 4>;
175 interrupt-parent = <&UIC1>;
176
177 /* TODO: Add other EBC devices */
178 };
179
180
181
182 UART0: serial@40000200 {
183 device_type = "serial";
184 compatible = "ns16550";
185 reg = <40000200 8>;
186 virtual-reg = <e0000200>;
187 clock-frequency = <A8C000>;
188 current-speed = <1C200>; /* 115200 */
189 interrupt-parent = <&UIC0>;
190 interrupts = <0 4>;
191 };
192
193 UART1: serial@40000300 {
194 device_type = "serial";
195 compatible = "ns16550";
196 reg = <40000300 8>;
197 virtual-reg = <e0000300>;
198 clock-frequency = <A8C000>;
199 current-speed = <1C200>; /* 115200 */
200 interrupt-parent = <&UIC0>;
201 interrupts = <1 4>;
202 };
203
204 IIC0: i2c@40000400 {
205 /* FIXME */
206 device_type = "i2c";
207 compatible = "ibm,iic-440gp", "ibm,iic";
208 reg = <40000400 14>;
209 interrupt-parent = <&UIC0>;
210 interrupts = <2 4>;
211 };
212 IIC1: i2c@40000500 {
213 /* FIXME */
214 device_type = "i2c";
215 compatible = "ibm,iic-440gp", "ibm,iic";
216 reg = <40000500 14>;
217 interrupt-parent = <&UIC0>;
218 interrupts = <3 4>;
219 };
220
221 GPIO0: gpio@40000700 {
222 /* FIXME */
223 compatible = "ibm,gpio-440gp";
224 reg = <40000700 20>;
225 };
226
227 ZMII0: emac-zmii@40000780 {
228 device_type = "zgmii-interface";
229 compatible = "ibm,zmii-440gx", "ibm,zmii";
230 reg = <40000780 c>;
231 };
232
233 RGMII0: emac-rgmii@40000790 {
234 device_type = "rgmii-interface";
235 compatible = "ibm,rgmii";
236 reg = <40000790 8>;
237 };
238
239
240 EMAC0: ethernet@40000800 {
241 unused = <1>;
242 linux,network-index = <2>;
243 device_type = "network";
244 compatible = "ibm,emac-440gx", "ibm,emac4";
245 interrupt-parent = <&UIC1>;
246 interrupts = <1c 4 1d 4>;
247 reg = <40000800 70>;
248 local-mac-address = [000000000000]; // Filled in by zImage
249 mal-device = <&MAL0>;
250 mal-tx-channel = <0>;
251 mal-rx-channel = <0>;
252 cell-index = <0>;
253 max-frame-size = <5dc>;
254 rx-fifo-size = <1000>;
255 tx-fifo-size = <800>;
256 phy-mode = "rmii";
257 phy-map = <00000001>;
258 zmii-device = <&ZMII0>;
259 zmii-channel = <0>;
260 };
261 EMAC1: ethernet@40000900 {
262 unused = <1>;
263 linux,network-index = <3>;
264 device_type = "network";
265 compatible = "ibm,emac-440gx", "ibm,emac4";
266 interrupt-parent = <&UIC1>;
267 interrupts = <1e 4 1f 4>;
268 reg = <40000900 70>;
269 local-mac-address = [000000000000]; // Filled in by zImage
270 mal-device = <&MAL0>;
271 mal-tx-channel = <1>;
272 mal-rx-channel = <1>;
273 cell-index = <1>;
274 max-frame-size = <5dc>;
275 rx-fifo-size = <1000>;
276 tx-fifo-size = <800>;
277 phy-mode = "rmii";
278 phy-map = <00000001>;
279 zmii-device = <&ZMII0>;
280 zmii-channel = <1>;
281 };
282
283 EMAC2: ethernet@40000c00 {
284 linux,network-index = <0>;
285 device_type = "network";
286 compatible = "ibm,emac-440gx", "ibm,emac4";
287 interrupt-parent = <&UIC2>;
288 interrupts = <0 4 1 4>;
289 reg = <40000c00 70>;
290 local-mac-address = [000000000000]; // Filled in by zImage
291 mal-device = <&MAL0>;
292 mal-tx-channel = <2>;
293 mal-rx-channel = <2>;
294 cell-index = <2>;
295 max-frame-size = <5dc>;
296 rx-fifo-size = <1000>;
297 tx-fifo-size = <800>;
298 phy-mode = "rgmii";
299 phy-map = <00000001>;
300 rgmii-device = <&RGMII0>;
301 rgmii-channel = <0>;
302 zmii-device = <&ZMII0>;
303 zmii-channel = <2>;
304 };
305
306 EMAC3: ethernet@40000e00 {
307 linux,network-index = <1>;
308 device_type = "network";
309 compatible = "ibm,emac-440gx", "ibm,emac4";
310 interrupt-parent = <&UIC2>;
311 interrupts = <2 4 3 4>;
312 reg = <40000e00 70>;
313 local-mac-address = [000000000000]; // Filled in by zImage
314 mal-device = <&MAL0>;
315 mal-tx-channel = <3>;
316 mal-rx-channel = <3>;
317 cell-index = <3>;
318 max-frame-size = <5dc>;
319 rx-fifo-size = <1000>;
320 tx-fifo-size = <800>;
321 phy-mode = "rgmii";
322 phy-map = <00000003>;
323 rgmii-device = <&RGMII0>;
324 rgmii-channel = <1>;
325 zmii-device = <&ZMII0>;
326 zmii-channel = <3>;
327 };
328
329
330 GPT0: gpt@40000a00 {
331 /* FIXME */
332 reg = <40000a00 d4>;
333 interrupt-parent = <&UIC0>;
334 interrupts = <12 4 13 4 14 4 15 4 16 4>;
335 };
336
337 };
338
339 PCIX0: pci@20ec00000 {
340 device_type = "pci";
341 #interrupt-cells = <1>;
342 #size-cells = <2>;
343 #address-cells = <3>;
344 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
345 primary;
346 large-inbound-windows;
347 enable-msi-hole;
348 reg = <2 0ec00000 8 /* Config space access */
349 0 0 0 /* no IACK cycles */
350 2 0ed00000 4 /* Special cycles */
351 2 0ec80000 100 /* Internal registers */
352 2 0ec80100 fc>; /* Internal messaging registers */
353
354 /* Outbound ranges, one memory and one IO,
355 * later cannot be changed
356 */
357 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
358 01000000 0 00000000 00000002 08000000 0 00010000>;
359
360 /* Inbound 2GB range starting at 0 */
361 dma-ranges = <42000000 0 0 0 0 0 80000000>;
362
363 interrupt-map-mask = <f800 0 0 7>;
364 interrupt-map = <
365 /* IDSEL 1 */
366 0800 0 0 1 &UIC0 17 8
367 0800 0 0 2 &UIC0 18 8
368 0800 0 0 3 &UIC0 19 8
369 0800 0 0 4 &UIC0 1a 8
370
371 /* IDSEL 2 */
372 1000 0 0 1 &UIC0 18 8
373 1000 0 0 2 &UIC0 19 8
374 1000 0 0 3 &UIC0 1a 8
375 1000 0 0 4 &UIC0 17 8
376 >;
377 };
378 };
379
380 chosen {
381 linux,stdout-path = "/plb/opb/serial@40000300";
382 };
383 };