5c13d46f441dc3dd7541ee56c1ab6d975bc41abd
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / boot / dts / sequoia.dts
1 /*
2 * Device Tree Source for AMCC Sequoia
3 *
4 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
5 * Copyright (c) 2006, 2007 IBM Corp.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
15 / {
16 #address-cells = <2>;
17 #size-cells = <1>;
18 model = "amcc,sequoia";
19 compatible = "amcc,sequoia";
20 dcr-parent = <&/cpus/cpu@0>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 ethernet1 = &EMAC1;
25 serial0 = &UART0;
26 serial1 = &UART1;
27 serial2 = &UART2;
28 serial3 = &UART3;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 model = "PowerPC,440EPx";
38 reg = <0>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <20>;
42 d-cache-line-size = <20>;
43 i-cache-size = <8000>;
44 d-cache-size = <8000>;
45 dcr-controller;
46 dcr-access-method = "native";
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0 0 0>; /* Filled in by zImage */
53 };
54
55 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440epx","ibm,uic";
57 interrupt-controller;
58 cell-index = <0>;
59 dcr-reg = <0c0 009>;
60 #address-cells = <0>;
61 #size-cells = <0>;
62 #interrupt-cells = <2>;
63 };
64
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440epx","ibm,uic";
67 interrupt-controller;
68 cell-index = <1>;
69 dcr-reg = <0d0 009>;
70 #address-cells = <0>;
71 #size-cells = <0>;
72 #interrupt-cells = <2>;
73 interrupts = <1e 4 1f 4>; /* cascade */
74 interrupt-parent = <&UIC0>;
75 };
76
77 UIC2: interrupt-controller2 {
78 compatible = "ibm,uic-440epx","ibm,uic";
79 interrupt-controller;
80 cell-index = <2>;
81 dcr-reg = <0e0 009>;
82 #address-cells = <0>;
83 #size-cells = <0>;
84 #interrupt-cells = <2>;
85 interrupts = <1c 4 1d 4>; /* cascade */
86 interrupt-parent = <&UIC0>;
87 };
88
89 SDR0: sdr {
90 compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
91 dcr-reg = <00e 002>;
92 };
93
94 CPR0: cpr {
95 compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
96 dcr-reg = <00c 002>;
97 };
98
99 plb {
100 compatible = "ibm,plb-440epx", "ibm,plb4";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 ranges;
104 clock-frequency = <0>; /* Filled in by zImage */
105
106 SDRAM0: sdram {
107 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
108 dcr-reg = <010 2>;
109 };
110
111 DMA0: dma {
112 compatible = "ibm,dma-440epx", "ibm,dma-4xx";
113 dcr-reg = <100 027>;
114 };
115
116 MAL0: mcmal {
117 compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
118 dcr-reg = <180 62>;
119 num-tx-chans = <2>;
120 num-rx-chans = <2>;
121 interrupt-parent = <&MAL0>;
122 interrupts = <0 1 2 3 4>;
123 #interrupt-cells = <1>;
124 #address-cells = <0>;
125 #size-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
127 /*RXEOB*/ 1 &UIC0 b 4
128 /*SERR*/ 2 &UIC1 0 4
129 /*TXDE*/ 3 &UIC1 1 4
130 /*RXDE*/ 4 &UIC1 2 4>;
131 interrupt-map-mask = <ffffffff>;
132 };
133
134 USB1: usb@e0000400 {
135 compatible = "ohci-be";
136 reg = <0 e0000400 60>;
137 interrupt-parent = <&UIC0>;
138 interrupts = <15 8>;
139 };
140
141 USB0: ehci@e0000300 {
142 compatible = "ibm,usb-ehci-440epx", "usb-ehci";
143 interrupt-parent = <&UIC0>;
144 interrupts = <1a 4>;
145 reg = <0 e0000300 90 0 e0000390 70>;
146 big-endian;
147 };
148
149 POB0: opb {
150 compatible = "ibm,opb-440epx", "ibm,opb";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 ranges = <00000000 1 00000000 80000000
154 80000000 1 80000000 80000000>;
155 interrupt-parent = <&UIC1>;
156 interrupts = <7 4>;
157 clock-frequency = <0>; /* Filled in by zImage */
158
159 EBC0: ebc {
160 compatible = "ibm,ebc-440epx", "ibm,ebc";
161 dcr-reg = <012 2>;
162 #address-cells = <2>;
163 #size-cells = <1>;
164 clock-frequency = <0>; /* Filled in by zImage */
165 interrupts = <5 1>;
166 interrupt-parent = <&UIC1>;
167
168 nor_flash@0,0 {
169 compatible = "amd,s29gl256n", "cfi-flash";
170 bank-width = <2>;
171 reg = <0 000000 4000000>;
172 #address-cells = <1>;
173 #size-cells = <1>;
174 partition@0 {
175 label = "Kernel";
176 reg = <0 180000>;
177 };
178 partition@180000 {
179 label = "ramdisk";
180 reg = <180000 200000>;
181 };
182 partition@380000 {
183 label = "file system";
184 reg = <380000 3aa0000>;
185 };
186 partition@3e20000 {
187 label = "kozio";
188 reg = <3e20000 140000>;
189 };
190 partition@3f60000 {
191 label = "env";
192 reg = <3f60000 40000>;
193 };
194 partition@3fa0000 {
195 label = "u-boot";
196 reg = <3fa0000 60000>;
197 };
198 };
199
200 };
201
202 UART0: serial@ef600300 {
203 device_type = "serial";
204 compatible = "ns16550";
205 reg = <ef600300 8>;
206 virtual-reg = <ef600300>;
207 clock-frequency = <0>; /* Filled in by zImage */
208 current-speed = <1c200>;
209 interrupt-parent = <&UIC0>;
210 interrupts = <0 4>;
211 };
212
213 UART1: serial@ef600400 {
214 device_type = "serial";
215 compatible = "ns16550";
216 reg = <ef600400 8>;
217 virtual-reg = <ef600400>;
218 clock-frequency = <0>;
219 current-speed = <0>;
220 interrupt-parent = <&UIC0>;
221 interrupts = <1 4>;
222 };
223
224 UART2: serial@ef600500 {
225 device_type = "serial";
226 compatible = "ns16550";
227 reg = <ef600500 8>;
228 virtual-reg = <ef600500>;
229 clock-frequency = <0>;
230 current-speed = <0>;
231 interrupt-parent = <&UIC1>;
232 interrupts = <3 4>;
233 };
234
235 UART3: serial@ef600600 {
236 device_type = "serial";
237 compatible = "ns16550";
238 reg = <ef600600 8>;
239 virtual-reg = <ef600600>;
240 clock-frequency = <0>;
241 current-speed = <0>;
242 interrupt-parent = <&UIC1>;
243 interrupts = <4 4>;
244 };
245
246 IIC0: i2c@ef600700 {
247 device_type = "i2c";
248 compatible = "ibm,iic-440epx", "ibm,iic";
249 reg = <ef600700 14>;
250 interrupt-parent = <&UIC0>;
251 interrupts = <2 4>;
252 };
253
254 IIC1: i2c@ef600800 {
255 device_type = "i2c";
256 compatible = "ibm,iic-440epx", "ibm,iic";
257 reg = <ef600800 14>;
258 interrupt-parent = <&UIC0>;
259 interrupts = <7 4>;
260 };
261
262 ZMII0: emac-zmii@ef600d00 {
263 device_type = "zmii-interface";
264 compatible = "ibm,zmii-440epx", "ibm,zmii";
265 reg = <ef600d00 c>;
266 };
267
268 RGMII0: emac-rgmii@ef601000 {
269 device_type = "rgmii-interface";
270 compatible = "ibm,rgmii-440epx", "ibm,rgmii";
271 reg = <ef601000 8>;
272 has-mdio;
273 };
274
275 EMAC0: ethernet@ef600e00 {
276 linux,network-index = <0>;
277 device_type = "network";
278 compatible = "ibm,emac-440epx", "ibm,emac4";
279 interrupt-parent = <&EMAC0>;
280 interrupts = <0 1>;
281 #interrupt-cells = <1>;
282 #address-cells = <0>;
283 #size-cells = <0>;
284 interrupt-map = </*Status*/ 0 &UIC0 18 4
285 /*Wake*/ 1 &UIC1 1d 4>;
286 reg = <ef600e00 70>;
287 local-mac-address = [000000000000];
288 mal-device = <&MAL0>;
289 mal-tx-channel = <0>;
290 mal-rx-channel = <0>;
291 cell-index = <0>;
292 max-frame-size = <5dc>;
293 rx-fifo-size = <1000>;
294 tx-fifo-size = <800>;
295 phy-mode = "rgmii";
296 phy-map = <00000000>;
297 zmii-device = <&ZMII0>;
298 zmii-channel = <0>;
299 rgmii-device = <&RGMII0>;
300 rgmii-channel = <0>;
301 has-inverted-stacr-oc;
302 has-new-stacr-staopc;
303 };
304
305 EMAC1: ethernet@ef600f00 {
306 linux,network-index = <1>;
307 device_type = "network";
308 compatible = "ibm,emac-440epx", "ibm,emac4";
309 interrupt-parent = <&EMAC1>;
310 interrupts = <0 1>;
311 #interrupt-cells = <1>;
312 #address-cells = <0>;
313 #size-cells = <0>;
314 interrupt-map = </*Status*/ 0 &UIC0 19 4
315 /*Wake*/ 1 &UIC1 1f 4>;
316 reg = <ef600f00 70>;
317 local-mac-address = [000000000000];
318 mal-device = <&MAL0>;
319 mal-tx-channel = <1>;
320 mal-rx-channel = <1>;
321 cell-index = <1>;
322 max-frame-size = <5dc>;
323 rx-fifo-size = <1000>;
324 tx-fifo-size = <800>;
325 phy-mode = "rgmii";
326 phy-map = <00000000>;
327 zmii-device = <&ZMII0>;
328 zmii-channel = <1>;
329 rgmii-device = <&RGMII0>;
330 rgmii-channel = <1>;
331 has-inverted-stacr-oc;
332 has-new-stacr-staopc;
333 };
334 };
335
336 PCI0: pci@1ec000000 {
337 device_type = "pci";
338 #interrupt-cells = <1>;
339 #size-cells = <2>;
340 #address-cells = <3>;
341 compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
342 primary;
343 reg = <1 eec00000 8 /* Config space access */
344 1 eed00000 4 /* IACK */
345 1 eed00000 4 /* Special cycle */
346 1 ef400000 40>; /* Internal registers */
347
348 /* Outbound ranges, one memory and one IO,
349 * later cannot be changed. Chip supports a second
350 * IO range but we don't use it for now
351 */
352 ranges = <02000000 0 80000000 1 80000000 0 10000000
353 01000000 0 00000000 1 e8000000 0 00100000>;
354
355 /* Inbound 2GB range starting at 0 */
356 dma-ranges = <42000000 0 0 0 0 0 80000000>;
357
358 /* All PCI interrupts are routed to IRQ 67 */
359 interrupt-map-mask = <0000 0 0 0>;
360 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
361 };
362 };
363
364 chosen {
365 linux,stdout-path = "/plb/opb/serial@ef600300";
366 bootargs = "console=ttyS0,115200";
367 };
368 };