arch/mn10300/unit-asb2364/include/unit/timex.h

   1 /* timex.h: MN2WS0038 architecture timer specifications
   2  *
   3  * Copyright (C) 2002, 2010 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11 #ifndef _ASM_UNIT_TIMEX_H
  12 #define _ASM_UNIT_TIMEX_H
  13
  14 #ifndef __ASSEMBLY__
  15 #include <linux/irq.h>
  16 #endif /* __ASSEMBLY__ */
  17
  18 #include <asm/timer-regs.h>
  19 #include <unit/clock.h>
  20 #include <asm/param.h>
  21
  22 /*
  23  * jiffies counter specifications
  24  */
  25
  26 #define TMJCBR_MAX              0xffffff        /* 24bit */
  27 #define TMJCIRQ                 TMTIRQ
  28
  29 #ifndef __ASSEMBLY__
  30
  31 #define MN10300_SRC_IOBCLK      MN10300_IOBCLK
  32
  33 #ifndef HZ
  34 # error HZ undeclared.
  35 #endif /* !HZ */
  36
  37 #define MN10300_JCCLK           (MN10300_SRC_IOBCLK)
  38 #define MN10300_TSCCLK          (MN10300_SRC_IOBCLK)
  39
  40 #define MN10300_JC_PER_HZ       ((MN10300_JCCLK + HZ / 2) / HZ)
  41 #define MN10300_TSC_PER_HZ      ((MN10300_TSCCLK + HZ / 2) / HZ)
  42
  43 /* Check bit width of MTM interval value that sets base register */
  44 #if (MN10300_JC_PER_HZ - 1) > TMJCBR_MAX
  45 # error MTM tick timer interval value is overflow.
  46 #endif
  47
  48 static inline void stop_jiffies_counter(void)
  49 {
  50         u16 tmp;
  51         TMTMD = 0;
  52         tmp = TMTMD;
  53 }
  54
  55 static inline void reload_jiffies_counter(u32 cnt)
  56 {
  57         u32 tmp;
  58
  59         TMTBR = cnt;
  60         tmp = TMTBR;
  61
  62         TMTMD = TMTMD_TMTLDE;
  63         TMTMD = TMTMD_TMTCNE;
  64         tmp = TMTMD;
  65 }
  66
  67 #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS) && \
  68     !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  69 /*
  70  * If we aren't using broadcasting, each core needs its own event timer.
  71  * Since CPU0 uses the tick timer which is 24-bits, we use timer 4 & 5
  72  * cascaded to 32-bits for CPU1 (but only really use 24-bits to match
  73  * CPU0).
  74  */
  75
  76 #define TMJC1IRQ                TM5IRQ
  77
  78 static inline void stop_jiffies_counter1(void)
  79 {
  80         u8 tmp;
  81         TM4MD = 0;
  82         TM5MD = 0;
  83         tmp = TM4MD;
  84         tmp = TM5MD;
  85 }
  86
  87 static inline void reload_jiffies_counter1(u32 cnt)
  88 {
  89         u32 tmp;
  90
  91         TM45BR = cnt;
  92         tmp = TM45BR;
  93
  94         TM4MD = TM4MD_INIT_COUNTER;
  95         tmp = TM4MD;
  96
  97         TM5MD = TM5MD_SRC_TM4CASCADE | TM5MD_INIT_COUNTER;
  98         TM5MD = TM5MD_SRC_TM4CASCADE | TM5MD_COUNT_ENABLE;
  99         tmp = TM5MD;
 100
 101         TM4MD = TM4MD_COUNT_ENABLE;
 102         tmp = TM4MD;
 103 }
 104 #endif /* CONFIG_SMP&GENERIC_CLOCKEVENTS&!GENERIC_CLOCKEVENTS_BROADCAST */
 105
 106 #endif /* !__ASSEMBLY__ */
 107
 108
 109 /*
 110  * timestamp counter specifications
 111  */
 112 #define TMTSCBR_MAX     0xffffffff
 113
 114 #ifndef __ASSEMBLY__
 115
 116 /* Use 32-bit timestamp counter */
 117 #define TMTSCMD         TMSMD
 118 #define TMTSCBR         TMSBR
 119 #define TMTSCBC         TMSBC
 120 #define TMTSCICR        TMSICR
 121
 122 static inline void startup_timestamp_counter(void)
 123 {
 124         u32 sync;
 125
 126         /* set up TMS(Timestamp) 32bit timer register to count real time
 127          * - count down from 4Gig-1 to 0 and wrap at IOBCLK rate
 128          */
 129
 130         TMTSCBR = TMTSCBR_MAX;
 131         sync = TMTSCBR;
 132
 133         TMTSCICR = 0;
 134         sync = TMTSCICR;
 135
 136         TMTSCMD = TMTMD_TMTLDE;
 137         TMTSCMD = TMTMD_TMTCNE;
 138         sync = TMTSCMD;
 139 }
 140
 141 static inline void shutdown_timestamp_counter(void)
 142 {
 143         TMTSCMD = 0;
 144 }
 145
 146 /*
 147  * we use a cascaded pair of 16-bit down-counting timers to count I/O
 148  * clock cycles for the purposes of time keeping
 149  */
 150 typedef unsigned long cycles_t;
 151
 152 static inline cycles_t read_timestamp_counter(void)
 153 {
 154         return (cycles_t)~TMTSCBC;
 155 }
 156
 157 #endif /* !__ASSEMBLY__ */
 158
 159 #endif /* _ASM_UNIT_TIMEX_H */