staging: dwc2: remove compile warning for USB_DWC2_TRACK_MISSED_SOFS
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / mips / vr41xx / common / pmu.c
1 /*
2 * pmu.c, Power Management Unit routines for NEC VR4100 series.
3 *
4 * Copyright (C) 2003-2007 Yoichi Yuasa <yuasa@linux-mips.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/kernel.h>
24 #include <linux/pm.h>
25 #include <linux/sched.h>
26 #include <linux/types.h>
27
28 #include <asm/cacheflush.h>
29 #include <asm/cpu.h>
30 #include <asm/io.h>
31 #include <asm/processor.h>
32 #include <asm/reboot.h>
33
34 #define PMU_TYPE1_BASE 0x0b0000a0UL
35 #define PMU_TYPE1_SIZE 0x0eUL
36
37 #define PMU_TYPE2_BASE 0x0f0000c0UL
38 #define PMU_TYPE2_SIZE 0x10UL
39
40 #define PMUCNT2REG 0x06
41 #define SOFTRST 0x0010
42
43 static void __iomem *pmu_base;
44
45 #define pmu_read(offset) readw(pmu_base + (offset))
46 #define pmu_write(offset, value) writew((value), pmu_base + (offset))
47
48 static void vr41xx_cpu_wait(void)
49 {
50 local_irq_disable();
51 if (!need_resched())
52 /*
53 * "standby" sets IE bit of the CP0_STATUS to 1.
54 */
55 __asm__("standby;\n");
56 else
57 local_irq_enable();
58 }
59
60 static inline void software_reset(void)
61 {
62 uint16_t pmucnt2;
63
64 switch (current_cpu_type()) {
65 case CPU_VR4122:
66 case CPU_VR4131:
67 case CPU_VR4133:
68 pmucnt2 = pmu_read(PMUCNT2REG);
69 pmucnt2 |= SOFTRST;
70 pmu_write(PMUCNT2REG, pmucnt2);
71 break;
72 default:
73 set_c0_status(ST0_BEV | ST0_ERL);
74 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
75 flush_cache_all();
76 write_c0_wired(0);
77 __asm__("jr %0"::"r"(0xbfc00000));
78 break;
79 }
80 }
81
82 static void vr41xx_restart(char *command)
83 {
84 local_irq_disable();
85 software_reset();
86 while (1) ;
87 }
88
89 static void vr41xx_halt(void)
90 {
91 local_irq_disable();
92 printk(KERN_NOTICE "\nYou can turn off the power supply\n");
93 __asm__("hibernate;\n");
94 }
95
96 static int __init vr41xx_pmu_init(void)
97 {
98 unsigned long start, size;
99
100 switch (current_cpu_type()) {
101 case CPU_VR4111:
102 case CPU_VR4121:
103 start = PMU_TYPE1_BASE;
104 size = PMU_TYPE1_SIZE;
105 break;
106 case CPU_VR4122:
107 case CPU_VR4131:
108 case CPU_VR4133:
109 start = PMU_TYPE2_BASE;
110 size = PMU_TYPE2_SIZE;
111 break;
112 default:
113 printk("Unexpected CPU of NEC VR4100 series\n");
114 return -ENODEV;
115 }
116
117 if (request_mem_region(start, size, "PMU") == NULL)
118 return -EBUSY;
119
120 pmu_base = ioremap(start, size);
121 if (pmu_base == NULL) {
122 release_mem_region(start, size);
123 return -EBUSY;
124 }
125
126 cpu_wait = vr41xx_cpu_wait;
127 _machine_restart = vr41xx_restart;
128 _machine_halt = vr41xx_halt;
129 pm_power_off = vr41xx_halt;
130
131 return 0;
132 }
133
134 core_initcall(vr41xx_pmu_init);