Linux-2.6.12-rc2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / mips / tx4927 / common / tx4927_setup.c
1 /*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2002 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27 #include <linux/config.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/kernel_stat.h>
31 #include <linux/module.h>
32 #include <linux/signal.h>
33 #include <linux/sched.h>
34 #include <linux/types.h>
35 #include <linux/interrupt.h>
36 #include <linux/ioport.h>
37 #include <linux/timex.h>
38 #include <linux/slab.h>
39 #include <linux/random.h>
40 #include <linux/irq.h>
41 #include <linux/bitops.h>
42 #include <asm/bootinfo.h>
43 #include <asm/io.h>
44 #include <asm/irq.h>
45 #include <asm/mipsregs.h>
46 #include <asm/system.h>
47 #include <asm/time.h>
48 #include <asm/tx4927/tx4927.h>
49
50
51 #undef DEBUG
52
53 void __init tx4927_time_init(void);
54 void __init tx4927_timer_setup(struct irqaction *irq);
55 void dump_cp0(char *key);
56
57
58 void (*__wbflush) (void);
59
60 static void tx4927_write_buffer_flush(void)
61 {
62 __asm__ __volatile__
63 ("sync\n\t" "nop\n\t" "loop: bc0f loop\n\t" "nop\n\t");
64 }
65
66
67 static void __init tx4927_setup(void)
68 {
69 board_time_init = tx4927_time_init;
70 board_timer_setup = tx4927_timer_setup;
71 __wbflush = tx4927_write_buffer_flush;
72
73 #ifdef CONFIG_TOSHIBA_RBTX4927
74 {
75 extern void toshiba_rbtx4927_setup(void);
76 toshiba_rbtx4927_setup();
77 }
78 #endif
79
80 return;
81 }
82
83 early_initcall(tx4927_setup);
84
85 void __init tx4927_time_init(void)
86 {
87
88 #ifdef CONFIG_TOSHIBA_RBTX4927
89 {
90 extern void toshiba_rbtx4927_time_init(void);
91 toshiba_rbtx4927_time_init();
92 }
93 #endif
94
95 return;
96 }
97
98
99 void __init tx4927_timer_setup(struct irqaction *irq)
100 {
101 u32 count;
102 u32 c1;
103 u32 c2;
104
105 setup_irq(TX4927_IRQ_CPU_TIMER, irq);
106
107 /* to generate the first timer interrupt */
108 c1 = read_c0_count();
109 count = c1 + (mips_hpt_frequency / HZ);
110 write_c0_compare(count);
111 c2 = read_c0_count();
112
113 #ifdef CONFIG_TOSHIBA_RBTX4927
114 {
115 extern void toshiba_rbtx4927_timer_setup(struct irqaction
116 *irq);
117 toshiba_rbtx4927_timer_setup(irq);
118 }
119 #endif
120
121 return;
122 }
123
124
125 #ifdef DEBUG
126 void print_cp0(char *key, int num, char *name, u32 val)
127 {
128 printk("%s cp0:%02d:%s=0x%08x\n", key, num, name, val);
129 return;
130 }
131
132 indent: Standard input:25: Error:Unexpected end of file
133
134 void
135 dump_cp0(char *key)
136 {
137 if (key == NULL)
138 key = "";
139
140 print_cp0(key, 0, "INDEX ", read_c0_index());
141 print_cp0(key, 2, "ENTRYLO1", read_c0_entrylo0());
142 print_cp0(key, 3, "ENTRYLO2", read_c0_entrylo1());
143 print_cp0(key, 4, "CONTEXT ", read_c0_context());
144 print_cp0(key, 5, "PAGEMASK", read_c0_pagemask());
145 print_cp0(key, 6, "WIRED ", read_c0_wired());
146 //print_cp0(key, 8, "BADVADDR", read_c0_badvaddr());
147 print_cp0(key, 9, "COUNT ", read_c0_count());
148 print_cp0(key, 10, "ENTRYHI ", read_c0_entryhi());
149 print_cp0(key, 11, "COMPARE ", read_c0_compare());
150 print_cp0(key, 12, "STATUS ", read_c0_status());
151 print_cp0(key, 13, "CAUSE ", read_c0_cause() & 0xffff87ff);
152 print_cp0(key, 16, "CONFIG ", read_c0_config());
153 return;
154 }
155
156 void print_pic(char *key, u32 reg, char *name)
157 {
158 printk("%s pic:0x%08x:%s=0x%08x\n", key, reg, name,
159 TX4927_RD(reg));
160 return;
161 }
162
163
164 void dump_pic(char *key)
165 {
166 if (key == NULL)
167 key = "";
168
169 print_pic(key, 0xff1ff600, "IRDEN ");
170 print_pic(key, 0xff1ff604, "IRDM0 ");
171 print_pic(key, 0xff1ff608, "IRDM1 ");
172
173 print_pic(key, 0xff1ff610, "IRLVL0 ");
174 print_pic(key, 0xff1ff614, "IRLVL1 ");
175 print_pic(key, 0xff1ff618, "IRLVL2 ");
176 print_pic(key, 0xff1ff61c, "IRLVL3 ");
177 print_pic(key, 0xff1ff620, "IRLVL4 ");
178 print_pic(key, 0xff1ff624, "IRLVL5 ");
179 print_pic(key, 0xff1ff628, "IRLVL6 ");
180 print_pic(key, 0xff1ff62c, "IRLVL7 ");
181
182 print_pic(key, 0xff1ff640, "IRMSK ");
183 print_pic(key, 0xff1ff660, "IREDC ");
184 print_pic(key, 0xff1ff680, "IRPND ");
185 print_pic(key, 0xff1ff6a0, "IRCS ");
186
187 print_pic(key, 0xff1ff514, "IRFLAG1 "); /* don't read IRLAG0 -- it hangs system */
188
189 print_pic(key, 0xff1ff518, "IRPOL ");
190 print_pic(key, 0xff1ff51c, "IRRCNT ");
191 print_pic(key, 0xff1ff520, "IRMASKINT");
192 print_pic(key, 0xff1ff524, "IRMASKEXT");
193
194 return;
195 }
196
197
198 void print_addr(char *hdr, char *key, u32 addr)
199 {
200 printk("%s %s:0x%08x=0x%08x\n", hdr, key, addr, TX4927_RD(addr));
201 return;
202 }
203
204
205 void dump_180(char *key)
206 {
207 u32 i;
208
209 for (i = 0x80000180; i < 0x80000180 + 0x80; i += 4) {
210 print_addr("180", key, i);
211 }
212 return;
213 }
214
215
216 void dump_eh0(char *key)
217 {
218 int i;
219 extern unsigned long exception_handlers[];
220
221 for (i = (int) exception_handlers;
222 i < (int) (exception_handlers + 20); i += 4) {
223 print_addr("eh0", key, i);
224 }
225
226 return;
227 }
228
229 void pk0(void)
230 {
231 volatile u32 val;
232
233 __asm__ __volatile__("ori %0, $26, 0":"=r"(val)
234 );
235 printk("k0=[0x%08x]\n", val);
236 }
237 #endif