arch/mips/sibyte/Kconfig

   1 config SIBYTE_SB1250
   2         bool
   3         select HW_HAS_PCI
   4         select IRQ_CPU
   5         select SIBYTE_ENABLE_LDT_IF_PCI
   6         select SIBYTE_HAS_ZBUS_PROFILING
   7         select SIBYTE_SB1xxx_SOC
   8         select SYS_SUPPORTS_SMP
   9
  10 config SIBYTE_BCM1120
  11         bool
  12         select IRQ_CPU
  13         select SIBYTE_BCM112X
  14         select SIBYTE_HAS_ZBUS_PROFILING
  15         select SIBYTE_SB1xxx_SOC
  16
  17 config SIBYTE_BCM1125
  18         bool
  19         select HW_HAS_PCI
  20         select IRQ_CPU
  21         select SIBYTE_BCM112X
  22         select SIBYTE_HAS_ZBUS_PROFILING
  23         select SIBYTE_SB1xxx_SOC
  24
  25 config SIBYTE_BCM1125H
  26         bool
  27         select HW_HAS_PCI
  28         select IRQ_CPU
  29         select SIBYTE_BCM112X
  30         select SIBYTE_ENABLE_LDT_IF_PCI
  31         select SIBYTE_HAS_ZBUS_PROFILING
  32         select SIBYTE_SB1xxx_SOC
  33
  34 config SIBYTE_BCM112X
  35         bool
  36         select IRQ_CPU
  37         select SIBYTE_SB1xxx_SOC
  38         select SIBYTE_HAS_ZBUS_PROFILING
  39
  40 config SIBYTE_BCM1x80
  41         bool
  42         select HW_HAS_PCI
  43         select IRQ_CPU
  44         select SIBYTE_HAS_ZBUS_PROFILING
  45         select SIBYTE_SB1xxx_SOC
  46         select SYS_SUPPORTS_SMP
  47
  48 config SIBYTE_BCM1x55
  49         bool
  50         select HW_HAS_PCI
  51         select IRQ_CPU
  52         select SIBYTE_SB1xxx_SOC
  53         select SIBYTE_HAS_ZBUS_PROFILING
  54         select SYS_SUPPORTS_SMP
  55
  56 config SIBYTE_SB1xxx_SOC
  57         bool
  58         select DMA_COHERENT
  59         select IRQ_CPU
  60         select SIBYTE_CFE
  61         select SWAP_IO_SPACE
  62         select SYS_SUPPORTS_32BIT_KERNEL
  63         select SYS_SUPPORTS_64BIT_KERNEL
  64
  65 choice
  66         prompt "SiByte SOC Stepping"
  67         depends on SIBYTE_SB1xxx_SOC
  68
  69 config CPU_SB1_PASS_1
  70         bool "1250 Pass1"
  71         depends on SIBYTE_SB1250
  72         select CPU_HAS_PREFETCH
  73
  74 config CPU_SB1_PASS_2_1250
  75         bool "1250 An"
  76         depends on SIBYTE_SB1250
  77         select CPU_SB1_PASS_2
  78         help
  79           Also called BCM1250 Pass 2
  80
  81 config CPU_SB1_PASS_2_2
  82         bool "1250 Bn"
  83         depends on SIBYTE_SB1250
  84         select CPU_HAS_PREFETCH
  85         help
  86           Also called BCM1250 Pass 2.2
  87
  88 config CPU_SB1_PASS_4
  89         bool "1250 Cn"
  90         depends on SIBYTE_SB1250
  91         select CPU_HAS_PREFETCH
  92         help
  93           Also called BCM1250 Pass 3
  94
  95 config CPU_SB1_PASS_2_112x
  96         bool "112x Hybrid"
  97         depends on SIBYTE_BCM112X
  98         select CPU_SB1_PASS_2
  99
 100 config CPU_SB1_PASS_3
 101         bool "112x An"
 102         depends on SIBYTE_BCM112X
 103         select CPU_HAS_PREFETCH
 104
 105 endchoice
 106
 107 config CPU_SB1_PASS_2
 108         bool
 109
 110 config SIBYTE_HAS_LDT
 111         bool
 112
 113 config SIBYTE_ENABLE_LDT_IF_PCI
 114         bool
 115         select SIBYTE_HAS_LDT if PCI
 116
 117 config SIMULATION
 118         bool "Running under simulation"
 119         depends on SIBYTE_SB1xxx_SOC
 120         help
 121           Build a kernel suitable for running under the GDB simulator.
 122           Primarily adjusts the kernel's notion of time.
 123
 124 config SB1_CEX_ALWAYS_FATAL
 125         bool "All cache exceptions considered fatal (no recovery attempted)"
 126         depends on SIBYTE_SB1xxx_SOC
 127
 128 config SB1_CERR_STALL
 129         bool "Stall (rather than panic) on fatal cache error"
 130         depends on SIBYTE_SB1xxx_SOC
 131
 132 config SIBYTE_CFE
 133         bool "Booting from CFE"
 134         depends on SIBYTE_SB1xxx_SOC
 135         select CFE
 136         select SYS_HAS_EARLY_PRINTK
 137         help
 138           Make use of the CFE API for enumerating available memory,
 139           controlling secondary CPUs, and possibly console output.
 140
 141 config SIBYTE_CFE_CONSOLE
 142         bool "Use firmware console"
 143         depends on SIBYTE_CFE
 144         help
 145           Use the CFE API's console write routines during boot.  Other console
 146           options (VT console, sb1250 duart console, etc.) should not be
 147           configured.
 148
 149 config SIBYTE_STANDALONE
 150         bool
 151         depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
 152         select SYS_HAS_EARLY_PRINTK
 153         default y
 154
 155 config SIBYTE_STANDALONE_RAM_SIZE
 156         int "Memory size (in megabytes)"
 157         depends on SIBYTE_STANDALONE
 158         default "32"
 159
 160 config SIBYTE_BUS_WATCHER
 161         bool "Support for Bus Watcher statistics"
 162         depends on SIBYTE_SB1xxx_SOC
 163         help
 164           Handle and keep statistics on the bus error interrupts (COR_ECC,
 165           BAD_ECC, IO_BUS).
 166
 167 config SIBYTE_BW_TRACE
 168         bool "Capture bus trace before bus error"
 169         depends on SIBYTE_BUS_WATCHER
 170         help
 171           Run a continuous bus trace, dumping the raw data as soon as
 172           a ZBbus error is detected.  Cannot work if ZBbus profiling
 173           is turned on, and also will interfere with JTAG-based trace
 174           buffer activity.  Raw buffer data is dumped to console, and
 175           must be processed off-line.
 176
 177 config SIBYTE_TBPROF
 178         tristate "Support for ZBbus profiling"
 179         depends on SIBYTE_HAS_ZBUS_PROFILING
 180
 181 config SIBYTE_HAS_ZBUS_PROFILING
 182         bool