arch/m68k/Kconfig.cpu

   1 comment "Processor Type"
   2
   3 choice
   4         prompt "CPU family support"
   5         default M68KCLASSIC if MMU
   6         default COLDFIRE if !MMU
   7         help
   8           The Freescale (was Motorola) M68K family of processors implements
   9           the full 68000 processor instruction set.
  10           The Freescale ColdFire family of processors is a modern derivative
  11           of the 68000 processor family. They are mainly targeted at embedded
  12           applications, and are all System-On-Chip (SOC) devices, as opposed
  13           to stand alone CPUs. They implement a subset of the original 68000
  14           processor instruction set.
  15           If you anticipate running this kernel on a computer with a classic
  16           MC68xxx processor, select M68KCLASSIC.
  17           If you anticipate running this kernel on a computer with a ColdFire
  18           processor, select COLDFIRE.
  19
  20 config M68KCLASSIC
  21         bool "Classic M68K CPU family support"
  22
  23 config COLDFIRE
  24         bool "Coldfire CPU family support"
  25         select GENERIC_GPIO
  26         select ARCH_WANT_OPTIONAL_GPIOLIB
  27         select ARCH_HAVE_CUSTOM_GPIO_H
  28         select CPU_HAS_NO_BITFIELDS
  29         select CPU_HAS_NO_MULDIV64
  30         select GENERIC_CSUM
  31         select HAVE_CLK
  32
  33 endchoice
  34
  35 if M68KCLASSIC
  36
  37 config M68000
  38         bool "MC68000"
  39         depends on !MMU
  40         select CPU_HAS_NO_BITFIELDS
  41         select CPU_HAS_NO_MULDIV64
  42         select CPU_HAS_NO_UNALIGNED
  43         select GENERIC_CSUM
  44         help
  45           The Freescale (was Motorola) 68000 CPU is the first generation of
  46           the well known M68K family of processors. The CPU core as well as
  47           being available as a stand alone CPU was also used in many
  48           System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  49           a paging MMU.
  50
  51 config MCPU32
  52         bool
  53         select CPU_HAS_NO_BITFIELDS
  54         select CPU_HAS_NO_UNALIGNED
  55         help
  56           The Freescale (was then Motorola) CPU32 is a CPU core that is
  57           based on the 68020 processor. For the most part it is used in
  58           System-On-Chip parts, and does not contain a paging MMU.
  59
  60 config M68020
  61         bool "68020 support"
  62         depends on MMU
  63         select CPU_HAS_ADDRESS_SPACES
  64         help
  65           If you anticipate running this kernel on a computer with a MC68020
  66           processor, say Y. Otherwise, say N. Note that the 68020 requires a
  67           68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  68           Sun 3, which provides its own version.
  69
  70 config M68030
  71         bool "68030 support"
  72         depends on MMU && !MMU_SUN3
  73         select CPU_HAS_ADDRESS_SPACES
  74         help
  75           If you anticipate running this kernel on a computer with a MC68030
  76           processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  77           work, as it does not include an MMU (Memory Management Unit).
  78
  79 config M68040
  80         bool "68040 support"
  81         depends on MMU && !MMU_SUN3
  82         select CPU_HAS_ADDRESS_SPACES
  83         help
  84           If you anticipate running this kernel on a computer with a MC68LC040
  85           or MC68040 processor, say Y. Otherwise, say N. Note that an
  86           MC68EC040 will not work, as it does not include an MMU (Memory
  87           Management Unit).
  88
  89 config M68060
  90         bool "68060 support"
  91         depends on MMU && !MMU_SUN3
  92         select CPU_HAS_ADDRESS_SPACES
  93         help
  94           If you anticipate running this kernel on a computer with a MC68060
  95           processor, say Y. Otherwise, say N.
  96
  97 config M68328
  98         bool "MC68328"
  99         depends on !MMU
 100         select M68000
 101         help
 102           Motorola 68328 processor support.
 103
 104 config M68EZ328
 105         bool "MC68EZ328"
 106         depends on !MMU
 107         select M68000
 108         help
 109           Motorola 68EX328 processor support.
 110
 111 config M68VZ328
 112         bool "MC68VZ328"
 113         depends on !MMU
 114         select M68000
 115         help
 116           Motorola 68VZ328 processor support.
 117
 118 config M68360
 119         bool "MC68360"
 120         depends on !MMU
 121         select MCPU32
 122         help
 123           Motorola 68360 processor support.
 124
 125 endif # M68KCLASSIC
 126
 127 if COLDFIRE
 128
 129 config M5206
 130         bool "MCF5206"
 131         depends on !MMU
 132         select COLDFIRE_SW_A7
 133         select HAVE_MBAR
 134         help
 135           Motorola ColdFire 5206 processor support.
 136
 137 config M5206e
 138         bool "MCF5206e"
 139         depends on !MMU
 140         select COLDFIRE_SW_A7
 141         select HAVE_MBAR
 142         help
 143           Motorola ColdFire 5206e processor support.
 144
 145 config M520x
 146         bool "MCF520x"
 147         depends on !MMU
 148         select GENERIC_CLOCKEVENTS
 149         select HAVE_CACHE_SPLIT
 150         help
 151            Freescale Coldfire 5207/5208 processor support.
 152
 153 config M523x
 154         bool "MCF523x"
 155         depends on !MMU
 156         select GENERIC_CLOCKEVENTS
 157         select HAVE_CACHE_SPLIT
 158         select HAVE_IPSBAR
 159         help
 160           Freescale Coldfire 5230/1/2/4/5 processor support
 161
 162 config M5249
 163         bool "MCF5249"
 164         depends on !MMU
 165         select COLDFIRE_SW_A7
 166         select HAVE_MBAR
 167         help
 168           Motorola ColdFire 5249 processor support.
 169
 170 config M525x
 171         bool "MCF525x"
 172         depends on !MMU
 173         select COLDFIRE_SW_A7
 174         select HAVE_MBAR
 175         help
 176           Freescale (Motorola) Coldfire 5251/5253 processor support.
 177
 178 config M527x
 179         bool
 180
 181 config M5271
 182         bool "MCF5271"
 183         depends on !MMU
 184         select M527x
 185         select HAVE_CACHE_SPLIT
 186         select HAVE_IPSBAR
 187         select GENERIC_CLOCKEVENTS
 188         help
 189           Freescale (Motorola) ColdFire 5270/5271 processor support.
 190
 191 config M5272
 192         bool "MCF5272"
 193         depends on !MMU
 194         select COLDFIRE_SW_A7
 195         select HAVE_MBAR
 196         help
 197           Motorola ColdFire 5272 processor support.
 198
 199 config M5275
 200         bool "MCF5275"
 201         depends on !MMU
 202         select M527x
 203         select HAVE_CACHE_SPLIT
 204         select HAVE_IPSBAR
 205         select GENERIC_CLOCKEVENTS
 206         help
 207           Freescale (Motorola) ColdFire 5274/5275 processor support.
 208
 209 config M528x
 210         bool "MCF528x"
 211         depends on !MMU
 212         select GENERIC_CLOCKEVENTS
 213         select HAVE_CACHE_SPLIT
 214         select HAVE_IPSBAR
 215         help
 216           Motorola ColdFire 5280/5282 processor support.
 217
 218 config M5307
 219         bool "MCF5307"
 220         depends on !MMU
 221         select COLDFIRE_SW_A7
 222         select HAVE_CACHE_CB
 223         select HAVE_MBAR
 224         help
 225           Motorola ColdFire 5307 processor support.
 226
 227 config M532x
 228         bool "MCF532x"
 229         depends on !MMU
 230         select HAVE_CACHE_CB
 231         help
 232           Freescale (Motorola) ColdFire 532x processor support.
 233
 234 config M5407
 235         bool "MCF5407"
 236         depends on !MMU
 237         select COLDFIRE_SW_A7
 238         select HAVE_CACHE_CB
 239         select HAVE_MBAR
 240         help
 241           Motorola ColdFire 5407 processor support.
 242
 243 config M54xx
 244         bool
 245
 246 config M547x
 247         bool "MCF547x"
 248         select M54xx
 249         select MMU_COLDFIRE if MMU
 250         select HAVE_CACHE_CB
 251         select HAVE_MBAR
 252         help
 253           Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
 254
 255 config M548x
 256         bool "MCF548x"
 257         select MMU_COLDFIRE if MMU
 258         select M54xx
 259         select HAVE_CACHE_CB
 260         select HAVE_MBAR
 261         help
 262           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 263
 264 config M5441x
 265         bool "MCF5441x"
 266         depends on !MMU
 267         select GENERIC_CLOCKEVENTS
 268         select HAVE_CACHE_CB
 269         help
 270           Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
 271
 272 endif # COLDFIRE
 273
 274
 275 comment "Processor Specific Options"
 276
 277 config M68KFPU_EMU
 278         bool "Math emulation support"
 279         depends on MMU
 280         help
 281           At some point in the future, this will cause floating-point math
 282           instructions to be emulated by the kernel on machines that lack a
 283           floating-point math coprocessor.  Thrill-seekers and chronically
 284           sleep-deprived psychotic hacker types can say Y now, everyone else
 285           should probably wait a while.
 286
 287 config M68KFPU_EMU_EXTRAPREC
 288         bool "Math emulation extra precision"
 289         depends on M68KFPU_EMU
 290         help
 291           The fpu uses normally a few bit more during calculations for
 292           correct rounding, the emulator can (often) do the same but this
 293           extra calculation can cost quite some time, so you can disable
 294           it here. The emulator will then "only" calculate with a 64 bit
 295           mantissa and round slightly incorrect, what is more than enough
 296           for normal usage.
 297
 298 config M68KFPU_EMU_ONLY
 299         bool "Math emulation only kernel"
 300         depends on M68KFPU_EMU
 301         help
 302           This option prevents any floating-point instructions from being
 303           compiled into the kernel, thereby the kernel doesn't save any
 304           floating point context anymore during task switches, so this
 305           kernel will only be usable on machines without a floating-point
 306           math coprocessor. This makes the kernel a bit faster as no tests
 307           needs to be executed whether a floating-point instruction in the
 308           kernel should be executed or not.
 309
 310 config ADVANCED
 311         bool "Advanced configuration options"
 312         depends on MMU
 313         ---help---
 314           This gives you access to some advanced options for the CPU. The
 315           defaults should be fine for most users, but these options may make
 316           it possible for you to improve performance somewhat if you know what
 317           you are doing.
 318
 319           Note that the answer to this question won't directly affect the
 320           kernel: saying N will just cause the configurator to skip all
 321           the questions about these options.
 322
 323           Most users should say N to this question.
 324
 325 config RMW_INSNS
 326         bool "Use read-modify-write instructions"
 327         depends on ADVANCED
 328         ---help---
 329           This allows to use certain instructions that work with indivisible
 330           read-modify-write bus cycles. While this is faster than the
 331           workaround of disabling interrupts, it can conflict with DMA
 332           ( = direct memory access) on many Amiga systems, and it is also said
 333           to destabilize other machines. It is very likely that this will
 334           cause serious problems on any Amiga or Atari Medusa if set. The only
 335           configuration where it should work are 68030-based Ataris, where it
 336           apparently improves performance. But you've been warned! Unless you
 337           really know what you are doing, say N. Try Y only if you're quite
 338           adventurous.
 339
 340 config SINGLE_MEMORY_CHUNK
 341         bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
 342         depends on MMU
 343         default y if SUN3
 344         select NEED_MULTIPLE_NODES
 345         help
 346           Ignore all but the first contiguous chunk of physical memory for VM
 347           purposes.  This will save a few bytes kernel size and may speed up
 348           some operations.  Say N if not sure.
 349
 350 config ARCH_DISCONTIGMEM_ENABLE
 351         def_bool MMU && !SINGLE_MEMORY_CHUNK
 352
 353 config 060_WRITETHROUGH
 354         bool "Use write-through caching for 68060 supervisor accesses"
 355         depends on ADVANCED && M68060
 356         ---help---
 357           The 68060 generally uses copyback caching of recently accessed data.
 358           Copyback caching means that memory writes will be held in an on-chip
 359           cache and only written back to memory some time later.  Saying Y
 360           here will force supervisor (kernel) accesses to use writethrough
 361           caching.  Writethrough caching means that data is written to memory
 362           straight away, so that cache and memory data always agree.
 363           Writethrough caching is less efficient, but is needed for some
 364           drivers on 68060 based systems where the 68060 bus snooping signal
 365           is hardwired on.  The 53c710 SCSI driver is known to suffer from
 366           this problem.
 367
 368 config M68K_L2_CACHE
 369         bool
 370         depends on MAC
 371         default y
 372
 373 config NODES_SHIFT
 374         int
 375         default "3"
 376         depends on !SINGLE_MEMORY_CHUNK
 377
 378 config CPU_HAS_NO_BITFIELDS
 379         bool
 380
 381 config CPU_HAS_NO_MULDIV64
 382         bool
 383
 384 config CPU_HAS_NO_UNALIGNED
 385         bool
 386
 387 config CPU_HAS_ADDRESS_SPACES
 388         bool
 389
 390 config FPU
 391         bool
 392
 393 config COLDFIRE_SW_A7
 394         bool
 395
 396 config HAVE_CACHE_SPLIT
 397         bool
 398
 399 config HAVE_CACHE_CB
 400         bool
 401
 402 config HAVE_MBAR
 403         bool
 404
 405 config HAVE_IPSBAR
 406         bool
 407
 408 config CLOCK_SET
 409         bool "Enable setting the CPU clock frequency"
 410         depends on COLDFIRE
 411         default n
 412         help
 413           On some CPU's you do not need to know what the core CPU clock
 414           frequency is. On these you can disable clock setting. On some
 415           traditional 68K parts, and on all ColdFire parts you need to set
 416           the appropriate CPU clock frequency. On these devices many of the
 417           onboard peripherals derive their timing from the master CPU clock
 418           frequency.
 419
 420 config CLOCK_FREQ
 421         int "Set the core clock frequency"
 422         default "66666666"
 423         depends on CLOCK_SET
 424         help
 425           Define the CPU clock frequency in use. This is the core clock
 426           frequency, it may or may not be the same as the external clock
 427           crystal fitted to your board. Some processors have an internal
 428           PLL and can have their frequency programmed at run time, others
 429           use internal dividers. In general the kernel won't setup a PLL
 430           if it is fitted (there are some exceptions). This value will be
 431           specific to the exact CPU that you are using.
 432
 433 config OLDMASK
 434         bool "Old mask 5307 (1H55J) silicon"
 435         depends on M5307
 436         help
 437           Build support for the older revision ColdFire 5307 silicon.
 438           Specifically this is the 1H55J mask revision.
 439
 440 if HAVE_CACHE_SPLIT
 441 choice
 442         prompt "Split Cache Configuration"
 443         default CACHE_I
 444
 445 config CACHE_I
 446         bool "Instruction"
 447         help
 448           Use all of the ColdFire CPU cache memory as an instruction cache.
 449
 450 config CACHE_D
 451         bool "Data"
 452         help
 453           Use all of the ColdFire CPU cache memory as a data cache.
 454
 455 config CACHE_BOTH
 456         bool "Both"
 457         help
 458           Split the ColdFire CPU cache, and use half as an instruction cache
 459           and half as a data cache.
 460 endchoice
 461 endif
 462
 463 if HAVE_CACHE_CB
 464 choice
 465         prompt "Data cache mode"
 466         default CACHE_WRITETHRU
 467
 468 config CACHE_WRITETHRU
 469         bool "Write-through"
 470         help
 471           The ColdFire CPU cache is set into Write-through mode.
 472
 473 config CACHE_COPYBACK
 474         bool "Copy-back"
 475         help
 476           The ColdFire CPU cache is set into Copy-back mode.
 477 endchoice
 478 endif
 479